arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_HAVE_CUSTOM_GPIO_H
   5         select HAVE_AOUT
   6         select HAVE_DMA_API_DEBUG
   7         select HAVE_IDE if PCI || ISA || PCMCIA
   8         select HAVE_DMA_ATTRS
   9         select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
  10         select HAVE_MEMBLOCK
  11         select RTC_LIB
  12         select SYS_SUPPORTS_APM_EMULATION
  13         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  14         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  15         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  16         select HAVE_ARCH_KGDB
  17         select HAVE_ARCH_TRACEHOOK
  18         select HAVE_KPROBES if !XIP_KERNEL
  19         select HAVE_KRETPROBES if (HAVE_KPROBES)
  20         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  21         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  22         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  23         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  24         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  25         select HAVE_GENERIC_DMA_COHERENT
  26         select HAVE_KERNEL_GZIP
  27         select HAVE_KERNEL_LZO
  28         select HAVE_KERNEL_LZMA
  29         select HAVE_KERNEL_XZ
  30         select HAVE_IRQ_WORK
  31         select HAVE_PERF_EVENTS
  32         select PERF_USE_VMALLOC
  33         select HAVE_REGS_AND_STACK_ACCESS_API
  34         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  35         select HAVE_C_RECORDMCOUNT
  36         select HAVE_GENERIC_HARDIRQS
  37         select HARDIRQS_SW_RESEND
  38         select GENERIC_IRQ_PROBE
  39         select GENERIC_IRQ_SHOW
  40         select GENERIC_IRQ_PROBE
  41         select HARDIRQS_SW_RESEND
  42         select CPU_PM if (SUSPEND || CPU_IDLE)
  43         select GENERIC_PCI_IOMAP
  44         select HAVE_BPF_JIT
  45         select GENERIC_SMP_IDLE_THREAD
  46         select KTIME_SCALAR
  47         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  48         help
  49           The ARM series is a line of low-power-consumption RISC chip designs
  50           licensed by ARM Ltd and targeted at embedded applications and
  51           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  52           manufactured, but legacy ARM-based PC hardware remains popular in
  53           Europe.  There is an ARM Linux project with a web page at
  54           <http://www.arm.linux.org.uk/>.
  55
  56 config ARM_HAS_SG_CHAIN
  57         bool
  58
  59 config NEED_SG_DMA_LENGTH
  60         bool
  61
  62 config ARM_DMA_USE_IOMMU
  63         select NEED_SG_DMA_LENGTH
  64         select ARM_HAS_SG_CHAIN
  65         bool
  66
  67 config HAVE_PWM
  68         bool
  69
  70 config MIGHT_HAVE_PCI
  71         bool
  72
  73 config SYS_SUPPORTS_APM_EMULATION
  74         bool
  75
  76 config GENERIC_GPIO
  77         bool
  78
  79 config HAVE_TCM
  80         bool
  81         select GENERIC_ALLOCATOR
  82
  83 config HAVE_PROC_CPU
  84         bool
  85
  86 config NO_IOPORT
  87         bool
  88
  89 config EISA
  90         bool
  91         ---help---
  92           The Extended Industry Standard Architecture (EISA) bus was
  93           developed as an open alternative to the IBM MicroChannel bus.
  94
  95           The EISA bus provided some of the features of the IBM MicroChannel
  96           bus while maintaining backward compatibility with cards made for
  97           the older ISA bus.  The EISA bus saw limited use between 1988 and
  98           1995 when it was made obsolete by the PCI bus.
  99
 100           Say Y here if you are building a kernel for an EISA-based machine.
 101
 102           Otherwise, say N.
 103
 104 config SBUS
 105         bool
 106
 107 config STACKTRACE_SUPPORT
 108         bool
 109         default y
 110
 111 config HAVE_LATENCYTOP_SUPPORT
 112         bool
 113         depends on !SMP
 114         default y
 115
 116 config LOCKDEP_SUPPORT
 117         bool
 118         default y
 119
 120 config TRACE_IRQFLAGS_SUPPORT
 121         bool
 122         default y
 123
 124 config GENERIC_LOCKBREAK
 125         bool
 126         default y
 127         depends on SMP && PREEMPT
 128
 129 config RWSEM_GENERIC_SPINLOCK
 130         bool
 131         default y
 132
 133 config RWSEM_XCHGADD_ALGORITHM
 134         bool
 135
 136 config ARCH_HAS_ILOG2_U32
 137         bool
 138
 139 config ARCH_HAS_ILOG2_U64
 140         bool
 141
 142 config ARCH_HAS_CPUFREQ
 143         bool
 144         help
 145           Internal node to signify that the ARCH has CPUFREQ support
 146           and that the relevant menu configurations are displayed for
 147           it.
 148
 149 config GENERIC_HWEIGHT
 150         bool
 151         default y
 152
 153 config GENERIC_CALIBRATE_DELAY
 154         bool
 155         default y
 156
 157 config ARCH_MAY_HAVE_PC_FDC
 158         bool
 159
 160 config ZONE_DMA
 161         bool
 162
 163 config NEED_DMA_MAP_STATE
 164        def_bool y
 165
 166 config ARCH_HAS_DMA_SET_COHERENT_MASK
 167         bool
 168
 169 config GENERIC_ISA_DMA
 170         bool
 171
 172 config FIQ
 173         bool
 174
 175 config NEED_RET_TO_USER
 176         bool
 177
 178 config ARCH_MTD_XIP
 179         bool
 180
 181 config VECTORS_BASE
 182         hex
 183         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 184         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 185         default 0x00000000
 186         help
 187           The base address of exception vectors.
 188
 189 config ARM_PATCH_PHYS_VIRT
 190         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 191         default y
 192         depends on !XIP_KERNEL && MMU
 193         depends on !ARCH_REALVIEW || !SPARSEMEM
 194         help
 195           Patch phys-to-virt and virt-to-phys translation functions at
 196           boot and module load time according to the position of the
 197           kernel in system memory.
 198
 199           This can only be used with non-XIP MMU kernels where the base
 200           of physical memory is at a 16MB boundary.
 201
 202           Only disable this option if you know that you do not require
 203           this feature (eg, building a kernel for a single machine) and
 204           you need to shrink the kernel to the minimal size.
 205
 206 config NEED_MACH_IO_H
 207         bool
 208         help
 209           Select this when mach/io.h is required to provide special
 210           definitions for this platform.  The need for mach/io.h should
 211           be avoided when possible.
 212
 213 config NEED_MACH_MEMORY_H
 214         bool
 215         help
 216           Select this when mach/memory.h is required to provide special
 217           definitions for this platform.  The need for mach/memory.h should
 218           be avoided when possible.
 219
 220 config PHYS_OFFSET
 221         hex "Physical address of main memory" if MMU
 222         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 223         default DRAM_BASE if !MMU
 224         help
 225           Please provide the physical address corresponding to the
 226           location of main memory in your system.
 227
 228 config GENERIC_BUG
 229         def_bool y
 230         depends on BUG
 231
 232 source "init/Kconfig"
 233
 234 source "kernel/Kconfig.freezer"
 235
 236 menu "System Type"
 237
 238 config MMU
 239         bool "MMU-based Paged Memory Management Support"
 240         default y
 241         help
 242           Select if you want MMU-based virtualised addressing space
 243           support by paged memory management. If unsure, say 'Y'.
 244
 245 #
 246 # The "ARM system type" choice list is ordered alphabetically by option
 247 # text.  Please add new entries in the option alphabetic order.
 248 #
 249 choice
 250         prompt "ARM system type"
 251         default ARCH_VERSATILE
 252
 253 config ARCH_INTEGRATOR
 254         bool "ARM Ltd. Integrator family"
 255         select ARM_AMBA
 256         select ARCH_HAS_CPUFREQ
 257         select CLKDEV_LOOKUP
 258         select HAVE_MACH_CLKDEV
 259         select HAVE_TCM
 260         select ICST
 261         select GENERIC_CLOCKEVENTS
 262         select PLAT_VERSATILE
 263         select PLAT_VERSATILE_FPGA_IRQ
 264         select NEED_MACH_IO_H
 265         select NEED_MACH_MEMORY_H
 266         select SPARSE_IRQ
 267         select MULTI_IRQ_HANDLER
 268         help
 269           Support for ARM's Integrator platform.
 270
 271 config ARCH_REALVIEW
 272         bool "ARM Ltd. RealView family"
 273         select ARM_AMBA
 274         select CLKDEV_LOOKUP
 275         select HAVE_MACH_CLKDEV
 276         select ICST
 277         select GENERIC_CLOCKEVENTS
 278         select ARCH_WANT_OPTIONAL_GPIOLIB
 279         select PLAT_VERSATILE
 280         select PLAT_VERSATILE_CLCD
 281         select ARM_TIMER_SP804
 282         select GPIO_PL061 if GPIOLIB
 283         select NEED_MACH_MEMORY_H
 284         help
 285           This enables support for ARM Ltd RealView boards.
 286
 287 config ARCH_VERSATILE
 288         bool "ARM Ltd. Versatile family"
 289         select ARM_AMBA
 290         select ARM_VIC
 291         select CLKDEV_LOOKUP
 292         select HAVE_MACH_CLKDEV
 293         select ICST
 294         select GENERIC_CLOCKEVENTS
 295         select ARCH_WANT_OPTIONAL_GPIOLIB
 296         select NEED_MACH_IO_H if PCI
 297         select PLAT_VERSATILE
 298         select PLAT_VERSATILE_CLCD
 299         select PLAT_VERSATILE_FPGA_IRQ
 300         select ARM_TIMER_SP804
 301         help
 302           This enables support for ARM Ltd Versatile board.
 303
 304 config ARCH_VEXPRESS
 305         bool "ARM Ltd. Versatile Express family"
 306         select ARCH_WANT_OPTIONAL_GPIOLIB
 307         select ARM_AMBA
 308         select ARM_TIMER_SP804
 309         select CLKDEV_LOOKUP
 310         select HAVE_MACH_CLKDEV
 311         select GENERIC_CLOCKEVENTS
 312         select HAVE_CLK
 313         select HAVE_PATA_PLATFORM
 314         select ICST
 315         select NO_IOPORT
 316         select PLAT_VERSATILE
 317         select PLAT_VERSATILE_CLCD
 318         help
 319           This enables support for the ARM Ltd Versatile Express boards.
 320
 321 config ARCH_AT91
 322         bool "Atmel AT91"
 323         select ARCH_REQUIRE_GPIOLIB
 324         select HAVE_CLK
 325         select CLKDEV_LOOKUP
 326         select IRQ_DOMAIN
 327         select NEED_MACH_IO_H if PCCARD
 328         help
 329           This enables support for systems based on Atmel
 330           AT91RM9200 and AT91SAM9* processors.
 331
 332 config ARCH_BCMRING
 333         bool "Broadcom BCMRING"
 334         depends on MMU
 335         select CPU_V6
 336         select ARM_AMBA
 337         select ARM_TIMER_SP804
 338         select CLKDEV_LOOKUP
 339         select GENERIC_CLOCKEVENTS
 340         select ARCH_WANT_OPTIONAL_GPIOLIB
 341         help
 342           Support for Broadcom's BCMRing platform.
 343
 344 config ARCH_HIGHBANK
 345         bool "Calxeda Highbank-based"
 346         select ARCH_WANT_OPTIONAL_GPIOLIB
 347         select ARM_AMBA
 348         select ARM_GIC
 349         select ARM_TIMER_SP804
 350         select CACHE_L2X0
 351         select CLKDEV_LOOKUP
 352         select CPU_V7
 353         select GENERIC_CLOCKEVENTS
 354         select HAVE_ARM_SCU
 355         select HAVE_SMP
 356         select SPARSE_IRQ
 357         select USE_OF
 358         help
 359           Support for the Calxeda Highbank SoC based boards.
 360
 361 config ARCH_CLPS711X
 362         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 363         select CPU_ARM720T
 364         select ARCH_USES_GETTIMEOFFSET
 365         select NEED_MACH_MEMORY_H
 366         help
 367           Support for Cirrus Logic 711x/721x/731x based boards.
 368
 369 config ARCH_CNS3XXX
 370         bool "Cavium Networks CNS3XXX family"
 371         select CPU_V6K
 372         select GENERIC_CLOCKEVENTS
 373         select ARM_GIC
 374         select MIGHT_HAVE_CACHE_L2X0
 375         select MIGHT_HAVE_PCI
 376         select PCI_DOMAINS if PCI
 377         help
 378           Support for Cavium Networks CNS3XXX platform.
 379
 380 config ARCH_GEMINI
 381         bool "Cortina Systems Gemini"
 382         select CPU_FA526
 383         select ARCH_REQUIRE_GPIOLIB
 384         select ARCH_USES_GETTIMEOFFSET
 385         help
 386           Support for the Cortina Systems Gemini family SoCs
 387
 388 config ARCH_PRIMA2
 389         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 390         select CPU_V7
 391         select NO_IOPORT
 392         select GENERIC_CLOCKEVENTS
 393         select CLKDEV_LOOKUP
 394         select GENERIC_IRQ_CHIP
 395         select MIGHT_HAVE_CACHE_L2X0
 396         select PINCTRL
 397         select PINCTRL_SIRF
 398         select USE_OF
 399         select ZONE_DMA
 400         help
 401           Support for CSR SiRFSoC ARM Cortex A9 Platform
 402
 403 config ARCH_EBSA110
 404         bool "EBSA-110"
 405         select CPU_SA110
 406         select ISA
 407         select NO_IOPORT
 408         select ARCH_USES_GETTIMEOFFSET
 409         select NEED_MACH_IO_H
 410         select NEED_MACH_MEMORY_H
 411         help
 412           This is an evaluation board for the StrongARM processor available
 413           from Digital. It has limited hardware on-board, including an
 414           Ethernet interface, two PCMCIA sockets, two serial ports and a
 415           parallel port.
 416
 417 config ARCH_EP93XX
 418         bool "EP93xx-based"
 419         select CPU_ARM920T
 420         select ARM_AMBA
 421         select ARM_VIC
 422         select CLKDEV_LOOKUP
 423         select ARCH_REQUIRE_GPIOLIB
 424         select ARCH_HAS_HOLES_MEMORYMODEL
 425         select ARCH_USES_GETTIMEOFFSET
 426         select NEED_MACH_MEMORY_H
 427         help
 428           This enables support for the Cirrus EP93xx series of CPUs.
 429
 430 config ARCH_FOOTBRIDGE
 431         bool "FootBridge"
 432         select CPU_SA110
 433         select FOOTBRIDGE
 434         select GENERIC_CLOCKEVENTS
 435         select HAVE_IDE
 436         select NEED_MACH_IO_H
 437         select NEED_MACH_MEMORY_H
 438         help
 439           Support for systems based on the DC21285 companion chip
 440           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 441
 442 config ARCH_MXC
 443         bool "Freescale MXC/iMX-based"
 444         select GENERIC_CLOCKEVENTS
 445         select ARCH_REQUIRE_GPIOLIB
 446         select CLKDEV_LOOKUP
 447         select CLKSRC_MMIO
 448         select GENERIC_IRQ_CHIP
 449         select MULTI_IRQ_HANDLER
 450         help
 451           Support for Freescale MXC/iMX-based family of processors
 452
 453 config ARCH_MXS
 454         bool "Freescale MXS-based"
 455         select GENERIC_CLOCKEVENTS
 456         select ARCH_REQUIRE_GPIOLIB
 457         select CLKDEV_LOOKUP
 458         select CLKSRC_MMIO
 459         select COMMON_CLK
 460         select HAVE_CLK_PREPARE
 461         select PINCTRL
 462         select USE_OF
 463         help
 464           Support for Freescale MXS-based family of processors
 465
 466 config ARCH_NETX
 467         bool "Hilscher NetX based"
 468         select CLKSRC_MMIO
 469         select CPU_ARM926T
 470         select ARM_VIC
 471         select GENERIC_CLOCKEVENTS
 472         help
 473           This enables support for systems based on the Hilscher NetX Soc
 474
 475 config ARCH_H720X
 476         bool "Hynix HMS720x-based"
 477         select CPU_ARM720T
 478         select ISA_DMA_API
 479         select ARCH_USES_GETTIMEOFFSET
 480         help
 481           This enables support for systems based on the Hynix HMS720x
 482
 483 config ARCH_IOP13XX
 484         bool "IOP13xx-based"
 485         depends on MMU
 486         select CPU_XSC3
 487         select PLAT_IOP
 488         select PCI
 489         select ARCH_SUPPORTS_MSI
 490         select VMSPLIT_1G
 491         select NEED_MACH_IO_H
 492         select NEED_MACH_MEMORY_H
 493         select NEED_RET_TO_USER
 494         help
 495           Support for Intel's IOP13XX (XScale) family of processors.
 496
 497 config ARCH_IOP32X
 498         bool "IOP32x-based"
 499         depends on MMU
 500         select CPU_XSCALE
 501         select NEED_MACH_IO_H
 502         select NEED_RET_TO_USER
 503         select PLAT_IOP
 504         select PCI
 505         select ARCH_REQUIRE_GPIOLIB
 506         help
 507           Support for Intel's 80219 and IOP32X (XScale) family of
 508           processors.
 509
 510 config ARCH_IOP33X
 511         bool "IOP33x-based"
 512         depends on MMU
 513         select CPU_XSCALE
 514         select NEED_MACH_IO_H
 515         select NEED_RET_TO_USER
 516         select PLAT_IOP
 517         select PCI
 518         select ARCH_REQUIRE_GPIOLIB
 519         help
 520           Support for Intel's IOP33X (XScale) family of processors.
 521
 522 config ARCH_IXP4XX
 523         bool "IXP4xx-based"
 524         depends on MMU
 525         select ARCH_HAS_DMA_SET_COHERENT_MASK
 526         select CLKSRC_MMIO
 527         select CPU_XSCALE
 528         select ARCH_REQUIRE_GPIOLIB
 529         select GENERIC_CLOCKEVENTS
 530         select MIGHT_HAVE_PCI
 531         select NEED_MACH_IO_H
 532         select DMABOUNCE if PCI
 533         help
 534           Support for Intel's IXP4XX (XScale) family of processors.
 535
 536 config ARCH_DOVE
 537         bool "Marvell Dove"
 538         select CPU_V7
 539         select PCI
 540         select ARCH_REQUIRE_GPIOLIB
 541         select GENERIC_CLOCKEVENTS
 542         select NEED_MACH_IO_H
 543         select PLAT_ORION
 544         help
 545           Support for the Marvell Dove SoC 88AP510
 546
 547 config ARCH_KIRKWOOD
 548         bool "Marvell Kirkwood"
 549         select CPU_FEROCEON
 550         select PCI
 551         select ARCH_REQUIRE_GPIOLIB
 552         select GENERIC_CLOCKEVENTS
 553         select NEED_MACH_IO_H
 554         select PLAT_ORION
 555         help
 556           Support for the following Marvell Kirkwood series SoCs:
 557           88F6180, 88F6192 and 88F6281.
 558
 559 config ARCH_LPC32XX
 560         bool "NXP LPC32XX"
 561         select CLKSRC_MMIO
 562         select CPU_ARM926T
 563         select ARCH_REQUIRE_GPIOLIB
 564         select HAVE_IDE
 565         select ARM_AMBA
 566         select USB_ARCH_HAS_OHCI
 567         select CLKDEV_LOOKUP
 568         select GENERIC_CLOCKEVENTS
 569         select USE_OF
 570         help
 571           Support for the NXP LPC32XX family of processors
 572
 573 config ARCH_MV78XX0
 574         bool "Marvell MV78xx0"
 575         select CPU_FEROCEON
 576         select PCI
 577         select ARCH_REQUIRE_GPIOLIB
 578         select GENERIC_CLOCKEVENTS
 579         select NEED_MACH_IO_H
 580         select PLAT_ORION
 581         help
 582           Support for the following Marvell MV78xx0 series SoCs:
 583           MV781x0, MV782x0.
 584
 585 config ARCH_ORION5X
 586         bool "Marvell Orion"
 587         depends on MMU
 588         select CPU_FEROCEON
 589         select PCI
 590         select ARCH_REQUIRE_GPIOLIB
 591         select GENERIC_CLOCKEVENTS
 592         select PLAT_ORION
 593         help
 594           Support for the following Marvell Orion 5x series SoCs:
 595           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 596           Orion-2 (5281), Orion-1-90 (6183).
 597
 598 config ARCH_MMP
 599         bool "Marvell PXA168/910/MMP2"
 600         depends on MMU
 601         select ARCH_REQUIRE_GPIOLIB
 602         select CLKDEV_LOOKUP
 603         select GENERIC_CLOCKEVENTS
 604         select GPIO_PXA
 605         select IRQ_DOMAIN
 606         select PLAT_PXA
 607         select SPARSE_IRQ
 608         select GENERIC_ALLOCATOR
 609         help
 610           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 611
 612 config ARCH_KS8695
 613         bool "Micrel/Kendin KS8695"
 614         select CPU_ARM922T
 615         select ARCH_REQUIRE_GPIOLIB
 616         select ARCH_USES_GETTIMEOFFSET
 617         select NEED_MACH_MEMORY_H
 618         help
 619           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 620           System-on-Chip devices.
 621
 622 config ARCH_W90X900
 623         bool "Nuvoton W90X900 CPU"
 624         select CPU_ARM926T
 625         select ARCH_REQUIRE_GPIOLIB
 626         select CLKDEV_LOOKUP
 627         select CLKSRC_MMIO
 628         select GENERIC_CLOCKEVENTS
 629         help
 630           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 631           At present, the w90x900 has been renamed nuc900, regarding
 632           the ARM series product line, you can login the following
 633           link address to know more.
 634
 635           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 636                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 637
 638 config ARCH_TEGRA
 639         bool "NVIDIA Tegra"
 640         select CLKDEV_LOOKUP
 641         select CLKSRC_MMIO
 642         select GENERIC_CLOCKEVENTS
 643         select GENERIC_GPIO
 644         select HAVE_CLK
 645         select HAVE_SMP
 646         select MIGHT_HAVE_CACHE_L2X0
 647         select NEED_MACH_IO_H if PCI
 648         select ARCH_HAS_CPUFREQ
 649         help
 650           This enables support for NVIDIA Tegra based systems (Tegra APX,
 651           Tegra 6xx and Tegra 2 series).
 652
 653 config ARCH_PICOXCELL
 654         bool "Picochip picoXcell"
 655         select ARCH_REQUIRE_GPIOLIB
 656         select ARM_PATCH_PHYS_VIRT
 657         select ARM_VIC
 658         select CPU_V6K
 659         select DW_APB_TIMER
 660         select GENERIC_CLOCKEVENTS
 661         select GENERIC_GPIO
 662         select HAVE_TCM
 663         select NO_IOPORT
 664         select SPARSE_IRQ
 665         select USE_OF
 666         help
 667           This enables support for systems based on the Picochip picoXcell
 668           family of Femtocell devices.  The picoxcell support requires device tree
 669           for all boards.
 670
 671 config ARCH_PNX4008
 672         bool "Philips Nexperia PNX4008 Mobile"
 673         select CPU_ARM926T
 674         select CLKDEV_LOOKUP
 675         select ARCH_USES_GETTIMEOFFSET
 676         help
 677           This enables support for Philips PNX4008 mobile platform.
 678
 679 config ARCH_PXA
 680         bool "PXA2xx/PXA3xx-based"
 681         depends on MMU
 682         select ARCH_MTD_XIP
 683         select ARCH_HAS_CPUFREQ
 684         select CLKDEV_LOOKUP
 685         select CLKSRC_MMIO
 686         select ARCH_REQUIRE_GPIOLIB
 687         select GENERIC_CLOCKEVENTS
 688         select GPIO_PXA
 689         select PLAT_PXA
 690         select SPARSE_IRQ
 691         select AUTO_ZRELADDR
 692         select MULTI_IRQ_HANDLER
 693         select ARM_CPU_SUSPEND if PM
 694         select HAVE_IDE
 695         help
 696           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 697
 698 config ARCH_MSM
 699         bool "Qualcomm MSM"
 700         select HAVE_CLK
 701         select GENERIC_CLOCKEVENTS
 702         select ARCH_REQUIRE_GPIOLIB
 703         select CLKDEV_LOOKUP
 704         help
 705           Support for Qualcomm MSM/QSD based systems.  This runs on the
 706           apps processor of the MSM/QSD and depends on a shared memory
 707           interface to the modem processor which runs the baseband
 708           stack and controls some vital subsystems
 709           (clock and power control, etc).
 710
 711 config ARCH_SHMOBILE
 712         bool "Renesas SH-Mobile / R-Mobile"
 713         select HAVE_CLK
 714         select CLKDEV_LOOKUP
 715         select HAVE_MACH_CLKDEV
 716         select HAVE_SMP
 717         select GENERIC_CLOCKEVENTS
 718         select MIGHT_HAVE_CACHE_L2X0
 719         select NO_IOPORT
 720         select SPARSE_IRQ
 721         select MULTI_IRQ_HANDLER
 722         select PM_GENERIC_DOMAINS if PM
 723         select NEED_MACH_MEMORY_H
 724         help
 725           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 726
 727 config ARCH_RPC
 728         bool "RiscPC"
 729         select ARCH_ACORN
 730         select FIQ
 731         select ARCH_MAY_HAVE_PC_FDC
 732         select HAVE_PATA_PLATFORM
 733         select ISA_DMA_API
 734         select NO_IOPORT
 735         select ARCH_SPARSEMEM_ENABLE
 736         select ARCH_USES_GETTIMEOFFSET
 737         select HAVE_IDE
 738         select NEED_MACH_IO_H
 739         select NEED_MACH_MEMORY_H
 740         help
 741           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 742           CD-ROM interface, serial and parallel port, and the floppy drive.
 743
 744 config ARCH_SA1100
 745         bool "SA1100-based"
 746         select CLKSRC_MMIO
 747         select CPU_SA1100
 748         select ISA
 749         select ARCH_SPARSEMEM_ENABLE
 750         select ARCH_MTD_XIP
 751         select ARCH_HAS_CPUFREQ
 752         select CPU_FREQ
 753         select GENERIC_CLOCKEVENTS
 754         select CLKDEV_LOOKUP
 755         select ARCH_REQUIRE_GPIOLIB
 756         select HAVE_IDE
 757         select NEED_MACH_MEMORY_H
 758         select SPARSE_IRQ
 759         help
 760           Support for StrongARM 11x0 based boards.
 761
 762 config ARCH_S3C24XX
 763         bool "Samsung S3C24XX SoCs"
 764         select GENERIC_GPIO
 765         select ARCH_HAS_CPUFREQ
 766         select HAVE_CLK
 767         select CLKDEV_LOOKUP
 768         select ARCH_USES_GETTIMEOFFSET
 769         select HAVE_S3C2410_I2C if I2C
 770         select HAVE_S3C_RTC if RTC_CLASS
 771         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 772         select NEED_MACH_IO_H
 773         help
 774           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 775           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 776           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 777           Samsung SMDK2410 development board (and derivatives).
 778
 779 config ARCH_S3C64XX
 780         bool "Samsung S3C64XX"
 781         select PLAT_SAMSUNG
 782         select CPU_V6
 783         select ARM_VIC
 784         select HAVE_CLK
 785         select HAVE_TCM
 786         select CLKDEV_LOOKUP
 787         select NO_IOPORT
 788         select ARCH_USES_GETTIMEOFFSET
 789         select ARCH_HAS_CPUFREQ
 790         select ARCH_REQUIRE_GPIOLIB
 791         select SAMSUNG_CLKSRC
 792         select SAMSUNG_IRQ_VIC_TIMER
 793         select S3C_GPIO_TRACK
 794         select S3C_DEV_NAND
 795         select USB_ARCH_HAS_OHCI
 796         select SAMSUNG_GPIOLIB_4BIT
 797         select HAVE_S3C2410_I2C if I2C
 798         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 799         help
 800           Samsung S3C64XX series based systems
 801
 802 config ARCH_S5P64X0
 803         bool "Samsung S5P6440 S5P6450"
 804         select CPU_V6
 805         select GENERIC_GPIO
 806         select HAVE_CLK
 807         select CLKDEV_LOOKUP
 808         select CLKSRC_MMIO
 809         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 810         select GENERIC_CLOCKEVENTS
 811         select HAVE_S3C2410_I2C if I2C
 812         select HAVE_S3C_RTC if RTC_CLASS
 813         help
 814           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 815           SMDK6450.
 816
 817 config ARCH_S5PC100
 818         bool "Samsung S5PC100"
 819         select GENERIC_GPIO
 820         select HAVE_CLK
 821         select CLKDEV_LOOKUP
 822         select CPU_V7
 823         select ARCH_USES_GETTIMEOFFSET
 824         select HAVE_S3C2410_I2C if I2C
 825         select HAVE_S3C_RTC if RTC_CLASS
 826         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 827         help
 828           Samsung S5PC100 series based systems
 829
 830 config ARCH_S5PV210
 831         bool "Samsung S5PV210/S5PC110"
 832         select CPU_V7
 833         select ARCH_SPARSEMEM_ENABLE
 834         select ARCH_HAS_HOLES_MEMORYMODEL
 835         select GENERIC_GPIO
 836         select HAVE_CLK
 837         select CLKDEV_LOOKUP
 838         select CLKSRC_MMIO
 839         select ARCH_HAS_CPUFREQ
 840         select GENERIC_CLOCKEVENTS
 841         select HAVE_S3C2410_I2C if I2C
 842         select HAVE_S3C_RTC if RTC_CLASS
 843         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 844         select NEED_MACH_MEMORY_H
 845         help
 846           Samsung S5PV210/S5PC110 series based systems
 847
 848 config ARCH_EXYNOS
 849         bool "SAMSUNG EXYNOS"
 850         select CPU_V7
 851         select ARCH_SPARSEMEM_ENABLE
 852         select ARCH_HAS_HOLES_MEMORYMODEL
 853         select GENERIC_GPIO
 854         select HAVE_CLK
 855         select CLKDEV_LOOKUP
 856         select ARCH_HAS_CPUFREQ
 857         select GENERIC_CLOCKEVENTS
 858         select HAVE_S3C_RTC if RTC_CLASS
 859         select HAVE_S3C2410_I2C if I2C
 860         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 861         select NEED_MACH_MEMORY_H
 862         help
 863           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 864
 865 config ARCH_SHARK
 866         bool "Shark"
 867         select CPU_SA110
 868         select ISA
 869         select ISA_DMA
 870         select ZONE_DMA
 871         select PCI
 872         select ARCH_USES_GETTIMEOFFSET
 873         select NEED_MACH_MEMORY_H
 874         select NEED_MACH_IO_H
 875         help
 876           Support for the StrongARM based Digital DNARD machine, also known
 877           as "Shark" (<http://www.shark-linux.de/shark.html>).
 878
 879 config ARCH_U300
 880         bool "ST-Ericsson U300 Series"
 881         depends on MMU
 882         select CLKSRC_MMIO
 883         select CPU_ARM926T
 884         select HAVE_TCM
 885         select ARM_AMBA
 886         select ARM_PATCH_PHYS_VIRT
 887         select ARM_VIC
 888         select GENERIC_CLOCKEVENTS
 889         select CLKDEV_LOOKUP
 890         select HAVE_MACH_CLKDEV
 891         select GENERIC_GPIO
 892         select ARCH_REQUIRE_GPIOLIB
 893         help
 894           Support for ST-Ericsson U300 series mobile platforms.
 895
 896 config ARCH_U8500
 897         bool "ST-Ericsson U8500 Series"
 898         depends on MMU
 899         select CPU_V7
 900         select ARM_AMBA
 901         select GENERIC_CLOCKEVENTS
 902         select CLKDEV_LOOKUP
 903         select ARCH_REQUIRE_GPIOLIB
 904         select ARCH_HAS_CPUFREQ
 905         select HAVE_SMP
 906         select MIGHT_HAVE_CACHE_L2X0
 907         help
 908           Support for ST-Ericsson's Ux500 architecture
 909
 910 config ARCH_NOMADIK
 911         bool "STMicroelectronics Nomadik"
 912         select ARM_AMBA
 913         select ARM_VIC
 914         select CPU_ARM926T
 915         select CLKDEV_LOOKUP
 916         select GENERIC_CLOCKEVENTS
 917         select PINCTRL
 918         select MIGHT_HAVE_CACHE_L2X0
 919         select ARCH_REQUIRE_GPIOLIB
 920         help
 921           Support for the Nomadik platform by ST-Ericsson
 922
 923 config ARCH_DAVINCI
 924         bool "TI DaVinci"
 925         select GENERIC_CLOCKEVENTS
 926         select ARCH_REQUIRE_GPIOLIB
 927         select ZONE_DMA
 928         select HAVE_IDE
 929         select CLKDEV_LOOKUP
 930         select GENERIC_ALLOCATOR
 931         select GENERIC_IRQ_CHIP
 932         select ARCH_HAS_HOLES_MEMORYMODEL
 933         help
 934           Support for TI's DaVinci platform.
 935
 936 config ARCH_OMAP
 937         bool "TI OMAP"
 938         select HAVE_CLK
 939         select ARCH_REQUIRE_GPIOLIB
 940         select ARCH_HAS_CPUFREQ
 941         select CLKSRC_MMIO
 942         select GENERIC_CLOCKEVENTS
 943         select ARCH_HAS_HOLES_MEMORYMODEL
 944         help
 945           Support for TI's OMAP platform (OMAP1/2/3/4).
 946
 947 config PLAT_SPEAR
 948         bool "ST SPEAr"
 949         select ARM_AMBA
 950         select ARCH_REQUIRE_GPIOLIB
 951         select CLKDEV_LOOKUP
 952         select COMMON_CLK
 953         select CLKSRC_MMIO
 954         select GENERIC_CLOCKEVENTS
 955         select HAVE_CLK
 956         help
 957           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 958
 959 config ARCH_VT8500
 960         bool "VIA/WonderMedia 85xx"
 961         select CPU_ARM926T
 962         select GENERIC_GPIO
 963         select ARCH_HAS_CPUFREQ
 964         select GENERIC_CLOCKEVENTS
 965         select ARCH_REQUIRE_GPIOLIB
 966         select HAVE_PWM
 967         help
 968           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 969
 970 config ARCH_ZYNQ
 971         bool "Xilinx Zynq ARM Cortex A9 Platform"
 972         select CPU_V7
 973         select GENERIC_CLOCKEVENTS
 974         select CLKDEV_LOOKUP
 975         select ARM_GIC
 976         select ARM_AMBA
 977         select ICST
 978         select MIGHT_HAVE_CACHE_L2X0
 979         select USE_OF
 980         help
 981           Support for Xilinx Zynq ARM Cortex A9 Platform
 982 endchoice
 983
 984 #
 985 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 986 # Kconfigs may be included either alphabetically (according to the
 987 # plat- suffix) or along side the corresponding mach-* source.
 988 #
 989 source "arch/arm/mach-at91/Kconfig"
 990
 991 source "arch/arm/mach-bcmring/Kconfig"
 992
 993 source "arch/arm/mach-clps711x/Kconfig"
 994
 995 source "arch/arm/mach-cns3xxx/Kconfig"
 996
 997 source "arch/arm/mach-davinci/Kconfig"
 998
 999 source "arch/arm/mach-dove/Kconfig"
1000
1001 source "arch/arm/mach-ep93xx/Kconfig"
1002
1003 source "arch/arm/mach-footbridge/Kconfig"
1004
1005 source "arch/arm/mach-gemini/Kconfig"
1006
1007 source "arch/arm/mach-h720x/Kconfig"
1008
1009 source "arch/arm/mach-integrator/Kconfig"
1010
1011 source "arch/arm/mach-iop32x/Kconfig"
1012
1013 source "arch/arm/mach-iop33x/Kconfig"
1014
1015 source "arch/arm/mach-iop13xx/Kconfig"
1016
1017 source "arch/arm/mach-ixp4xx/Kconfig"
1018
1019 source "arch/arm/mach-kirkwood/Kconfig"
1020
1021 source "arch/arm/mach-ks8695/Kconfig"
1022
1023 source "arch/arm/mach-lpc32xx/Kconfig"
1024
1025 source "arch/arm/mach-msm/Kconfig"
1026
1027 source "arch/arm/mach-mv78xx0/Kconfig"
1028
1029 source "arch/arm/plat-mxc/Kconfig"
1030
1031 source "arch/arm/mach-mxs/Kconfig"
1032
1033 source "arch/arm/mach-netx/Kconfig"
1034
1035 source "arch/arm/mach-nomadik/Kconfig"
1036 source "arch/arm/plat-nomadik/Kconfig"
1037
1038 source "arch/arm/plat-omap/Kconfig"
1039
1040 source "arch/arm/mach-omap1/Kconfig"
1041
1042 source "arch/arm/mach-omap2/Kconfig"
1043
1044 source "arch/arm/mach-orion5x/Kconfig"
1045
1046 source "arch/arm/mach-pxa/Kconfig"
1047 source "arch/arm/plat-pxa/Kconfig"
1048
1049 source "arch/arm/mach-mmp/Kconfig"
1050
1051 source "arch/arm/mach-realview/Kconfig"
1052
1053 source "arch/arm/mach-sa1100/Kconfig"
1054
1055 source "arch/arm/plat-samsung/Kconfig"
1056 source "arch/arm/plat-s3c24xx/Kconfig"
1057
1058 source "arch/arm/plat-spear/Kconfig"
1059
1060 source "arch/arm/mach-s3c24xx/Kconfig"
1061 if ARCH_S3C24XX
1062 source "arch/arm/mach-s3c2412/Kconfig"
1063 source "arch/arm/mach-s3c2440/Kconfig"
1064 endif
1065
1066 if ARCH_S3C64XX
1067 source "arch/arm/mach-s3c64xx/Kconfig"
1068 endif
1069
1070 source "arch/arm/mach-s5p64x0/Kconfig"
1071
1072 source "arch/arm/mach-s5pc100/Kconfig"
1073
1074 source "arch/arm/mach-s5pv210/Kconfig"
1075
1076 source "arch/arm/mach-exynos/Kconfig"
1077
1078 source "arch/arm/mach-shmobile/Kconfig"
1079
1080 source "arch/arm/mach-tegra/Kconfig"
1081
1082 source "arch/arm/mach-u300/Kconfig"
1083
1084 source "arch/arm/mach-ux500/Kconfig"
1085
1086 source "arch/arm/mach-versatile/Kconfig"
1087
1088 source "arch/arm/mach-vexpress/Kconfig"
1089 source "arch/arm/plat-versatile/Kconfig"
1090
1091 source "arch/arm/mach-vt8500/Kconfig"
1092
1093 source "arch/arm/mach-w90x900/Kconfig"
1094
1095 # Definitions to make life easier
1096 config ARCH_ACORN
1097         bool
1098
1099 config PLAT_IOP
1100         bool
1101         select GENERIC_CLOCKEVENTS
1102
1103 config PLAT_ORION
1104         bool
1105         select CLKSRC_MMIO
1106         select GENERIC_IRQ_CHIP
1107         select COMMON_CLK
1108
1109 config PLAT_PXA
1110         bool
1111
1112 config PLAT_VERSATILE
1113         bool
1114
1115 config ARM_TIMER_SP804
1116         bool
1117         select CLKSRC_MMIO
1118         select HAVE_SCHED_CLOCK
1119
1120 source arch/arm/mm/Kconfig
1121
1122 config ARM_NR_BANKS
1123         int
1124         default 16 if ARCH_EP93XX
1125         default 8
1126
1127 config IWMMXT
1128         bool "Enable iWMMXt support"
1129         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1130         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1131         help
1132           Enable support for iWMMXt context switching at run time if
1133           running on a CPU that supports it.
1134
1135 config XSCALE_PMU
1136         bool
1137         depends on CPU_XSCALE
1138         default y
1139
1140 config CPU_HAS_PMU
1141         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1142                    (!ARCH_OMAP3 || OMAP3_EMU)
1143         default y
1144         bool
1145
1146 config MULTI_IRQ_HANDLER
1147         bool
1148         help
1149           Allow each machine to specify it's own IRQ handler at run time.
1150
1151 if !MMU
1152 source "arch/arm/Kconfig-nommu"
1153 endif
1154
1155 config ARM_ERRATA_326103
1156         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1157         depends on CPU_V6
1158         help
1159           Executing a SWP instruction to read-only memory does not set bit 11
1160           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1161           treat the access as a read, preventing a COW from occurring and
1162           causing the faulting task to livelock.
1163
1164 config ARM_ERRATA_411920
1165         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1166         depends on CPU_V6 || CPU_V6K
1167         help
1168           Invalidation of the Instruction Cache operation can
1169           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1170           It does not affect the MPCore. This option enables the ARM Ltd.
1171           recommended workaround.
1172
1173 config ARM_ERRATA_430973
1174         bool "ARM errata: Stale prediction on replaced interworking branch"
1175         depends on CPU_V7
1176         help
1177           This option enables the workaround for the 430973 Cortex-A8
1178           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1179           interworking branch is replaced with another code sequence at the
1180           same virtual address, whether due to self-modifying code or virtual
1181           to physical address re-mapping, Cortex-A8 does not recover from the
1182           stale interworking branch prediction. This results in Cortex-A8
1183           executing the new code sequence in the incorrect ARM or Thumb state.
1184           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1185           and also flushes the branch target cache at every context switch.
1186           Note that setting specific bits in the ACTLR register may not be
1187           available in non-secure mode.
1188
1189 config ARM_ERRATA_458693
1190         bool "ARM errata: Processor deadlock when a false hazard is created"
1191         depends on CPU_V7
1192         help
1193           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1194           erratum. For very specific sequences of memory operations, it is
1195           possible for a hazard condition intended for a cache line to instead
1196           be incorrectly associated with a different cache line. This false
1197           hazard might then cause a processor deadlock. The workaround enables
1198           the L1 caching of the NEON accesses and disables the PLD instruction
1199           in the ACTLR register. Note that setting specific bits in the ACTLR
1200           register may not be available in non-secure mode.
1201
1202 config ARM_ERRATA_460075
1203         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1204         depends on CPU_V7
1205         help
1206           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1207           erratum. Any asynchronous access to the L2 cache may encounter a
1208           situation in which recent store transactions to the L2 cache are lost
1209           and overwritten with stale memory contents from external memory. The
1210           workaround disables the write-allocate mode for the L2 cache via the
1211           ACTLR register. Note that setting specific bits in the ACTLR register
1212           may not be available in non-secure mode.
1213
1214 config ARM_ERRATA_742230
1215         bool "ARM errata: DMB operation may be faulty"
1216         depends on CPU_V7 && SMP
1217         help
1218           This option enables the workaround for the 742230 Cortex-A9
1219           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1220           between two write operations may not ensure the correct visibility
1221           ordering of the two writes. This workaround sets a specific bit in
1222           the diagnostic register of the Cortex-A9 which causes the DMB
1223           instruction to behave as a DSB, ensuring the correct behaviour of
1224           the two writes.
1225
1226 config ARM_ERRATA_742231
1227         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1228         depends on CPU_V7 && SMP
1229         help
1230           This option enables the workaround for the 742231 Cortex-A9
1231           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1232           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1233           accessing some data located in the same cache line, may get corrupted
1234           data due to bad handling of the address hazard when the line gets
1235           replaced from one of the CPUs at the same time as another CPU is
1236           accessing it. This workaround sets specific bits in the diagnostic
1237           register of the Cortex-A9 which reduces the linefill issuing
1238           capabilities of the processor.
1239
1240 config PL310_ERRATA_588369
1241         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1242         depends on CACHE_L2X0
1243         help
1244            The PL310 L2 cache controller implements three types of Clean &
1245            Invalidate maintenance operations: by Physical Address
1246            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1247            They are architecturally defined to behave as the execution of a
1248            clean operation followed immediately by an invalidate operation,
1249            both performing to the same memory location. This functionality
1250            is not correctly implemented in PL310 as clean lines are not
1251            invalidated as a result of these operations.
1252
1253 config ARM_ERRATA_720789
1254         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1255         depends on CPU_V7
1256         help
1257           This option enables the workaround for the 720789 Cortex-A9 (prior to
1258           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1259           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1260           As a consequence of this erratum, some TLB entries which should be
1261           invalidated are not, resulting in an incoherency in the system page
1262           tables. The workaround changes the TLB flushing routines to invalidate
1263           entries regardless of the ASID.
1264
1265 config PL310_ERRATA_727915
1266         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1267         depends on CACHE_L2X0
1268         help
1269           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1270           operation (offset 0x7FC). This operation runs in background so that
1271           PL310 can handle normal accesses while it is in progress. Under very
1272           rare circumstances, due to this erratum, write data can be lost when
1273           PL310 treats a cacheable write transaction during a Clean &
1274           Invalidate by Way operation.
1275
1276 config ARM_ERRATA_743622
1277         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1278         depends on CPU_V7
1279         help
1280           This option enables the workaround for the 743622 Cortex-A9
1281           (r2p*) erratum. Under very rare conditions, a faulty
1282           optimisation in the Cortex-A9 Store Buffer may lead to data
1283           corruption. This workaround sets a specific bit in the diagnostic
1284           register of the Cortex-A9 which disables the Store Buffer
1285           optimisation, preventing the defect from occurring. This has no
1286           visible impact on the overall performance or power consumption of the
1287           processor.
1288
1289 config ARM_ERRATA_751472
1290         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1291         depends on CPU_V7
1292         help
1293           This option enables the workaround for the 751472 Cortex-A9 (prior
1294           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1295           completion of a following broadcasted operation if the second
1296           operation is received by a CPU before the ICIALLUIS has completed,
1297           potentially leading to corrupted entries in the cache or TLB.
1298
1299 config PL310_ERRATA_753970
1300         bool "PL310 errata: cache sync operation may be faulty"
1301         depends on CACHE_PL310
1302         help
1303           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1304
1305           Under some condition the effect of cache sync operation on
1306           the store buffer still remains when the operation completes.
1307           This means that the store buffer is always asked to drain and
1308           this prevents it from merging any further writes. The workaround
1309           is to replace the normal offset of cache sync operation (0x730)
1310           by another offset targeting an unmapped PL310 register 0x740.
1311           This has the same effect as the cache sync operation: store buffer
1312           drain and waiting for all buffers empty.
1313
1314 config ARM_ERRATA_754322
1315         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1316         depends on CPU_V7
1317         help
1318           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1319           r3p*) erratum. A speculative memory access may cause a page table walk
1320           which starts prior to an ASID switch but completes afterwards. This
1321           can populate the micro-TLB with a stale entry which may be hit with
1322           the new ASID. This workaround places two dsb instructions in the mm
1323           switching code so that no page table walks can cross the ASID switch.
1324
1325 config ARM_ERRATA_754327
1326         bool "ARM errata: no automatic Store Buffer drain"
1327         depends on CPU_V7 && SMP
1328         help
1329           This option enables the workaround for the 754327 Cortex-A9 (prior to
1330           r2p0) erratum. The Store Buffer does not have any automatic draining
1331           mechanism and therefore a livelock may occur if an external agent
1332           continuously polls a memory location waiting to observe an update.
1333           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1334           written polling loops from denying visibility of updates to memory.
1335
1336 config ARM_ERRATA_364296
1337         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1338         depends on CPU_V6 && !SMP
1339         help
1340           This options enables the workaround for the 364296 ARM1136
1341           r0p2 erratum (possible cache data corruption with
1342           hit-under-miss enabled). It sets the undocumented bit 31 in
1343           the auxiliary control register and the FI bit in the control
1344           register, thus disabling hit-under-miss without putting the
1345           processor into full low interrupt latency mode. ARM11MPCore
1346           is not affected.
1347
1348 config ARM_ERRATA_764369
1349         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1350         depends on CPU_V7 && SMP
1351         help
1352           This option enables the workaround for erratum 764369
1353           affecting Cortex-A9 MPCore with two or more processors (all
1354           current revisions). Under certain timing circumstances, a data
1355           cache line maintenance operation by MVA targeting an Inner
1356           Shareable memory region may fail to proceed up to either the
1357           Point of Coherency or to the Point of Unification of the
1358           system. This workaround adds a DSB instruction before the
1359           relevant cache maintenance functions and sets a specific bit
1360           in the diagnostic control register of the SCU.
1361
1362 config PL310_ERRATA_769419
1363         bool "PL310 errata: no automatic Store Buffer drain"
1364         depends on CACHE_L2X0
1365         help
1366           On revisions of the PL310 prior to r3p2, the Store Buffer does
1367           not automatically drain. This can cause normal, non-cacheable
1368           writes to be retained when the memory system is idle, leading
1369           to suboptimal I/O performance for drivers using coherent DMA.
1370           This option adds a write barrier to the cpu_idle loop so that,
1371           on systems with an outer cache, the store buffer is drained
1372           explicitly.
1373
1374 endmenu
1375
1376 source "arch/arm/common/Kconfig"
1377
1378 menu "Bus support"
1379
1380 config ARM_AMBA
1381         bool
1382
1383 config ISA
1384         bool
1385         help
1386           Find out whether you have ISA slots on your motherboard.  ISA is the
1387           name of a bus system, i.e. the way the CPU talks to the other stuff
1388           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1389           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1390           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1391
1392 # Select ISA DMA controller support
1393 config ISA_DMA
1394         bool
1395         select ISA_DMA_API
1396
1397 # Select ISA DMA interface
1398 config ISA_DMA_API
1399         bool
1400
1401 config PCI
1402         bool "PCI support" if MIGHT_HAVE_PCI
1403         help
1404           Find out whether you have a PCI motherboard. PCI is the name of a
1405           bus system, i.e. the way the CPU talks to the other stuff inside
1406           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1407           VESA. If you have PCI, say Y, otherwise N.
1408
1409 config PCI_DOMAINS
1410         bool
1411         depends on PCI
1412
1413 config PCI_NANOENGINE
1414         bool "BSE nanoEngine PCI support"
1415         depends on SA1100_NANOENGINE
1416         help
1417           Enable PCI on the BSE nanoEngine board.
1418
1419 config PCI_SYSCALL
1420         def_bool PCI
1421
1422 # Select the host bridge type
1423 config PCI_HOST_VIA82C505
1424         bool
1425         depends on PCI && ARCH_SHARK
1426         default y
1427
1428 config PCI_HOST_ITE8152
1429         bool
1430         depends on PCI && MACH_ARMCORE
1431         default y
1432         select DMABOUNCE
1433
1434 source "drivers/pci/Kconfig"
1435
1436 source "drivers/pcmcia/Kconfig"
1437
1438 endmenu
1439
1440 menu "Kernel Features"
1441
1442 config HAVE_SMP
1443         bool
1444         help
1445           This option should be selected by machines which have an SMP-
1446           capable CPU.
1447
1448           The only effect of this option is to make the SMP-related
1449           options available to the user for configuration.
1450
1451 config SMP
1452         bool "Symmetric Multi-Processing"
1453         depends on CPU_V6K || CPU_V7
1454         depends on GENERIC_CLOCKEVENTS
1455         depends on HAVE_SMP
1456         depends on MMU
1457         select USE_GENERIC_SMP_HELPERS
1458         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1459         help
1460           This enables support for systems with more than one CPU. If you have
1461           a system with only one CPU, like most personal computers, say N. If
1462           you have a system with more than one CPU, say Y.
1463
1464           If you say N here, the kernel will run on single and multiprocessor
1465           machines, but will use only one CPU of a multiprocessor machine. If
1466           you say Y here, the kernel will run on many, but not all, single
1467           processor machines. On a single processor machine, the kernel will
1468           run faster if you say N here.
1469
1470           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1471           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1472           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1473
1474           If you don't know what to do here, say N.
1475
1476 config SMP_ON_UP
1477         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1478         depends on EXPERIMENTAL
1479         depends on SMP && !XIP_KERNEL
1480         default y
1481         help
1482           SMP kernels contain instructions which fail on non-SMP processors.
1483           Enabling this option allows the kernel to modify itself to make
1484           these instructions safe.  Disabling it allows about 1K of space
1485           savings.
1486
1487           If you don't know what to do here, say Y.
1488
1489 config ARM_CPU_TOPOLOGY
1490         bool "Support cpu topology definition"
1491         depends on SMP && CPU_V7
1492         default y
1493         help
1494           Support ARM cpu topology definition. The MPIDR register defines
1495           affinity between processors which is then used to describe the cpu
1496           topology of an ARM System.
1497
1498 config SCHED_MC
1499         bool "Multi-core scheduler support"
1500         depends on ARM_CPU_TOPOLOGY
1501         help
1502           Multi-core scheduler support improves the CPU scheduler's decision
1503           making when dealing with multi-core CPU chips at a cost of slightly
1504           increased overhead in some places. If unsure say N here.
1505
1506 config SCHED_SMT
1507         bool "SMT scheduler support"
1508         depends on ARM_CPU_TOPOLOGY
1509         help
1510           Improves the CPU scheduler's decision making when dealing with
1511           MultiThreading at a cost of slightly increased overhead in some
1512           places. If unsure say N here.
1513
1514 config HAVE_ARM_SCU
1515         bool
1516         help
1517           This option enables support for the ARM system coherency unit
1518
1519 config ARM_ARCH_TIMER
1520         bool "Architected timer support"
1521         depends on CPU_V7
1522         help
1523           This option enables support for the ARM architected timer
1524
1525 config HAVE_ARM_TWD
1526         bool
1527         depends on SMP
1528         help
1529           This options enables support for the ARM timer and watchdog unit
1530
1531 choice
1532         prompt "Memory split"
1533         default VMSPLIT_3G
1534         help
1535           Select the desired split between kernel and user memory.
1536
1537           If you are not absolutely sure what you are doing, leave this
1538           option alone!
1539
1540         config VMSPLIT_3G
1541                 bool "3G/1G user/kernel split"
1542         config VMSPLIT_2G
1543                 bool "2G/2G user/kernel split"
1544         config VMSPLIT_1G
1545                 bool "1G/3G user/kernel split"
1546 endchoice
1547
1548 config PAGE_OFFSET
1549         hex
1550         default 0x40000000 if VMSPLIT_1G
1551         default 0x80000000 if VMSPLIT_2G
1552         default 0xC0000000
1553
1554 config NR_CPUS
1555         int "Maximum number of CPUs (2-32)"
1556         range 2 32
1557         depends on SMP
1558         default "4"
1559
1560 config HOTPLUG_CPU
1561         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1562         depends on SMP && HOTPLUG && EXPERIMENTAL
1563         help
1564           Say Y here to experiment with turning CPUs off and on.  CPUs
1565           can be controlled through /sys/devices/system/cpu.
1566
1567 config LOCAL_TIMERS
1568         bool "Use local timer interrupts"
1569         depends on SMP
1570         default y
1571         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1572         help
1573           Enable support for local timers on SMP platforms, rather then the
1574           legacy IPI broadcast method.  Local timers allows the system
1575           accounting to be spread across the timer interval, preventing a
1576           "thundering herd" at every timer tick.
1577
1578 config ARCH_NR_GPIO
1579         int
1580         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1581         default 355 if ARCH_U8500
1582         default 264 if MACH_H4700
1583         default 0
1584         help
1585           Maximum number of GPIOs in the system.
1586
1587           If unsure, leave the default value.
1588
1589 source kernel/Kconfig.preempt
1590
1591 config HZ
1592         int
1593         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1594                 ARCH_S5PV210 || ARCH_EXYNOS4
1595         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1596         default AT91_TIMER_HZ if ARCH_AT91
1597         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1598         default 100
1599
1600 config THUMB2_KERNEL
1601         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1602         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1603         select AEABI
1604         select ARM_ASM_UNIFIED
1605         select ARM_UNWIND
1606         help
1607           By enabling this option, the kernel will be compiled in
1608           Thumb-2 mode. A compiler/assembler that understand the unified
1609           ARM-Thumb syntax is needed.
1610
1611           If unsure, say N.
1612
1613 config THUMB2_AVOID_R_ARM_THM_JUMP11
1614         bool "Work around buggy Thumb-2 short branch relocations in gas"
1615         depends on THUMB2_KERNEL && MODULES
1616         default y
1617         help
1618           Various binutils versions can resolve Thumb-2 branches to
1619           locally-defined, preemptible global symbols as short-range "b.n"
1620           branch instructions.
1621
1622           This is a problem, because there's no guarantee the final
1623           destination of the symbol, or any candidate locations for a
1624           trampoline, are within range of the branch.  For this reason, the
1625           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1626           relocation in modules at all, and it makes little sense to add
1627           support.
1628
1629           The symptom is that the kernel fails with an "unsupported
1630           relocation" error when loading some modules.
1631
1632           Until fixed tools are available, passing
1633           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1634           code which hits this problem, at the cost of a bit of extra runtime
1635           stack usage in some cases.
1636
1637           The problem is described in more detail at:
1638               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1639
1640           Only Thumb-2 kernels are affected.
1641
1642           Unless you are sure your tools don't have this problem, say Y.
1643
1644 config ARM_ASM_UNIFIED
1645         bool
1646
1647 config AEABI
1648         bool "Use the ARM EABI to compile the kernel"
1649         help
1650           This option allows for the kernel to be compiled using the latest
1651           ARM ABI (aka EABI).  This is only useful if you are using a user
1652           space environment that is also compiled with EABI.
1653
1654           Since there are major incompatibilities between the legacy ABI and
1655           EABI, especially with regard to structure member alignment, this
1656           option also changes the kernel syscall calling convention to
1657           disambiguate both ABIs and allow for backward compatibility support
1658           (selected with CONFIG_OABI_COMPAT).
1659
1660           To use this you need GCC version 4.0.0 or later.
1661
1662 config OABI_COMPAT
1663         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1664         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1665         default y
1666         help
1667           This option preserves the old syscall interface along with the
1668           new (ARM EABI) one. It also provides a compatibility layer to
1669           intercept syscalls that have structure arguments which layout
1670           in memory differs between the legacy ABI and the new ARM EABI
1671           (only for non "thumb" binaries). This option adds a tiny
1672           overhead to all syscalls and produces a slightly larger kernel.
1673           If you know you'll be using only pure EABI user space then you
1674           can say N here. If this option is not selected and you attempt
1675           to execute a legacy ABI binary then the result will be
1676           UNPREDICTABLE (in fact it can be predicted that it won't work
1677           at all). If in doubt say Y.
1678
1679 config ARCH_HAS_HOLES_MEMORYMODEL
1680         bool
1681
1682 config ARCH_SPARSEMEM_ENABLE
1683         bool
1684
1685 config ARCH_SPARSEMEM_DEFAULT
1686         def_bool ARCH_SPARSEMEM_ENABLE
1687
1688 config ARCH_SELECT_MEMORY_MODEL
1689         def_bool ARCH_SPARSEMEM_ENABLE
1690
1691 config HAVE_ARCH_PFN_VALID
1692         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1693
1694 config HIGHMEM
1695         bool "High Memory Support"
1696         depends on MMU
1697         help
1698           The address space of ARM processors is only 4 Gigabytes large
1699           and it has to accommodate user address space, kernel address
1700           space as well as some memory mapped IO. That means that, if you
1701           have a large amount of physical memory and/or IO, not all of the
1702           memory can be "permanently mapped" by the kernel. The physical
1703           memory that is not permanently mapped is called "high memory".
1704
1705           Depending on the selected kernel/user memory split, minimum
1706           vmalloc space and actual amount of RAM, you may not need this
1707           option which should result in a slightly faster kernel.
1708
1709           If unsure, say n.
1710
1711 config HIGHPTE
1712         bool "Allocate 2nd-level pagetables from highmem"
1713         depends on HIGHMEM
1714
1715 config HW_PERF_EVENTS
1716         bool "Enable hardware performance counter support for perf events"
1717         depends on PERF_EVENTS && CPU_HAS_PMU
1718         default y
1719         help
1720           Enable hardware performance counter support for perf events. If
1721           disabled, perf events will use software events only.
1722
1723 source "mm/Kconfig"
1724
1725 config FORCE_MAX_ZONEORDER
1726         int "Maximum zone order" if ARCH_SHMOBILE
1727         range 11 64 if ARCH_SHMOBILE
1728         default "9" if SA1111
1729         default "11"
1730         help
1731           The kernel memory allocator divides physically contiguous memory
1732           blocks into "zones", where each zone is a power of two number of
1733           pages.  This option selects the largest power of two that the kernel
1734           keeps in the memory allocator.  If you need to allocate very large
1735           blocks of physically contiguous memory, then you may need to
1736           increase this value.
1737
1738           This config option is actually maximum order plus one. For example,
1739           a value of 11 means that the largest free memory block is 2^10 pages.
1740
1741 config LEDS
1742         bool "Timer and CPU usage LEDs"
1743         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1744                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1745                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1746                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1747                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1748                    ARCH_AT91 || ARCH_DAVINCI || \
1749                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1750         help
1751           If you say Y here, the LEDs on your machine will be used
1752           to provide useful information about your current system status.
1753
1754           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1755           be able to select which LEDs are active using the options below. If
1756           you are compiling a kernel for the EBSA-110 or the LART however, the
1757           red LED will simply flash regularly to indicate that the system is
1758           still functional. It is safe to say Y here if you have a CATS
1759           system, but the driver will do nothing.
1760
1761 config LEDS_TIMER
1762         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1763                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1764                             || MACH_OMAP_PERSEUS2
1765         depends on LEDS
1766         depends on !GENERIC_CLOCKEVENTS
1767         default y if ARCH_EBSA110
1768         help
1769           If you say Y here, one of the system LEDs (the green one on the
1770           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1771           will flash regularly to indicate that the system is still
1772           operational. This is mainly useful to kernel hackers who are
1773           debugging unstable kernels.
1774
1775           The LART uses the same LED for both Timer LED and CPU usage LED
1776           functions. You may choose to use both, but the Timer LED function
1777           will overrule the CPU usage LED.
1778
1779 config LEDS_CPU
1780         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1781                         !ARCH_OMAP) \
1782                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1783                         || MACH_OMAP_PERSEUS2
1784         depends on LEDS
1785         help
1786           If you say Y here, the red LED will be used to give a good real
1787           time indication of CPU usage, by lighting whenever the idle task
1788           is not currently executing.
1789
1790           The LART uses the same LED for both Timer LED and CPU usage LED
1791           functions. You may choose to use both, but the Timer LED function
1792           will overrule the CPU usage LED.
1793
1794 config ALIGNMENT_TRAP
1795         bool
1796         depends on CPU_CP15_MMU
1797         default y if !ARCH_EBSA110
1798         select HAVE_PROC_CPU if PROC_FS
1799         help
1800           ARM processors cannot fetch/store information which is not
1801           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1802           address divisible by 4. On 32-bit ARM processors, these non-aligned
1803           fetch/store instructions will be emulated in software if you say
1804           here, which has a severe performance impact. This is necessary for
1805           correct operation of some network protocols. With an IP-only
1806           configuration it is safe to say N, otherwise say Y.
1807
1808 config UACCESS_WITH_MEMCPY
1809         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1810         depends on MMU && EXPERIMENTAL
1811         default y if CPU_FEROCEON
1812         help
1813           Implement faster copy_to_user and clear_user methods for CPU
1814           cores where a 8-word STM instruction give significantly higher
1815           memory write throughput than a sequence of individual 32bit stores.
1816
1817           A possible side effect is a slight increase in scheduling latency
1818           between threads sharing the same address space if they invoke
1819           such copy operations with large buffers.
1820
1821           However, if the CPU data cache is using a write-allocate mode,
1822           this option is unlikely to provide any performance gain.
1823
1824 config SECCOMP
1825         bool
1826         prompt "Enable seccomp to safely compute untrusted bytecode"
1827         ---help---
1828           This kernel feature is useful for number crunching applications
1829           that may need to compute untrusted bytecode during their
1830           execution. By using pipes or other transports made available to
1831           the process as file descriptors supporting the read/write
1832           syscalls, it's possible to isolate those applications in
1833           their own address space using seccomp. Once seccomp is
1834           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1835           and the task is only allowed to execute a few safe syscalls
1836           defined by each seccomp mode.
1837
1838 config CC_STACKPROTECTOR
1839         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1840         depends on EXPERIMENTAL
1841         help
1842           This option turns on the -fstack-protector GCC feature. This
1843           feature puts, at the beginning of functions, a canary value on
1844           the stack just before the return address, and validates
1845           the value just before actually returning.  Stack based buffer
1846           overflows (that need to overwrite this return address) now also
1847           overwrite the canary, which gets detected and the attack is then
1848           neutralized via a kernel panic.
1849           This feature requires gcc version 4.2 or above.
1850
1851 config DEPRECATED_PARAM_STRUCT
1852         bool "Provide old way to pass kernel parameters"
1853         help
1854           This was deprecated in 2001 and announced to live on for 5 years.
1855           Some old boot loaders still use this way.
1856
1857 endmenu
1858
1859 menu "Boot options"
1860
1861 config USE_OF
1862         bool "Flattened Device Tree support"
1863         select OF
1864         select OF_EARLY_FLATTREE
1865         select IRQ_DOMAIN
1866         help
1867           Include support for flattened device tree machine descriptions.
1868
1869 # Compressed boot loader in ROM.  Yes, we really want to ask about
1870 # TEXT and BSS so we preserve their values in the config files.
1871 config ZBOOT_ROM_TEXT
1872         hex "Compressed ROM boot loader base address"
1873         default "0"
1874         help
1875           The physical address at which the ROM-able zImage is to be
1876           placed in the target.  Platforms which normally make use of
1877           ROM-able zImage formats normally set this to a suitable
1878           value in their defconfig file.
1879
1880           If ZBOOT_ROM is not enabled, this has no effect.
1881
1882 config ZBOOT_ROM_BSS
1883         hex "Compressed ROM boot loader BSS address"
1884         default "0"
1885         help
1886           The base address of an area of read/write memory in the target
1887           for the ROM-able zImage which must be available while the
1888           decompressor is running. It must be large enough to hold the
1889           entire decompressed kernel plus an additional 128 KiB.
1890           Platforms which normally make use of ROM-able zImage formats
1891           normally set this to a suitable value in their defconfig file.
1892
1893           If ZBOOT_ROM is not enabled, this has no effect.
1894
1895 config ZBOOT_ROM
1896         bool "Compressed boot loader in ROM/flash"
1897         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1898         help
1899           Say Y here if you intend to execute your compressed kernel image
1900           (zImage) directly from ROM or flash.  If unsure, say N.
1901
1902 choice
1903         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1904         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1905         default ZBOOT_ROM_NONE
1906         help
1907           Include experimental SD/MMC loading code in the ROM-able zImage.
1908           With this enabled it is possible to write the ROM-able zImage
1909           kernel image to an MMC or SD card and boot the kernel straight
1910           from the reset vector. At reset the processor Mask ROM will load
1911           the first part of the ROM-able zImage which in turn loads the
1912           rest the kernel image to RAM.
1913
1914 config ZBOOT_ROM_NONE
1915         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1916         help
1917           Do not load image from SD or MMC
1918
1919 config ZBOOT_ROM_MMCIF
1920         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1921         help
1922           Load image from MMCIF hardware block.
1923
1924 config ZBOOT_ROM_SH_MOBILE_SDHI
1925         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1926         help
1927           Load image from SDHI hardware block
1928
1929 endchoice
1930
1931 config ARM_APPENDED_DTB
1932         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1933         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1934         help
1935           With this option, the boot code will look for a device tree binary
1936           (DTB) appended to zImage
1937           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1938
1939           This is meant as a backward compatibility convenience for those
1940           systems with a bootloader that can't be upgraded to accommodate
1941           the documented boot protocol using a device tree.
1942
1943           Beware that there is very little in terms of protection against
1944           this option being confused by leftover garbage in memory that might
1945           look like a DTB header after a reboot if no actual DTB is appended
1946           to zImage.  Do not leave this option active in a production kernel
1947           if you don't intend to always append a DTB.  Proper passing of the
1948           location into r2 of a bootloader provided DTB is always preferable
1949           to this option.
1950
1951 config ARM_ATAG_DTB_COMPAT
1952         bool "Supplement the appended DTB with traditional ATAG information"
1953         depends on ARM_APPENDED_DTB
1954         help
1955           Some old bootloaders can't be updated to a DTB capable one, yet
1956           they provide ATAGs with memory configuration, the ramdisk address,
1957           the kernel cmdline string, etc.  Such information is dynamically
1958           provided by the bootloader and can't always be stored in a static
1959           DTB.  To allow a device tree enabled kernel to be used with such
1960           bootloaders, this option allows zImage to extract the information
1961           from the ATAG list and store it at run time into the appended DTB.
1962
1963 config CMDLINE
1964         string "Default kernel command string"
1965         default ""
1966         help
1967           On some architectures (EBSA110 and CATS), there is currently no way
1968           for the boot loader to pass arguments to the kernel. For these
1969           architectures, you should supply some command-line options at build
1970           time by entering them here. As a minimum, you should specify the
1971           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1972
1973 choice
1974         prompt "Kernel command line type" if CMDLINE != ""
1975         default CMDLINE_FROM_BOOTLOADER
1976
1977 config CMDLINE_FROM_BOOTLOADER
1978         bool "Use bootloader kernel arguments if available"
1979         help
1980           Uses the command-line options passed by the boot loader. If
1981           the boot loader doesn't provide any, the default kernel command
1982           string provided in CMDLINE will be used.
1983
1984 config CMDLINE_EXTEND
1985         bool "Extend bootloader kernel arguments"
1986         help
1987           The command-line arguments provided by the boot loader will be
1988           appended to the default kernel command string.
1989
1990 config CMDLINE_FORCE
1991         bool "Always use the default kernel command string"
1992         help
1993           Always use the default kernel command string, even if the boot
1994           loader passes other arguments to the kernel.
1995           This is useful if you cannot or don't want to change the
1996           command-line options your boot loader passes to the kernel.
1997 endchoice
1998
1999 config XIP_KERNEL
2000         bool "Kernel Execute-In-Place from ROM"
2001         depends on !ZBOOT_ROM && !ARM_LPAE
2002         help
2003           Execute-In-Place allows the kernel to run from non-volatile storage
2004           directly addressable by the CPU, such as NOR flash. This saves RAM
2005           space since the text section of the kernel is not loaded from flash
2006           to RAM.  Read-write sections, such as the data section and stack,
2007           are still copied to RAM.  The XIP kernel is not compressed since
2008           it has to run directly from flash, so it will take more space to
2009           store it.  The flash address used to link the kernel object files,
2010           and for storing it, is configuration dependent. Therefore, if you
2011           say Y here, you must know the proper physical address where to
2012           store the kernel image depending on your own flash memory usage.
2013
2014           Also note that the make target becomes "make xipImage" rather than
2015           "make zImage" or "make Image".  The final kernel binary to put in
2016           ROM memory will be arch/arm/boot/xipImage.
2017
2018           If unsure, say N.
2019
2020 config XIP_PHYS_ADDR
2021         hex "XIP Kernel Physical Location"
2022         depends on XIP_KERNEL
2023         default "0x00080000"
2024         help
2025           This is the physical address in your flash memory the kernel will
2026           be linked for and stored to.  This address is dependent on your
2027           own flash usage.
2028
2029 config KEXEC
2030         bool "Kexec system call (EXPERIMENTAL)"
2031         depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2032         help
2033           kexec is a system call that implements the ability to shutdown your
2034           current kernel, and to start another kernel.  It is like a reboot
2035           but it is independent of the system firmware.   And like a reboot
2036           you can start any kernel with it, not just Linux.
2037
2038           It is an ongoing process to be certain the hardware in a machine
2039           is properly shutdown, so do not be surprised if this code does not
2040           initially work for you.  It may help to enable device hotplugging
2041           support.
2042
2043 config ATAGS_PROC
2044         bool "Export atags in procfs"
2045         depends on KEXEC
2046         default y
2047         help
2048           Should the atags used to boot the kernel be exported in an "atags"
2049           file in procfs. Useful with kexec.
2050
2051 config CRASH_DUMP
2052         bool "Build kdump crash kernel (EXPERIMENTAL)"
2053         depends on EXPERIMENTAL
2054         help
2055           Generate crash dump after being started by kexec. This should
2056           be normally only set in special crash dump kernels which are
2057           loaded in the main kernel with kexec-tools into a specially
2058           reserved region and then later executed after a crash by
2059           kdump/kexec. The crash dump kernel must be compiled to a
2060           memory address not used by the main kernel
2061
2062           For more details see Documentation/kdump/kdump.txt
2063
2064 config AUTO_ZRELADDR
2065         bool "Auto calculation of the decompressed kernel image address"
2066         depends on !ZBOOT_ROM && !ARCH_U300
2067         help
2068           ZRELADDR is the physical address where the decompressed kernel
2069           image will be placed. If AUTO_ZRELADDR is selected, the address
2070           will be determined at run-time by masking the current IP with
2071           0xf8000000. This assumes the zImage being placed in the first 128MB
2072           from start of memory.
2073
2074 endmenu
2075
2076 menu "CPU Power Management"
2077
2078 if ARCH_HAS_CPUFREQ
2079
2080 source "drivers/cpufreq/Kconfig"
2081
2082 config CPU_FREQ_IMX
2083         tristate "CPUfreq driver for i.MX CPUs"
2084         depends on ARCH_MXC && CPU_FREQ
2085         help
2086           This enables the CPUfreq driver for i.MX CPUs.
2087
2088 config CPU_FREQ_SA1100
2089         bool
2090
2091 config CPU_FREQ_SA1110
2092         bool
2093
2094 config CPU_FREQ_INTEGRATOR
2095         tristate "CPUfreq driver for ARM Integrator CPUs"
2096         depends on ARCH_INTEGRATOR && CPU_FREQ
2097         default y
2098         help
2099           This enables the CPUfreq driver for ARM Integrator CPUs.
2100
2101           For details, take a look at <file:Documentation/cpu-freq>.
2102
2103           If in doubt, say Y.
2104
2105 config CPU_FREQ_PXA
2106         bool
2107         depends on CPU_FREQ && ARCH_PXA && PXA25x
2108         default y
2109         select CPU_FREQ_TABLE
2110         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2111
2112 config CPU_FREQ_S3C
2113         bool
2114         help
2115           Internal configuration node for common cpufreq on Samsung SoC
2116
2117 config CPU_FREQ_S3C24XX
2118         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2119         depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
2120         select CPU_FREQ_S3C
2121         help
2122           This enables the CPUfreq driver for the Samsung S3C24XX family
2123           of CPUs.
2124
2125           For details, take a look at <file:Documentation/cpu-freq>.
2126
2127           If in doubt, say N.
2128
2129 config CPU_FREQ_S3C24XX_PLL
2130         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2131         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2132         help
2133           Compile in support for changing the PLL frequency from the
2134           S3C24XX series CPUfreq driver. The PLL takes time to settle
2135           after a frequency change, so by default it is not enabled.
2136
2137           This also means that the PLL tables for the selected CPU(s) will
2138           be built which may increase the size of the kernel image.
2139
2140 config CPU_FREQ_S3C24XX_DEBUG
2141         bool "Debug CPUfreq Samsung driver core"
2142         depends on CPU_FREQ_S3C24XX
2143         help
2144           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2145
2146 config CPU_FREQ_S3C24XX_IODEBUG
2147         bool "Debug CPUfreq Samsung driver IO timing"
2148         depends on CPU_FREQ_S3C24XX
2149         help
2150           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2151
2152 config CPU_FREQ_S3C24XX_DEBUGFS
2153         bool "Export debugfs for CPUFreq"
2154         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2155         help
2156           Export status information via debugfs.
2157
2158 endif
2159
2160 source "drivers/cpuidle/Kconfig"
2161
2162 endmenu
2163
2164 menu "Floating point emulation"
2165
2166 comment "At least one emulation must be selected"
2167
2168 config FPE_NWFPE
2169         bool "NWFPE math emulation"
2170         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2171         ---help---
2172           Say Y to include the NWFPE floating point emulator in the kernel.
2173           This is necessary to run most binaries. Linux does not currently
2174           support floating point hardware so you need to say Y here even if
2175           your machine has an FPA or floating point co-processor podule.
2176
2177           You may say N here if you are going to load the Acorn FPEmulator
2178           early in the bootup.
2179
2180 config FPE_NWFPE_XP
2181         bool "Support extended precision"
2182         depends on FPE_NWFPE
2183         help
2184           Say Y to include 80-bit support in the kernel floating-point
2185           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2186           Note that gcc does not generate 80-bit operations by default,
2187           so in most cases this option only enlarges the size of the
2188           floating point emulator without any good reason.
2189
2190           You almost surely want to say N here.
2191
2192 config FPE_FASTFPE
2193         bool "FastFPE math emulation (EXPERIMENTAL)"
2194         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2195         ---help---
2196           Say Y here to include the FAST floating point emulator in the kernel.
2197           This is an experimental much faster emulator which now also has full
2198           precision for the mantissa.  It does not support any exceptions.
2199           It is very simple, and approximately 3-6 times faster than NWFPE.
2200
2201           It should be sufficient for most programs.  It may be not suitable
2202           for scientific calculations, but you have to check this for yourself.
2203           If you do not feel you need a faster FP emulation you should better
2204           choose NWFPE.
2205
2206 config VFP
2207         bool "VFP-format floating point maths"
2208         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2209         help
2210           Say Y to include VFP support code in the kernel. This is needed
2211           if your hardware includes a VFP unit.
2212
2213           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2214           release notes and additional status information.
2215
2216           Say N if your target does not have VFP hardware.
2217
2218 config VFPv3
2219         bool
2220         depends on VFP
2221         default y if CPU_V7
2222
2223 config NEON
2224         bool "Advanced SIMD (NEON) Extension support"
2225         depends on VFPv3 && CPU_V7
2226         help
2227           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2228           Extension.
2229
2230 endmenu
2231
2232 menu "Userspace binary formats"
2233
2234 source "fs/Kconfig.binfmt"
2235
2236 config ARTHUR
2237         tristate "RISC OS personality"
2238         depends on !AEABI
2239         help
2240           Say Y here to include the kernel code necessary if you want to run
2241           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2242           experimental; if this sounds frightening, say N and sleep in peace.
2243           You can also say M here to compile this support as a module (which
2244           will be called arthur).
2245
2246 endmenu
2247
2248 menu "Power management options"
2249
2250 source "kernel/power/Kconfig"
2251
2252 config ARCH_SUSPEND_POSSIBLE
2253         depends on !ARCH_S5PC100 && !ARCH_TEGRA
2254         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2255                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2256         def_bool y
2257
2258 config ARM_CPU_SUSPEND
2259         def_bool PM_SLEEP
2260
2261 endmenu
2262
2263 source "net/Kconfig"
2264
2265 source "drivers/Kconfig"
2266
2267 source "fs/Kconfig"
2268
2269 source "arch/arm/Kconfig.debug"
2270
2271 source "security/Kconfig"
2272
2273 source "crypto/Kconfig"
2274
2275 source "lib/Kconfig"