arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAVE_CUSTOM_GPIO_H
   7         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
   8         select ARCH_WANT_IPC_PARSE_VERSION
   9         select BUILDTIME_EXTABLE_SORT if MMU
  10         select CPU_PM if (SUSPEND || CPU_IDLE)
  11         select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
  12         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  13         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  14         select GENERIC_IRQ_PROBE
  15         select GENERIC_IRQ_SHOW
  16         select GENERIC_PCI_IOMAP
  17         select GENERIC_SMP_IDLE_THREAD
  18         select GENERIC_IDLE_POLL_SETUP
  19         select GENERIC_STRNCPY_FROM_USER
  20         select GENERIC_STRNLEN_USER
  21         select HARDIRQS_SW_RESEND
  22         select HAVE_AOUT
  23         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  24         select HAVE_ARCH_KGDB
  25         select HAVE_ARCH_SECCOMP_FILTER
  26         select HAVE_ARCH_TRACEHOOK
  27         select HAVE_BPF_JIT
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_DEBUG_KMEMLEAK
  30         select HAVE_DMA_API_DEBUG
  31         select HAVE_DMA_ATTRS
  32         select HAVE_DMA_CONTIGUOUS if MMU
  33         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  34         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  35         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  36         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  37         select HAVE_GENERIC_DMA_COHERENT
  38         select HAVE_GENERIC_HARDIRQS
  39         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  40         select HAVE_IDE if PCI || ISA || PCMCIA
  41         select HAVE_KERNEL_GZIP
  42         select HAVE_KERNEL_LZMA
  43         select HAVE_KERNEL_LZO
  44         select HAVE_KERNEL_XZ
  45         select HAVE_KPROBES if !XIP_KERNEL
  46         select HAVE_KRETPROBES if (HAVE_KPROBES)
  47         select HAVE_MEMBLOCK
  48         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  49         select HAVE_PERF_EVENTS
  50         select HAVE_REGS_AND_STACK_ACCESS_API
  51         select HAVE_SYSCALL_TRACEPOINTS
  52         select HAVE_UID16
  53         select KTIME_SCALAR
  54         select PERF_USE_VMALLOC
  55         select RTC_LIB
  56         select SYS_SUPPORTS_APM_EMULATION
  57         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
  58         select MODULES_USE_ELF_REL
  59         select CLONE_BACKWARDS
  60         select OLD_SIGSUSPEND3
  61         select OLD_SIGACTION
  62         select HAVE_CONTEXT_TRACKING
  63         help
  64           The ARM series is a line of low-power-consumption RISC chip designs
  65           licensed by ARM Ltd and targeted at embedded applications and
  66           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  67           manufactured, but legacy ARM-based PC hardware remains popular in
  68           Europe.  There is an ARM Linux project with a web page at
  69           <http://www.arm.linux.org.uk/>.
  70
  71 config ARM_HAS_SG_CHAIN
  72         bool
  73
  74 config NEED_SG_DMA_LENGTH
  75         bool
  76
  77 config ARM_DMA_USE_IOMMU
  78         bool
  79         select ARM_HAS_SG_CHAIN
  80         select NEED_SG_DMA_LENGTH
  81
  82 if ARM_DMA_USE_IOMMU
  83
  84 config ARM_DMA_IOMMU_ALIGNMENT
  85         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
  86         range 4 9
  87         default 8
  88         help
  89           DMA mapping framework by default aligns all buffers to the smallest
  90           PAGE_SIZE order which is greater than or equal to the requested buffer
  91           size. This works well for buffers up to a few hundreds kilobytes, but
  92           for larger buffers it just a waste of address space. Drivers which has
  93           relatively small addressing window (like 64Mib) might run out of
  94           virtual space with just a few allocations.
  95
  96           With this parameter you can specify the maximum PAGE_SIZE order for
  97           DMA IOMMU buffers. Larger buffers will be aligned only to this
  98           specified order. The order is expressed as a power of two multiplied
  99           by the PAGE_SIZE.
 100
 101 endif
 102
 103 config HAVE_PWM
 104         bool
 105
 106 config MIGHT_HAVE_PCI
 107         bool
 108
 109 config SYS_SUPPORTS_APM_EMULATION
 110         bool
 111
 112 config HAVE_TCM
 113         bool
 114         select GENERIC_ALLOCATOR
 115
 116 config HAVE_PROC_CPU
 117         bool
 118
 119 config NO_IOPORT
 120         bool
 121
 122 config EISA
 123         bool
 124         ---help---
 125           The Extended Industry Standard Architecture (EISA) bus was
 126           developed as an open alternative to the IBM MicroChannel bus.
 127
 128           The EISA bus provided some of the features of the IBM MicroChannel
 129           bus while maintaining backward compatibility with cards made for
 130           the older ISA bus.  The EISA bus saw limited use between 1988 and
 131           1995 when it was made obsolete by the PCI bus.
 132
 133           Say Y here if you are building a kernel for an EISA-based machine.
 134
 135           Otherwise, say N.
 136
 137 config SBUS
 138         bool
 139
 140 config STACKTRACE_SUPPORT
 141         bool
 142         default y
 143
 144 config HAVE_LATENCYTOP_SUPPORT
 145         bool
 146         depends on !SMP
 147         default y
 148
 149 config LOCKDEP_SUPPORT
 150         bool
 151         default y
 152
 153 config TRACE_IRQFLAGS_SUPPORT
 154         bool
 155         default y
 156
 157 config RWSEM_GENERIC_SPINLOCK
 158         bool
 159         default y
 160
 161 config RWSEM_XCHGADD_ALGORITHM
 162         bool
 163
 164 config ARCH_HAS_ILOG2_U32
 165         bool
 166
 167 config ARCH_HAS_ILOG2_U64
 168         bool
 169
 170 config ARCH_HAS_CPUFREQ
 171         bool
 172         help
 173           Internal node to signify that the ARCH has CPUFREQ support
 174           and that the relevant menu configurations are displayed for
 175           it.
 176
 177 config GENERIC_HWEIGHT
 178         bool
 179         default y
 180
 181 config GENERIC_CALIBRATE_DELAY
 182         bool
 183         default y
 184
 185 config ARCH_MAY_HAVE_PC_FDC
 186         bool
 187
 188 config ZONE_DMA
 189         bool
 190
 191 config NEED_DMA_MAP_STATE
 192        def_bool y
 193
 194 config ARCH_HAS_DMA_SET_COHERENT_MASK
 195         bool
 196
 197 config GENERIC_ISA_DMA
 198         bool
 199
 200 config FIQ
 201         bool
 202
 203 config NEED_RET_TO_USER
 204         bool
 205
 206 config ARCH_MTD_XIP
 207         bool
 208
 209 config VECTORS_BASE
 210         hex
 211         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 212         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 213         default 0x00000000
 214         help
 215           The base address of exception vectors.
 216
 217 config ARM_PATCH_PHYS_VIRT
 218         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 219         default y
 220         depends on !XIP_KERNEL && MMU
 221         depends on !ARCH_REALVIEW || !SPARSEMEM
 222         help
 223           Patch phys-to-virt and virt-to-phys translation functions at
 224           boot and module load time according to the position of the
 225           kernel in system memory.
 226
 227           This can only be used with non-XIP MMU kernels where the base
 228           of physical memory is at a 16MB boundary.
 229
 230           Only disable this option if you know that you do not require
 231           this feature (eg, building a kernel for a single machine) and
 232           you need to shrink the kernel to the minimal size.
 233
 234 config NEED_MACH_GPIO_H
 235         bool
 236         help
 237           Select this when mach/gpio.h is required to provide special
 238           definitions for this platform. The need for mach/gpio.h should
 239           be avoided when possible.
 240
 241 config NEED_MACH_IO_H
 242         bool
 243         help
 244           Select this when mach/io.h is required to provide special
 245           definitions for this platform.  The need for mach/io.h should
 246           be avoided when possible.
 247
 248 config NEED_MACH_MEMORY_H
 249         bool
 250         help
 251           Select this when mach/memory.h is required to provide special
 252           definitions for this platform.  The need for mach/memory.h should
 253           be avoided when possible.
 254
 255 config PHYS_OFFSET
 256         hex "Physical address of main memory" if MMU
 257         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 258         default DRAM_BASE if !MMU
 259         help
 260           Please provide the physical address corresponding to the
 261           location of main memory in your system.
 262
 263 config GENERIC_BUG
 264         def_bool y
 265         depends on BUG
 266
 267 source "init/Kconfig"
 268
 269 source "kernel/Kconfig.freezer"
 270
 271 menu "System Type"
 272
 273 config MMU
 274         bool "MMU-based Paged Memory Management Support"
 275         default y
 276         help
 277           Select if you want MMU-based virtualised addressing space
 278           support by paged memory management. If unsure, say 'Y'.
 279
 280 #
 281 # The "ARM system type" choice list is ordered alphabetically by option
 282 # text.  Please add new entries in the option alphabetic order.
 283 #
 284 choice
 285         prompt "ARM system type"
 286         default ARCH_VERSATILE if !MMU
 287         default ARCH_MULTIPLATFORM if MMU
 288
 289 config ARCH_MULTIPLATFORM
 290         bool "Allow multiple platforms to be selected"
 291         depends on MMU
 292         select ARM_PATCH_PHYS_VIRT
 293         select AUTO_ZRELADDR
 294         select COMMON_CLK
 295         select MULTI_IRQ_HANDLER
 296         select SPARSE_IRQ
 297         select USE_OF
 298
 299 config ARCH_INTEGRATOR
 300         bool "ARM Ltd. Integrator family"
 301         select ARCH_HAS_CPUFREQ
 302         select ARM_AMBA
 303         select COMMON_CLK
 304         select COMMON_CLK_VERSATILE
 305         select GENERIC_CLOCKEVENTS
 306         select HAVE_TCM
 307         select ICST
 308         select MULTI_IRQ_HANDLER
 309         select NEED_MACH_MEMORY_H
 310         select PLAT_VERSATILE
 311         select SPARSE_IRQ
 312         select VERSATILE_FPGA_IRQ
 313         help
 314           Support for ARM's Integrator platform.
 315
 316 config ARCH_REALVIEW
 317         bool "ARM Ltd. RealView family"
 318         select ARCH_WANT_OPTIONAL_GPIOLIB
 319         select ARM_AMBA
 320         select ARM_TIMER_SP804
 321         select COMMON_CLK
 322         select COMMON_CLK_VERSATILE
 323         select GENERIC_CLOCKEVENTS
 324         select GPIO_PL061 if GPIOLIB
 325         select ICST
 326         select NEED_MACH_MEMORY_H
 327         select PLAT_VERSATILE
 328         select PLAT_VERSATILE_CLCD
 329         help
 330           This enables support for ARM Ltd RealView boards.
 331
 332 config ARCH_VERSATILE
 333         bool "ARM Ltd. Versatile family"
 334         select ARCH_WANT_OPTIONAL_GPIOLIB
 335         select ARM_AMBA
 336         select ARM_TIMER_SP804
 337         select ARM_VIC
 338         select CLKDEV_LOOKUP
 339         select GENERIC_CLOCKEVENTS
 340         select HAVE_MACH_CLKDEV
 341         select ICST
 342         select PLAT_VERSATILE
 343         select PLAT_VERSATILE_CLCD
 344         select PLAT_VERSATILE_CLOCK
 345         select VERSATILE_FPGA_IRQ
 346         help
 347           This enables support for ARM Ltd Versatile board.
 348
 349 config ARCH_AT91
 350         bool "Atmel AT91"
 351         select ARCH_REQUIRE_GPIOLIB
 352         select CLKDEV_LOOKUP
 353         select HAVE_CLK
 354         select IRQ_DOMAIN
 355         select NEED_MACH_GPIO_H
 356         select NEED_MACH_IO_H if PCCARD
 357         select PINCTRL
 358         select PINCTRL_AT91 if USE_OF
 359         help
 360           This enables support for systems based on Atmel
 361           AT91RM9200 and AT91SAM9* processors.
 362
 363 config ARCH_CLPS711X
 364         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 365         select ARCH_REQUIRE_GPIOLIB
 366         select AUTO_ZRELADDR
 367         select CLKDEV_LOOKUP
 368         select COMMON_CLK
 369         select CPU_ARM720T
 370         select GENERIC_CLOCKEVENTS
 371         select MULTI_IRQ_HANDLER
 372         select NEED_MACH_MEMORY_H
 373         select SPARSE_IRQ
 374         help
 375           Support for Cirrus Logic 711x/721x/731x based boards.
 376
 377 config ARCH_GEMINI
 378         bool "Cortina Systems Gemini"
 379         select ARCH_REQUIRE_GPIOLIB
 380         select ARCH_USES_GETTIMEOFFSET
 381         select NEED_MACH_GPIO_H
 382         select CPU_FA526
 383         help
 384           Support for the Cortina Systems Gemini family SoCs
 385
 386 config ARCH_EBSA110
 387         bool "EBSA-110"
 388         select ARCH_USES_GETTIMEOFFSET
 389         select CPU_SA110
 390         select ISA
 391         select NEED_MACH_IO_H
 392         select NEED_MACH_MEMORY_H
 393         select NO_IOPORT
 394         help
 395           This is an evaluation board for the StrongARM processor available
 396           from Digital. It has limited hardware on-board, including an
 397           Ethernet interface, two PCMCIA sockets, two serial ports and a
 398           parallel port.
 399
 400 config ARCH_EP93XX
 401         bool "EP93xx-based"
 402         select ARCH_HAS_HOLES_MEMORYMODEL
 403         select ARCH_REQUIRE_GPIOLIB
 404         select ARCH_USES_GETTIMEOFFSET
 405         select ARM_AMBA
 406         select ARM_VIC
 407         select CLKDEV_LOOKUP
 408         select CPU_ARM920T
 409         select NEED_MACH_MEMORY_H
 410         help
 411           This enables support for the Cirrus EP93xx series of CPUs.
 412
 413 config ARCH_FOOTBRIDGE
 414         bool "FootBridge"
 415         select CPU_SA110
 416         select FOOTBRIDGE
 417         select GENERIC_CLOCKEVENTS
 418         select HAVE_IDE
 419         select NEED_MACH_IO_H if !MMU
 420         select NEED_MACH_MEMORY_H
 421         help
 422           Support for systems based on the DC21285 companion chip
 423           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 424
 425 config ARCH_NETX
 426         bool "Hilscher NetX based"
 427         select ARM_VIC
 428         select CLKSRC_MMIO
 429         select CPU_ARM926T
 430         select GENERIC_CLOCKEVENTS
 431         help
 432           This enables support for systems based on the Hilscher NetX Soc
 433
 434 config ARCH_IOP13XX
 435         bool "IOP13xx-based"
 436         depends on MMU
 437         select ARCH_SUPPORTS_MSI
 438         select CPU_XSC3
 439         select NEED_MACH_MEMORY_H
 440         select NEED_RET_TO_USER
 441         select PCI
 442         select PLAT_IOP
 443         select VMSPLIT_1G
 444         help
 445           Support for Intel's IOP13XX (XScale) family of processors.
 446
 447 config ARCH_IOP32X
 448         bool "IOP32x-based"
 449         depends on MMU
 450         select ARCH_REQUIRE_GPIOLIB
 451         select CPU_XSCALE
 452         select NEED_MACH_GPIO_H
 453         select NEED_RET_TO_USER
 454         select PCI
 455         select PLAT_IOP
 456         help
 457           Support for Intel's 80219 and IOP32X (XScale) family of
 458           processors.
 459
 460 config ARCH_IOP33X
 461         bool "IOP33x-based"
 462         depends on MMU
 463         select ARCH_REQUIRE_GPIOLIB
 464         select CPU_XSCALE
 465         select NEED_MACH_GPIO_H
 466         select NEED_RET_TO_USER
 467         select PCI
 468         select PLAT_IOP
 469         help
 470           Support for Intel's IOP33X (XScale) family of processors.
 471
 472 config ARCH_IXP4XX
 473         bool "IXP4xx-based"
 474         depends on MMU
 475         select ARCH_HAS_DMA_SET_COHERENT_MASK
 476         select ARCH_REQUIRE_GPIOLIB
 477         select CLKSRC_MMIO
 478         select CPU_XSCALE
 479         select DMABOUNCE if PCI
 480         select GENERIC_CLOCKEVENTS
 481         select MIGHT_HAVE_PCI
 482         select NEED_MACH_IO_H
 483         select USB_EHCI_BIG_ENDIAN_MMIO
 484         select USB_EHCI_BIG_ENDIAN_DESC
 485         help
 486           Support for Intel's IXP4XX (XScale) family of processors.
 487
 488 config ARCH_DOVE
 489         bool "Marvell Dove"
 490         select ARCH_REQUIRE_GPIOLIB
 491         select CPU_V7
 492         select GENERIC_CLOCKEVENTS
 493         select MIGHT_HAVE_PCI
 494         select PINCTRL
 495         select PINCTRL_DOVE
 496         select PLAT_ORION_LEGACY
 497         select USB_ARCH_HAS_EHCI
 498         select MVEBU_MBUS
 499         help
 500           Support for the Marvell Dove SoC 88AP510
 501
 502 config ARCH_KIRKWOOD
 503         bool "Marvell Kirkwood"
 504         select ARCH_REQUIRE_GPIOLIB
 505         select CPU_FEROCEON
 506         select GENERIC_CLOCKEVENTS
 507         select PCI
 508         select PCI_QUIRKS
 509         select PINCTRL
 510         select PINCTRL_KIRKWOOD
 511         select PLAT_ORION_LEGACY
 512         select MVEBU_MBUS
 513         help
 514           Support for the following Marvell Kirkwood series SoCs:
 515           88F6180, 88F6192 and 88F6281.
 516
 517 config ARCH_MV78XX0
 518         bool "Marvell MV78xx0"
 519         select ARCH_REQUIRE_GPIOLIB
 520         select CPU_FEROCEON
 521         select GENERIC_CLOCKEVENTS
 522         select PCI
 523         select PLAT_ORION_LEGACY
 524         select MVEBU_MBUS
 525         help
 526           Support for the following Marvell MV78xx0 series SoCs:
 527           MV781x0, MV782x0.
 528
 529 config ARCH_ORION5X
 530         bool "Marvell Orion"
 531         depends on MMU
 532         select ARCH_REQUIRE_GPIOLIB
 533         select CPU_FEROCEON
 534         select GENERIC_CLOCKEVENTS
 535         select PCI
 536         select PLAT_ORION_LEGACY
 537         select MVEBU_MBUS
 538         help
 539           Support for the following Marvell Orion 5x series SoCs:
 540           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 541           Orion-2 (5281), Orion-1-90 (6183).
 542
 543 config ARCH_MMP
 544         bool "Marvell PXA168/910/MMP2"
 545         depends on MMU
 546         select ARCH_REQUIRE_GPIOLIB
 547         select CLKDEV_LOOKUP
 548         select GENERIC_ALLOCATOR
 549         select GENERIC_CLOCKEVENTS
 550         select GPIO_PXA
 551         select IRQ_DOMAIN
 552         select NEED_MACH_GPIO_H
 553         select PINCTRL
 554         select PLAT_PXA
 555         select SPARSE_IRQ
 556         help
 557           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 558
 559 config ARCH_KS8695
 560         bool "Micrel/Kendin KS8695"
 561         select ARCH_REQUIRE_GPIOLIB
 562         select CLKSRC_MMIO
 563         select CPU_ARM922T
 564         select GENERIC_CLOCKEVENTS
 565         select NEED_MACH_MEMORY_H
 566         help
 567           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 568           System-on-Chip devices.
 569
 570 config ARCH_W90X900
 571         bool "Nuvoton W90X900 CPU"
 572         select ARCH_REQUIRE_GPIOLIB
 573         select CLKDEV_LOOKUP
 574         select CLKSRC_MMIO
 575         select CPU_ARM926T
 576         select GENERIC_CLOCKEVENTS
 577         help
 578           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 579           At present, the w90x900 has been renamed nuc900, regarding
 580           the ARM series product line, you can login the following
 581           link address to know more.
 582
 583           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 584                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 585
 586 config ARCH_LPC32XX
 587         bool "NXP LPC32XX"
 588         select ARCH_REQUIRE_GPIOLIB
 589         select ARM_AMBA
 590         select CLKDEV_LOOKUP
 591         select CLKSRC_MMIO
 592         select CPU_ARM926T
 593         select GENERIC_CLOCKEVENTS
 594         select HAVE_IDE
 595         select HAVE_PWM
 596         select USB_ARCH_HAS_OHCI
 597         select USE_OF
 598         help
 599           Support for the NXP LPC32XX family of processors
 600
 601 config ARCH_PXA
 602         bool "PXA2xx/PXA3xx-based"
 603         depends on MMU
 604         select ARCH_HAS_CPUFREQ
 605         select ARCH_MTD_XIP
 606         select ARCH_REQUIRE_GPIOLIB
 607         select ARM_CPU_SUSPEND if PM
 608         select AUTO_ZRELADDR
 609         select CLKDEV_LOOKUP
 610         select CLKSRC_MMIO
 611         select GENERIC_CLOCKEVENTS
 612         select GPIO_PXA
 613         select HAVE_IDE
 614         select MULTI_IRQ_HANDLER
 615         select NEED_MACH_GPIO_H
 616         select PLAT_PXA
 617         select SPARSE_IRQ
 618         help
 619           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 620
 621 config ARCH_MSM
 622         bool "Qualcomm MSM"
 623         select ARCH_REQUIRE_GPIOLIB
 624         select CLKDEV_LOOKUP
 625         select GENERIC_CLOCKEVENTS
 626         select HAVE_CLK
 627         help
 628           Support for Qualcomm MSM/QSD based systems.  This runs on the
 629           apps processor of the MSM/QSD and depends on a shared memory
 630           interface to the modem processor which runs the baseband
 631           stack and controls some vital subsystems
 632           (clock and power control, etc).
 633
 634 config ARCH_SHMOBILE
 635         bool "Renesas SH-Mobile / R-Mobile"
 636         select CLKDEV_LOOKUP
 637         select GENERIC_CLOCKEVENTS
 638         select HAVE_ARM_SCU if SMP
 639         select HAVE_ARM_TWD if LOCAL_TIMERS
 640         select HAVE_CLK
 641         select HAVE_MACH_CLKDEV
 642         select HAVE_SMP
 643         select MIGHT_HAVE_CACHE_L2X0
 644         select MULTI_IRQ_HANDLER
 645         select NEED_MACH_MEMORY_H
 646         select NO_IOPORT
 647         select PINCTRL if ARCH_WANT_OPTIONAL_GPIOLIB
 648         select PM_GENERIC_DOMAINS if PM
 649         select SPARSE_IRQ
 650         help
 651           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 652
 653 config ARCH_RPC
 654         bool "RiscPC"
 655         select ARCH_ACORN
 656         select ARCH_MAY_HAVE_PC_FDC
 657         select ARCH_SPARSEMEM_ENABLE
 658         select ARCH_USES_GETTIMEOFFSET
 659         select FIQ
 660         select HAVE_IDE
 661         select HAVE_PATA_PLATFORM
 662         select ISA_DMA_API
 663         select NEED_MACH_IO_H
 664         select NEED_MACH_MEMORY_H
 665         select NO_IOPORT
 666         select VIRT_TO_BUS
 667         help
 668           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 669           CD-ROM interface, serial and parallel port, and the floppy drive.
 670
 671 config ARCH_SA1100
 672         bool "SA1100-based"
 673         select ARCH_HAS_CPUFREQ
 674         select ARCH_MTD_XIP
 675         select ARCH_REQUIRE_GPIOLIB
 676         select ARCH_SPARSEMEM_ENABLE
 677         select CLKDEV_LOOKUP
 678         select CLKSRC_MMIO
 679         select CPU_FREQ
 680         select CPU_SA1100
 681         select GENERIC_CLOCKEVENTS
 682         select HAVE_IDE
 683         select ISA
 684         select NEED_MACH_GPIO_H
 685         select NEED_MACH_MEMORY_H
 686         select SPARSE_IRQ
 687         help
 688           Support for StrongARM 11x0 based boards.
 689
 690 config ARCH_S3C24XX
 691         bool "Samsung S3C24XX SoCs"
 692         select ARCH_HAS_CPUFREQ
 693         select ARCH_REQUIRE_GPIOLIB
 694         select CLKDEV_LOOKUP
 695         select CLKSRC_MMIO
 696         select GENERIC_CLOCKEVENTS
 697         select HAVE_CLK
 698         select HAVE_S3C2410_I2C if I2C
 699         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 700         select HAVE_S3C_RTC if RTC_CLASS
 701         select MULTI_IRQ_HANDLER
 702         select NEED_MACH_GPIO_H
 703         select NEED_MACH_IO_H
 704         help
 705           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 706           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 707           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 708           Samsung SMDK2410 development board (and derivatives).
 709
 710 config ARCH_S3C64XX
 711         bool "Samsung S3C64XX"
 712         select ARCH_HAS_CPUFREQ
 713         select ARCH_REQUIRE_GPIOLIB
 714         select ARM_VIC
 715         select CLKDEV_LOOKUP
 716         select CLKSRC_MMIO
 717         select CPU_V6
 718         select GENERIC_CLOCKEVENTS
 719         select HAVE_CLK
 720         select HAVE_S3C2410_I2C if I2C
 721         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 722         select HAVE_TCM
 723         select NEED_MACH_GPIO_H
 724         select NO_IOPORT
 725         select PLAT_SAMSUNG
 726         select S3C_DEV_NAND
 727         select S3C_GPIO_TRACK
 728         select SAMSUNG_CLKSRC
 729         select SAMSUNG_GPIOLIB_4BIT
 730         select SAMSUNG_IRQ_VIC_TIMER
 731         select USB_ARCH_HAS_OHCI
 732         help
 733           Samsung S3C64XX series based systems
 734
 735 config ARCH_S5P64X0
 736         bool "Samsung S5P6440 S5P6450"
 737         select CLKDEV_LOOKUP
 738         select CLKSRC_MMIO
 739         select CPU_V6
 740         select GENERIC_CLOCKEVENTS
 741         select HAVE_CLK
 742         select HAVE_S3C2410_I2C if I2C
 743         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 744         select HAVE_S3C_RTC if RTC_CLASS
 745         select NEED_MACH_GPIO_H
 746         help
 747           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 748           SMDK6450.
 749
 750 config ARCH_S5PC100
 751         bool "Samsung S5PC100"
 752         select ARCH_REQUIRE_GPIOLIB
 753         select CLKDEV_LOOKUP
 754         select CLKSRC_MMIO
 755         select CPU_V7
 756         select GENERIC_CLOCKEVENTS
 757         select HAVE_CLK
 758         select HAVE_S3C2410_I2C if I2C
 759         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 760         select HAVE_S3C_RTC if RTC_CLASS
 761         select NEED_MACH_GPIO_H
 762         help
 763           Samsung S5PC100 series based systems
 764
 765 config ARCH_S5PV210
 766         bool "Samsung S5PV210/S5PC110"
 767         select ARCH_HAS_CPUFREQ
 768         select ARCH_HAS_HOLES_MEMORYMODEL
 769         select ARCH_SPARSEMEM_ENABLE
 770         select CLKDEV_LOOKUP
 771         select CLKSRC_MMIO
 772         select CPU_V7
 773         select GENERIC_CLOCKEVENTS
 774         select HAVE_CLK
 775         select HAVE_S3C2410_I2C if I2C
 776         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 777         select HAVE_S3C_RTC if RTC_CLASS
 778         select NEED_MACH_GPIO_H
 779         select NEED_MACH_MEMORY_H
 780         help
 781           Samsung S5PV210/S5PC110 series based systems
 782
 783 config ARCH_EXYNOS
 784         bool "Samsung EXYNOS"
 785         select ARCH_HAS_CPUFREQ
 786         select ARCH_HAS_HOLES_MEMORYMODEL
 787         select ARCH_SPARSEMEM_ENABLE
 788         select CLKDEV_LOOKUP
 789         select COMMON_CLK
 790         select CPU_V7
 791         select GENERIC_CLOCKEVENTS
 792         select HAVE_CLK
 793         select HAVE_S3C2410_I2C if I2C
 794         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 795         select HAVE_S3C_RTC if RTC_CLASS
 796         select NEED_MACH_GPIO_H
 797         select NEED_MACH_MEMORY_H
 798         help
 799           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 800
 801 config ARCH_SHARK
 802         bool "Shark"
 803         select ARCH_USES_GETTIMEOFFSET
 804         select CPU_SA110
 805         select ISA
 806         select ISA_DMA
 807         select NEED_MACH_MEMORY_H
 808         select PCI
 809         select VIRT_TO_BUS
 810         select ZONE_DMA
 811         help
 812           Support for the StrongARM based Digital DNARD machine, also known
 813           as "Shark" (<http://www.shark-linux.de/shark.html>).
 814
 815 config ARCH_U300
 816         bool "ST-Ericsson U300 Series"
 817         depends on MMU
 818         select ARCH_REQUIRE_GPIOLIB
 819         select ARM_AMBA
 820         select ARM_PATCH_PHYS_VIRT
 821         select ARM_VIC
 822         select CLKDEV_LOOKUP
 823         select CLKSRC_MMIO
 824         select COMMON_CLK
 825         select CPU_ARM926T
 826         select GENERIC_CLOCKEVENTS
 827         select HAVE_TCM
 828         select SPARSE_IRQ
 829         help
 830           Support for ST-Ericsson U300 series mobile platforms.
 831
 832 config ARCH_DAVINCI
 833         bool "TI DaVinci"
 834         select ARCH_HAS_HOLES_MEMORYMODEL
 835         select ARCH_REQUIRE_GPIOLIB
 836         select CLKDEV_LOOKUP
 837         select GENERIC_ALLOCATOR
 838         select GENERIC_CLOCKEVENTS
 839         select GENERIC_IRQ_CHIP
 840         select HAVE_IDE
 841         select NEED_MACH_GPIO_H
 842         select USE_OF
 843         select ZONE_DMA
 844         help
 845           Support for TI's DaVinci platform.
 846
 847 config ARCH_OMAP1
 848         bool "TI OMAP1"
 849         depends on MMU
 850         select ARCH_HAS_CPUFREQ
 851         select ARCH_HAS_HOLES_MEMORYMODEL
 852         select ARCH_OMAP
 853         select ARCH_REQUIRE_GPIOLIB
 854         select CLKDEV_LOOKUP
 855         select CLKSRC_MMIO
 856         select GENERIC_CLOCKEVENTS
 857         select GENERIC_IRQ_CHIP
 858         select HAVE_CLK
 859         select HAVE_IDE
 860         select IRQ_DOMAIN
 861         select NEED_MACH_IO_H if PCCARD
 862         select NEED_MACH_MEMORY_H
 863         help
 864           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
 865
 866 endchoice
 867
 868 menu "Multiple platform selection"
 869         depends on ARCH_MULTIPLATFORM
 870
 871 comment "CPU Core family selection"
 872
 873 config ARCH_MULTI_V4
 874         bool "ARMv4 based platforms (FA526, StrongARM)"
 875         depends on !ARCH_MULTI_V6_V7
 876         select ARCH_MULTI_V4_V5
 877
 878 config ARCH_MULTI_V4T
 879         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 880         depends on !ARCH_MULTI_V6_V7
 881         select ARCH_MULTI_V4_V5
 882
 883 config ARCH_MULTI_V5
 884         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 885         depends on !ARCH_MULTI_V6_V7
 886         select ARCH_MULTI_V4_V5
 887
 888 config ARCH_MULTI_V4_V5
 889         bool
 890
 891 config ARCH_MULTI_V6
 892         bool "ARMv6 based platforms (ARM11)"
 893         select ARCH_MULTI_V6_V7
 894         select CPU_V6
 895
 896 config ARCH_MULTI_V7
 897         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
 898         default y
 899         select ARCH_MULTI_V6_V7
 900         select CPU_V7
 901
 902 config ARCH_MULTI_V6_V7
 903         bool
 904
 905 config ARCH_MULTI_CPU_AUTO
 906         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
 907         select ARCH_MULTI_V5
 908
 909 endmenu
 910
 911 #
 912 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 913 # Kconfigs may be included either alphabetically (according to the
 914 # plat- suffix) or along side the corresponding mach-* source.
 915 #
 916 source "arch/arm/mach-mvebu/Kconfig"
 917
 918 source "arch/arm/mach-at91/Kconfig"
 919
 920 source "arch/arm/mach-bcm/Kconfig"
 921
 922 source "arch/arm/mach-bcm2835/Kconfig"
 923
 924 source "arch/arm/mach-clps711x/Kconfig"
 925
 926 source "arch/arm/mach-cns3xxx/Kconfig"
 927
 928 source "arch/arm/mach-davinci/Kconfig"
 929
 930 source "arch/arm/mach-dove/Kconfig"
 931
 932 source "arch/arm/mach-ep93xx/Kconfig"
 933
 934 source "arch/arm/mach-footbridge/Kconfig"
 935
 936 source "arch/arm/mach-gemini/Kconfig"
 937
 938 source "arch/arm/mach-highbank/Kconfig"
 939
 940 source "arch/arm/mach-integrator/Kconfig"
 941
 942 source "arch/arm/mach-iop32x/Kconfig"
 943
 944 source "arch/arm/mach-iop33x/Kconfig"
 945
 946 source "arch/arm/mach-iop13xx/Kconfig"
 947
 948 source "arch/arm/mach-ixp4xx/Kconfig"
 949
 950 source "arch/arm/mach-kirkwood/Kconfig"
 951
 952 source "arch/arm/mach-ks8695/Kconfig"
 953
 954 source "arch/arm/mach-msm/Kconfig"
 955
 956 source "arch/arm/mach-mv78xx0/Kconfig"
 957
 958 source "arch/arm/mach-imx/Kconfig"
 959
 960 source "arch/arm/mach-mxs/Kconfig"
 961
 962 source "arch/arm/mach-netx/Kconfig"
 963
 964 source "arch/arm/mach-nomadik/Kconfig"
 965
 966 source "arch/arm/plat-omap/Kconfig"
 967
 968 source "arch/arm/mach-omap1/Kconfig"
 969
 970 source "arch/arm/mach-omap2/Kconfig"
 971
 972 source "arch/arm/mach-orion5x/Kconfig"
 973
 974 source "arch/arm/mach-picoxcell/Kconfig"
 975
 976 source "arch/arm/mach-pxa/Kconfig"
 977 source "arch/arm/plat-pxa/Kconfig"
 978
 979 source "arch/arm/mach-mmp/Kconfig"
 980
 981 source "arch/arm/mach-realview/Kconfig"
 982
 983 source "arch/arm/mach-sa1100/Kconfig"
 984
 985 source "arch/arm/plat-samsung/Kconfig"
 986
 987 source "arch/arm/mach-socfpga/Kconfig"
 988
 989 source "arch/arm/mach-spear/Kconfig"
 990
 991 source "arch/arm/mach-s3c24xx/Kconfig"
 992
 993 if ARCH_S3C64XX
 994 source "arch/arm/mach-s3c64xx/Kconfig"
 995 endif
 996
 997 source "arch/arm/mach-s5p64x0/Kconfig"
 998
 999 source "arch/arm/mach-s5pc100/Kconfig"
1000
1001 source "arch/arm/mach-s5pv210/Kconfig"
1002
1003 source "arch/arm/mach-exynos/Kconfig"
1004
1005 source "arch/arm/mach-shmobile/Kconfig"
1006
1007 source "arch/arm/mach-sunxi/Kconfig"
1008
1009 source "arch/arm/mach-prima2/Kconfig"
1010
1011 source "arch/arm/mach-tegra/Kconfig"
1012
1013 source "arch/arm/mach-u300/Kconfig"
1014
1015 source "arch/arm/mach-ux500/Kconfig"
1016
1017 source "arch/arm/mach-versatile/Kconfig"
1018
1019 source "arch/arm/mach-vexpress/Kconfig"
1020 source "arch/arm/plat-versatile/Kconfig"
1021
1022 source "arch/arm/mach-virt/Kconfig"
1023
1024 source "arch/arm/mach-vt8500/Kconfig"
1025
1026 source "arch/arm/mach-w90x900/Kconfig"
1027
1028 source "arch/arm/mach-zynq/Kconfig"
1029
1030 # Definitions to make life easier
1031 config ARCH_ACORN
1032         bool
1033
1034 config PLAT_IOP
1035         bool
1036         select GENERIC_CLOCKEVENTS
1037
1038 config PLAT_ORION
1039         bool
1040         select CLKSRC_MMIO
1041         select COMMON_CLK
1042         select GENERIC_IRQ_CHIP
1043         select IRQ_DOMAIN
1044
1045 config PLAT_ORION_LEGACY
1046         bool
1047         select PLAT_ORION
1048
1049 config PLAT_PXA
1050         bool
1051
1052 config PLAT_VERSATILE
1053         bool
1054
1055 config ARM_TIMER_SP804
1056         bool
1057         select CLKSRC_MMIO
1058         select CLKSRC_OF if OF
1059
1060 source arch/arm/mm/Kconfig
1061
1062 config ARM_NR_BANKS
1063         int
1064         default 16 if ARCH_EP93XX
1065         default 8
1066
1067 config IWMMXT
1068         bool "Enable iWMMXt support" if !CPU_PJ4
1069         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1070         default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
1071         help
1072           Enable support for iWMMXt context switching at run time if
1073           running on a CPU that supports it.
1074
1075 config XSCALE_PMU
1076         bool
1077         depends on CPU_XSCALE
1078         default y
1079
1080 config MULTI_IRQ_HANDLER
1081         bool
1082         help
1083           Allow each machine to specify it's own IRQ handler at run time.
1084
1085 if !MMU
1086 source "arch/arm/Kconfig-nommu"
1087 endif
1088
1089 config ARM_ERRATA_326103
1090         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1091         depends on CPU_V6
1092         help
1093           Executing a SWP instruction to read-only memory does not set bit 11
1094           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1095           treat the access as a read, preventing a COW from occurring and
1096           causing the faulting task to livelock.
1097
1098 config ARM_ERRATA_411920
1099         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1100         depends on CPU_V6 || CPU_V6K
1101         help
1102           Invalidation of the Instruction Cache operation can
1103           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1104           It does not affect the MPCore. This option enables the ARM Ltd.
1105           recommended workaround.
1106
1107 config ARM_ERRATA_430973
1108         bool "ARM errata: Stale prediction on replaced interworking branch"
1109         depends on CPU_V7
1110         help
1111           This option enables the workaround for the 430973 Cortex-A8
1112           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1113           interworking branch is replaced with another code sequence at the
1114           same virtual address, whether due to self-modifying code or virtual
1115           to physical address re-mapping, Cortex-A8 does not recover from the
1116           stale interworking branch prediction. This results in Cortex-A8
1117           executing the new code sequence in the incorrect ARM or Thumb state.
1118           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1119           and also flushes the branch target cache at every context switch.
1120           Note that setting specific bits in the ACTLR register may not be
1121           available in non-secure mode.
1122
1123 config ARM_ERRATA_458693
1124         bool "ARM errata: Processor deadlock when a false hazard is created"
1125         depends on CPU_V7
1126         depends on !ARCH_MULTIPLATFORM
1127         help
1128           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1129           erratum. For very specific sequences of memory operations, it is
1130           possible for a hazard condition intended for a cache line to instead
1131           be incorrectly associated with a different cache line. This false
1132           hazard might then cause a processor deadlock. The workaround enables
1133           the L1 caching of the NEON accesses and disables the PLD instruction
1134           in the ACTLR register. Note that setting specific bits in the ACTLR
1135           register may not be available in non-secure mode.
1136
1137 config ARM_ERRATA_460075
1138         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1139         depends on CPU_V7
1140         depends on !ARCH_MULTIPLATFORM
1141         help
1142           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1143           erratum. Any asynchronous access to the L2 cache may encounter a
1144           situation in which recent store transactions to the L2 cache are lost
1145           and overwritten with stale memory contents from external memory. The
1146           workaround disables the write-allocate mode for the L2 cache via the
1147           ACTLR register. Note that setting specific bits in the ACTLR register
1148           may not be available in non-secure mode.
1149
1150 config ARM_ERRATA_742230
1151         bool "ARM errata: DMB operation may be faulty"
1152         depends on CPU_V7 && SMP
1153         depends on !ARCH_MULTIPLATFORM
1154         help
1155           This option enables the workaround for the 742230 Cortex-A9
1156           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1157           between two write operations may not ensure the correct visibility
1158           ordering of the two writes. This workaround sets a specific bit in
1159           the diagnostic register of the Cortex-A9 which causes the DMB
1160           instruction to behave as a DSB, ensuring the correct behaviour of
1161           the two writes.
1162
1163 config ARM_ERRATA_742231
1164         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1165         depends on CPU_V7 && SMP
1166         depends on !ARCH_MULTIPLATFORM
1167         help
1168           This option enables the workaround for the 742231 Cortex-A9
1169           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1170           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1171           accessing some data located in the same cache line, may get corrupted
1172           data due to bad handling of the address hazard when the line gets
1173           replaced from one of the CPUs at the same time as another CPU is
1174           accessing it. This workaround sets specific bits in the diagnostic
1175           register of the Cortex-A9 which reduces the linefill issuing
1176           capabilities of the processor.
1177
1178 config PL310_ERRATA_588369
1179         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1180         depends on CACHE_L2X0
1181         help
1182            The PL310 L2 cache controller implements three types of Clean &
1183            Invalidate maintenance operations: by Physical Address
1184            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1185            They are architecturally defined to behave as the execution of a
1186            clean operation followed immediately by an invalidate operation,
1187            both performing to the same memory location. This functionality
1188            is not correctly implemented in PL310 as clean lines are not
1189            invalidated as a result of these operations.
1190
1191 config ARM_ERRATA_720789
1192         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1193         depends on CPU_V7
1194         help
1195           This option enables the workaround for the 720789 Cortex-A9 (prior to
1196           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1197           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1198           As a consequence of this erratum, some TLB entries which should be
1199           invalidated are not, resulting in an incoherency in the system page
1200           tables. The workaround changes the TLB flushing routines to invalidate
1201           entries regardless of the ASID.
1202
1203 config PL310_ERRATA_727915
1204         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1205         depends on CACHE_L2X0
1206         help
1207           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1208           operation (offset 0x7FC). This operation runs in background so that
1209           PL310 can handle normal accesses while it is in progress. Under very
1210           rare circumstances, due to this erratum, write data can be lost when
1211           PL310 treats a cacheable write transaction during a Clean &
1212           Invalidate by Way operation.
1213
1214 config ARM_ERRATA_743622
1215         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1216         depends on CPU_V7
1217         depends on !ARCH_MULTIPLATFORM
1218         help
1219           This option enables the workaround for the 743622 Cortex-A9
1220           (r2p*) erratum. Under very rare conditions, a faulty
1221           optimisation in the Cortex-A9 Store Buffer may lead to data
1222           corruption. This workaround sets a specific bit in the diagnostic
1223           register of the Cortex-A9 which disables the Store Buffer
1224           optimisation, preventing the defect from occurring. This has no
1225           visible impact on the overall performance or power consumption of the
1226           processor.
1227
1228 config ARM_ERRATA_751472
1229         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1230         depends on CPU_V7
1231         depends on !ARCH_MULTIPLATFORM
1232         help
1233           This option enables the workaround for the 751472 Cortex-A9 (prior
1234           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1235           completion of a following broadcasted operation if the second
1236           operation is received by a CPU before the ICIALLUIS has completed,
1237           potentially leading to corrupted entries in the cache or TLB.
1238
1239 config PL310_ERRATA_753970
1240         bool "PL310 errata: cache sync operation may be faulty"
1241         depends on CACHE_PL310
1242         help
1243           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1244
1245           Under some condition the effect of cache sync operation on
1246           the store buffer still remains when the operation completes.
1247           This means that the store buffer is always asked to drain and
1248           this prevents it from merging any further writes. The workaround
1249           is to replace the normal offset of cache sync operation (0x730)
1250           by another offset targeting an unmapped PL310 register 0x740.
1251           This has the same effect as the cache sync operation: store buffer
1252           drain and waiting for all buffers empty.
1253
1254 config ARM_ERRATA_754322
1255         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1256         depends on CPU_V7
1257         help
1258           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1259           r3p*) erratum. A speculative memory access may cause a page table walk
1260           which starts prior to an ASID switch but completes afterwards. This
1261           can populate the micro-TLB with a stale entry which may be hit with
1262           the new ASID. This workaround places two dsb instructions in the mm
1263           switching code so that no page table walks can cross the ASID switch.
1264
1265 config ARM_ERRATA_754327
1266         bool "ARM errata: no automatic Store Buffer drain"
1267         depends on CPU_V7 && SMP
1268         help
1269           This option enables the workaround for the 754327 Cortex-A9 (prior to
1270           r2p0) erratum. The Store Buffer does not have any automatic draining
1271           mechanism and therefore a livelock may occur if an external agent
1272           continuously polls a memory location waiting to observe an update.
1273           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1274           written polling loops from denying visibility of updates to memory.
1275
1276 config ARM_ERRATA_364296
1277         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1278         depends on CPU_V6 && !SMP
1279         help
1280           This options enables the workaround for the 364296 ARM1136
1281           r0p2 erratum (possible cache data corruption with
1282           hit-under-miss enabled). It sets the undocumented bit 31 in
1283           the auxiliary control register and the FI bit in the control
1284           register, thus disabling hit-under-miss without putting the
1285           processor into full low interrupt latency mode. ARM11MPCore
1286           is not affected.
1287
1288 config ARM_ERRATA_764369
1289         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1290         depends on CPU_V7 && SMP
1291         help
1292           This option enables the workaround for erratum 764369
1293           affecting Cortex-A9 MPCore with two or more processors (all
1294           current revisions). Under certain timing circumstances, a data
1295           cache line maintenance operation by MVA targeting an Inner
1296           Shareable memory region may fail to proceed up to either the
1297           Point of Coherency or to the Point of Unification of the
1298           system. This workaround adds a DSB instruction before the
1299           relevant cache maintenance functions and sets a specific bit
1300           in the diagnostic control register of the SCU.
1301
1302 config PL310_ERRATA_769419
1303         bool "PL310 errata: no automatic Store Buffer drain"
1304         depends on CACHE_L2X0
1305         help
1306           On revisions of the PL310 prior to r3p2, the Store Buffer does
1307           not automatically drain. This can cause normal, non-cacheable
1308           writes to be retained when the memory system is idle, leading
1309           to suboptimal I/O performance for drivers using coherent DMA.
1310           This option adds a write barrier to the cpu_idle loop so that,
1311           on systems with an outer cache, the store buffer is drained
1312           explicitly.
1313
1314 config ARM_ERRATA_775420
1315        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1316        depends on CPU_V7
1317        help
1318          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1319          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1320          operation aborts with MMU exception, it might cause the processor
1321          to deadlock. This workaround puts DSB before executing ISB if
1322          an abort may occur on cache maintenance.
1323
1324 config ARM_ERRATA_798181
1325         bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1326         depends on CPU_V7 && SMP
1327         help
1328           On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1329           adequately shooting down all use of the old entries. This
1330           option enables the Linux kernel workaround for this erratum
1331           which sends an IPI to the CPUs that are running the same ASID
1332           as the one being invalidated.
1333
1334 endmenu
1335
1336 source "arch/arm/common/Kconfig"
1337
1338 menu "Bus support"
1339
1340 config ARM_AMBA
1341         bool
1342
1343 config ISA
1344         bool
1345         help
1346           Find out whether you have ISA slots on your motherboard.  ISA is the
1347           name of a bus system, i.e. the way the CPU talks to the other stuff
1348           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1349           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1350           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1351
1352 # Select ISA DMA controller support
1353 config ISA_DMA
1354         bool
1355         select ISA_DMA_API
1356
1357 # Select ISA DMA interface
1358 config ISA_DMA_API
1359         bool
1360
1361 config PCI
1362         bool "PCI support" if MIGHT_HAVE_PCI
1363         help
1364           Find out whether you have a PCI motherboard. PCI is the name of a
1365           bus system, i.e. the way the CPU talks to the other stuff inside
1366           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1367           VESA. If you have PCI, say Y, otherwise N.
1368
1369 config PCI_DOMAINS
1370         bool
1371         depends on PCI
1372
1373 config PCI_NANOENGINE
1374         bool "BSE nanoEngine PCI support"
1375         depends on SA1100_NANOENGINE
1376         help
1377           Enable PCI on the BSE nanoEngine board.
1378
1379 config PCI_SYSCALL
1380         def_bool PCI
1381
1382 # Select the host bridge type
1383 config PCI_HOST_VIA82C505
1384         bool
1385         depends on PCI && ARCH_SHARK
1386         default y
1387
1388 config PCI_HOST_ITE8152
1389         bool
1390         depends on PCI && MACH_ARMCORE
1391         default y
1392         select DMABOUNCE
1393
1394 source "drivers/pci/Kconfig"
1395
1396 source "drivers/pcmcia/Kconfig"
1397
1398 endmenu
1399
1400 menu "Kernel Features"
1401
1402 config HAVE_SMP
1403         bool
1404         help
1405           This option should be selected by machines which have an SMP-
1406           capable CPU.
1407
1408           The only effect of this option is to make the SMP-related
1409           options available to the user for configuration.
1410
1411 config SMP
1412         bool "Symmetric Multi-Processing"
1413         depends on CPU_V6K || CPU_V7
1414         depends on GENERIC_CLOCKEVENTS
1415         depends on HAVE_SMP
1416         depends on MMU
1417         select USE_GENERIC_SMP_HELPERS
1418         help
1419           This enables support for systems with more than one CPU. If you have
1420           a system with only one CPU, like most personal computers, say N. If
1421           you have a system with more than one CPU, say Y.
1422
1423           If you say N here, the kernel will run on single and multiprocessor
1424           machines, but will use only one CPU of a multiprocessor machine. If
1425           you say Y here, the kernel will run on many, but not all, single
1426           processor machines. On a single processor machine, the kernel will
1427           run faster if you say N here.
1428
1429           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1430           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1431           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1432
1433           If you don't know what to do here, say N.
1434
1435 config SMP_ON_UP
1436         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1437         depends on SMP && !XIP_KERNEL
1438         default y
1439         help
1440           SMP kernels contain instructions which fail on non-SMP processors.
1441           Enabling this option allows the kernel to modify itself to make
1442           these instructions safe.  Disabling it allows about 1K of space
1443           savings.
1444
1445           If you don't know what to do here, say Y.
1446
1447 config ARM_CPU_TOPOLOGY
1448         bool "Support cpu topology definition"
1449         depends on SMP && CPU_V7
1450         default y
1451         help
1452           Support ARM cpu topology definition. The MPIDR register defines
1453           affinity between processors which is then used to describe the cpu
1454           topology of an ARM System.
1455
1456 config SCHED_MC
1457         bool "Multi-core scheduler support"
1458         depends on ARM_CPU_TOPOLOGY
1459         help
1460           Multi-core scheduler support improves the CPU scheduler's decision
1461           making when dealing with multi-core CPU chips at a cost of slightly
1462           increased overhead in some places. If unsure say N here.
1463
1464 config SCHED_SMT
1465         bool "SMT scheduler support"
1466         depends on ARM_CPU_TOPOLOGY
1467         help
1468           Improves the CPU scheduler's decision making when dealing with
1469           MultiThreading at a cost of slightly increased overhead in some
1470           places. If unsure say N here.
1471
1472 config HAVE_ARM_SCU
1473         bool
1474         help
1475           This option enables support for the ARM system coherency unit
1476
1477 config HAVE_ARM_ARCH_TIMER
1478         bool "Architected timer support"
1479         depends on CPU_V7
1480         select ARM_ARCH_TIMER
1481         help
1482           This option enables support for the ARM architected timer
1483
1484 config HAVE_ARM_TWD
1485         bool
1486         depends on SMP
1487         select CLKSRC_OF if OF
1488         help
1489           This options enables support for the ARM timer and watchdog unit
1490
1491 config MCPM
1492         bool "Multi-Cluster Power Management"
1493         depends on CPU_V7 && SMP
1494         help
1495           This option provides the common power management infrastructure
1496           for (multi-)cluster based systems, such as big.LITTLE based
1497           systems.
1498
1499 choice
1500         prompt "Memory split"
1501         default VMSPLIT_3G
1502         help
1503           Select the desired split between kernel and user memory.
1504
1505           If you are not absolutely sure what you are doing, leave this
1506           option alone!
1507
1508         config VMSPLIT_3G
1509                 bool "3G/1G user/kernel split"
1510         config VMSPLIT_2G
1511                 bool "2G/2G user/kernel split"
1512         config VMSPLIT_1G
1513                 bool "1G/3G user/kernel split"
1514 endchoice
1515
1516 config PAGE_OFFSET
1517         hex
1518         default 0x40000000 if VMSPLIT_1G
1519         default 0x80000000 if VMSPLIT_2G
1520         default 0xC0000000
1521
1522 config NR_CPUS
1523         int "Maximum number of CPUs (2-32)"
1524         range 2 32
1525         depends on SMP
1526         default "4"
1527
1528 config HOTPLUG_CPU
1529         bool "Support for hot-pluggable CPUs"
1530         depends on SMP && HOTPLUG
1531         help
1532           Say Y here to experiment with turning CPUs off and on.  CPUs
1533           can be controlled through /sys/devices/system/cpu.
1534
1535 config ARM_PSCI
1536         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1537         depends on CPU_V7
1538         help
1539           Say Y here if you want Linux to communicate with system firmware
1540           implementing the PSCI specification for CPU-centric power
1541           management operations described in ARM document number ARM DEN
1542           0022A ("Power State Coordination Interface System Software on
1543           ARM processors").
1544
1545 config LOCAL_TIMERS
1546         bool "Use local timer interrupts"
1547         depends on SMP
1548         default y
1549         help
1550           Enable support for local timers on SMP platforms, rather then the
1551           legacy IPI broadcast method.  Local timers allows the system
1552           accounting to be spread across the timer interval, preventing a
1553           "thundering herd" at every timer tick.
1554
1555 # The GPIO number here must be sorted by descending number. In case of
1556 # a multiplatform kernel, we just want the highest value required by the
1557 # selected platforms.
1558 config ARCH_NR_GPIO
1559         int
1560         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1561         default 512 if SOC_OMAP5
1562         default 392 if ARCH_U8500
1563         default 352 if ARCH_VT8500
1564         default 288 if ARCH_SUNXI
1565         default 264 if MACH_H4700
1566         default 0
1567         help
1568           Maximum number of GPIOs in the system.
1569
1570           If unsure, leave the default value.
1571
1572 source kernel/Kconfig.preempt
1573
1574 config HZ
1575         int
1576         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1577                 ARCH_S5PV210 || ARCH_EXYNOS4
1578         default AT91_TIMER_HZ if ARCH_AT91
1579         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1580         default 100
1581
1582 config SCHED_HRTICK
1583         def_bool HIGH_RES_TIMERS
1584
1585 config THUMB2_KERNEL
1586         bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
1587         depends on CPU_V7 && !CPU_V6 && !CPU_V6K
1588         default y if CPU_THUMBONLY
1589         select AEABI
1590         select ARM_ASM_UNIFIED
1591         select ARM_UNWIND
1592         help
1593           By enabling this option, the kernel will be compiled in
1594           Thumb-2 mode. A compiler/assembler that understand the unified
1595           ARM-Thumb syntax is needed.
1596
1597           If unsure, say N.
1598
1599 config THUMB2_AVOID_R_ARM_THM_JUMP11
1600         bool "Work around buggy Thumb-2 short branch relocations in gas"
1601         depends on THUMB2_KERNEL && MODULES
1602         default y
1603         help
1604           Various binutils versions can resolve Thumb-2 branches to
1605           locally-defined, preemptible global symbols as short-range "b.n"
1606           branch instructions.
1607
1608           This is a problem, because there's no guarantee the final
1609           destination of the symbol, or any candidate locations for a
1610           trampoline, are within range of the branch.  For this reason, the
1611           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1612           relocation in modules at all, and it makes little sense to add
1613           support.
1614
1615           The symptom is that the kernel fails with an "unsupported
1616           relocation" error when loading some modules.
1617
1618           Until fixed tools are available, passing
1619           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1620           code which hits this problem, at the cost of a bit of extra runtime
1621           stack usage in some cases.
1622
1623           The problem is described in more detail at:
1624               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1625
1626           Only Thumb-2 kernels are affected.
1627
1628           Unless you are sure your tools don't have this problem, say Y.
1629
1630 config ARM_ASM_UNIFIED
1631         bool
1632
1633 config AEABI
1634         bool "Use the ARM EABI to compile the kernel"
1635         help
1636           This option allows for the kernel to be compiled using the latest
1637           ARM ABI (aka EABI).  This is only useful if you are using a user
1638           space environment that is also compiled with EABI.
1639
1640           Since there are major incompatibilities between the legacy ABI and
1641           EABI, especially with regard to structure member alignment, this
1642           option also changes the kernel syscall calling convention to
1643           disambiguate both ABIs and allow for backward compatibility support
1644           (selected with CONFIG_OABI_COMPAT).
1645
1646           To use this you need GCC version 4.0.0 or later.
1647
1648 config OABI_COMPAT
1649         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1650         depends on AEABI && !THUMB2_KERNEL
1651         default y
1652         help
1653           This option preserves the old syscall interface along with the
1654           new (ARM EABI) one. It also provides a compatibility layer to
1655           intercept syscalls that have structure arguments which layout
1656           in memory differs between the legacy ABI and the new ARM EABI
1657           (only for non "thumb" binaries). This option adds a tiny
1658           overhead to all syscalls and produces a slightly larger kernel.
1659           If you know you'll be using only pure EABI user space then you
1660           can say N here. If this option is not selected and you attempt
1661           to execute a legacy ABI binary then the result will be
1662           UNPREDICTABLE (in fact it can be predicted that it won't work
1663           at all). If in doubt say Y.
1664
1665 config ARCH_HAS_HOLES_MEMORYMODEL
1666         bool
1667
1668 config ARCH_SPARSEMEM_ENABLE
1669         bool
1670
1671 config ARCH_SPARSEMEM_DEFAULT
1672         def_bool ARCH_SPARSEMEM_ENABLE
1673
1674 config ARCH_SELECT_MEMORY_MODEL
1675         def_bool ARCH_SPARSEMEM_ENABLE
1676
1677 config HAVE_ARCH_PFN_VALID
1678         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1679
1680 config HIGHMEM
1681         bool "High Memory Support"
1682         depends on MMU
1683         help
1684           The address space of ARM processors is only 4 Gigabytes large
1685           and it has to accommodate user address space, kernel address
1686           space as well as some memory mapped IO. That means that, if you
1687           have a large amount of physical memory and/or IO, not all of the
1688           memory can be "permanently mapped" by the kernel. The physical
1689           memory that is not permanently mapped is called "high memory".
1690
1691           Depending on the selected kernel/user memory split, minimum
1692           vmalloc space and actual amount of RAM, you may not need this
1693           option which should result in a slightly faster kernel.
1694
1695           If unsure, say n.
1696
1697 config HIGHPTE
1698         bool "Allocate 2nd-level pagetables from highmem"
1699         depends on HIGHMEM
1700
1701 config HW_PERF_EVENTS
1702         bool "Enable hardware performance counter support for perf events"
1703         depends on PERF_EVENTS
1704         default y
1705         help
1706           Enable hardware performance counter support for perf events. If
1707           disabled, perf events will use software events only.
1708
1709 source "mm/Kconfig"
1710
1711 config FORCE_MAX_ZONEORDER
1712         int "Maximum zone order" if ARCH_SHMOBILE
1713         range 11 64 if ARCH_SHMOBILE
1714         default "12" if SOC_AM33XX
1715         default "9" if SA1111
1716         default "11"
1717         help
1718           The kernel memory allocator divides physically contiguous memory
1719           blocks into "zones", where each zone is a power of two number of
1720           pages.  This option selects the largest power of two that the kernel
1721           keeps in the memory allocator.  If you need to allocate very large
1722           blocks of physically contiguous memory, then you may need to
1723           increase this value.
1724
1725           This config option is actually maximum order plus one. For example,
1726           a value of 11 means that the largest free memory block is 2^10 pages.
1727
1728 config ALIGNMENT_TRAP
1729         bool
1730         depends on CPU_CP15_MMU
1731         default y if !ARCH_EBSA110
1732         select HAVE_PROC_CPU if PROC_FS
1733         help
1734           ARM processors cannot fetch/store information which is not
1735           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1736           address divisible by 4. On 32-bit ARM processors, these non-aligned
1737           fetch/store instructions will be emulated in software if you say
1738           here, which has a severe performance impact. This is necessary for
1739           correct operation of some network protocols. With an IP-only
1740           configuration it is safe to say N, otherwise say Y.
1741
1742 config UACCESS_WITH_MEMCPY
1743         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1744         depends on MMU
1745         default y if CPU_FEROCEON
1746         help
1747           Implement faster copy_to_user and clear_user methods for CPU
1748           cores where a 8-word STM instruction give significantly higher
1749           memory write throughput than a sequence of individual 32bit stores.
1750
1751           A possible side effect is a slight increase in scheduling latency
1752           between threads sharing the same address space if they invoke
1753           such copy operations with large buffers.
1754
1755           However, if the CPU data cache is using a write-allocate mode,
1756           this option is unlikely to provide any performance gain.
1757
1758 config SECCOMP
1759         bool
1760         prompt "Enable seccomp to safely compute untrusted bytecode"
1761         ---help---
1762           This kernel feature is useful for number crunching applications
1763           that may need to compute untrusted bytecode during their
1764           execution. By using pipes or other transports made available to
1765           the process as file descriptors supporting the read/write
1766           syscalls, it's possible to isolate those applications in
1767           their own address space using seccomp. Once seccomp is
1768           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1769           and the task is only allowed to execute a few safe syscalls
1770           defined by each seccomp mode.
1771
1772 config CC_STACKPROTECTOR
1773         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1774         help
1775           This option turns on the -fstack-protector GCC feature. This
1776           feature puts, at the beginning of functions, a canary value on
1777           the stack just before the return address, and validates
1778           the value just before actually returning.  Stack based buffer
1779           overflows (that need to overwrite this return address) now also
1780           overwrite the canary, which gets detected and the attack is then
1781           neutralized via a kernel panic.
1782           This feature requires gcc version 4.2 or above.
1783
1784 config XEN_DOM0
1785         def_bool y
1786         depends on XEN
1787
1788 config XEN
1789         bool "Xen guest support on ARM (EXPERIMENTAL)"
1790         depends on ARM && AEABI && OF
1791         depends on CPU_V7 && !CPU_V6
1792         depends on !GENERIC_ATOMIC64
1793         select ARM_PSCI
1794         help
1795           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1796
1797 endmenu
1798
1799 menu "Boot options"
1800
1801 config USE_OF
1802         bool "Flattened Device Tree support"
1803         select IRQ_DOMAIN
1804         select OF
1805         select OF_EARLY_FLATTREE
1806         help
1807           Include support for flattened device tree machine descriptions.
1808
1809 config ATAGS
1810         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1811         default y
1812         help
1813           This is the traditional way of passing data to the kernel at boot
1814           time. If you are solely relying on the flattened device tree (or
1815           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1816           to remove ATAGS support from your kernel binary.  If unsure,
1817           leave this to y.
1818
1819 config DEPRECATED_PARAM_STRUCT
1820         bool "Provide old way to pass kernel parameters"
1821         depends on ATAGS
1822         help
1823           This was deprecated in 2001 and announced to live on for 5 years.
1824           Some old boot loaders still use this way.
1825
1826 # Compressed boot loader in ROM.  Yes, we really want to ask about
1827 # TEXT and BSS so we preserve their values in the config files.
1828 config ZBOOT_ROM_TEXT
1829         hex "Compressed ROM boot loader base address"
1830         default "0"
1831         help
1832           The physical address at which the ROM-able zImage is to be
1833           placed in the target.  Platforms which normally make use of
1834           ROM-able zImage formats normally set this to a suitable
1835           value in their defconfig file.
1836
1837           If ZBOOT_ROM is not enabled, this has no effect.
1838
1839 config ZBOOT_ROM_BSS
1840         hex "Compressed ROM boot loader BSS address"
1841         default "0"
1842         help
1843           The base address of an area of read/write memory in the target
1844           for the ROM-able zImage which must be available while the
1845           decompressor is running. It must be large enough to hold the
1846           entire decompressed kernel plus an additional 128 KiB.
1847           Platforms which normally make use of ROM-able zImage formats
1848           normally set this to a suitable value in their defconfig file.
1849
1850           If ZBOOT_ROM is not enabled, this has no effect.
1851
1852 config ZBOOT_ROM
1853         bool "Compressed boot loader in ROM/flash"
1854         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1855         help
1856           Say Y here if you intend to execute your compressed kernel image
1857           (zImage) directly from ROM or flash.  If unsure, say N.
1858
1859 choice
1860         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1861         depends on ZBOOT_ROM && ARCH_SH7372
1862         default ZBOOT_ROM_NONE
1863         help
1864           Include experimental SD/MMC loading code in the ROM-able zImage.
1865           With this enabled it is possible to write the ROM-able zImage
1866           kernel image to an MMC or SD card and boot the kernel straight
1867           from the reset vector. At reset the processor Mask ROM will load
1868           the first part of the ROM-able zImage which in turn loads the
1869           rest the kernel image to RAM.
1870
1871 config ZBOOT_ROM_NONE
1872         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1873         help
1874           Do not load image from SD or MMC
1875
1876 config ZBOOT_ROM_MMCIF
1877         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1878         help
1879           Load image from MMCIF hardware block.
1880
1881 config ZBOOT_ROM_SH_MOBILE_SDHI
1882         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1883         help
1884           Load image from SDHI hardware block
1885
1886 endchoice
1887
1888 config ARM_APPENDED_DTB
1889         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1890         depends on OF && !ZBOOT_ROM
1891         help
1892           With this option, the boot code will look for a device tree binary
1893           (DTB) appended to zImage
1894           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1895
1896           This is meant as a backward compatibility convenience for those
1897           systems with a bootloader that can't be upgraded to accommodate
1898           the documented boot protocol using a device tree.
1899
1900           Beware that there is very little in terms of protection against
1901           this option being confused by leftover garbage in memory that might
1902           look like a DTB header after a reboot if no actual DTB is appended
1903           to zImage.  Do not leave this option active in a production kernel
1904           if you don't intend to always append a DTB.  Proper passing of the
1905           location into r2 of a bootloader provided DTB is always preferable
1906           to this option.
1907
1908 config ARM_ATAG_DTB_COMPAT
1909         bool "Supplement the appended DTB with traditional ATAG information"
1910         depends on ARM_APPENDED_DTB
1911         help
1912           Some old bootloaders can't be updated to a DTB capable one, yet
1913           they provide ATAGs with memory configuration, the ramdisk address,
1914           the kernel cmdline string, etc.  Such information is dynamically
1915           provided by the bootloader and can't always be stored in a static
1916           DTB.  To allow a device tree enabled kernel to be used with such
1917           bootloaders, this option allows zImage to extract the information
1918           from the ATAG list and store it at run time into the appended DTB.
1919
1920 choice
1921         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1922         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1923
1924 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1925         bool "Use bootloader kernel arguments if available"
1926         help
1927           Uses the command-line options passed by the boot loader instead of
1928           the device tree bootargs property. If the boot loader doesn't provide
1929           any, the device tree bootargs property will be used.
1930
1931 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1932         bool "Extend with bootloader kernel arguments"
1933         help
1934           The command-line arguments provided by the boot loader will be
1935           appended to the the device tree bootargs property.
1936
1937 endchoice
1938
1939 config CMDLINE
1940         string "Default kernel command string"
1941         default ""
1942         help
1943           On some architectures (EBSA110 and CATS), there is currently no way
1944           for the boot loader to pass arguments to the kernel. For these
1945           architectures, you should supply some command-line options at build
1946           time by entering them here. As a minimum, you should specify the
1947           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1948
1949 choice
1950         prompt "Kernel command line type" if CMDLINE != ""
1951         default CMDLINE_FROM_BOOTLOADER
1952         depends on ATAGS
1953
1954 config CMDLINE_FROM_BOOTLOADER
1955         bool "Use bootloader kernel arguments if available"
1956         help
1957           Uses the command-line options passed by the boot loader. If
1958           the boot loader doesn't provide any, the default kernel command
1959           string provided in CMDLINE will be used.
1960
1961 config CMDLINE_EXTEND
1962         bool "Extend bootloader kernel arguments"
1963         help
1964           The command-line arguments provided by the boot loader will be
1965           appended to the default kernel command string.
1966
1967 config CMDLINE_FORCE
1968         bool "Always use the default kernel command string"
1969         help
1970           Always use the default kernel command string, even if the boot
1971           loader passes other arguments to the kernel.
1972           This is useful if you cannot or don't want to change the
1973           command-line options your boot loader passes to the kernel.
1974 endchoice
1975
1976 config XIP_KERNEL
1977         bool "Kernel Execute-In-Place from ROM"
1978         depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
1979         help
1980           Execute-In-Place allows the kernel to run from non-volatile storage
1981           directly addressable by the CPU, such as NOR flash. This saves RAM
1982           space since the text section of the kernel is not loaded from flash
1983           to RAM.  Read-write sections, such as the data section and stack,
1984           are still copied to RAM.  The XIP kernel is not compressed since
1985           it has to run directly from flash, so it will take more space to
1986           store it.  The flash address used to link the kernel object files,
1987           and for storing it, is configuration dependent. Therefore, if you
1988           say Y here, you must know the proper physical address where to
1989           store the kernel image depending on your own flash memory usage.
1990
1991           Also note that the make target becomes "make xipImage" rather than
1992           "make zImage" or "make Image".  The final kernel binary to put in
1993           ROM memory will be arch/arm/boot/xipImage.
1994
1995           If unsure, say N.
1996
1997 config XIP_PHYS_ADDR
1998         hex "XIP Kernel Physical Location"
1999         depends on XIP_KERNEL
2000         default "0x00080000"
2001         help
2002           This is the physical address in your flash memory the kernel will
2003           be linked for and stored to.  This address is dependent on your
2004           own flash usage.
2005
2006 config KEXEC
2007         bool "Kexec system call (EXPERIMENTAL)"
2008         depends on (!SMP || HOTPLUG_CPU)
2009         help
2010           kexec is a system call that implements the ability to shutdown your
2011           current kernel, and to start another kernel.  It is like a reboot
2012           but it is independent of the system firmware.   And like a reboot
2013           you can start any kernel with it, not just Linux.
2014
2015           It is an ongoing process to be certain the hardware in a machine
2016           is properly shutdown, so do not be surprised if this code does not
2017           initially work for you.  It may help to enable device hotplugging
2018           support.
2019
2020 config ATAGS_PROC
2021         bool "Export atags in procfs"
2022         depends on ATAGS && KEXEC
2023         default y
2024         help
2025           Should the atags used to boot the kernel be exported in an "atags"
2026           file in procfs. Useful with kexec.
2027
2028 config CRASH_DUMP
2029         bool "Build kdump crash kernel (EXPERIMENTAL)"
2030         help
2031           Generate crash dump after being started by kexec. This should
2032           be normally only set in special crash dump kernels which are
2033           loaded in the main kernel with kexec-tools into a specially
2034           reserved region and then later executed after a crash by
2035           kdump/kexec. The crash dump kernel must be compiled to a
2036           memory address not used by the main kernel
2037
2038           For more details see Documentation/kdump/kdump.txt
2039
2040 config AUTO_ZRELADDR
2041         bool "Auto calculation of the decompressed kernel image address"
2042         depends on !ZBOOT_ROM && !ARCH_U300
2043         help
2044           ZRELADDR is the physical address where the decompressed kernel
2045           image will be placed. If AUTO_ZRELADDR is selected, the address
2046           will be determined at run-time by masking the current IP with
2047           0xf8000000. This assumes the zImage being placed in the first 128MB
2048           from start of memory.
2049
2050 endmenu
2051
2052 menu "CPU Power Management"
2053
2054 if ARCH_HAS_CPUFREQ
2055 source "drivers/cpufreq/Kconfig"
2056
2057 config CPU_FREQ_S3C
2058         bool
2059         help
2060           Internal configuration node for common cpufreq on Samsung SoC
2061
2062 config CPU_FREQ_S3C24XX
2063         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2064         depends on ARCH_S3C24XX && CPU_FREQ
2065         select CPU_FREQ_S3C
2066         help
2067           This enables the CPUfreq driver for the Samsung S3C24XX family
2068           of CPUs.
2069
2070           For details, take a look at <file:Documentation/cpu-freq>.
2071
2072           If in doubt, say N.
2073
2074 config CPU_FREQ_S3C24XX_PLL
2075         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2076         depends on CPU_FREQ_S3C24XX
2077         help
2078           Compile in support for changing the PLL frequency from the
2079           S3C24XX series CPUfreq driver. The PLL takes time to settle
2080           after a frequency change, so by default it is not enabled.
2081
2082           This also means that the PLL tables for the selected CPU(s) will
2083           be built which may increase the size of the kernel image.
2084
2085 config CPU_FREQ_S3C24XX_DEBUG
2086         bool "Debug CPUfreq Samsung driver core"
2087         depends on CPU_FREQ_S3C24XX
2088         help
2089           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2090
2091 config CPU_FREQ_S3C24XX_IODEBUG
2092         bool "Debug CPUfreq Samsung driver IO timing"
2093         depends on CPU_FREQ_S3C24XX
2094         help
2095           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2096
2097 config CPU_FREQ_S3C24XX_DEBUGFS
2098         bool "Export debugfs for CPUFreq"
2099         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2100         help
2101           Export status information via debugfs.
2102
2103 endif
2104
2105 source "drivers/cpuidle/Kconfig"
2106
2107 endmenu
2108
2109 menu "Floating point emulation"
2110
2111 comment "At least one emulation must be selected"
2112
2113 config FPE_NWFPE
2114         bool "NWFPE math emulation"
2115         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2116         ---help---
2117           Say Y to include the NWFPE floating point emulator in the kernel.
2118           This is necessary to run most binaries. Linux does not currently
2119           support floating point hardware so you need to say Y here even if
2120           your machine has an FPA or floating point co-processor podule.
2121
2122           You may say N here if you are going to load the Acorn FPEmulator
2123           early in the bootup.
2124
2125 config FPE_NWFPE_XP
2126         bool "Support extended precision"
2127         depends on FPE_NWFPE
2128         help
2129           Say Y to include 80-bit support in the kernel floating-point
2130           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2131           Note that gcc does not generate 80-bit operations by default,
2132           so in most cases this option only enlarges the size of the
2133           floating point emulator without any good reason.
2134
2135           You almost surely want to say N here.
2136
2137 config FPE_FASTFPE
2138         bool "FastFPE math emulation (EXPERIMENTAL)"
2139         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2140         ---help---
2141           Say Y here to include the FAST floating point emulator in the kernel.
2142           This is an experimental much faster emulator which now also has full
2143           precision for the mantissa.  It does not support any exceptions.
2144           It is very simple, and approximately 3-6 times faster than NWFPE.
2145
2146           It should be sufficient for most programs.  It may be not suitable
2147           for scientific calculations, but you have to check this for yourself.
2148           If you do not feel you need a faster FP emulation you should better
2149           choose NWFPE.
2150
2151 config VFP
2152         bool "VFP-format floating point maths"
2153         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2154         help
2155           Say Y to include VFP support code in the kernel. This is needed
2156           if your hardware includes a VFP unit.
2157
2158           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2159           release notes and additional status information.
2160
2161           Say N if your target does not have VFP hardware.
2162
2163 config VFPv3
2164         bool
2165         depends on VFP
2166         default y if CPU_V7
2167
2168 config NEON
2169         bool "Advanced SIMD (NEON) Extension support"
2170         depends on VFPv3 && CPU_V7
2171         help
2172           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2173           Extension.
2174
2175 endmenu
2176
2177 menu "Userspace binary formats"
2178
2179 source "fs/Kconfig.binfmt"
2180
2181 config ARTHUR
2182         tristate "RISC OS personality"
2183         depends on !AEABI
2184         help
2185           Say Y here to include the kernel code necessary if you want to run
2186           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2187           experimental; if this sounds frightening, say N and sleep in peace.
2188           You can also say M here to compile this support as a module (which
2189           will be called arthur).
2190
2191 endmenu
2192
2193 menu "Power management options"
2194
2195 source "kernel/power/Kconfig"
2196
2197 config ARCH_SUSPEND_POSSIBLE
2198         depends on !ARCH_S5PC100
2199         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2200                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2201         def_bool y
2202
2203 config ARM_CPU_SUSPEND
2204         def_bool PM_SLEEP
2205
2206 endmenu
2207
2208 source "net/Kconfig"
2209
2210 source "drivers/Kconfig"
2211
2212 source "fs/Kconfig"
2213
2214 source "arch/arm/Kconfig.debug"
2215
2216 source "security/Kconfig"
2217
2218 source "crypto/Kconfig"
2219
2220 source "lib/Kconfig"
2221
2222 source "arch/arm/kvm/Kconfig"