arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAVE_CUSTOM_GPIO_H
   7         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
   8         select ARCH_WANT_IPC_PARSE_VERSION
   9         select BUILDTIME_EXTABLE_SORT if MMU
  10         select CPU_PM if (SUSPEND || CPU_IDLE)
  11         select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
  12         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  13         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  14         select GENERIC_IRQ_PROBE
  15         select GENERIC_IRQ_SHOW
  16         select GENERIC_PCI_IOMAP
  17         select GENERIC_SMP_IDLE_THREAD
  18         select GENERIC_IDLE_POLL_SETUP
  19         select GENERIC_STRNCPY_FROM_USER
  20         select GENERIC_STRNLEN_USER
  21         select HARDIRQS_SW_RESEND
  22         select HAVE_AOUT
  23         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  24         select HAVE_ARCH_KGDB
  25         select HAVE_ARCH_SECCOMP_FILTER
  26         select HAVE_ARCH_TRACEHOOK
  27         select HAVE_BPF_JIT
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_DEBUG_KMEMLEAK
  30         select HAVE_DMA_API_DEBUG
  31         select HAVE_DMA_ATTRS
  32         select HAVE_DMA_CONTIGUOUS if MMU
  33         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  34         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  35         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  36         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  37         select HAVE_GENERIC_DMA_COHERENT
  38         select HAVE_GENERIC_HARDIRQS
  39         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  40         select HAVE_IDE if PCI || ISA || PCMCIA
  41         select HAVE_KERNEL_GZIP
  42         select HAVE_KERNEL_LZMA
  43         select HAVE_KERNEL_LZO
  44         select HAVE_KERNEL_XZ
  45         select HAVE_KPROBES if !XIP_KERNEL
  46         select HAVE_KRETPROBES if (HAVE_KPROBES)
  47         select HAVE_MEMBLOCK
  48         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  49         select HAVE_PERF_EVENTS
  50         select HAVE_REGS_AND_STACK_ACCESS_API
  51         select HAVE_SYSCALL_TRACEPOINTS
  52         select HAVE_UID16
  53         select KTIME_SCALAR
  54         select PERF_USE_VMALLOC
  55         select RTC_LIB
  56         select SYS_SUPPORTS_APM_EMULATION
  57         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
  58         select MODULES_USE_ELF_REL
  59         select CLONE_BACKWARDS
  60         select OLD_SIGSUSPEND3
  61         select OLD_SIGACTION
  62         select HAVE_CONTEXT_TRACKING
  63         help
  64           The ARM series is a line of low-power-consumption RISC chip designs
  65           licensed by ARM Ltd and targeted at embedded applications and
  66           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  67           manufactured, but legacy ARM-based PC hardware remains popular in
  68           Europe.  There is an ARM Linux project with a web page at
  69           <http://www.arm.linux.org.uk/>.
  70
  71 config ARM_HAS_SG_CHAIN
  72         bool
  73
  74 config NEED_SG_DMA_LENGTH
  75         bool
  76
  77 config ARM_DMA_USE_IOMMU
  78         bool
  79         select ARM_HAS_SG_CHAIN
  80         select NEED_SG_DMA_LENGTH
  81
  82 if ARM_DMA_USE_IOMMU
  83
  84 config ARM_DMA_IOMMU_ALIGNMENT
  85         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
  86         range 4 9
  87         default 8
  88         help
  89           DMA mapping framework by default aligns all buffers to the smallest
  90           PAGE_SIZE order which is greater than or equal to the requested buffer
  91           size. This works well for buffers up to a few hundreds kilobytes, but
  92           for larger buffers it just a waste of address space. Drivers which has
  93           relatively small addressing window (like 64Mib) might run out of
  94           virtual space with just a few allocations.
  95
  96           With this parameter you can specify the maximum PAGE_SIZE order for
  97           DMA IOMMU buffers. Larger buffers will be aligned only to this
  98           specified order. The order is expressed as a power of two multiplied
  99           by the PAGE_SIZE.
 100
 101 endif
 102
 103 config HAVE_PWM
 104         bool
 105
 106 config MIGHT_HAVE_PCI
 107         bool
 108
 109 config SYS_SUPPORTS_APM_EMULATION
 110         bool
 111
 112 config GENERIC_GPIO
 113         bool
 114
 115 config HAVE_TCM
 116         bool
 117         select GENERIC_ALLOCATOR
 118
 119 config HAVE_PROC_CPU
 120         bool
 121
 122 config NO_IOPORT
 123         bool
 124
 125 config EISA
 126         bool
 127         ---help---
 128           The Extended Industry Standard Architecture (EISA) bus was
 129           developed as an open alternative to the IBM MicroChannel bus.
 130
 131           The EISA bus provided some of the features of the IBM MicroChannel
 132           bus while maintaining backward compatibility with cards made for
 133           the older ISA bus.  The EISA bus saw limited use between 1988 and
 134           1995 when it was made obsolete by the PCI bus.
 135
 136           Say Y here if you are building a kernel for an EISA-based machine.
 137
 138           Otherwise, say N.
 139
 140 config SBUS
 141         bool
 142
 143 config STACKTRACE_SUPPORT
 144         bool
 145         default y
 146
 147 config HAVE_LATENCYTOP_SUPPORT
 148         bool
 149         depends on !SMP
 150         default y
 151
 152 config LOCKDEP_SUPPORT
 153         bool
 154         default y
 155
 156 config TRACE_IRQFLAGS_SUPPORT
 157         bool
 158         default y
 159
 160 config RWSEM_GENERIC_SPINLOCK
 161         bool
 162         default y
 163
 164 config RWSEM_XCHGADD_ALGORITHM
 165         bool
 166
 167 config ARCH_HAS_ILOG2_U32
 168         bool
 169
 170 config ARCH_HAS_ILOG2_U64
 171         bool
 172
 173 config ARCH_HAS_CPUFREQ
 174         bool
 175         help
 176           Internal node to signify that the ARCH has CPUFREQ support
 177           and that the relevant menu configurations are displayed for
 178           it.
 179
 180 config GENERIC_HWEIGHT
 181         bool
 182         default y
 183
 184 config GENERIC_CALIBRATE_DELAY
 185         bool
 186         default y
 187
 188 config ARCH_MAY_HAVE_PC_FDC
 189         bool
 190
 191 config ZONE_DMA
 192         bool
 193
 194 config NEED_DMA_MAP_STATE
 195        def_bool y
 196
 197 config ARCH_HAS_DMA_SET_COHERENT_MASK
 198         bool
 199
 200 config GENERIC_ISA_DMA
 201         bool
 202
 203 config FIQ
 204         bool
 205
 206 config NEED_RET_TO_USER
 207         bool
 208
 209 config ARCH_MTD_XIP
 210         bool
 211
 212 config VECTORS_BASE
 213         hex
 214         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 215         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 216         default 0x00000000
 217         help
 218           The base address of exception vectors.
 219
 220 config ARM_PATCH_PHYS_VIRT
 221         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 222         default y
 223         depends on !XIP_KERNEL && MMU
 224         depends on !ARCH_REALVIEW || !SPARSEMEM
 225         help
 226           Patch phys-to-virt and virt-to-phys translation functions at
 227           boot and module load time according to the position of the
 228           kernel in system memory.
 229
 230           This can only be used with non-XIP MMU kernels where the base
 231           of physical memory is at a 16MB boundary.
 232
 233           Only disable this option if you know that you do not require
 234           this feature (eg, building a kernel for a single machine) and
 235           you need to shrink the kernel to the minimal size.
 236
 237 config NEED_MACH_GPIO_H
 238         bool
 239         help
 240           Select this when mach/gpio.h is required to provide special
 241           definitions for this platform. The need for mach/gpio.h should
 242           be avoided when possible.
 243
 244 config NEED_MACH_IO_H
 245         bool
 246         help
 247           Select this when mach/io.h is required to provide special
 248           definitions for this platform.  The need for mach/io.h should
 249           be avoided when possible.
 250
 251 config NEED_MACH_MEMORY_H
 252         bool
 253         help
 254           Select this when mach/memory.h is required to provide special
 255           definitions for this platform.  The need for mach/memory.h should
 256           be avoided when possible.
 257
 258 config PHYS_OFFSET
 259         hex "Physical address of main memory" if MMU
 260         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 261         default DRAM_BASE if !MMU
 262         help
 263           Please provide the physical address corresponding to the
 264           location of main memory in your system.
 265
 266 config GENERIC_BUG
 267         def_bool y
 268         depends on BUG
 269
 270 source "init/Kconfig"
 271
 272 source "kernel/Kconfig.freezer"
 273
 274 menu "System Type"
 275
 276 config MMU
 277         bool "MMU-based Paged Memory Management Support"
 278         default y
 279         help
 280           Select if you want MMU-based virtualised addressing space
 281           support by paged memory management. If unsure, say 'Y'.
 282
 283 #
 284 # The "ARM system type" choice list is ordered alphabetically by option
 285 # text.  Please add new entries in the option alphabetic order.
 286 #
 287 choice
 288         prompt "ARM system type"
 289         default ARCH_VERSATILE if !MMU
 290         default ARCH_MULTIPLATFORM if MMU
 291
 292 config ARCH_MULTIPLATFORM
 293         bool "Allow multiple platforms to be selected"
 294         depends on MMU
 295         select ARM_PATCH_PHYS_VIRT
 296         select AUTO_ZRELADDR
 297         select COMMON_CLK
 298         select MULTI_IRQ_HANDLER
 299         select SPARSE_IRQ
 300         select USE_OF
 301
 302 config ARCH_INTEGRATOR
 303         bool "ARM Ltd. Integrator family"
 304         select ARCH_HAS_CPUFREQ
 305         select ARM_AMBA
 306         select COMMON_CLK
 307         select COMMON_CLK_VERSATILE
 308         select GENERIC_CLOCKEVENTS
 309         select HAVE_TCM
 310         select ICST
 311         select MULTI_IRQ_HANDLER
 312         select NEED_MACH_MEMORY_H
 313         select PLAT_VERSATILE
 314         select SPARSE_IRQ
 315         select VERSATILE_FPGA_IRQ
 316         help
 317           Support for ARM's Integrator platform.
 318
 319 config ARCH_REALVIEW
 320         bool "ARM Ltd. RealView family"
 321         select ARCH_WANT_OPTIONAL_GPIOLIB
 322         select ARM_AMBA
 323         select ARM_TIMER_SP804
 324         select COMMON_CLK
 325         select COMMON_CLK_VERSATILE
 326         select GENERIC_CLOCKEVENTS
 327         select GPIO_PL061 if GPIOLIB
 328         select ICST
 329         select NEED_MACH_MEMORY_H
 330         select PLAT_VERSATILE
 331         select PLAT_VERSATILE_CLCD
 332         help
 333           This enables support for ARM Ltd RealView boards.
 334
 335 config ARCH_VERSATILE
 336         bool "ARM Ltd. Versatile family"
 337         select ARCH_WANT_OPTIONAL_GPIOLIB
 338         select ARM_AMBA
 339         select ARM_TIMER_SP804
 340         select ARM_VIC
 341         select CLKDEV_LOOKUP
 342         select GENERIC_CLOCKEVENTS
 343         select HAVE_MACH_CLKDEV
 344         select ICST
 345         select PLAT_VERSATILE
 346         select PLAT_VERSATILE_CLCD
 347         select PLAT_VERSATILE_CLOCK
 348         select VERSATILE_FPGA_IRQ
 349         help
 350           This enables support for ARM Ltd Versatile board.
 351
 352 config ARCH_AT91
 353         bool "Atmel AT91"
 354         select ARCH_REQUIRE_GPIOLIB
 355         select CLKDEV_LOOKUP
 356         select HAVE_CLK
 357         select IRQ_DOMAIN
 358         select NEED_MACH_GPIO_H
 359         select NEED_MACH_IO_H if PCCARD
 360         select PINCTRL
 361         select PINCTRL_AT91 if USE_OF
 362         help
 363           This enables support for systems based on Atmel
 364           AT91RM9200 and AT91SAM9* processors.
 365
 366 config ARCH_CLPS711X
 367         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 368         select ARCH_REQUIRE_GPIOLIB
 369         select AUTO_ZRELADDR
 370         select CLKDEV_LOOKUP
 371         select COMMON_CLK
 372         select CPU_ARM720T
 373         select GENERIC_CLOCKEVENTS
 374         select MULTI_IRQ_HANDLER
 375         select NEED_MACH_MEMORY_H
 376         select SPARSE_IRQ
 377         help
 378           Support for Cirrus Logic 711x/721x/731x based boards.
 379
 380 config ARCH_GEMINI
 381         bool "Cortina Systems Gemini"
 382         select ARCH_REQUIRE_GPIOLIB
 383         select ARCH_USES_GETTIMEOFFSET
 384         select NEED_MACH_GPIO_H
 385         select CPU_FA526
 386         help
 387           Support for the Cortina Systems Gemini family SoCs
 388
 389 config ARCH_EBSA110
 390         bool "EBSA-110"
 391         select ARCH_USES_GETTIMEOFFSET
 392         select CPU_SA110
 393         select ISA
 394         select NEED_MACH_IO_H
 395         select NEED_MACH_MEMORY_H
 396         select NO_IOPORT
 397         help
 398           This is an evaluation board for the StrongARM processor available
 399           from Digital. It has limited hardware on-board, including an
 400           Ethernet interface, two PCMCIA sockets, two serial ports and a
 401           parallel port.
 402
 403 config ARCH_EP93XX
 404         bool "EP93xx-based"
 405         select ARCH_HAS_HOLES_MEMORYMODEL
 406         select ARCH_REQUIRE_GPIOLIB
 407         select ARCH_USES_GETTIMEOFFSET
 408         select ARM_AMBA
 409         select ARM_VIC
 410         select CLKDEV_LOOKUP
 411         select CPU_ARM920T
 412         select NEED_MACH_MEMORY_H
 413         help
 414           This enables support for the Cirrus EP93xx series of CPUs.
 415
 416 config ARCH_FOOTBRIDGE
 417         bool "FootBridge"
 418         select CPU_SA110
 419         select FOOTBRIDGE
 420         select GENERIC_CLOCKEVENTS
 421         select HAVE_IDE
 422         select NEED_MACH_IO_H if !MMU
 423         select NEED_MACH_MEMORY_H
 424         help
 425           Support for systems based on the DC21285 companion chip
 426           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 427
 428 config ARCH_NETX
 429         bool "Hilscher NetX based"
 430         select ARM_VIC
 431         select CLKSRC_MMIO
 432         select CPU_ARM926T
 433         select GENERIC_CLOCKEVENTS
 434         help
 435           This enables support for systems based on the Hilscher NetX Soc
 436
 437 config ARCH_IOP13XX
 438         bool "IOP13xx-based"
 439         depends on MMU
 440         select ARCH_SUPPORTS_MSI
 441         select CPU_XSC3
 442         select NEED_MACH_MEMORY_H
 443         select NEED_RET_TO_USER
 444         select PCI
 445         select PLAT_IOP
 446         select VMSPLIT_1G
 447         help
 448           Support for Intel's IOP13XX (XScale) family of processors.
 449
 450 config ARCH_IOP32X
 451         bool "IOP32x-based"
 452         depends on MMU
 453         select ARCH_REQUIRE_GPIOLIB
 454         select CPU_XSCALE
 455         select NEED_MACH_GPIO_H
 456         select NEED_RET_TO_USER
 457         select PCI
 458         select PLAT_IOP
 459         help
 460           Support for Intel's 80219 and IOP32X (XScale) family of
 461           processors.
 462
 463 config ARCH_IOP33X
 464         bool "IOP33x-based"
 465         depends on MMU
 466         select ARCH_REQUIRE_GPIOLIB
 467         select CPU_XSCALE
 468         select NEED_MACH_GPIO_H
 469         select NEED_RET_TO_USER
 470         select PCI
 471         select PLAT_IOP
 472         help
 473           Support for Intel's IOP33X (XScale) family of processors.
 474
 475 config ARCH_IXP4XX
 476         bool "IXP4xx-based"
 477         depends on MMU
 478         select ARCH_HAS_DMA_SET_COHERENT_MASK
 479         select ARCH_REQUIRE_GPIOLIB
 480         select CLKSRC_MMIO
 481         select CPU_XSCALE
 482         select DMABOUNCE if PCI
 483         select GENERIC_CLOCKEVENTS
 484         select MIGHT_HAVE_PCI
 485         select NEED_MACH_IO_H
 486         select USB_EHCI_BIG_ENDIAN_MMIO
 487         select USB_EHCI_BIG_ENDIAN_DESC
 488         help
 489           Support for Intel's IXP4XX (XScale) family of processors.
 490
 491 config ARCH_DOVE
 492         bool "Marvell Dove"
 493         select ARCH_REQUIRE_GPIOLIB
 494         select CPU_V7
 495         select GENERIC_CLOCKEVENTS
 496         select MIGHT_HAVE_PCI
 497         select PINCTRL
 498         select PINCTRL_DOVE
 499         select PLAT_ORION_LEGACY
 500         select USB_ARCH_HAS_EHCI
 501         help
 502           Support for the Marvell Dove SoC 88AP510
 503
 504 config ARCH_KIRKWOOD
 505         bool "Marvell Kirkwood"
 506         select ARCH_REQUIRE_GPIOLIB
 507         select CPU_FEROCEON
 508         select GENERIC_CLOCKEVENTS
 509         select PCI
 510         select PCI_QUIRKS
 511         select PINCTRL
 512         select PINCTRL_KIRKWOOD
 513         select PLAT_ORION_LEGACY
 514         help
 515           Support for the following Marvell Kirkwood series SoCs:
 516           88F6180, 88F6192 and 88F6281.
 517
 518 config ARCH_MV78XX0
 519         bool "Marvell MV78xx0"
 520         select ARCH_REQUIRE_GPIOLIB
 521         select CPU_FEROCEON
 522         select GENERIC_CLOCKEVENTS
 523         select PCI
 524         select PLAT_ORION_LEGACY
 525         help
 526           Support for the following Marvell MV78xx0 series SoCs:
 527           MV781x0, MV782x0.
 528
 529 config ARCH_ORION5X
 530         bool "Marvell Orion"
 531         depends on MMU
 532         select ARCH_REQUIRE_GPIOLIB
 533         select CPU_FEROCEON
 534         select GENERIC_CLOCKEVENTS
 535         select PCI
 536         select PLAT_ORION_LEGACY
 537         help
 538           Support for the following Marvell Orion 5x series SoCs:
 539           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 540           Orion-2 (5281), Orion-1-90 (6183).
 541
 542 config ARCH_MMP
 543         bool "Marvell PXA168/910/MMP2"
 544         depends on MMU
 545         select ARCH_REQUIRE_GPIOLIB
 546         select CLKDEV_LOOKUP
 547         select GENERIC_ALLOCATOR
 548         select GENERIC_CLOCKEVENTS
 549         select GPIO_PXA
 550         select IRQ_DOMAIN
 551         select NEED_MACH_GPIO_H
 552         select PINCTRL
 553         select PLAT_PXA
 554         select SPARSE_IRQ
 555         help
 556           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 557
 558 config ARCH_KS8695
 559         bool "Micrel/Kendin KS8695"
 560         select ARCH_REQUIRE_GPIOLIB
 561         select CLKSRC_MMIO
 562         select CPU_ARM922T
 563         select GENERIC_CLOCKEVENTS
 564         select NEED_MACH_MEMORY_H
 565         help
 566           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 567           System-on-Chip devices.
 568
 569 config ARCH_W90X900
 570         bool "Nuvoton W90X900 CPU"
 571         select ARCH_REQUIRE_GPIOLIB
 572         select CLKDEV_LOOKUP
 573         select CLKSRC_MMIO
 574         select CPU_ARM926T
 575         select GENERIC_CLOCKEVENTS
 576         help
 577           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 578           At present, the w90x900 has been renamed nuc900, regarding
 579           the ARM series product line, you can login the following
 580           link address to know more.
 581
 582           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 583                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 584
 585 config ARCH_LPC32XX
 586         bool "NXP LPC32XX"
 587         select ARCH_REQUIRE_GPIOLIB
 588         select ARM_AMBA
 589         select CLKDEV_LOOKUP
 590         select CLKSRC_MMIO
 591         select CPU_ARM926T
 592         select GENERIC_CLOCKEVENTS
 593         select HAVE_IDE
 594         select HAVE_PWM
 595         select USB_ARCH_HAS_OHCI
 596         select USE_OF
 597         help
 598           Support for the NXP LPC32XX family of processors
 599
 600 config ARCH_PXA
 601         bool "PXA2xx/PXA3xx-based"
 602         depends on MMU
 603         select ARCH_HAS_CPUFREQ
 604         select ARCH_MTD_XIP
 605         select ARCH_REQUIRE_GPIOLIB
 606         select ARM_CPU_SUSPEND if PM
 607         select AUTO_ZRELADDR
 608         select CLKDEV_LOOKUP
 609         select CLKSRC_MMIO
 610         select GENERIC_CLOCKEVENTS
 611         select GPIO_PXA
 612         select HAVE_IDE
 613         select MULTI_IRQ_HANDLER
 614         select NEED_MACH_GPIO_H
 615         select PLAT_PXA
 616         select SPARSE_IRQ
 617         help
 618           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 619
 620 config ARCH_MSM
 621         bool "Qualcomm MSM"
 622         select ARCH_REQUIRE_GPIOLIB
 623         select CLKDEV_LOOKUP
 624         select GENERIC_CLOCKEVENTS
 625         select HAVE_CLK
 626         help
 627           Support for Qualcomm MSM/QSD based systems.  This runs on the
 628           apps processor of the MSM/QSD and depends on a shared memory
 629           interface to the modem processor which runs the baseband
 630           stack and controls some vital subsystems
 631           (clock and power control, etc).
 632
 633 config ARCH_SHMOBILE
 634         bool "Renesas SH-Mobile / R-Mobile"
 635         select CLKDEV_LOOKUP
 636         select GENERIC_CLOCKEVENTS
 637         select HAVE_ARM_SCU if SMP
 638         select HAVE_ARM_TWD if LOCAL_TIMERS
 639         select HAVE_CLK
 640         select HAVE_MACH_CLKDEV
 641         select HAVE_SMP
 642         select MIGHT_HAVE_CACHE_L2X0
 643         select MULTI_IRQ_HANDLER
 644         select NEED_MACH_MEMORY_H
 645         select NO_IOPORT
 646         select PINCTRL
 647         select PM_GENERIC_DOMAINS if PM
 648         select SPARSE_IRQ
 649         help
 650           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 651
 652 config ARCH_RPC
 653         bool "RiscPC"
 654         select ARCH_ACORN
 655         select ARCH_MAY_HAVE_PC_FDC
 656         select ARCH_SPARSEMEM_ENABLE
 657         select ARCH_USES_GETTIMEOFFSET
 658         select FIQ
 659         select HAVE_IDE
 660         select HAVE_PATA_PLATFORM
 661         select ISA_DMA_API
 662         select NEED_MACH_IO_H
 663         select NEED_MACH_MEMORY_H
 664         select NO_IOPORT
 665         select VIRT_TO_BUS
 666         help
 667           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 668           CD-ROM interface, serial and parallel port, and the floppy drive.
 669
 670 config ARCH_SA1100
 671         bool "SA1100-based"
 672         select ARCH_HAS_CPUFREQ
 673         select ARCH_MTD_XIP
 674         select ARCH_REQUIRE_GPIOLIB
 675         select ARCH_SPARSEMEM_ENABLE
 676         select CLKDEV_LOOKUP
 677         select CLKSRC_MMIO
 678         select CPU_FREQ
 679         select CPU_SA1100
 680         select GENERIC_CLOCKEVENTS
 681         select HAVE_IDE
 682         select ISA
 683         select NEED_MACH_GPIO_H
 684         select NEED_MACH_MEMORY_H
 685         select SPARSE_IRQ
 686         help
 687           Support for StrongARM 11x0 based boards.
 688
 689 config ARCH_S3C24XX
 690         bool "Samsung S3C24XX SoCs"
 691         select ARCH_HAS_CPUFREQ
 692         select ARCH_USES_GETTIMEOFFSET
 693         select CLKDEV_LOOKUP
 694         select HAVE_CLK
 695         select HAVE_S3C2410_I2C if I2C
 696         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 697         select HAVE_S3C_RTC if RTC_CLASS
 698         select NEED_MACH_GPIO_H
 699         select NEED_MACH_IO_H
 700         help
 701           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 702           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 703           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 704           Samsung SMDK2410 development board (and derivatives).
 705
 706 config ARCH_S3C64XX
 707         bool "Samsung S3C64XX"
 708         select ARCH_HAS_CPUFREQ
 709         select ARCH_REQUIRE_GPIOLIB
 710         select ARCH_USES_GETTIMEOFFSET
 711         select ARM_VIC
 712         select CLKDEV_LOOKUP
 713         select CPU_V6
 714         select HAVE_CLK
 715         select HAVE_S3C2410_I2C if I2C
 716         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 717         select HAVE_TCM
 718         select NEED_MACH_GPIO_H
 719         select NO_IOPORT
 720         select PLAT_SAMSUNG
 721         select S3C_DEV_NAND
 722         select S3C_GPIO_TRACK
 723         select SAMSUNG_CLKSRC
 724         select SAMSUNG_GPIOLIB_4BIT
 725         select SAMSUNG_IRQ_VIC_TIMER
 726         select USB_ARCH_HAS_OHCI
 727         help
 728           Samsung S3C64XX series based systems
 729
 730 config ARCH_S5P64X0
 731         bool "Samsung S5P6440 S5P6450"
 732         select CLKDEV_LOOKUP
 733         select CLKSRC_MMIO
 734         select CPU_V6
 735         select GENERIC_CLOCKEVENTS
 736         select HAVE_CLK
 737         select HAVE_S3C2410_I2C if I2C
 738         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 739         select HAVE_S3C_RTC if RTC_CLASS
 740         select NEED_MACH_GPIO_H
 741         help
 742           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 743           SMDK6450.
 744
 745 config ARCH_S5PC100
 746         bool "Samsung S5PC100"
 747         select ARCH_USES_GETTIMEOFFSET
 748         select CLKDEV_LOOKUP
 749         select CPU_V7
 750         select HAVE_CLK
 751         select HAVE_S3C2410_I2C if I2C
 752         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 753         select HAVE_S3C_RTC if RTC_CLASS
 754         select NEED_MACH_GPIO_H
 755         help
 756           Samsung S5PC100 series based systems
 757
 758 config ARCH_S5PV210
 759         bool "Samsung S5PV210/S5PC110"
 760         select ARCH_HAS_CPUFREQ
 761         select ARCH_HAS_HOLES_MEMORYMODEL
 762         select ARCH_SPARSEMEM_ENABLE
 763         select CLKDEV_LOOKUP
 764         select CLKSRC_MMIO
 765         select CPU_V7
 766         select GENERIC_CLOCKEVENTS
 767         select HAVE_CLK
 768         select HAVE_S3C2410_I2C if I2C
 769         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 770         select HAVE_S3C_RTC if RTC_CLASS
 771         select NEED_MACH_GPIO_H
 772         select NEED_MACH_MEMORY_H
 773         help
 774           Samsung S5PV210/S5PC110 series based systems
 775
 776 config ARCH_EXYNOS
 777         bool "Samsung EXYNOS"
 778         select ARCH_HAS_CPUFREQ
 779         select ARCH_HAS_HOLES_MEMORYMODEL
 780         select ARCH_SPARSEMEM_ENABLE
 781         select CLKDEV_LOOKUP
 782         select CPU_V7
 783         select GENERIC_CLOCKEVENTS
 784         select HAVE_CLK
 785         select HAVE_S3C2410_I2C if I2C
 786         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 787         select HAVE_S3C_RTC if RTC_CLASS
 788         select NEED_MACH_GPIO_H
 789         select NEED_MACH_MEMORY_H
 790         help
 791           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 792
 793 config ARCH_SHARK
 794         bool "Shark"
 795         select ARCH_USES_GETTIMEOFFSET
 796         select CPU_SA110
 797         select ISA
 798         select ISA_DMA
 799         select NEED_MACH_MEMORY_H
 800         select PCI
 801         select VIRT_TO_BUS
 802         select ZONE_DMA
 803         help
 804           Support for the StrongARM based Digital DNARD machine, also known
 805           as "Shark" (<http://www.shark-linux.de/shark.html>).
 806
 807 config ARCH_U300
 808         bool "ST-Ericsson U300 Series"
 809         depends on MMU
 810         select ARCH_REQUIRE_GPIOLIB
 811         select ARM_AMBA
 812         select ARM_PATCH_PHYS_VIRT
 813         select ARM_VIC
 814         select CLKDEV_LOOKUP
 815         select CLKSRC_MMIO
 816         select COMMON_CLK
 817         select CPU_ARM926T
 818         select GENERIC_CLOCKEVENTS
 819         select HAVE_TCM
 820         select SPARSE_IRQ
 821         help
 822           Support for ST-Ericsson U300 series mobile platforms.
 823
 824 config ARCH_DAVINCI
 825         bool "TI DaVinci"
 826         select ARCH_HAS_HOLES_MEMORYMODEL
 827         select ARCH_REQUIRE_GPIOLIB
 828         select CLKDEV_LOOKUP
 829         select GENERIC_ALLOCATOR
 830         select GENERIC_CLOCKEVENTS
 831         select GENERIC_IRQ_CHIP
 832         select HAVE_IDE
 833         select NEED_MACH_GPIO_H
 834         select USE_OF
 835         select ZONE_DMA
 836         help
 837           Support for TI's DaVinci platform.
 838
 839 config ARCH_OMAP1
 840         bool "TI OMAP1"
 841         depends on MMU
 842         select ARCH_HAS_CPUFREQ
 843         select ARCH_HAS_HOLES_MEMORYMODEL
 844         select ARCH_OMAP
 845         select ARCH_REQUIRE_GPIOLIB
 846         select CLKDEV_LOOKUP
 847         select CLKSRC_MMIO
 848         select GENERIC_CLOCKEVENTS
 849         select GENERIC_IRQ_CHIP
 850         select HAVE_CLK
 851         select HAVE_IDE
 852         select IRQ_DOMAIN
 853         select NEED_MACH_IO_H if PCCARD
 854         select NEED_MACH_MEMORY_H
 855         help
 856           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
 857
 858 endchoice
 859
 860 menu "Multiple platform selection"
 861         depends on ARCH_MULTIPLATFORM
 862
 863 comment "CPU Core family selection"
 864
 865 config ARCH_MULTI_V4
 866         bool "ARMv4 based platforms (FA526, StrongARM)"
 867         depends on !ARCH_MULTI_V6_V7
 868         select ARCH_MULTI_V4_V5
 869
 870 config ARCH_MULTI_V4T
 871         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 872         depends on !ARCH_MULTI_V6_V7
 873         select ARCH_MULTI_V4_V5
 874
 875 config ARCH_MULTI_V5
 876         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 877         depends on !ARCH_MULTI_V6_V7
 878         select ARCH_MULTI_V4_V5
 879
 880 config ARCH_MULTI_V4_V5
 881         bool
 882
 883 config ARCH_MULTI_V6
 884         bool "ARMv6 based platforms (ARM11)"
 885         select ARCH_MULTI_V6_V7
 886         select CPU_V6
 887
 888 config ARCH_MULTI_V7
 889         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
 890         default y
 891         select ARCH_MULTI_V6_V7
 892         select ARCH_VEXPRESS
 893         select CPU_V7
 894
 895 config ARCH_MULTI_V6_V7
 896         bool
 897
 898 config ARCH_MULTI_CPU_AUTO
 899         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
 900         select ARCH_MULTI_V5
 901
 902 endmenu
 903
 904 #
 905 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 906 # Kconfigs may be included either alphabetically (according to the
 907 # plat- suffix) or along side the corresponding mach-* source.
 908 #
 909 source "arch/arm/mach-mvebu/Kconfig"
 910
 911 source "arch/arm/mach-at91/Kconfig"
 912
 913 source "arch/arm/mach-bcm/Kconfig"
 914
 915 source "arch/arm/mach-bcm2835/Kconfig"
 916
 917 source "arch/arm/mach-clps711x/Kconfig"
 918
 919 source "arch/arm/mach-cns3xxx/Kconfig"
 920
 921 source "arch/arm/mach-davinci/Kconfig"
 922
 923 source "arch/arm/mach-dove/Kconfig"
 924
 925 source "arch/arm/mach-ep93xx/Kconfig"
 926
 927 source "arch/arm/mach-footbridge/Kconfig"
 928
 929 source "arch/arm/mach-gemini/Kconfig"
 930
 931 source "arch/arm/mach-highbank/Kconfig"
 932
 933 source "arch/arm/mach-integrator/Kconfig"
 934
 935 source "arch/arm/mach-iop32x/Kconfig"
 936
 937 source "arch/arm/mach-iop33x/Kconfig"
 938
 939 source "arch/arm/mach-iop13xx/Kconfig"
 940
 941 source "arch/arm/mach-ixp4xx/Kconfig"
 942
 943 source "arch/arm/mach-kirkwood/Kconfig"
 944
 945 source "arch/arm/mach-ks8695/Kconfig"
 946
 947 source "arch/arm/mach-msm/Kconfig"
 948
 949 source "arch/arm/mach-mv78xx0/Kconfig"
 950
 951 source "arch/arm/mach-imx/Kconfig"
 952
 953 source "arch/arm/mach-mxs/Kconfig"
 954
 955 source "arch/arm/mach-netx/Kconfig"
 956
 957 source "arch/arm/mach-nomadik/Kconfig"
 958
 959 source "arch/arm/plat-omap/Kconfig"
 960
 961 source "arch/arm/mach-omap1/Kconfig"
 962
 963 source "arch/arm/mach-omap2/Kconfig"
 964
 965 source "arch/arm/mach-orion5x/Kconfig"
 966
 967 source "arch/arm/mach-picoxcell/Kconfig"
 968
 969 source "arch/arm/mach-pxa/Kconfig"
 970 source "arch/arm/plat-pxa/Kconfig"
 971
 972 source "arch/arm/mach-mmp/Kconfig"
 973
 974 source "arch/arm/mach-realview/Kconfig"
 975
 976 source "arch/arm/mach-sa1100/Kconfig"
 977
 978 source "arch/arm/plat-samsung/Kconfig"
 979
 980 source "arch/arm/mach-socfpga/Kconfig"
 981
 982 source "arch/arm/mach-spear/Kconfig"
 983
 984 source "arch/arm/mach-s3c24xx/Kconfig"
 985
 986 if ARCH_S3C64XX
 987 source "arch/arm/mach-s3c64xx/Kconfig"
 988 endif
 989
 990 source "arch/arm/mach-s5p64x0/Kconfig"
 991
 992 source "arch/arm/mach-s5pc100/Kconfig"
 993
 994 source "arch/arm/mach-s5pv210/Kconfig"
 995
 996 source "arch/arm/mach-exynos/Kconfig"
 997
 998 source "arch/arm/mach-shmobile/Kconfig"
 999
1000 source "arch/arm/mach-sunxi/Kconfig"
1001
1002 source "arch/arm/mach-prima2/Kconfig"
1003
1004 source "arch/arm/mach-tegra/Kconfig"
1005
1006 source "arch/arm/mach-u300/Kconfig"
1007
1008 source "arch/arm/mach-ux500/Kconfig"
1009
1010 source "arch/arm/mach-versatile/Kconfig"
1011
1012 source "arch/arm/mach-vexpress/Kconfig"
1013 source "arch/arm/plat-versatile/Kconfig"
1014
1015 source "arch/arm/mach-virt/Kconfig"
1016
1017 source "arch/arm/mach-vt8500/Kconfig"
1018
1019 source "arch/arm/mach-w90x900/Kconfig"
1020
1021 source "arch/arm/mach-zynq/Kconfig"
1022
1023 # Definitions to make life easier
1024 config ARCH_ACORN
1025         bool
1026
1027 config PLAT_IOP
1028         bool
1029         select GENERIC_CLOCKEVENTS
1030
1031 config PLAT_ORION
1032         bool
1033         select CLKSRC_MMIO
1034         select COMMON_CLK
1035         select GENERIC_IRQ_CHIP
1036         select IRQ_DOMAIN
1037
1038 config PLAT_ORION_LEGACY
1039         bool
1040         select PLAT_ORION
1041
1042 config PLAT_PXA
1043         bool
1044
1045 config PLAT_VERSATILE
1046         bool
1047
1048 config ARM_TIMER_SP804
1049         bool
1050         select CLKSRC_MMIO
1051
1052 source arch/arm/mm/Kconfig
1053
1054 config ARM_NR_BANKS
1055         int
1056         default 16 if ARCH_EP93XX
1057         default 8
1058
1059 config IWMMXT
1060         bool "Enable iWMMXt support" if !CPU_PJ4
1061         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1062         default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
1063         help
1064           Enable support for iWMMXt context switching at run time if
1065           running on a CPU that supports it.
1066
1067 config XSCALE_PMU
1068         bool
1069         depends on CPU_XSCALE
1070         default y
1071
1072 config MULTI_IRQ_HANDLER
1073         bool
1074         help
1075           Allow each machine to specify it's own IRQ handler at run time.
1076
1077 if !MMU
1078 source "arch/arm/Kconfig-nommu"
1079 endif
1080
1081 config ARM_ERRATA_326103
1082         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1083         depends on CPU_V6
1084         help
1085           Executing a SWP instruction to read-only memory does not set bit 11
1086           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1087           treat the access as a read, preventing a COW from occurring and
1088           causing the faulting task to livelock.
1089
1090 config ARM_ERRATA_411920
1091         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1092         depends on CPU_V6 || CPU_V6K
1093         help
1094           Invalidation of the Instruction Cache operation can
1095           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1096           It does not affect the MPCore. This option enables the ARM Ltd.
1097           recommended workaround.
1098
1099 config ARM_ERRATA_430973
1100         bool "ARM errata: Stale prediction on replaced interworking branch"
1101         depends on CPU_V7
1102         help
1103           This option enables the workaround for the 430973 Cortex-A8
1104           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1105           interworking branch is replaced with another code sequence at the
1106           same virtual address, whether due to self-modifying code or virtual
1107           to physical address re-mapping, Cortex-A8 does not recover from the
1108           stale interworking branch prediction. This results in Cortex-A8
1109           executing the new code sequence in the incorrect ARM or Thumb state.
1110           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1111           and also flushes the branch target cache at every context switch.
1112           Note that setting specific bits in the ACTLR register may not be
1113           available in non-secure mode.
1114
1115 config ARM_ERRATA_458693
1116         bool "ARM errata: Processor deadlock when a false hazard is created"
1117         depends on CPU_V7
1118         depends on !ARCH_MULTIPLATFORM
1119         help
1120           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1121           erratum. For very specific sequences of memory operations, it is
1122           possible for a hazard condition intended for a cache line to instead
1123           be incorrectly associated with a different cache line. This false
1124           hazard might then cause a processor deadlock. The workaround enables
1125           the L1 caching of the NEON accesses and disables the PLD instruction
1126           in the ACTLR register. Note that setting specific bits in the ACTLR
1127           register may not be available in non-secure mode.
1128
1129 config ARM_ERRATA_460075
1130         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1131         depends on CPU_V7
1132         depends on !ARCH_MULTIPLATFORM
1133         help
1134           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1135           erratum. Any asynchronous access to the L2 cache may encounter a
1136           situation in which recent store transactions to the L2 cache are lost
1137           and overwritten with stale memory contents from external memory. The
1138           workaround disables the write-allocate mode for the L2 cache via the
1139           ACTLR register. Note that setting specific bits in the ACTLR register
1140           may not be available in non-secure mode.
1141
1142 config ARM_ERRATA_742230
1143         bool "ARM errata: DMB operation may be faulty"
1144         depends on CPU_V7 && SMP
1145         depends on !ARCH_MULTIPLATFORM
1146         help
1147           This option enables the workaround for the 742230 Cortex-A9
1148           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1149           between two write operations may not ensure the correct visibility
1150           ordering of the two writes. This workaround sets a specific bit in
1151           the diagnostic register of the Cortex-A9 which causes the DMB
1152           instruction to behave as a DSB, ensuring the correct behaviour of
1153           the two writes.
1154
1155 config ARM_ERRATA_742231
1156         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1157         depends on CPU_V7 && SMP
1158         depends on !ARCH_MULTIPLATFORM
1159         help
1160           This option enables the workaround for the 742231 Cortex-A9
1161           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1162           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1163           accessing some data located in the same cache line, may get corrupted
1164           data due to bad handling of the address hazard when the line gets
1165           replaced from one of the CPUs at the same time as another CPU is
1166           accessing it. This workaround sets specific bits in the diagnostic
1167           register of the Cortex-A9 which reduces the linefill issuing
1168           capabilities of the processor.
1169
1170 config PL310_ERRATA_588369
1171         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1172         depends on CACHE_L2X0
1173         help
1174            The PL310 L2 cache controller implements three types of Clean &
1175            Invalidate maintenance operations: by Physical Address
1176            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1177            They are architecturally defined to behave as the execution of a
1178            clean operation followed immediately by an invalidate operation,
1179            both performing to the same memory location. This functionality
1180            is not correctly implemented in PL310 as clean lines are not
1181            invalidated as a result of these operations.
1182
1183 config ARM_ERRATA_720789
1184         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1185         depends on CPU_V7
1186         help
1187           This option enables the workaround for the 720789 Cortex-A9 (prior to
1188           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1189           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1190           As a consequence of this erratum, some TLB entries which should be
1191           invalidated are not, resulting in an incoherency in the system page
1192           tables. The workaround changes the TLB flushing routines to invalidate
1193           entries regardless of the ASID.
1194
1195 config PL310_ERRATA_727915
1196         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1197         depends on CACHE_L2X0
1198         help
1199           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1200           operation (offset 0x7FC). This operation runs in background so that
1201           PL310 can handle normal accesses while it is in progress. Under very
1202           rare circumstances, due to this erratum, write data can be lost when
1203           PL310 treats a cacheable write transaction during a Clean &
1204           Invalidate by Way operation.
1205
1206 config ARM_ERRATA_743622
1207         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1208         depends on CPU_V7
1209         depends on !ARCH_MULTIPLATFORM
1210         help
1211           This option enables the workaround for the 743622 Cortex-A9
1212           (r2p*) erratum. Under very rare conditions, a faulty
1213           optimisation in the Cortex-A9 Store Buffer may lead to data
1214           corruption. This workaround sets a specific bit in the diagnostic
1215           register of the Cortex-A9 which disables the Store Buffer
1216           optimisation, preventing the defect from occurring. This has no
1217           visible impact on the overall performance or power consumption of the
1218           processor.
1219
1220 config ARM_ERRATA_751472
1221         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1222         depends on CPU_V7
1223         depends on !ARCH_MULTIPLATFORM
1224         help
1225           This option enables the workaround for the 751472 Cortex-A9 (prior
1226           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1227           completion of a following broadcasted operation if the second
1228           operation is received by a CPU before the ICIALLUIS has completed,
1229           potentially leading to corrupted entries in the cache or TLB.
1230
1231 config PL310_ERRATA_753970
1232         bool "PL310 errata: cache sync operation may be faulty"
1233         depends on CACHE_PL310
1234         help
1235           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1236
1237           Under some condition the effect of cache sync operation on
1238           the store buffer still remains when the operation completes.
1239           This means that the store buffer is always asked to drain and
1240           this prevents it from merging any further writes. The workaround
1241           is to replace the normal offset of cache sync operation (0x730)
1242           by another offset targeting an unmapped PL310 register 0x740.
1243           This has the same effect as the cache sync operation: store buffer
1244           drain and waiting for all buffers empty.
1245
1246 config ARM_ERRATA_754322
1247         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1248         depends on CPU_V7
1249         help
1250           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1251           r3p*) erratum. A speculative memory access may cause a page table walk
1252           which starts prior to an ASID switch but completes afterwards. This
1253           can populate the micro-TLB with a stale entry which may be hit with
1254           the new ASID. This workaround places two dsb instructions in the mm
1255           switching code so that no page table walks can cross the ASID switch.
1256
1257 config ARM_ERRATA_754327
1258         bool "ARM errata: no automatic Store Buffer drain"
1259         depends on CPU_V7 && SMP
1260         help
1261           This option enables the workaround for the 754327 Cortex-A9 (prior to
1262           r2p0) erratum. The Store Buffer does not have any automatic draining
1263           mechanism and therefore a livelock may occur if an external agent
1264           continuously polls a memory location waiting to observe an update.
1265           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1266           written polling loops from denying visibility of updates to memory.
1267
1268 config ARM_ERRATA_364296
1269         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1270         depends on CPU_V6 && !SMP
1271         help
1272           This options enables the workaround for the 364296 ARM1136
1273           r0p2 erratum (possible cache data corruption with
1274           hit-under-miss enabled). It sets the undocumented bit 31 in
1275           the auxiliary control register and the FI bit in the control
1276           register, thus disabling hit-under-miss without putting the
1277           processor into full low interrupt latency mode. ARM11MPCore
1278           is not affected.
1279
1280 config ARM_ERRATA_764369
1281         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1282         depends on CPU_V7 && SMP
1283         help
1284           This option enables the workaround for erratum 764369
1285           affecting Cortex-A9 MPCore with two or more processors (all
1286           current revisions). Under certain timing circumstances, a data
1287           cache line maintenance operation by MVA targeting an Inner
1288           Shareable memory region may fail to proceed up to either the
1289           Point of Coherency or to the Point of Unification of the
1290           system. This workaround adds a DSB instruction before the
1291           relevant cache maintenance functions and sets a specific bit
1292           in the diagnostic control register of the SCU.
1293
1294 config PL310_ERRATA_769419
1295         bool "PL310 errata: no automatic Store Buffer drain"
1296         depends on CACHE_L2X0
1297         help
1298           On revisions of the PL310 prior to r3p2, the Store Buffer does
1299           not automatically drain. This can cause normal, non-cacheable
1300           writes to be retained when the memory system is idle, leading
1301           to suboptimal I/O performance for drivers using coherent DMA.
1302           This option adds a write barrier to the cpu_idle loop so that,
1303           on systems with an outer cache, the store buffer is drained
1304           explicitly.
1305
1306 config ARM_ERRATA_775420
1307        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1308        depends on CPU_V7
1309        help
1310          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1311          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1312          operation aborts with MMU exception, it might cause the processor
1313          to deadlock. This workaround puts DSB before executing ISB if
1314          an abort may occur on cache maintenance.
1315
1316 config ARM_ERRATA_798181
1317         bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1318         depends on CPU_V7 && SMP
1319         help
1320           On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1321           adequately shooting down all use of the old entries. This
1322           option enables the Linux kernel workaround for this erratum
1323           which sends an IPI to the CPUs that are running the same ASID
1324           as the one being invalidated.
1325
1326 endmenu
1327
1328 source "arch/arm/common/Kconfig"
1329
1330 menu "Bus support"
1331
1332 config ARM_AMBA
1333         bool
1334
1335 config ISA
1336         bool
1337         help
1338           Find out whether you have ISA slots on your motherboard.  ISA is the
1339           name of a bus system, i.e. the way the CPU talks to the other stuff
1340           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1341           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1342           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1343
1344 # Select ISA DMA controller support
1345 config ISA_DMA
1346         bool
1347         select ISA_DMA_API
1348
1349 # Select ISA DMA interface
1350 config ISA_DMA_API
1351         bool
1352
1353 config PCI
1354         bool "PCI support" if MIGHT_HAVE_PCI
1355         help
1356           Find out whether you have a PCI motherboard. PCI is the name of a
1357           bus system, i.e. the way the CPU talks to the other stuff inside
1358           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1359           VESA. If you have PCI, say Y, otherwise N.
1360
1361 config PCI_DOMAINS
1362         bool
1363         depends on PCI
1364
1365 config PCI_NANOENGINE
1366         bool "BSE nanoEngine PCI support"
1367         depends on SA1100_NANOENGINE
1368         help
1369           Enable PCI on the BSE nanoEngine board.
1370
1371 config PCI_SYSCALL
1372         def_bool PCI
1373
1374 # Select the host bridge type
1375 config PCI_HOST_VIA82C505
1376         bool
1377         depends on PCI && ARCH_SHARK
1378         default y
1379
1380 config PCI_HOST_ITE8152
1381         bool
1382         depends on PCI && MACH_ARMCORE
1383         default y
1384         select DMABOUNCE
1385
1386 source "drivers/pci/Kconfig"
1387
1388 source "drivers/pcmcia/Kconfig"
1389
1390 endmenu
1391
1392 menu "Kernel Features"
1393
1394 config HAVE_SMP
1395         bool
1396         help
1397           This option should be selected by machines which have an SMP-
1398           capable CPU.
1399
1400           The only effect of this option is to make the SMP-related
1401           options available to the user for configuration.
1402
1403 config SMP
1404         bool "Symmetric Multi-Processing"
1405         depends on CPU_V6K || CPU_V7
1406         depends on GENERIC_CLOCKEVENTS
1407         depends on HAVE_SMP
1408         depends on MMU
1409         select USE_GENERIC_SMP_HELPERS
1410         help
1411           This enables support for systems with more than one CPU. If you have
1412           a system with only one CPU, like most personal computers, say N. If
1413           you have a system with more than one CPU, say Y.
1414
1415           If you say N here, the kernel will run on single and multiprocessor
1416           machines, but will use only one CPU of a multiprocessor machine. If
1417           you say Y here, the kernel will run on many, but not all, single
1418           processor machines. On a single processor machine, the kernel will
1419           run faster if you say N here.
1420
1421           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1422           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1423           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1424
1425           If you don't know what to do here, say N.
1426
1427 config SMP_ON_UP
1428         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1429         depends on SMP && !XIP_KERNEL
1430         default y
1431         help
1432           SMP kernels contain instructions which fail on non-SMP processors.
1433           Enabling this option allows the kernel to modify itself to make
1434           these instructions safe.  Disabling it allows about 1K of space
1435           savings.
1436
1437           If you don't know what to do here, say Y.
1438
1439 config ARM_CPU_TOPOLOGY
1440         bool "Support cpu topology definition"
1441         depends on SMP && CPU_V7
1442         default y
1443         help
1444           Support ARM cpu topology definition. The MPIDR register defines
1445           affinity between processors which is then used to describe the cpu
1446           topology of an ARM System.
1447
1448 config SCHED_MC
1449         bool "Multi-core scheduler support"
1450         depends on ARM_CPU_TOPOLOGY
1451         help
1452           Multi-core scheduler support improves the CPU scheduler's decision
1453           making when dealing with multi-core CPU chips at a cost of slightly
1454           increased overhead in some places. If unsure say N here.
1455
1456 config SCHED_SMT
1457         bool "SMT scheduler support"
1458         depends on ARM_CPU_TOPOLOGY
1459         help
1460           Improves the CPU scheduler's decision making when dealing with
1461           MultiThreading at a cost of slightly increased overhead in some
1462           places. If unsure say N here.
1463
1464 config HAVE_ARM_SCU
1465         bool
1466         help
1467           This option enables support for the ARM system coherency unit
1468
1469 config HAVE_ARM_ARCH_TIMER
1470         bool "Architected timer support"
1471         depends on CPU_V7
1472         select ARM_ARCH_TIMER
1473         help
1474           This option enables support for the ARM architected timer
1475
1476 config HAVE_ARM_TWD
1477         bool
1478         depends on SMP
1479         select CLKSRC_OF if OF
1480         help
1481           This options enables support for the ARM timer and watchdog unit
1482
1483 config MCPM
1484         bool "Multi-Cluster Power Management"
1485         depends on CPU_V7 && SMP
1486         help
1487           This option provides the common power management infrastructure
1488           for (multi-)cluster based systems, such as big.LITTLE based
1489           systems.
1490
1491 choice
1492         prompt "Memory split"
1493         default VMSPLIT_3G
1494         help
1495           Select the desired split between kernel and user memory.
1496
1497           If you are not absolutely sure what you are doing, leave this
1498           option alone!
1499
1500         config VMSPLIT_3G
1501                 bool "3G/1G user/kernel split"
1502         config VMSPLIT_2G
1503                 bool "2G/2G user/kernel split"
1504         config VMSPLIT_1G
1505                 bool "1G/3G user/kernel split"
1506 endchoice
1507
1508 config PAGE_OFFSET
1509         hex
1510         default 0x40000000 if VMSPLIT_1G
1511         default 0x80000000 if VMSPLIT_2G
1512         default 0xC0000000
1513
1514 config NR_CPUS
1515         int "Maximum number of CPUs (2-32)"
1516         range 2 32
1517         depends on SMP
1518         default "4"
1519
1520 config HOTPLUG_CPU
1521         bool "Support for hot-pluggable CPUs"
1522         depends on SMP && HOTPLUG
1523         help
1524           Say Y here to experiment with turning CPUs off and on.  CPUs
1525           can be controlled through /sys/devices/system/cpu.
1526
1527 config ARM_PSCI
1528         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1529         depends on CPU_V7
1530         help
1531           Say Y here if you want Linux to communicate with system firmware
1532           implementing the PSCI specification for CPU-centric power
1533           management operations described in ARM document number ARM DEN
1534           0022A ("Power State Coordination Interface System Software on
1535           ARM processors").
1536
1537 config LOCAL_TIMERS
1538         bool "Use local timer interrupts"
1539         depends on SMP
1540         default y
1541         help
1542           Enable support for local timers on SMP platforms, rather then the
1543           legacy IPI broadcast method.  Local timers allows the system
1544           accounting to be spread across the timer interval, preventing a
1545           "thundering herd" at every timer tick.
1546
1547 # The GPIO number here must be sorted by descending number. In case of
1548 # a multiplatform kernel, we just want the highest value required by the
1549 # selected platforms.
1550 config ARCH_NR_GPIO
1551         int
1552         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1553         default 512 if SOC_OMAP5
1554         default 392 if ARCH_U8500
1555         default 288 if ARCH_VT8500 || ARCH_SUNXI
1556         default 264 if MACH_H4700
1557         default 0
1558         help
1559           Maximum number of GPIOs in the system.
1560
1561           If unsure, leave the default value.
1562
1563 source kernel/Kconfig.preempt
1564
1565 config HZ
1566         int
1567         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1568                 ARCH_S5PV210 || ARCH_EXYNOS4
1569         default AT91_TIMER_HZ if ARCH_AT91
1570         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1571         default 100
1572
1573 config SCHED_HRTICK
1574         def_bool HIGH_RES_TIMERS
1575
1576 config THUMB2_KERNEL
1577         bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
1578         depends on CPU_V7 && !CPU_V6 && !CPU_V6K
1579         default y if CPU_THUMBONLY
1580         select AEABI
1581         select ARM_ASM_UNIFIED
1582         select ARM_UNWIND
1583         help
1584           By enabling this option, the kernel will be compiled in
1585           Thumb-2 mode. A compiler/assembler that understand the unified
1586           ARM-Thumb syntax is needed.
1587
1588           If unsure, say N.
1589
1590 config THUMB2_AVOID_R_ARM_THM_JUMP11
1591         bool "Work around buggy Thumb-2 short branch relocations in gas"
1592         depends on THUMB2_KERNEL && MODULES
1593         default y
1594         help
1595           Various binutils versions can resolve Thumb-2 branches to
1596           locally-defined, preemptible global symbols as short-range "b.n"
1597           branch instructions.
1598
1599           This is a problem, because there's no guarantee the final
1600           destination of the symbol, or any candidate locations for a
1601           trampoline, are within range of the branch.  For this reason, the
1602           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1603           relocation in modules at all, and it makes little sense to add
1604           support.
1605
1606           The symptom is that the kernel fails with an "unsupported
1607           relocation" error when loading some modules.
1608
1609           Until fixed tools are available, passing
1610           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1611           code which hits this problem, at the cost of a bit of extra runtime
1612           stack usage in some cases.
1613
1614           The problem is described in more detail at:
1615               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1616
1617           Only Thumb-2 kernels are affected.
1618
1619           Unless you are sure your tools don't have this problem, say Y.
1620
1621 config ARM_ASM_UNIFIED
1622         bool
1623
1624 config AEABI
1625         bool "Use the ARM EABI to compile the kernel"
1626         help
1627           This option allows for the kernel to be compiled using the latest
1628           ARM ABI (aka EABI).  This is only useful if you are using a user
1629           space environment that is also compiled with EABI.
1630
1631           Since there are major incompatibilities between the legacy ABI and
1632           EABI, especially with regard to structure member alignment, this
1633           option also changes the kernel syscall calling convention to
1634           disambiguate both ABIs and allow for backward compatibility support
1635           (selected with CONFIG_OABI_COMPAT).
1636
1637           To use this you need GCC version 4.0.0 or later.
1638
1639 config OABI_COMPAT
1640         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1641         depends on AEABI && !THUMB2_KERNEL
1642         default y
1643         help
1644           This option preserves the old syscall interface along with the
1645           new (ARM EABI) one. It also provides a compatibility layer to
1646           intercept syscalls that have structure arguments which layout
1647           in memory differs between the legacy ABI and the new ARM EABI
1648           (only for non "thumb" binaries). This option adds a tiny
1649           overhead to all syscalls and produces a slightly larger kernel.
1650           If you know you'll be using only pure EABI user space then you
1651           can say N here. If this option is not selected and you attempt
1652           to execute a legacy ABI binary then the result will be
1653           UNPREDICTABLE (in fact it can be predicted that it won't work
1654           at all). If in doubt say Y.
1655
1656 config ARCH_HAS_HOLES_MEMORYMODEL
1657         bool
1658
1659 config ARCH_SPARSEMEM_ENABLE
1660         bool
1661
1662 config ARCH_SPARSEMEM_DEFAULT
1663         def_bool ARCH_SPARSEMEM_ENABLE
1664
1665 config ARCH_SELECT_MEMORY_MODEL
1666         def_bool ARCH_SPARSEMEM_ENABLE
1667
1668 config HAVE_ARCH_PFN_VALID
1669         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1670
1671 config HIGHMEM
1672         bool "High Memory Support"
1673         depends on MMU
1674         help
1675           The address space of ARM processors is only 4 Gigabytes large
1676           and it has to accommodate user address space, kernel address
1677           space as well as some memory mapped IO. That means that, if you
1678           have a large amount of physical memory and/or IO, not all of the
1679           memory can be "permanently mapped" by the kernel. The physical
1680           memory that is not permanently mapped is called "high memory".
1681
1682           Depending on the selected kernel/user memory split, minimum
1683           vmalloc space and actual amount of RAM, you may not need this
1684           option which should result in a slightly faster kernel.
1685
1686           If unsure, say n.
1687
1688 config HIGHPTE
1689         bool "Allocate 2nd-level pagetables from highmem"
1690         depends on HIGHMEM
1691
1692 config HW_PERF_EVENTS
1693         bool "Enable hardware performance counter support for perf events"
1694         depends on PERF_EVENTS
1695         default y
1696         help
1697           Enable hardware performance counter support for perf events. If
1698           disabled, perf events will use software events only.
1699
1700 source "mm/Kconfig"
1701
1702 config FORCE_MAX_ZONEORDER
1703         int "Maximum zone order" if ARCH_SHMOBILE
1704         range 11 64 if ARCH_SHMOBILE
1705         default "12" if SOC_AM33XX
1706         default "9" if SA1111
1707         default "11"
1708         help
1709           The kernel memory allocator divides physically contiguous memory
1710           blocks into "zones", where each zone is a power of two number of
1711           pages.  This option selects the largest power of two that the kernel
1712           keeps in the memory allocator.  If you need to allocate very large
1713           blocks of physically contiguous memory, then you may need to
1714           increase this value.
1715
1716           This config option is actually maximum order plus one. For example,
1717           a value of 11 means that the largest free memory block is 2^10 pages.
1718
1719 config ALIGNMENT_TRAP
1720         bool
1721         depends on CPU_CP15_MMU
1722         default y if !ARCH_EBSA110
1723         select HAVE_PROC_CPU if PROC_FS
1724         help
1725           ARM processors cannot fetch/store information which is not
1726           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1727           address divisible by 4. On 32-bit ARM processors, these non-aligned
1728           fetch/store instructions will be emulated in software if you say
1729           here, which has a severe performance impact. This is necessary for
1730           correct operation of some network protocols. With an IP-only
1731           configuration it is safe to say N, otherwise say Y.
1732
1733 config UACCESS_WITH_MEMCPY
1734         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1735         depends on MMU
1736         default y if CPU_FEROCEON
1737         help
1738           Implement faster copy_to_user and clear_user methods for CPU
1739           cores where a 8-word STM instruction give significantly higher
1740           memory write throughput than a sequence of individual 32bit stores.
1741
1742           A possible side effect is a slight increase in scheduling latency
1743           between threads sharing the same address space if they invoke
1744           such copy operations with large buffers.
1745
1746           However, if the CPU data cache is using a write-allocate mode,
1747           this option is unlikely to provide any performance gain.
1748
1749 config SECCOMP
1750         bool
1751         prompt "Enable seccomp to safely compute untrusted bytecode"
1752         ---help---
1753           This kernel feature is useful for number crunching applications
1754           that may need to compute untrusted bytecode during their
1755           execution. By using pipes or other transports made available to
1756           the process as file descriptors supporting the read/write
1757           syscalls, it's possible to isolate those applications in
1758           their own address space using seccomp. Once seccomp is
1759           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1760           and the task is only allowed to execute a few safe syscalls
1761           defined by each seccomp mode.
1762
1763 config CC_STACKPROTECTOR
1764         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1765         help
1766           This option turns on the -fstack-protector GCC feature. This
1767           feature puts, at the beginning of functions, a canary value on
1768           the stack just before the return address, and validates
1769           the value just before actually returning.  Stack based buffer
1770           overflows (that need to overwrite this return address) now also
1771           overwrite the canary, which gets detected and the attack is then
1772           neutralized via a kernel panic.
1773           This feature requires gcc version 4.2 or above.
1774
1775 config XEN_DOM0
1776         def_bool y
1777         depends on XEN
1778
1779 config XEN
1780         bool "Xen guest support on ARM (EXPERIMENTAL)"
1781         depends on ARM && AEABI && OF
1782         depends on CPU_V7 && !CPU_V6
1783         depends on !GENERIC_ATOMIC64
1784         help
1785           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1786
1787 endmenu
1788
1789 menu "Boot options"
1790
1791 config USE_OF
1792         bool "Flattened Device Tree support"
1793         select IRQ_DOMAIN
1794         select OF
1795         select OF_EARLY_FLATTREE
1796         help
1797           Include support for flattened device tree machine descriptions.
1798
1799 config ATAGS
1800         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1801         default y
1802         help
1803           This is the traditional way of passing data to the kernel at boot
1804           time. If you are solely relying on the flattened device tree (or
1805           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1806           to remove ATAGS support from your kernel binary.  If unsure,
1807           leave this to y.
1808
1809 config DEPRECATED_PARAM_STRUCT
1810         bool "Provide old way to pass kernel parameters"
1811         depends on ATAGS
1812         help
1813           This was deprecated in 2001 and announced to live on for 5 years.
1814           Some old boot loaders still use this way.
1815
1816 # Compressed boot loader in ROM.  Yes, we really want to ask about
1817 # TEXT and BSS so we preserve their values in the config files.
1818 config ZBOOT_ROM_TEXT
1819         hex "Compressed ROM boot loader base address"
1820         default "0"
1821         help
1822           The physical address at which the ROM-able zImage is to be
1823           placed in the target.  Platforms which normally make use of
1824           ROM-able zImage formats normally set this to a suitable
1825           value in their defconfig file.
1826
1827           If ZBOOT_ROM is not enabled, this has no effect.
1828
1829 config ZBOOT_ROM_BSS
1830         hex "Compressed ROM boot loader BSS address"
1831         default "0"
1832         help
1833           The base address of an area of read/write memory in the target
1834           for the ROM-able zImage which must be available while the
1835           decompressor is running. It must be large enough to hold the
1836           entire decompressed kernel plus an additional 128 KiB.
1837           Platforms which normally make use of ROM-able zImage formats
1838           normally set this to a suitable value in their defconfig file.
1839
1840           If ZBOOT_ROM is not enabled, this has no effect.
1841
1842 config ZBOOT_ROM
1843         bool "Compressed boot loader in ROM/flash"
1844         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1845         help
1846           Say Y here if you intend to execute your compressed kernel image
1847           (zImage) directly from ROM or flash.  If unsure, say N.
1848
1849 choice
1850         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1851         depends on ZBOOT_ROM && ARCH_SH7372
1852         default ZBOOT_ROM_NONE
1853         help
1854           Include experimental SD/MMC loading code in the ROM-able zImage.
1855           With this enabled it is possible to write the ROM-able zImage
1856           kernel image to an MMC or SD card and boot the kernel straight
1857           from the reset vector. At reset the processor Mask ROM will load
1858           the first part of the ROM-able zImage which in turn loads the
1859           rest the kernel image to RAM.
1860
1861 config ZBOOT_ROM_NONE
1862         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1863         help
1864           Do not load image from SD or MMC
1865
1866 config ZBOOT_ROM_MMCIF
1867         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1868         help
1869           Load image from MMCIF hardware block.
1870
1871 config ZBOOT_ROM_SH_MOBILE_SDHI
1872         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1873         help
1874           Load image from SDHI hardware block
1875
1876 endchoice
1877
1878 config ARM_APPENDED_DTB
1879         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1880         depends on OF && !ZBOOT_ROM
1881         help
1882           With this option, the boot code will look for a device tree binary
1883           (DTB) appended to zImage
1884           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1885
1886           This is meant as a backward compatibility convenience for those
1887           systems with a bootloader that can't be upgraded to accommodate
1888           the documented boot protocol using a device tree.
1889
1890           Beware that there is very little in terms of protection against
1891           this option being confused by leftover garbage in memory that might
1892           look like a DTB header after a reboot if no actual DTB is appended
1893           to zImage.  Do not leave this option active in a production kernel
1894           if you don't intend to always append a DTB.  Proper passing of the
1895           location into r2 of a bootloader provided DTB is always preferable
1896           to this option.
1897
1898 config ARM_ATAG_DTB_COMPAT
1899         bool "Supplement the appended DTB with traditional ATAG information"
1900         depends on ARM_APPENDED_DTB
1901         help
1902           Some old bootloaders can't be updated to a DTB capable one, yet
1903           they provide ATAGs with memory configuration, the ramdisk address,
1904           the kernel cmdline string, etc.  Such information is dynamically
1905           provided by the bootloader and can't always be stored in a static
1906           DTB.  To allow a device tree enabled kernel to be used with such
1907           bootloaders, this option allows zImage to extract the information
1908           from the ATAG list and store it at run time into the appended DTB.
1909
1910 choice
1911         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1912         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1913
1914 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1915         bool "Use bootloader kernel arguments if available"
1916         help
1917           Uses the command-line options passed by the boot loader instead of
1918           the device tree bootargs property. If the boot loader doesn't provide
1919           any, the device tree bootargs property will be used.
1920
1921 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1922         bool "Extend with bootloader kernel arguments"
1923         help
1924           The command-line arguments provided by the boot loader will be
1925           appended to the the device tree bootargs property.
1926
1927 endchoice
1928
1929 config CMDLINE
1930         string "Default kernel command string"
1931         default ""
1932         help
1933           On some architectures (EBSA110 and CATS), there is currently no way
1934           for the boot loader to pass arguments to the kernel. For these
1935           architectures, you should supply some command-line options at build
1936           time by entering them here. As a minimum, you should specify the
1937           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1938
1939 choice
1940         prompt "Kernel command line type" if CMDLINE != ""
1941         default CMDLINE_FROM_BOOTLOADER
1942         depends on ATAGS
1943
1944 config CMDLINE_FROM_BOOTLOADER
1945         bool "Use bootloader kernel arguments if available"
1946         help
1947           Uses the command-line options passed by the boot loader. If
1948           the boot loader doesn't provide any, the default kernel command
1949           string provided in CMDLINE will be used.
1950
1951 config CMDLINE_EXTEND
1952         bool "Extend bootloader kernel arguments"
1953         help
1954           The command-line arguments provided by the boot loader will be
1955           appended to the default kernel command string.
1956
1957 config CMDLINE_FORCE
1958         bool "Always use the default kernel command string"
1959         help
1960           Always use the default kernel command string, even if the boot
1961           loader passes other arguments to the kernel.
1962           This is useful if you cannot or don't want to change the
1963           command-line options your boot loader passes to the kernel.
1964 endchoice
1965
1966 config XIP_KERNEL
1967         bool "Kernel Execute-In-Place from ROM"
1968         depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
1969         help
1970           Execute-In-Place allows the kernel to run from non-volatile storage
1971           directly addressable by the CPU, such as NOR flash. This saves RAM
1972           space since the text section of the kernel is not loaded from flash
1973           to RAM.  Read-write sections, such as the data section and stack,
1974           are still copied to RAM.  The XIP kernel is not compressed since
1975           it has to run directly from flash, so it will take more space to
1976           store it.  The flash address used to link the kernel object files,
1977           and for storing it, is configuration dependent. Therefore, if you
1978           say Y here, you must know the proper physical address where to
1979           store the kernel image depending on your own flash memory usage.
1980
1981           Also note that the make target becomes "make xipImage" rather than
1982           "make zImage" or "make Image".  The final kernel binary to put in
1983           ROM memory will be arch/arm/boot/xipImage.
1984
1985           If unsure, say N.
1986
1987 config XIP_PHYS_ADDR
1988         hex "XIP Kernel Physical Location"
1989         depends on XIP_KERNEL
1990         default "0x00080000"
1991         help
1992           This is the physical address in your flash memory the kernel will
1993           be linked for and stored to.  This address is dependent on your
1994           own flash usage.
1995
1996 config KEXEC
1997         bool "Kexec system call (EXPERIMENTAL)"
1998         depends on (!SMP || HOTPLUG_CPU)
1999         help
2000           kexec is a system call that implements the ability to shutdown your
2001           current kernel, and to start another kernel.  It is like a reboot
2002           but it is independent of the system firmware.   And like a reboot
2003           you can start any kernel with it, not just Linux.
2004
2005           It is an ongoing process to be certain the hardware in a machine
2006           is properly shutdown, so do not be surprised if this code does not
2007           initially work for you.  It may help to enable device hotplugging
2008           support.
2009
2010 config ATAGS_PROC
2011         bool "Export atags in procfs"
2012         depends on ATAGS && KEXEC
2013         default y
2014         help
2015           Should the atags used to boot the kernel be exported in an "atags"
2016           file in procfs. Useful with kexec.
2017
2018 config CRASH_DUMP
2019         bool "Build kdump crash kernel (EXPERIMENTAL)"
2020         help
2021           Generate crash dump after being started by kexec. This should
2022           be normally only set in special crash dump kernels which are
2023           loaded in the main kernel with kexec-tools into a specially
2024           reserved region and then later executed after a crash by
2025           kdump/kexec. The crash dump kernel must be compiled to a
2026           memory address not used by the main kernel
2027
2028           For more details see Documentation/kdump/kdump.txt
2029
2030 config AUTO_ZRELADDR
2031         bool "Auto calculation of the decompressed kernel image address"
2032         depends on !ZBOOT_ROM && !ARCH_U300
2033         help
2034           ZRELADDR is the physical address where the decompressed kernel
2035           image will be placed. If AUTO_ZRELADDR is selected, the address
2036           will be determined at run-time by masking the current IP with
2037           0xf8000000. This assumes the zImage being placed in the first 128MB
2038           from start of memory.
2039
2040 endmenu
2041
2042 menu "CPU Power Management"
2043
2044 if ARCH_HAS_CPUFREQ
2045 source "drivers/cpufreq/Kconfig"
2046
2047 config CPU_FREQ_S3C
2048         bool
2049         help
2050           Internal configuration node for common cpufreq on Samsung SoC
2051
2052 config CPU_FREQ_S3C24XX
2053         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2054         depends on ARCH_S3C24XX && CPU_FREQ
2055         select CPU_FREQ_S3C
2056         help
2057           This enables the CPUfreq driver for the Samsung S3C24XX family
2058           of CPUs.
2059
2060           For details, take a look at <file:Documentation/cpu-freq>.
2061
2062           If in doubt, say N.
2063
2064 config CPU_FREQ_S3C24XX_PLL
2065         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2066         depends on CPU_FREQ_S3C24XX
2067         help
2068           Compile in support for changing the PLL frequency from the
2069           S3C24XX series CPUfreq driver. The PLL takes time to settle
2070           after a frequency change, so by default it is not enabled.
2071
2072           This also means that the PLL tables for the selected CPU(s) will
2073           be built which may increase the size of the kernel image.
2074
2075 config CPU_FREQ_S3C24XX_DEBUG
2076         bool "Debug CPUfreq Samsung driver core"
2077         depends on CPU_FREQ_S3C24XX
2078         help
2079           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2080
2081 config CPU_FREQ_S3C24XX_IODEBUG
2082         bool "Debug CPUfreq Samsung driver IO timing"
2083         depends on CPU_FREQ_S3C24XX
2084         help
2085           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2086
2087 config CPU_FREQ_S3C24XX_DEBUGFS
2088         bool "Export debugfs for CPUFreq"
2089         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2090         help
2091           Export status information via debugfs.
2092
2093 endif
2094
2095 source "drivers/cpuidle/Kconfig"
2096
2097 endmenu
2098
2099 menu "Floating point emulation"
2100
2101 comment "At least one emulation must be selected"
2102
2103 config FPE_NWFPE
2104         bool "NWFPE math emulation"
2105         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2106         ---help---
2107           Say Y to include the NWFPE floating point emulator in the kernel.
2108           This is necessary to run most binaries. Linux does not currently
2109           support floating point hardware so you need to say Y here even if
2110           your machine has an FPA or floating point co-processor podule.
2111
2112           You may say N here if you are going to load the Acorn FPEmulator
2113           early in the bootup.
2114
2115 config FPE_NWFPE_XP
2116         bool "Support extended precision"
2117         depends on FPE_NWFPE
2118         help
2119           Say Y to include 80-bit support in the kernel floating-point
2120           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2121           Note that gcc does not generate 80-bit operations by default,
2122           so in most cases this option only enlarges the size of the
2123           floating point emulator without any good reason.
2124
2125           You almost surely want to say N here.
2126
2127 config FPE_FASTFPE
2128         bool "FastFPE math emulation (EXPERIMENTAL)"
2129         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2130         ---help---
2131           Say Y here to include the FAST floating point emulator in the kernel.
2132           This is an experimental much faster emulator which now also has full
2133           precision for the mantissa.  It does not support any exceptions.
2134           It is very simple, and approximately 3-6 times faster than NWFPE.
2135
2136           It should be sufficient for most programs.  It may be not suitable
2137           for scientific calculations, but you have to check this for yourself.
2138           If you do not feel you need a faster FP emulation you should better
2139           choose NWFPE.
2140
2141 config VFP
2142         bool "VFP-format floating point maths"
2143         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2144         help
2145           Say Y to include VFP support code in the kernel. This is needed
2146           if your hardware includes a VFP unit.
2147
2148           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2149           release notes and additional status information.
2150
2151           Say N if your target does not have VFP hardware.
2152
2153 config VFPv3
2154         bool
2155         depends on VFP
2156         default y if CPU_V7
2157
2158 config NEON
2159         bool "Advanced SIMD (NEON) Extension support"
2160         depends on VFPv3 && CPU_V7
2161         help
2162           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2163           Extension.
2164
2165 endmenu
2166
2167 menu "Userspace binary formats"
2168
2169 source "fs/Kconfig.binfmt"
2170
2171 config ARTHUR
2172         tristate "RISC OS personality"
2173         depends on !AEABI
2174         help
2175           Say Y here to include the kernel code necessary if you want to run
2176           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2177           experimental; if this sounds frightening, say N and sleep in peace.
2178           You can also say M here to compile this support as a module (which
2179           will be called arthur).
2180
2181 endmenu
2182
2183 menu "Power management options"
2184
2185 source "kernel/power/Kconfig"
2186
2187 config ARCH_SUSPEND_POSSIBLE
2188         depends on !ARCH_S5PC100
2189         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2190                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2191         def_bool y
2192
2193 config ARM_CPU_SUSPEND
2194         def_bool PM_SLEEP
2195
2196 endmenu
2197
2198 source "net/Kconfig"
2199
2200 source "drivers/Kconfig"
2201
2202 source "fs/Kconfig"
2203
2204 source "arch/arm/Kconfig.debug"
2205
2206 source "security/Kconfig"
2207
2208 source "crypto/Kconfig"
2209
2210 source "lib/Kconfig"
2211
2212 source "arch/arm/kvm/Kconfig"