Commit | Line | Data |
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ca5481c6 PM |
1 | /* |
2 | * SuperH Pin Function Controller pinmux support. | |
3 | * | |
4 | * Copyright (C) 2012 Paul Mundt | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | */ | |
a2d3afff | 10 | #define pr_fmt(fmt) "sh_pfc " KBUILD_MODNAME ": " fmt |
ca5481c6 PM |
11 | |
12 | #include <linux/init.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/sh_pfc.h> | |
15 | #include <linux/err.h> | |
16 | #include <linux/slab.h> | |
d93a891f | 17 | #include <linux/spinlock.h> |
ca5481c6 PM |
18 | #include <linux/platform_device.h> |
19 | #include <linux/pinctrl/consumer.h> | |
20 | #include <linux/pinctrl/pinctrl.h> | |
21 | #include <linux/pinctrl/pinconf.h> | |
22 | #include <linux/pinctrl/pinmux.h> | |
23 | #include <linux/pinctrl/pinconf-generic.h> | |
24 | ||
25 | struct sh_pfc_pinctrl { | |
26 | struct pinctrl_dev *pctl; | |
27 | struct sh_pfc *pfc; | |
28 | ||
d93a891f PM |
29 | struct pinmux_gpio **functions; |
30 | unsigned int nr_functions; | |
31 | ||
ca5481c6 PM |
32 | struct pinctrl_pin_desc *pads; |
33 | unsigned int nr_pads; | |
d93a891f PM |
34 | |
35 | spinlock_t lock; | |
ca5481c6 PM |
36 | }; |
37 | ||
38 | static struct sh_pfc_pinctrl *sh_pfc_pmx; | |
39 | ||
40 | /* | |
41 | * No group support yet | |
42 | */ | |
43 | static int sh_pfc_get_noop_count(struct pinctrl_dev *pctldev) | |
44 | { | |
45 | return 0; | |
46 | } | |
47 | ||
48 | static const char *sh_pfc_get_noop_name(struct pinctrl_dev *pctldev, | |
49 | unsigned selector) | |
50 | { | |
51 | return NULL; | |
52 | } | |
53 | ||
54 | static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group, | |
55 | const unsigned **pins, unsigned *num_pins) | |
56 | { | |
57 | return -ENOTSUPP; | |
58 | } | |
59 | ||
60 | static struct pinctrl_ops sh_pfc_pinctrl_ops = { | |
61 | .get_groups_count = sh_pfc_get_noop_count, | |
62 | .get_group_name = sh_pfc_get_noop_name, | |
63 | .get_group_pins = sh_pfc_get_group_pins, | |
64 | }; | |
65 | ||
d93a891f PM |
66 | static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev) |
67 | { | |
68 | struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); | |
69 | ||
70 | return pmx->nr_functions; | |
71 | } | |
72 | ||
73 | static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev, | |
74 | unsigned selector) | |
75 | { | |
76 | struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); | |
77 | ||
78 | return pmx->functions[selector]->name; | |
79 | } | |
ca5481c6 | 80 | |
ca5481c6 PM |
81 | static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func, |
82 | const char * const **groups, | |
83 | unsigned * const num_groups) | |
84 | { | |
d93a891f PM |
85 | struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); |
86 | ||
87 | *groups = &pmx->functions[func]->name; | |
88 | *num_groups = 1; | |
89 | ||
ca5481c6 PM |
90 | return 0; |
91 | } | |
92 | ||
93 | static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func, | |
94 | unsigned group) | |
95 | { | |
96 | return 0; | |
97 | } | |
98 | ||
99 | static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func, | |
100 | unsigned group) | |
101 | { | |
102 | } | |
103 | ||
d93a891f PM |
104 | static inline int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset) |
105 | { | |
106 | if (sh_pfc_config_gpio(pfc, offset, | |
107 | PINMUX_TYPE_FUNCTION, | |
108 | GPIO_CFG_DRYRUN) != 0) | |
109 | return -EINVAL; | |
110 | ||
111 | if (sh_pfc_config_gpio(pfc, offset, | |
112 | PINMUX_TYPE_FUNCTION, | |
113 | GPIO_CFG_REQ) != 0) | |
114 | return -EINVAL; | |
115 | ||
116 | return 0; | |
117 | } | |
118 | ||
ca5481c6 PM |
119 | static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev, |
120 | struct pinctrl_gpio_range *range, | |
121 | unsigned offset) | |
122 | { | |
123 | struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); | |
124 | struct sh_pfc *pfc = pmx->pfc; | |
ca5481c6 | 125 | unsigned long flags; |
d93a891f | 126 | int ret, pinmux_type; |
ca5481c6 PM |
127 | |
128 | spin_lock_irqsave(&pfc->lock, flags); | |
129 | ||
d93a891f | 130 | pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE; |
ca5481c6 | 131 | |
d93a891f PM |
132 | switch (pinmux_type) { |
133 | case PINMUX_TYPE_FUNCTION: | |
134 | pr_notice_once("Use of GPIO API for function requests is " | |
135 | "deprecated, convert to pinctrl\n"); | |
136 | /* handle for now */ | |
137 | ret = sh_pfc_config_function(pfc, offset); | |
138 | if (unlikely(ret < 0)) | |
ca5481c6 | 139 | goto err; |
ca5481c6 | 140 | |
d93a891f PM |
141 | break; |
142 | case PINMUX_TYPE_GPIO: | |
143 | break; | |
144 | default: | |
145 | pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type); | |
146 | return -ENOTSUPP; | |
147 | } | |
ca5481c6 PM |
148 | |
149 | ret = 0; | |
150 | ||
151 | err: | |
152 | spin_unlock_irqrestore(&pfc->lock, flags); | |
153 | ||
154 | return ret; | |
155 | } | |
156 | ||
157 | static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev, | |
158 | struct pinctrl_gpio_range *range, | |
159 | unsigned offset) | |
160 | { | |
161 | struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); | |
162 | struct sh_pfc *pfc = pmx->pfc; | |
163 | unsigned long flags; | |
164 | int pinmux_type; | |
165 | ||
166 | spin_lock_irqsave(&pfc->lock, flags); | |
167 | ||
168 | pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE; | |
169 | ||
170 | sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE); | |
171 | ||
ca5481c6 PM |
172 | spin_unlock_irqrestore(&pfc->lock, flags); |
173 | } | |
174 | ||
175 | static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev, | |
176 | struct pinctrl_gpio_range *range, | |
177 | unsigned offset, bool input) | |
178 | { | |
179 | struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); | |
180 | struct sh_pfc *pfc = pmx->pfc; | |
181 | unsigned long flags; | |
182 | int pinmux_type, new_pinmux_type; | |
183 | int ret = -EINVAL; | |
184 | ||
185 | new_pinmux_type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT; | |
186 | ||
187 | spin_lock_irqsave(&pfc->lock, flags); | |
188 | ||
189 | pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE; | |
190 | ||
191 | switch (pinmux_type) { | |
192 | case PINMUX_TYPE_GPIO: | |
193 | break; | |
194 | case PINMUX_TYPE_OUTPUT: | |
195 | case PINMUX_TYPE_INPUT: | |
196 | case PINMUX_TYPE_INPUT_PULLUP: | |
197 | case PINMUX_TYPE_INPUT_PULLDOWN: | |
198 | sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE); | |
199 | break; | |
200 | default: | |
201 | goto err; | |
202 | } | |
203 | ||
204 | if (sh_pfc_config_gpio(pfc, offset, | |
205 | new_pinmux_type, | |
206 | GPIO_CFG_DRYRUN) != 0) | |
207 | goto err; | |
208 | ||
209 | if (sh_pfc_config_gpio(pfc, offset, | |
210 | new_pinmux_type, | |
211 | GPIO_CFG_REQ) != 0) | |
212 | BUG(); | |
213 | ||
214 | pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE; | |
215 | pfc->gpios[offset].flags |= new_pinmux_type; | |
216 | ||
217 | ret = 0; | |
218 | ||
219 | err: | |
220 | spin_unlock_irqrestore(&pfc->lock, flags); | |
221 | ||
222 | return ret; | |
223 | } | |
224 | ||
225 | static struct pinmux_ops sh_pfc_pinmux_ops = { | |
d93a891f PM |
226 | .get_functions_count = sh_pfc_get_functions_count, |
227 | .get_function_name = sh_pfc_get_function_name, | |
ca5481c6 PM |
228 | .get_function_groups = sh_pfc_get_function_groups, |
229 | .enable = sh_pfc_noop_enable, | |
230 | .disable = sh_pfc_noop_disable, | |
231 | .gpio_request_enable = sh_pfc_gpio_request_enable, | |
232 | .gpio_disable_free = sh_pfc_gpio_disable_free, | |
233 | .gpio_set_direction = sh_pfc_gpio_set_direction, | |
234 | }; | |
235 | ||
236 | static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, | |
237 | unsigned long *config) | |
238 | { | |
d93a891f PM |
239 | enum pin_config_param param = (enum pin_config_param)(*config); |
240 | ||
241 | switch (param) { | |
242 | default: | |
243 | break; | |
244 | } | |
245 | ||
ca5481c6 PM |
246 | return -ENOTSUPP; |
247 | } | |
248 | ||
249 | static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, | |
250 | unsigned long config) | |
251 | { | |
252 | return -EINVAL; | |
253 | } | |
254 | ||
255 | static struct pinconf_ops sh_pfc_pinconf_ops = { | |
256 | .is_generic = true, | |
257 | .pin_config_get = sh_pfc_pinconf_get, | |
258 | .pin_config_set = sh_pfc_pinconf_set, | |
259 | }; | |
260 | ||
261 | static struct pinctrl_gpio_range sh_pfc_gpio_range = { | |
262 | .name = KBUILD_MODNAME, | |
263 | .id = 0, | |
264 | }; | |
265 | ||
266 | static struct pinctrl_desc sh_pfc_pinctrl_desc = { | |
267 | .name = KBUILD_MODNAME, | |
268 | .owner = THIS_MODULE, | |
269 | .pctlops = &sh_pfc_pinctrl_ops, | |
270 | .pmxops = &sh_pfc_pinmux_ops, | |
271 | .confops = &sh_pfc_pinconf_ops, | |
272 | }; | |
273 | ||
274 | int sh_pfc_register_pinctrl(struct sh_pfc *pfc) | |
275 | { | |
d93a891f | 276 | sh_pfc_pmx = kzalloc(sizeof(struct sh_pfc_pinctrl), GFP_KERNEL); |
ca5481c6 PM |
277 | if (unlikely(!sh_pfc_pmx)) |
278 | return -ENOMEM; | |
279 | ||
d93a891f PM |
280 | spin_lock_init(&sh_pfc_pmx->lock); |
281 | ||
ca5481c6 PM |
282 | sh_pfc_pmx->pfc = pfc; |
283 | ||
284 | return 0; | |
285 | } | |
1acbbb4e | 286 | EXPORT_SYMBOL_GPL(sh_pfc_register_pinctrl); |
ca5481c6 | 287 | |
d93a891f PM |
288 | static inline void __devinit sh_pfc_map_one_gpio(struct sh_pfc *pfc, |
289 | struct sh_pfc_pinctrl *pmx, | |
290 | struct pinmux_gpio *gpio, | |
291 | unsigned offset) | |
292 | { | |
293 | struct pinmux_data_reg *dummy; | |
294 | unsigned long flags; | |
295 | int bit; | |
296 | ||
297 | gpio->flags &= ~PINMUX_FLAG_TYPE; | |
298 | ||
299 | if (sh_pfc_get_data_reg(pfc, offset, &dummy, &bit) == 0) | |
300 | gpio->flags |= PINMUX_TYPE_GPIO; | |
301 | else { | |
302 | gpio->flags |= PINMUX_TYPE_FUNCTION; | |
303 | ||
304 | spin_lock_irqsave(&pmx->lock, flags); | |
305 | pmx->nr_functions++; | |
306 | spin_unlock_irqrestore(&pmx->lock, flags); | |
307 | } | |
308 | } | |
309 | ||
ca5481c6 PM |
310 | /* pinmux ranges -> pinctrl pin descs */ |
311 | static int __devinit sh_pfc_map_gpios(struct sh_pfc *pfc, | |
312 | struct sh_pfc_pinctrl *pmx) | |
313 | { | |
d93a891f | 314 | unsigned long flags; |
ca5481c6 PM |
315 | int i; |
316 | ||
317 | pmx->nr_pads = pfc->last_gpio - pfc->first_gpio + 1; | |
318 | ||
319 | pmx->pads = kmalloc(sizeof(struct pinctrl_pin_desc) * pmx->nr_pads, | |
320 | GFP_KERNEL); | |
321 | if (unlikely(!pmx->pads)) { | |
322 | pmx->nr_pads = 0; | |
323 | return -ENOMEM; | |
324 | } | |
325 | ||
d93a891f PM |
326 | spin_lock_irqsave(&pfc->lock, flags); |
327 | ||
ca5481c6 PM |
328 | /* |
329 | * We don't necessarily have a 1:1 mapping between pin and linux | |
330 | * GPIO number, as the latter maps to the associated enum_id. | |
331 | * Care needs to be taken to translate back to pin space when | |
332 | * dealing with any pin configurations. | |
333 | */ | |
334 | for (i = 0; i < pmx->nr_pads; i++) { | |
335 | struct pinctrl_pin_desc *pin = pmx->pads + i; | |
336 | struct pinmux_gpio *gpio = pfc->gpios + i; | |
337 | ||
338 | pin->number = pfc->first_gpio + i; | |
339 | pin->name = gpio->name; | |
d93a891f | 340 | |
e3e79454 PM |
341 | /* XXX */ |
342 | if (unlikely(!gpio->enum_id)) | |
343 | continue; | |
344 | ||
d93a891f | 345 | sh_pfc_map_one_gpio(pfc, pmx, gpio, i); |
ca5481c6 PM |
346 | } |
347 | ||
d93a891f PM |
348 | spin_unlock_irqrestore(&pfc->lock, flags); |
349 | ||
ca5481c6 PM |
350 | sh_pfc_pinctrl_desc.pins = pmx->pads; |
351 | sh_pfc_pinctrl_desc.npins = pmx->nr_pads; | |
352 | ||
353 | return 0; | |
354 | } | |
355 | ||
d93a891f PM |
356 | static int __devinit sh_pfc_map_functions(struct sh_pfc *pfc, |
357 | struct sh_pfc_pinctrl *pmx) | |
358 | { | |
359 | unsigned long flags; | |
360 | int i, fn; | |
361 | ||
362 | pmx->functions = kzalloc(pmx->nr_functions * sizeof(void *), | |
363 | GFP_KERNEL); | |
364 | if (unlikely(!pmx->functions)) | |
365 | return -ENOMEM; | |
366 | ||
367 | spin_lock_irqsave(&pmx->lock, flags); | |
368 | ||
369 | for (i = fn = 0; i < pmx->nr_pads; i++) { | |
370 | struct pinmux_gpio *gpio = pfc->gpios + i; | |
371 | ||
372 | if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION) | |
373 | pmx->functions[fn++] = gpio; | |
374 | } | |
375 | ||
376 | spin_unlock_irqrestore(&pmx->lock, flags); | |
377 | ||
378 | return 0; | |
379 | } | |
380 | ||
ca5481c6 PM |
381 | static int __devinit sh_pfc_pinctrl_probe(struct platform_device *pdev) |
382 | { | |
383 | struct sh_pfc *pfc; | |
384 | int ret; | |
385 | ||
386 | if (unlikely(!sh_pfc_pmx)) | |
387 | return -ENODEV; | |
388 | ||
389 | pfc = sh_pfc_pmx->pfc; | |
390 | ||
391 | ret = sh_pfc_map_gpios(pfc, sh_pfc_pmx); | |
392 | if (unlikely(ret != 0)) | |
393 | return ret; | |
394 | ||
d93a891f PM |
395 | ret = sh_pfc_map_functions(pfc, sh_pfc_pmx); |
396 | if (unlikely(ret != 0)) | |
397 | goto free_pads; | |
398 | ||
ca5481c6 PM |
399 | sh_pfc_pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, &pdev->dev, |
400 | sh_pfc_pmx); | |
401 | if (IS_ERR(sh_pfc_pmx->pctl)) { | |
402 | ret = PTR_ERR(sh_pfc_pmx->pctl); | |
d93a891f | 403 | goto free_functions; |
ca5481c6 PM |
404 | } |
405 | ||
406 | sh_pfc_gpio_range.npins = pfc->last_gpio - pfc->first_gpio + 1; | |
407 | sh_pfc_gpio_range.base = pfc->first_gpio; | |
408 | sh_pfc_gpio_range.pin_base = pfc->first_gpio; | |
409 | ||
410 | pinctrl_add_gpio_range(sh_pfc_pmx->pctl, &sh_pfc_gpio_range); | |
411 | ||
412 | platform_set_drvdata(pdev, sh_pfc_pmx); | |
413 | ||
414 | return 0; | |
415 | ||
d93a891f PM |
416 | free_functions: |
417 | kfree(sh_pfc_pmx->functions); | |
418 | free_pads: | |
ca5481c6 PM |
419 | kfree(sh_pfc_pmx->pads); |
420 | kfree(sh_pfc_pmx); | |
d93a891f | 421 | |
ca5481c6 PM |
422 | return ret; |
423 | } | |
424 | ||
425 | static int __devexit sh_pfc_pinctrl_remove(struct platform_device *pdev) | |
426 | { | |
427 | struct sh_pfc_pinctrl *pmx = platform_get_drvdata(pdev); | |
428 | ||
429 | pinctrl_remove_gpio_range(pmx->pctl, &sh_pfc_gpio_range); | |
430 | pinctrl_unregister(pmx->pctl); | |
431 | ||
432 | platform_set_drvdata(pdev, NULL); | |
433 | ||
d93a891f | 434 | kfree(sh_pfc_pmx->functions); |
ca5481c6 PM |
435 | kfree(sh_pfc_pmx->pads); |
436 | kfree(sh_pfc_pmx); | |
437 | ||
438 | return 0; | |
439 | } | |
440 | ||
441 | static struct platform_driver sh_pfc_pinctrl_driver = { | |
442 | .probe = sh_pfc_pinctrl_probe, | |
443 | .remove = __devexit_p(sh_pfc_pinctrl_remove), | |
444 | .driver = { | |
445 | .name = KBUILD_MODNAME, | |
446 | .owner = THIS_MODULE, | |
447 | }, | |
448 | }; | |
449 | ||
450 | static struct platform_device sh_pfc_pinctrl_device = { | |
451 | .name = KBUILD_MODNAME, | |
452 | .id = -1, | |
453 | }; | |
454 | ||
455 | static int __init sh_pfc_pinctrl_init(void) | |
456 | { | |
457 | int rc; | |
458 | ||
459 | rc = platform_driver_register(&sh_pfc_pinctrl_driver); | |
460 | if (likely(!rc)) { | |
461 | rc = platform_device_register(&sh_pfc_pinctrl_device); | |
462 | if (unlikely(rc)) | |
463 | platform_driver_unregister(&sh_pfc_pinctrl_driver); | |
464 | } | |
465 | ||
466 | return rc; | |
467 | } | |
468 | ||
469 | static void __exit sh_pfc_pinctrl_exit(void) | |
470 | { | |
471 | platform_driver_unregister(&sh_pfc_pinctrl_driver); | |
472 | } | |
473 | ||
474 | subsys_initcall(sh_pfc_pinctrl_init); | |
475 | module_exit(sh_pfc_pinctrl_exit); |