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Merge branch 'master' of ../mine
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / qla2xxx / qla_os.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
de7c5d05 3 * Copyright (c) 2003-2010 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
8
9#include <linux/moduleparam.h>
10#include <linux/vmalloc.h>
1da177e4 11#include <linux/delay.h>
39a11240 12#include <linux/kthread.h>
e1e82b6f 13#include <linux/mutex.h>
3420d36c 14#include <linux/kobject.h>
5a0e3ad6 15#include <linux/slab.h>
1da177e4
LT		 16
17#include <scsi/scsi_tcq.h>
18#include <scsi/scsicam.h>
19#include <scsi/scsi_transport.h>
20#include <scsi/scsi_transport_fc.h>
21
22/*
23 * Driver version
24 */
25char qla2x00_version_str[40];
26
6a03b4cd
HZ		 27static int apidev_major;
28
1da177e4
LT		 29/*
30 * SRB allocation cache
31 */
e18b890b 32static struct kmem_cache *srb_cachep;
1da177e4 33
a9083016
GM		 34/*
35 * CT6 CTX allocation cache
36 */
37static struct kmem_cache *ctx_cachep;
38
1da177e4
LT		 39int ql2xlogintimeout = 20;
40module_param(ql2xlogintimeout, int, S_IRUGO|S_IRUSR);
41MODULE_PARM_DESC(ql2xlogintimeout,
42 "Login timeout value in seconds.");
43
a7b61842 44int qlport_down_retry;
1da177e4
LT		 45module_param(qlport_down_retry, int, S_IRUGO|S_IRUSR);
46MODULE_PARM_DESC(qlport_down_retry,
900d9f98 47 "Maximum number of command retries to a port that returns "
1da177e4
LT		 48 "a PORT-DOWN status.");
49
1da177e4
LT		 50int ql2xplogiabsentdevice;
51module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
52MODULE_PARM_DESC(ql2xplogiabsentdevice,
53 "Option to enable PLOGI to devices that are not present after "
900d9f98 54 "a Fabric scan. This is needed for several broken switches. "
1da177e4
LT		 55 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
56
1da177e4
LT		 57int ql2xloginretrycount = 0;
58module_param(ql2xloginretrycount, int, S_IRUGO|S_IRUSR);
59MODULE_PARM_DESC(ql2xloginretrycount,
60 "Specify an alternate value for the NVRAM login retry count.");
61
a7a167bf
AV		 62int ql2xallocfwdump = 1;
63module_param(ql2xallocfwdump, int, S_IRUGO|S_IRUSR);
64MODULE_PARM_DESC(ql2xallocfwdump,
65 "Option to enable allocation of memory for a firmware dump "
66 "during HBA initialization. Memory allocation requirements "
67 "vary by ISP type. Default is 1 - allocate memory.");
68
11010fec 69int ql2xextended_error_logging;
27d94035 70module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
11010fec 71MODULE_PARM_DESC(ql2xextended_error_logging,
0181944f
AV		 72 "Option to enable extended error logging, "
73 "Default is 0 - no logging. 1 - log errors.");
74
a9083016
GM		 75int ql2xshiftctondsd = 6;
76module_param(ql2xshiftctondsd, int, S_IRUGO|S_IRUSR);
77MODULE_PARM_DESC(ql2xshiftctondsd,
78 "Set to control shifting of command type processing "
79 "based on total number of SG elements.");
80
1da177e4
LT		 81static void qla2x00_free_device(scsi_qla_host_t *);
82
7e47e5ca 83int ql2xfdmienable=1;
cca5335c
AV		 84module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR);
85MODULE_PARM_DESC(ql2xfdmienable,
7794a5af
FW		 86 "Enables FDMI registrations. "
87 "0 - no FDMI. Default is 1 - perform FDMI.");
cca5335c 88
df7baa50
AV		 89#define MAX_Q_DEPTH 32
90static int ql2xmaxqdepth = MAX_Q_DEPTH;
91module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
92MODULE_PARM_DESC(ql2xmaxqdepth,
93 "Maximum queue depth to report for target devices.");
94
bad75002
AE		 95/* Do not change the value of this after module load */
96int ql2xenabledif = 1;
97module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
98MODULE_PARM_DESC(ql2xenabledif,
99 " Enable T10-CRC-DIF "
100 " Default is 0 - No DIF Support. 1 - Enable it");
101
102int ql2xenablehba_err_chk;
103module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
104MODULE_PARM_DESC(ql2xenablehba_err_chk,
105 " Enable T10-CRC-DIF Error isolation by HBA"
106 " Default is 0 - Error isolation disabled, 1 - Enable it");
107
e5896bd5
AV		 108int ql2xiidmaenable=1;
109module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
110MODULE_PARM_DESC(ql2xiidmaenable,
111 "Enables iIDMA settings "
112 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
113
73208dfd
AC		 114int ql2xmaxqueues = 1;
115module_param(ql2xmaxqueues, int, S_IRUGO|S_IRUSR);
116MODULE_PARM_DESC(ql2xmaxqueues,
117 "Enables MQ settings "
ae68230c
JP		 118 "Default is 1 for single queue. Set it to number "
119 "of queues in MQ mode.");
68ca949c
AC		 120
121int ql2xmultique_tag;
122module_param(ql2xmultique_tag, int, S_IRUGO|S_IRUSR);
123MODULE_PARM_DESC(ql2xmultique_tag,
124 "Enables CPU affinity settings for the driver "
125 "Default is 0 for no affinity of request and response IO. "
126 "Set it to 1 to turn on the cpu affinity.");
e337d907
AV		 127
128int ql2xfwloadbin;
129module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR);
130MODULE_PARM_DESC(ql2xfwloadbin,
131 "Option to specify location from which to load ISP firmware:\n"
132 " 2 -- load firmware via the request_firmware() (hotplug)\n"
133 " interface.\n"
134 " 1 -- load firmware from flash.\n"
135 " 0 -- use default semantics.\n");
136
ae97c91e
AV		 137int ql2xetsenable;
138module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR);
139MODULE_PARM_DESC(ql2xetsenable,
140 "Enables firmware ETS burst."
141 "Default is 0 - skip ETS enablement.");
142
6907869d 143int ql2xdbwr = 1;
a9083016
GM		 144module_param(ql2xdbwr, int, S_IRUGO|S_IRUSR);
145MODULE_PARM_DESC(ql2xdbwr,
146 "Option to specify scheme for request queue posting\n"
147 " 0 -- Regular doorbell.\n"
148 " 1 -- CAMRAM doorbell (faster).\n");
149
150int ql2xdontresethba;
151module_param(ql2xdontresethba, int, S_IRUGO|S_IRUSR);
152MODULE_PARM_DESC(ql2xdontresethba,
153 "Option to specify reset behaviour\n"
154 " 0 (Default) -- Reset on failure.\n"
155 " 1 -- Do not reset on failure.\n");
156
f4c496c1
GM		 157int ql2xtargetreset = 1;
158module_param(ql2xtargetreset, int, S_IRUGO|S_IRUSR);
159MODULE_PARM_DESC(ql2xtargetreset,
160 "Enable target reset."
161 "Default is 1 - use hw defaults.");
162
4da26e16
CD		 163int ql2xgffidenable;
164module_param(ql2xgffidenable, int, S_IRUGO|S_IRUSR);
165MODULE_PARM_DESC(ql2xgffidenable,
166 "Enables GFF_ID checks of port type. "
167 "Default is 0 - Do not use GFF_ID information.");
a9083016 168
3822263e
MI		 169int ql2xasynctmfenable;
170module_param(ql2xasynctmfenable, int, S_IRUGO|S_IRUSR);
171MODULE_PARM_DESC(ql2xasynctmfenable,
172 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
173 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
1da177e4 174/*
fa2a1ce5 175 * SCSI host template entry points
1da177e4
LT		 176 */
177static int qla2xxx_slave_configure(struct scsi_device * device);
f4f051eb 178static int qla2xxx_slave_alloc(struct scsi_device *);
1e99e33a
AV		 179static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
180static void qla2xxx_scan_start(struct Scsi_Host *);
f4f051eb 181static void qla2xxx_slave_destroy(struct scsi_device *);
a5326f86 182static int qla2xxx_queuecommand(struct scsi_cmnd *cmd,
fca29703 183 void (*fn)(struct scsi_cmnd *));
1da177e4
LT		 184static int qla2xxx_eh_abort(struct scsi_cmnd *);
185static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
523ec773 186static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
1da177e4
LT		 187static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
188static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
1da177e4 189
e881a172 190static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
ce7e4af7
AV		 191static int qla2x00_change_queue_type(struct scsi_device *, int);
192
a5326f86 193struct scsi_host_template qla2xxx_driver_template = {
1da177e4 194 .module = THIS_MODULE,
cb63067a 195 .name = QLA2XXX_DRIVER_NAME,
a5326f86 196 .queuecommand = qla2xxx_queuecommand,
fca29703
AV		 197
198 .eh_abort_handler = qla2xxx_eh_abort,
199 .eh_device_reset_handler = qla2xxx_eh_device_reset,
523ec773 200 .eh_target_reset_handler = qla2xxx_eh_target_reset,
fca29703
AV		 201 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
202 .eh_host_reset_handler = qla2xxx_eh_host_reset,
203
204 .slave_configure = qla2xxx_slave_configure,
205
206 .slave_alloc = qla2xxx_slave_alloc,
207 .slave_destroy = qla2xxx_slave_destroy,
ed677086
AV		 208 .scan_finished = qla2xxx_scan_finished,
209 .scan_start = qla2xxx_scan_start,
ce7e4af7
AV		 210 .change_queue_depth = qla2x00_change_queue_depth,
211 .change_queue_type = qla2x00_change_queue_type,
fca29703
AV		 212 .this_id = -1,
213 .cmd_per_lun = 3,
214 .use_clustering = ENABLE_CLUSTERING,
215 .sg_tablesize = SG_ALL,
216
217 .max_sectors = 0xFFFF,
afb046e2 218 .shost_attrs = qla2x00_host_attrs,
fca29703
AV		 219};
220
1da177e4 221static struct scsi_transport_template *qla2xxx_transport_template = NULL;
2c3dfe3f 222struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
1da177e4 223
1da177e4
LT		 224/* TODO Convert to inlines
225 *
226 * Timer routines
227 */
1da177e4 228
2c3dfe3f 229__inline__ void
e315cd28 230qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
1da177e4 231{
e315cd28
AC		 232 init_timer(&vha->timer);
233 vha->timer.expires = jiffies + interval * HZ;
234 vha->timer.data = (unsigned long)vha;
235 vha->timer.function = (void (*)(unsigned long))func;
236 add_timer(&vha->timer);
237 vha->timer_active = 1;
1da177e4
LT		 238}
239
240static inline void
e315cd28 241qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
1da177e4 242{
a9083016
GM		 243 /* Currently used for 82XX only. */
244 if (vha->device_flags & DFLG_DEV_FAILED)
245 return;
246
e315cd28 247 mod_timer(&vha->timer, jiffies + interval * HZ);
1da177e4
LT		 248}
249
a824ebb3 250static __inline__ void
e315cd28 251qla2x00_stop_timer(scsi_qla_host_t *vha)
1da177e4 252{
e315cd28
AC		 253 del_timer_sync(&vha->timer);
254 vha->timer_active = 0;
1da177e4
LT		 255}
256
1da177e4
LT		 257static int qla2x00_do_dpc(void *data);
258
259static void qla2x00_rst_aen(scsi_qla_host_t *);
260
73208dfd
AC		 261static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
262 struct req_que **, struct rsp_que **);
e30d1756 263static void qla2x00_free_fw_dump(struct qla_hw_data *);
e315cd28
AC		 264static void qla2x00_mem_free(struct qla_hw_data *);
265static void qla2x00_sp_free_dma(srb_t *);
1da177e4 266
1da177e4 267/* -------------------------------------------------------------------------- */
73208dfd
AC		 268static int qla2x00_alloc_queues(struct qla_hw_data *ha)
269{
2afa19a9 270 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
73208dfd
AC		 271 GFP_KERNEL);
272 if (!ha->req_q_map) {
273 qla_printk(KERN_WARNING, ha,
274 "Unable to allocate memory for request queue ptrs\n");
275 goto fail_req_map;
276 }
277
2afa19a9 278 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
73208dfd
AC		 279 GFP_KERNEL);
280 if (!ha->rsp_q_map) {
281 qla_printk(KERN_WARNING, ha,
282 "Unable to allocate memory for response queue ptrs\n");
283 goto fail_rsp_map;
284 }
285 set_bit(0, ha->rsp_qid_map);
286 set_bit(0, ha->req_qid_map);
287 return 1;
288
289fail_rsp_map:
290 kfree(ha->req_q_map);
291 ha->req_q_map = NULL;
292fail_req_map:
293 return -ENOMEM;
294}
295
2afa19a9 296static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
73208dfd 297{
73208dfd
AC		 298 if (req && req->ring)
299 dma_free_coherent(&ha->pdev->dev,
300 (req->length + 1) * sizeof(request_t),
301 req->ring, req->dma);
302
303 kfree(req);
304 req = NULL;
305}
306
2afa19a9
AC		 307static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
308{
309 if (rsp && rsp->ring)
310 dma_free_coherent(&ha->pdev->dev,
311 (rsp->length + 1) * sizeof(response_t),
312 rsp->ring, rsp->dma);
313
314 kfree(rsp);
315 rsp = NULL;
316}
317
73208dfd
AC		 318static void qla2x00_free_queues(struct qla_hw_data *ha)
319{
320 struct req_que *req;
321 struct rsp_que *rsp;
322 int cnt;
323
2afa19a9 324 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
73208dfd 325 req = ha->req_q_map[cnt];
2afa19a9 326 qla2x00_free_req_que(ha, req);
73208dfd 327 }
73208dfd
AC		 328 kfree(ha->req_q_map);
329 ha->req_q_map = NULL;
2afa19a9
AC		 330
331 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
332 rsp = ha->rsp_q_map[cnt];
333 qla2x00_free_rsp_que(ha, rsp);
334 }
335 kfree(ha->rsp_q_map);
336 ha->rsp_q_map = NULL;
73208dfd
AC		 337}
338
68ca949c
AC		 339static int qla25xx_setup_mode(struct scsi_qla_host *vha)
340{
341 uint16_t options = 0;
342 int ques, req, ret;
343 struct qla_hw_data *ha = vha->hw;
344
7163ea81
AC		 345 if (!(ha->fw_attributes & BIT_6)) {
346 qla_printk(KERN_INFO, ha,
347 "Firmware is not multi-queue capable\n");
348 goto fail;
349 }
68ca949c 350 if (ql2xmultique_tag) {
68ca949c
AC		 351 /* create a request queue for IO */
352 options |= BIT_7;
353 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
354 QLA_DEFAULT_QUE_QOS);
355 if (!req) {
356 qla_printk(KERN_WARNING, ha,
357 "Can't create request queue\n");
358 goto fail;
359 }
7163ea81 360 ha->wq = create_workqueue("qla2xxx_wq");
68ca949c
AC		 361 vha->req = ha->req_q_map[req];
362 options |= BIT_1;
363 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
364 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
365 if (!ret) {
366 qla_printk(KERN_WARNING, ha,
367 "Response Queue create failed\n");
368 goto fail2;
369 }
370 }
7163ea81
AC		 371 ha->flags.cpu_affinity_enabled = 1;
372
68ca949c
AC		 373 DEBUG2(qla_printk(KERN_INFO, ha,
374 "CPU affinity mode enabled, no. of response"
375 " queues:%d, no. of request queues:%d\n",
376 ha->max_rsp_queues, ha->max_req_queues));
377 }
378 return 0;
379fail2:
380 qla25xx_delete_queues(vha);
7163ea81
AC		 381 destroy_workqueue(ha->wq);
382 ha->wq = NULL;
68ca949c
AC		 383fail:
384 ha->mqenable = 0;
7163ea81
AC		 385 kfree(ha->req_q_map);
386 kfree(ha->rsp_q_map);
387 ha->max_req_queues = ha->max_rsp_queues = 1;
68ca949c
AC		 388 return 1;
389}
390
1da177e4 391static char *
e315cd28 392qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
1da177e4 393{
e315cd28 394 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 395 static char *pci_bus_modes[] = {
396 "33", "66", "100", "133",
397 };
398 uint16_t pci_bus;
399
400 strcpy(str, "PCI");
401 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
402 if (pci_bus) {
403 strcat(str, "-X (");
404 strcat(str, pci_bus_modes[pci_bus]);
405 } else {
406 pci_bus = (ha->pci_attr & BIT_8) >> 8;
407 strcat(str, " (");
408 strcat(str, pci_bus_modes[pci_bus]);
409 }
410 strcat(str, " MHz)");
411
412 return (str);
413}
414
fca29703 415static char *
e315cd28 416qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
fca29703
AV		 417{
418 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
e315cd28 419 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 420 uint32_t pci_bus;
421 int pcie_reg;
422
423 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
424 if (pcie_reg) {
425 char lwstr[6];
426 uint16_t pcie_lstat, lspeed, lwidth;
427
428 pcie_reg += 0x12;
429 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
430 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
431 lwidth = (pcie_lstat &
432 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
433
434 strcpy(str, "PCIe (");
435 if (lspeed == 1)
c87a0d8c 436 strcat(str, "2.5GT/s ");
c3a2f0df 437 else if (lspeed == 2)
c87a0d8c 438 strcat(str, "5.0GT/s ");
fca29703
AV		 439 else
440 strcat(str, "<unknown> ");
441 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
442 strcat(str, lwstr);
443
444 return str;
445 }
446
447 strcpy(str, "PCI");
448 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
449 if (pci_bus == 0 || pci_bus == 8) {
450 strcat(str, " (");
451 strcat(str, pci_bus_modes[pci_bus >> 3]);
452 } else {
453 strcat(str, "-X ");
454 if (pci_bus & BIT_2)
455 strcat(str, "Mode 2");
456 else
457 strcat(str, "Mode 1");
458 strcat(str, " (");
459 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
460 }
461 strcat(str, " MHz)");
462
463 return str;
464}
465
e5f82ab8 466static char *
e315cd28 467qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
1da177e4
LT		 468{
469 char un_str[10];
e315cd28 470 struct qla_hw_data *ha = vha->hw;
fa2a1ce5 471
1da177e4
LT		 472 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
473 ha->fw_minor_version,
474 ha->fw_subminor_version);
475
476 if (ha->fw_attributes & BIT_9) {
477 strcat(str, "FLX");
478 return (str);
479 }
480
481 switch (ha->fw_attributes & 0xFF) {
482 case 0x7:
483 strcat(str, "EF");
484 break;
485 case 0x17:
486 strcat(str, "TP");
487 break;
488 case 0x37:
489 strcat(str, "IP");
490 break;
491 case 0x77:
492 strcat(str, "VI");
493 break;
494 default:
495 sprintf(un_str, "(%x)", ha->fw_attributes);
496 strcat(str, un_str);
497 break;
498 }
499 if (ha->fw_attributes & 0x100)
500 strcat(str, "X");
501
502 return (str);
503}
504
e5f82ab8 505static char *
e315cd28 506qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
fca29703 507{
e315cd28 508 struct qla_hw_data *ha = vha->hw;
f0883ac6 509
3a03eb79
AV		 510 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
511 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
fca29703 512 return str;
fca29703
AV		 513}
514
515static inline srb_t *
e315cd28 516qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
fca29703
AV		 517 struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
518{
519 srb_t *sp;
e315cd28 520 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 521
522 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
523 if (!sp)
524 return sp;
525
083a469d 526 atomic_set(&sp->ref_count, 1);
fca29703
AV		 527 sp->fcport = fcport;
528 sp->cmd = cmd;
529 sp->flags = 0;
530 CMD_SP(cmd) = (void *)sp;
531 cmd->scsi_done = done;
cf53b069 532 sp->ctx = NULL;
fca29703
AV		 533
534 return sp;
535}
536
1da177e4 537static int
a5326f86 538qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
fca29703 539{
e315cd28 540 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
fca29703 541 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
19a7b4ae 542 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
e315cd28
AC		 543 struct qla_hw_data *ha = vha->hw;
544 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
fca29703
AV		 545 srb_t *sp;
546 int rval;
547
38170fa8 548 spin_unlock_irq(vha->host->host_lock);
85880801
AV		 549 if (ha->flags.eeh_busy) {
550 if (ha->flags.pci_channel_io_perm_failure)
b9b12f73 551 cmd->result = DID_NO_CONNECT << 16;
85880801
AV		 552 else
553 cmd->result = DID_REQUEUE << 16;
14e660e6
SJ		 554 goto qc24_fail_command;
555 }
556
19a7b4ae
JSEC		 557 rval = fc_remote_port_chkready(rport);
558 if (rval) {
559 cmd->result = rval;
fca29703
AV		 560 goto qc24_fail_command;
561 }
562
bad75002
AE		 563 if (!vha->flags.difdix_supported &&
564 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
565 DEBUG2(qla_printk(KERN_ERR, ha,
566 "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
567 cmd->cmnd[0]));
568 cmd->result = DID_NO_CONNECT << 16;
569 goto qc24_fail_command;
570 }
fca29703
AV		 571 if (atomic_read(&fcport->state) != FCS_ONLINE) {
572 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
38170fa8
GM		 573 atomic_read(&fcport->state) == FCS_DEVICE_LOST ||
574 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
fca29703
AV		 575 cmd->result = DID_NO_CONNECT << 16;
576 goto qc24_fail_command;
577 }
7b594131 578 goto qc24_target_busy;
fca29703
AV		 579 }
580
e315cd28 581 sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
fca29703
AV		 582 if (!sp)
583 goto qc24_host_busy_lock;
584
e315cd28 585 rval = ha->isp_ops->start_scsi(sp);
fca29703
AV		 586 if (rval != QLA_SUCCESS)
587 goto qc24_host_busy_free_sp;
588
e315cd28 589 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 590
591 return 0;
592
593qc24_host_busy_free_sp:
e315cd28
AC		 594 qla2x00_sp_free_dma(sp);
595 mempool_free(sp, ha->srb_mempool);
fca29703
AV		 596
597qc24_host_busy_lock:
e315cd28 598 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 599 return SCSI_MLQUEUE_HOST_BUSY;
600
7b594131 601qc24_target_busy:
38170fa8 602 spin_lock_irq(vha->host->host_lock);
7b594131
MC		 603 return SCSI_MLQUEUE_TARGET_BUSY;
604
fca29703 605qc24_fail_command:
38170fa8 606 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 607 done(cmd);
608
609 return 0;
610}
611
612
1da177e4
LT		 613/*
614 * qla2x00_eh_wait_on_command
615 * Waits for the command to be returned by the Firmware for some
616 * max time.
617 *
618 * Input:
1da177e4 619 * cmd = Scsi Command to wait on.
1da177e4
LT		 620 *
621 * Return:
622 * Not Found : 0
623 * Found : 1
624 */
625static int
e315cd28 626qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1da177e4 627{
fe74c71f
AV		 628#define ABORT_POLLING_PERIOD 1000
629#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
f4f051eb 630 unsigned long wait_iter = ABORT_WAIT_ITER;
85880801
AV		 631 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
632 struct qla_hw_data *ha = vha->hw;
f4f051eb 633 int ret = QLA_SUCCESS;
1da177e4 634
85880801
AV		 635 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
636 DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
637 return ret;
638 }
639
d970432c 640 while (CMD_SP(cmd) && wait_iter--) {
fe74c71f 641 msleep(ABORT_POLLING_PERIOD);
f4f051eb
AV		 642 }
643 if (CMD_SP(cmd))
644 ret = QLA_FUNCTION_FAILED;
1da177e4 645
f4f051eb 646 return ret;
1da177e4
LT		 647}
648
649/*
650 * qla2x00_wait_for_hba_online
fa2a1ce5 651 * Wait till the HBA is online after going through
1da177e4
LT		 652 * <= MAX_RETRIES_OF_ISP_ABORT or
653 * finally HBA is disabled ie marked offline
654 *
655 * Input:
656 * ha - pointer to host adapter structure
fa2a1ce5
AV		 657 *
658 * Note:
1da177e4
LT		 659 * Does context switching-Release SPIN_LOCK
660 * (if any) before calling this routine.
661 *
662 * Return:
663 * Success (Adapter is online) : 0
664 * Failed (Adapter is offline/disabled) : 1
665 */
854165f4 666int
e315cd28 667qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1da177e4 668{
fca29703
AV		 669 int return_status;
670 unsigned long wait_online;
e315cd28
AC		 671 struct qla_hw_data *ha = vha->hw;
672 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 673
fa2a1ce5 674 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
e315cd28
AC		 675 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
676 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
677 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
678 ha->dpc_active) && time_before(jiffies, wait_online)) {
1da177e4
LT		 679
680 msleep(1000);
681 }
e315cd28 682 if (base_vha->flags.online)
fa2a1ce5 683 return_status = QLA_SUCCESS;
1da177e4
LT		 684 else
685 return_status = QLA_FUNCTION_FAILED;
686
1da177e4
LT		 687 return (return_status);
688}
689
86fbee86
LC		 690/*
691 * qla2x00_wait_for_reset_ready
692 * Wait till the HBA is online after going through
693 * <= MAX_RETRIES_OF_ISP_ABORT or
694 * finally HBA is disabled ie marked offline or flash
695 * operations are in progress.
696 *
697 * Input:
698 * ha - pointer to host adapter structure
699 *
700 * Note:
701 * Does context switching-Release SPIN_LOCK
702 * (if any) before calling this routine.
703 *
704 * Return:
705 * Success (Adapter is online/no flash ops) : 0
706 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
707 */
3dbe756a 708static int
86fbee86
LC		 709qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
710{
711 int return_status;
712 unsigned long wait_online;
713 struct qla_hw_data *ha = vha->hw;
714 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
715
716 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
717 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
718 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
719 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
720 ha->optrom_state != QLA_SWAITING ||
721 ha->dpc_active) && time_before(jiffies, wait_online))
722 msleep(1000);
723
724 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
725 return_status = QLA_SUCCESS;
726 else
727 return_status = QLA_FUNCTION_FAILED;
728
729 DEBUG2(printk("%s return_status=%d\n", __func__, return_status));
730
731 return return_status;
732}
733
2533cf67
LC		 734int
735qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
736{
737 int return_status;
738 unsigned long wait_reset;
739 struct qla_hw_data *ha = vha->hw;
740 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
741
742 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
743 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
744 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
745 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
746 ha->dpc_active) && time_before(jiffies, wait_reset)) {
747
748 msleep(1000);
749
750 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
751 ha->flags.chip_reset_done)
752 break;
753 }
754 if (ha->flags.chip_reset_done)
755 return_status = QLA_SUCCESS;
756 else
757 return_status = QLA_FUNCTION_FAILED;
758
759 return return_status;
760}
761
1da177e4
LT		 762/*
763 * qla2x00_wait_for_loop_ready
764 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
fa2a1ce5 765 * to be in LOOP_READY state.
1da177e4
LT		 766 * Input:
767 * ha - pointer to host adapter structure
fa2a1ce5
AV		 768 *
769 * Note:
1da177e4
LT		 770 * Does context switching-Release SPIN_LOCK
771 * (if any) before calling this routine.
fa2a1ce5 772 *
1da177e4
LT		 773 *
774 * Return:
775 * Success (LOOP_READY) : 0
776 * Failed (LOOP_NOT_READY) : 1
777 */
fa2a1ce5 778static inline int
e315cd28 779qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
1da177e4
LT		 780{
781 int return_status = QLA_SUCCESS;
782 unsigned long loop_timeout ;
e315cd28
AC		 783 struct qla_hw_data *ha = vha->hw;
784 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 785
786 /* wait for 5 min at the max for loop to be ready */
fa2a1ce5 787 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1da177e4 788
e315cd28
AC		 789 while ((!atomic_read(&base_vha->loop_down_timer) &&
790 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
791 atomic_read(&base_vha->loop_state) != LOOP_READY) {
792 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
57680080
RA		 793 return_status = QLA_FUNCTION_FAILED;
794 break;
795 }
1da177e4
LT		 796 msleep(1000);
797 if (time_after_eq(jiffies, loop_timeout)) {
798 return_status = QLA_FUNCTION_FAILED;
799 break;
800 }
801 }
fa2a1ce5 802 return (return_status);
1da177e4
LT		 803}
804
083a469d
GM		 805static void
806sp_get(struct srb *sp)
807{
808 atomic_inc(&sp->ref_count);
809}
810
1da177e4
LT		 811/**************************************************************************
812* qla2xxx_eh_abort
813*
814* Description:
815* The abort function will abort the specified command.
816*
817* Input:
818* cmd = Linux SCSI command packet to be aborted.
819*
820* Returns:
821* Either SUCCESS or FAILED.
822*
823* Note:
2ea00202 824* Only return FAILED if command not returned by firmware.
1da177e4 825**************************************************************************/
e5f82ab8 826static int
1da177e4
LT		 827qla2xxx_eh_abort(struct scsi_cmnd *cmd)
828{
e315cd28 829 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
f4f051eb 830 srb_t *sp;
170babc3 831 int ret;
f4f051eb 832 unsigned int id, lun;
18e144d3 833 unsigned long flags;
2ea00202 834 int wait = 0;
e315cd28 835 struct qla_hw_data *ha = vha->hw;
1da177e4 836
65d430fa 837 fc_block_scsi_eh(cmd);
07db5183 838
f4f051eb 839 if (!CMD_SP(cmd))
2ea00202 840 return SUCCESS;
1da177e4 841
f4f051eb
AV		 842 id = cmd->device->id;
843 lun = cmd->device->lun;
1da177e4 844
e315cd28 845 spin_lock_irqsave(&ha->hardware_lock, flags);
170babc3
MC		 846 sp = (srb_t *) CMD_SP(cmd);
847 if (!sp) {
848 spin_unlock_irqrestore(&ha->hardware_lock, flags);
849 return SUCCESS;
850 }
1da177e4 851
170babc3
MC		 852 DEBUG2(printk("%s(%ld): aborting sp %p from RISC.",
853 __func__, vha->host_no, sp));
17d98630 854
170babc3
MC		 855 /* Get a reference to the sp and drop the lock.*/
856 sp_get(sp);
083a469d 857
e315cd28 858 spin_unlock_irqrestore(&ha->hardware_lock, flags);
170babc3
MC		 859 if (ha->isp_ops->abort_command(sp)) {
860 DEBUG2(printk("%s(%ld): abort_command "
861 "mbx failed.\n", __func__, vha->host_no));
862 ret = FAILED;
863 } else {
864 DEBUG3(printk("%s(%ld): abort_command "
865 "mbx success.\n", __func__, vha->host_no));
866 wait = 1;
867 }
868 qla2x00_sp_compl(ha, sp);
1da177e4 869
f4f051eb 870 /* Wait for the command to be returned. */
2ea00202 871 if (wait) {
e315cd28 872 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
fa2a1ce5 873 qla_printk(KERN_ERR, ha,
09d1dc2a
MI		 874 "scsi(%ld:%d:%d): Abort handler timed out -- %x.\n",
875 vha->host_no, id, lun, ret);
2ea00202 876 ret = FAILED;
f4f051eb 877 }
1da177e4 878 }
1da177e4 879
fa2a1ce5 880 qla_printk(KERN_INFO, ha,
09d1dc2a
MI		 881 "scsi(%ld:%d:%d): Abort command issued -- %d %x.\n",
882 vha->host_no, id, lun, wait, ret);
1da177e4 883
f4f051eb
AV		 884 return ret;
885}
1da177e4 886
4d78c973 887int
e315cd28 888qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
4d78c973 889 unsigned int l, enum nexus_wait_type type)
f4f051eb 890{
17d98630 891 int cnt, match, status;
18e144d3 892 unsigned long flags;
e315cd28 893 struct qla_hw_data *ha = vha->hw;
73208dfd 894 struct req_que *req;
4d78c973 895 srb_t *sp;
1da177e4 896
523ec773 897 status = QLA_SUCCESS;
17d98630 898
e315cd28 899 spin_lock_irqsave(&ha->hardware_lock, flags);
67c2e93a 900 req = vha->req;
17d98630
AC		 901 for (cnt = 1; status == QLA_SUCCESS &&
902 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
903 sp = req->outstanding_cmds[cnt];
904 if (!sp)
523ec773 905 continue;
bad75002 906 if ((sp->ctx) && !IS_PROT_IO(sp))
cf53b069 907 continue;
17d98630
AC		 908 if (vha->vp_idx != sp->fcport->vha->vp_idx)
909 continue;
910 match = 0;
911 switch (type) {
912 case WAIT_HOST:
913 match = 1;
914 break;
915 case WAIT_TARGET:
916 match = sp->cmd->device->id == t;
917 break;
918 case WAIT_LUN:
919 match = (sp->cmd->device->id == t &&
920 sp->cmd->device->lun == l);
921 break;
73208dfd 922 }
17d98630
AC		 923 if (!match)
924 continue;
925
926 spin_unlock_irqrestore(&ha->hardware_lock, flags);
927 status = qla2x00_eh_wait_on_command(sp->cmd);
928 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 929 }
e315cd28 930 spin_unlock_irqrestore(&ha->hardware_lock, flags);
523ec773
AV		 931
932 return status;
1da177e4
LT		 933}
934
523ec773
AV		 935static char *reset_errors[] = {
936 "HBA not online",
937 "HBA not ready",
938 "Task management failed",
939 "Waiting for command completions",
940};
1da177e4 941
e5f82ab8 942static int
523ec773 943__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
2afa19a9 944 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1da177e4 945{
e315cd28 946 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 947 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
523ec773 948 int err;
1da177e4 949
65d430fa 950 fc_block_scsi_eh(cmd);
07db5183 951
b0328bee 952 if (!fcport)
523ec773 953 return FAILED;
1da177e4 954
e315cd28
AC		 955 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
956 vha->host_no, cmd->device->id, cmd->device->lun, name);
1da177e4 957
523ec773 958 err = 0;
e315cd28 959 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
523ec773
AV		 960 goto eh_reset_failed;
961 err = 1;
e315cd28 962 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
523ec773
AV		 963 goto eh_reset_failed;
964 err = 2;
2afa19a9
AC		 965 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
966 != QLA_SUCCESS)
523ec773
AV		 967 goto eh_reset_failed;
968 err = 3;
e315cd28 969 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
4d78c973 970 cmd->device->lun, type) != QLA_SUCCESS)
523ec773
AV		 971 goto eh_reset_failed;
972
e315cd28
AC		 973 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
974 vha->host_no, cmd->device->id, cmd->device->lun, name);
523ec773
AV		 975
976 return SUCCESS;
977
4d78c973 978eh_reset_failed:
e315cd28
AC		 979 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
980 , vha->host_no, cmd->device->id, cmd->device->lun, name,
523ec773
AV		 981 reset_errors[err]);
982 return FAILED;
983}
1da177e4 984
523ec773
AV		 985static int
986qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
987{
e315cd28
AC		 988 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
989 struct qla_hw_data *ha = vha->hw;
1da177e4 990
523ec773
AV		 991 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
992 ha->isp_ops->lun_reset);
1da177e4
LT		 993}
994
1da177e4 995static int
523ec773 996qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1da177e4 997{
e315cd28
AC		 998 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
999 struct qla_hw_data *ha = vha->hw;
1da177e4 1000
523ec773
AV		 1001 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1002 ha->isp_ops->target_reset);
1da177e4
LT		 1003}
1004
1da177e4
LT		 1005/**************************************************************************
1006* qla2xxx_eh_bus_reset
1007*
1008* Description:
1009* The bus reset function will reset the bus and abort any executing
1010* commands.
1011*
1012* Input:
1013* cmd = Linux SCSI command packet of the command that cause the
1014* bus reset.
1015*
1016* Returns:
1017* SUCCESS/FAILURE (defined as macro in scsi.h).
1018*
1019**************************************************************************/
e5f82ab8 1020static int
1da177e4
LT		 1021qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1022{
e315cd28 1023 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1024 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
2c3dfe3f 1025 int ret = FAILED;
f4f051eb 1026 unsigned int id, lun;
f4f051eb 1027
65d430fa 1028 fc_block_scsi_eh(cmd);
07db5183 1029
f4f051eb
AV		 1030 id = cmd->device->id;
1031 lun = cmd->device->lun;
1da177e4 1032
b0328bee 1033 if (!fcport)
f4f051eb 1034 return ret;
1da177e4 1035
e315cd28 1036 qla_printk(KERN_INFO, vha->hw,
749af3d5 1037 "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1038
e315cd28 1039 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1da177e4 1040 DEBUG2(printk("%s failed:board disabled\n",__func__));
f4f051eb 1041 goto eh_bus_reset_done;
1da177e4
LT		 1042 }
1043
e315cd28
AC		 1044 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
1045 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
f4f051eb 1046 ret = SUCCESS;
1da177e4 1047 }
f4f051eb
AV		 1048 if (ret == FAILED)
1049 goto eh_bus_reset_done;
1da177e4 1050
9a41a62b 1051 /* Flush outstanding commands. */
4d78c973 1052 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
523ec773 1053 QLA_SUCCESS)
9a41a62b 1054 ret = FAILED;
1da177e4 1055
f4f051eb 1056eh_bus_reset_done:
e315cd28 1057 qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
f4f051eb 1058 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1059
f4f051eb 1060 return ret;
1da177e4
LT		 1061}
1062
1063/**************************************************************************
1064* qla2xxx_eh_host_reset
1065*
1066* Description:
1067* The reset function will reset the Adapter.
1068*
1069* Input:
1070* cmd = Linux SCSI command packet of the command that cause the
1071* adapter reset.
1072*
1073* Returns:
1074* Either SUCCESS or FAILED.
1075*
1076* Note:
1077**************************************************************************/
e5f82ab8 1078static int
1da177e4
LT		 1079qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1080{
e315cd28 1081 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1082 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
e315cd28 1083 struct qla_hw_data *ha = vha->hw;
2c3dfe3f 1084 int ret = FAILED;
f4f051eb 1085 unsigned int id, lun;
e315cd28 1086 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 1087
65d430fa 1088 fc_block_scsi_eh(cmd);
07db5183 1089
f4f051eb
AV		 1090 id = cmd->device->id;
1091 lun = cmd->device->lun;
f4f051eb 1092
b0328bee 1093 if (!fcport)
f4f051eb 1094 return ret;
1da177e4 1095
1da177e4 1096 qla_printk(KERN_INFO, ha,
e315cd28 1097 "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1098
86fbee86 1099 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
f4f051eb 1100 goto eh_host_reset_lock;
1da177e4
LT		 1101
1102 /*
1103 * Fixme-may be dpc thread is active and processing
fa2a1ce5 1104 * loop_resync,so wait a while for it to
1da177e4
LT		 1105 * be completed and then issue big hammer.Otherwise
1106 * it may cause I/O failure as big hammer marks the
1107 * devices as lost kicking of the port_down_timer
1108 * while dpc is stuck for the mailbox to complete.
1109 */
e315cd28
AC		 1110 qla2x00_wait_for_loop_ready(vha);
1111 if (vha != base_vha) {
1112 if (qla2x00_vp_abort_isp(vha))
f4f051eb 1113 goto eh_host_reset_lock;
e315cd28 1114 } else {
a9083016
GM		 1115 if (IS_QLA82XX(vha->hw)) {
1116 if (!qla82xx_fcoe_ctx_reset(vha)) {
1117 /* Ctx reset success */
1118 ret = SUCCESS;
1119 goto eh_host_reset_lock;
1120 }
1121 /* fall thru if ctx reset failed */
1122 }
68ca949c
AC		 1123 if (ha->wq)
1124 flush_workqueue(ha->wq);
1125
e315cd28 1126 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 1127 if (ha->isp_ops->abort_isp(base_vha)) {
e315cd28
AC		 1128 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1129 /* failed. schedule dpc to try */
1130 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1131
1132 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
1133 goto eh_host_reset_lock;
1134 }
1135 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
fa2a1ce5 1136 }
1da177e4 1137
e315cd28 1138 /* Waiting for command to be returned to OS.*/
4d78c973 1139 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
e315cd28 1140 QLA_SUCCESS)
f4f051eb 1141 ret = SUCCESS;
1da177e4 1142
f4f051eb 1143eh_host_reset_lock:
f4f051eb
AV		 1144 qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
1145 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1146
f4f051eb
AV		 1147 return ret;
1148}
1da177e4
LT		 1149
1150/*
1151* qla2x00_loop_reset
1152* Issue loop reset.
1153*
1154* Input:
1155* ha = adapter block pointer.
1156*
1157* Returns:
1158* 0 = success
1159*/
a4722cf2 1160int
e315cd28 1161qla2x00_loop_reset(scsi_qla_host_t *vha)
1da177e4 1162{
0c8c39af 1163 int ret;
bdf79621 1164 struct fc_port *fcport;
e315cd28 1165 struct qla_hw_data *ha = vha->hw;
1da177e4 1166
f4c496c1 1167 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
55e5ed27
AV		 1168 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1169 if (fcport->port_type != FCT_TARGET)
1170 continue;
1171
1172 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1173 if (ret != QLA_SUCCESS) {
1174 DEBUG2_3(printk("%s(%ld): bus_reset failed: "
1175 "target_reset=%d d_id=%x.\n", __func__,
1176 vha->host_no, ret, fcport->d_id.b24));
1177 }
1178 }
1179 }
1180
a9083016 1181 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
e315cd28 1182 ret = qla2x00_full_login_lip(vha);
0c8c39af 1183 if (ret != QLA_SUCCESS) {
749af3d5 1184 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28 1185 "full_login_lip=%d.\n", __func__, vha->host_no,
0c8c39af 1186 ret));
749af3d5
AC		 1187 }
1188 atomic_set(&vha->loop_state, LOOP_DOWN);
1189 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1190 qla2x00_mark_all_devices_lost(vha, 0);
1191 qla2x00_wait_for_loop_ready(vha);
0c8c39af
AV		 1192 }
1193
0d6e61bc 1194 if (ha->flags.enable_lip_reset) {
e315cd28 1195 ret = qla2x00_lip_reset(vha);
0c8c39af 1196 if (ret != QLA_SUCCESS) {
749af3d5 1197 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28
AC		 1198 "lip_reset=%d.\n", __func__, vha->host_no, ret));
1199 } else
1200 qla2x00_wait_for_loop_ready(vha);
1da177e4
LT		 1201 }
1202
1da177e4 1203 /* Issue marker command only when we are going to start the I/O */
e315cd28 1204 vha->marker_needed = 1;
1da177e4 1205
0c8c39af 1206 return QLA_SUCCESS;
1da177e4
LT		 1207}
1208
df4bf0bb 1209void
e315cd28 1210qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
df4bf0bb 1211{
73208dfd 1212 int que, cnt;
df4bf0bb
AV		 1213 unsigned long flags;
1214 srb_t *sp;
ac280b67 1215 struct srb_ctx *ctx;
e315cd28 1216 struct qla_hw_data *ha = vha->hw;
73208dfd 1217 struct req_que *req;
df4bf0bb
AV		 1218
1219 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 1220 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 1221 req = ha->req_q_map[que];
73208dfd
AC		 1222 if (!req)
1223 continue;
1224 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1225 sp = req->outstanding_cmds[cnt];
e612d465 1226 if (sp) {
73208dfd 1227 req->outstanding_cmds[cnt] = NULL;
a9083016 1228 if (!sp->ctx ||
bad75002
AE		 1229 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1230 IS_PROT_IO(sp)) {
ac280b67
AV		 1231 sp->cmd->result = res;
1232 qla2x00_sp_compl(ha, sp);
1233 } else {
1234 ctx = sp->ctx;
6c452a45
AV		 1235 if (ctx->type == SRB_LOGIN_CMD ||
1236 ctx->type == SRB_LOGOUT_CMD) {
4916392b 1237 ctx->u.iocb_cmd->free(sp);
db3ad7f8 1238 } else {
6c452a45 1239 struct fc_bsg_job *bsg_job =
4916392b 1240 ctx->u.bsg_job;
6c452a45
AV		 1241 if (bsg_job->request->msgcode
1242 == FC_BSG_HST_CT)
db3ad7f8 1243 kfree(sp->fcport);
6c452a45
AV		 1244 bsg_job->req->errors = 0;
1245 bsg_job->reply->result = res;
4916392b 1246 bsg_job->job_done(bsg_job);
db3ad7f8 1247 kfree(sp->ctx);
6c452a45 1248 mempool_free(sp,
4916392b 1249 ha->srb_mempool);
db3ad7f8 1250 }
ac280b67 1251 }
73208dfd 1252 }
df4bf0bb
AV		 1253 }
1254 }
1255 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1256}
1257
f4f051eb
AV		 1258static int
1259qla2xxx_slave_alloc(struct scsi_device *sdev)
1da177e4 1260{
bdf79621 1261 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1da177e4 1262
19a7b4ae 1263 if (!rport || fc_remote_port_chkready(rport))
f4f051eb 1264 return -ENXIO;
bdf79621 1265
19a7b4ae 1266 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1da177e4 1267
f4f051eb
AV		 1268 return 0;
1269}
1da177e4 1270
f4f051eb
AV		 1271static int
1272qla2xxx_slave_configure(struct scsi_device *sdev)
1273{
e315cd28 1274 scsi_qla_host_t *vha = shost_priv(sdev->host);
2afa19a9 1275 struct req_que *req = vha->req;
8482e118 1276
f4f051eb 1277 if (sdev->tagged_supported)
73208dfd 1278 scsi_activate_tcq(sdev, req->max_q_depth);
f4f051eb 1279 else
73208dfd 1280 scsi_deactivate_tcq(sdev, req->max_q_depth);
f4f051eb
AV		 1281 return 0;
1282}
1da177e4 1283
f4f051eb
AV		 1284static void
1285qla2xxx_slave_destroy(struct scsi_device *sdev)
1286{
1287 sdev->hostdata = NULL;
1da177e4
LT		 1288}
1289
c45dd305
GM		 1290static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1291{
1292 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1293
1294 if (!scsi_track_queue_full(sdev, qdepth))
1295 return;
1296
1297 DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
1298 "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
1299 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1300 sdev->queue_depth));
1301}
1302
1303static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1304{
1305 fc_port_t *fcport = sdev->hostdata;
1306 struct scsi_qla_host *vha = fcport->vha;
1307 struct qla_hw_data *ha = vha->hw;
1308 struct req_que *req = NULL;
1309
1310 req = vha->req;
1311 if (!req)
1312 return;
1313
1314 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1315 return;
1316
1317 if (sdev->ordered_tags)
1318 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1319 else
1320 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1321
1322 DEBUG2(qla_printk(KERN_INFO, ha,
1323 "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
1324 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1325 sdev->queue_depth));
1326}
1327
ce7e4af7 1328static int
e881a172 1329qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
ce7e4af7 1330{
c45dd305
GM		 1331 switch (reason) {
1332 case SCSI_QDEPTH_DEFAULT:
1333 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1334 break;
1335 case SCSI_QDEPTH_QFULL:
1336 qla2x00_handle_queue_full(sdev, qdepth);
1337 break;
1338 case SCSI_QDEPTH_RAMP_UP:
1339 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1340 break;
1341 default:
08002af2 1342 return -EOPNOTSUPP;
c45dd305 1343 }
e881a172 1344
ce7e4af7
AV		 1345 return sdev->queue_depth;
1346}
1347
1348static int
1349qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1350{
1351 if (sdev->tagged_supported) {
1352 scsi_set_tag_type(sdev, tag_type);
1353 if (tag_type)
1354 scsi_activate_tcq(sdev, sdev->queue_depth);
1355 else
1356 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1357 } else
1358 tag_type = 0;
1359
1360 return tag_type;
1361}
1362
1da177e4
LT		 1363/**
1364 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1365 * @ha: HA context
1366 *
1367 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1368 * supported addressing method.
1369 */
1370static void
53303c42 1371qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1da177e4 1372{
7524f9b9 1373 /* Assume a 32bit DMA mask. */
1da177e4 1374 ha->flags.enable_64bit_addressing = 0;
1da177e4 1375
6a35528a 1376 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
7524f9b9
AV		 1377 /* Any upper-dword bits set? */
1378 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
6a35528a 1379 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
7524f9b9 1380 /* Ok, a 64bit DMA mask is applicable. */
1da177e4 1381 ha->flags.enable_64bit_addressing = 1;
fd34f556
AV		 1382 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1383 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
7524f9b9 1384 return;
1da177e4 1385 }
1da177e4 1386 }
7524f9b9 1387
284901a9
YH		 1388 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1389 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1da177e4
LT		 1390}
1391
fd34f556 1392static void
e315cd28 1393qla2x00_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1394{
1395 unsigned long flags = 0;
1396 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1397
1398 spin_lock_irqsave(&ha->hardware_lock, flags);
1399 ha->interrupts_on = 1;
1400 /* enable risc and host interrupts */
1401 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1402 RD_REG_WORD(&reg->ictrl);
1403 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1404
1405}
1406
1407static void
e315cd28 1408qla2x00_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1409{
1410 unsigned long flags = 0;
1411 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1412
1413 spin_lock_irqsave(&ha->hardware_lock, flags);
1414 ha->interrupts_on = 0;
1415 /* disable risc and host interrupts */
1416 WRT_REG_WORD(&reg->ictrl, 0);
1417 RD_REG_WORD(&reg->ictrl);
1418 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1419}
1420
1421static void
e315cd28 1422qla24xx_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1423{
1424 unsigned long flags = 0;
1425 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1426
1427 spin_lock_irqsave(&ha->hardware_lock, flags);
1428 ha->interrupts_on = 1;
1429 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1430 RD_REG_DWORD(&reg->ictrl);
1431 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1432}
1433
1434static void
e315cd28 1435qla24xx_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1436{
1437 unsigned long flags = 0;
1438 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1439
124f85e6
AV		 1440 if (IS_NOPOLLING_TYPE(ha))
1441 return;
fd34f556
AV		 1442 spin_lock_irqsave(&ha->hardware_lock, flags);
1443 ha->interrupts_on = 0;
1444 WRT_REG_DWORD(&reg->ictrl, 0);
1445 RD_REG_DWORD(&reg->ictrl);
1446 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1447}
1448
1449static struct isp_operations qla2100_isp_ops = {
1450 .pci_config = qla2100_pci_config,
1451 .reset_chip = qla2x00_reset_chip,
1452 .chip_diag = qla2x00_chip_diag,
1453 .config_rings = qla2x00_config_rings,
1454 .reset_adapter = qla2x00_reset_adapter,
1455 .nvram_config = qla2x00_nvram_config,
1456 .update_fw_options = qla2x00_update_fw_options,
1457 .load_risc = qla2x00_load_risc,
1458 .pci_info_str = qla2x00_pci_info_str,
1459 .fw_version_str = qla2x00_fw_version_str,
1460 .intr_handler = qla2100_intr_handler,
1461 .enable_intrs = qla2x00_enable_intrs,
1462 .disable_intrs = qla2x00_disable_intrs,
1463 .abort_command = qla2x00_abort_command,
523ec773
AV		 1464 .target_reset = qla2x00_abort_target,
1465 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1466 .fabric_login = qla2x00_login_fabric,
1467 .fabric_logout = qla2x00_fabric_logout,
1468 .calc_req_entries = qla2x00_calc_iocbs_32,
1469 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1470 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1471 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1472 .read_nvram = qla2x00_read_nvram_data,
1473 .write_nvram = qla2x00_write_nvram_data,
1474 .fw_dump = qla2100_fw_dump,
1475 .beacon_on = NULL,
1476 .beacon_off = NULL,
1477 .beacon_blink = NULL,
1478 .read_optrom = qla2x00_read_optrom_data,
1479 .write_optrom = qla2x00_write_optrom_data,
1480 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1481 .start_scsi = qla2x00_start_scsi,
a9083016 1482 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1483};
1484
1485static struct isp_operations qla2300_isp_ops = {
1486 .pci_config = qla2300_pci_config,
1487 .reset_chip = qla2x00_reset_chip,
1488 .chip_diag = qla2x00_chip_diag,
1489 .config_rings = qla2x00_config_rings,
1490 .reset_adapter = qla2x00_reset_adapter,
1491 .nvram_config = qla2x00_nvram_config,
1492 .update_fw_options = qla2x00_update_fw_options,
1493 .load_risc = qla2x00_load_risc,
1494 .pci_info_str = qla2x00_pci_info_str,
1495 .fw_version_str = qla2x00_fw_version_str,
1496 .intr_handler = qla2300_intr_handler,
1497 .enable_intrs = qla2x00_enable_intrs,
1498 .disable_intrs = qla2x00_disable_intrs,
1499 .abort_command = qla2x00_abort_command,
523ec773
AV		 1500 .target_reset = qla2x00_abort_target,
1501 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1502 .fabric_login = qla2x00_login_fabric,
1503 .fabric_logout = qla2x00_fabric_logout,
1504 .calc_req_entries = qla2x00_calc_iocbs_32,
1505 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1506 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1507 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1508 .read_nvram = qla2x00_read_nvram_data,
1509 .write_nvram = qla2x00_write_nvram_data,
1510 .fw_dump = qla2300_fw_dump,
1511 .beacon_on = qla2x00_beacon_on,
1512 .beacon_off = qla2x00_beacon_off,
1513 .beacon_blink = qla2x00_beacon_blink,
1514 .read_optrom = qla2x00_read_optrom_data,
1515 .write_optrom = qla2x00_write_optrom_data,
1516 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1517 .start_scsi = qla2x00_start_scsi,
a9083016 1518 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1519};
1520
1521static struct isp_operations qla24xx_isp_ops = {
1522 .pci_config = qla24xx_pci_config,
1523 .reset_chip = qla24xx_reset_chip,
1524 .chip_diag = qla24xx_chip_diag,
1525 .config_rings = qla24xx_config_rings,
1526 .reset_adapter = qla24xx_reset_adapter,
1527 .nvram_config = qla24xx_nvram_config,
1528 .update_fw_options = qla24xx_update_fw_options,
1529 .load_risc = qla24xx_load_risc,
1530 .pci_info_str = qla24xx_pci_info_str,
1531 .fw_version_str = qla24xx_fw_version_str,
1532 .intr_handler = qla24xx_intr_handler,
1533 .enable_intrs = qla24xx_enable_intrs,
1534 .disable_intrs = qla24xx_disable_intrs,
1535 .abort_command = qla24xx_abort_command,
523ec773
AV		 1536 .target_reset = qla24xx_abort_target,
1537 .lun_reset = qla24xx_lun_reset,
fd34f556
AV		 1538 .fabric_login = qla24xx_login_fabric,
1539 .fabric_logout = qla24xx_fabric_logout,
1540 .calc_req_entries = NULL,
1541 .build_iocbs = NULL,
1542 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1543 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1544 .read_nvram = qla24xx_read_nvram_data,
1545 .write_nvram = qla24xx_write_nvram_data,
1546 .fw_dump = qla24xx_fw_dump,
1547 .beacon_on = qla24xx_beacon_on,
1548 .beacon_off = qla24xx_beacon_off,
1549 .beacon_blink = qla24xx_beacon_blink,
1550 .read_optrom = qla24xx_read_optrom_data,
1551 .write_optrom = qla24xx_write_optrom_data,
1552 .get_flash_version = qla24xx_get_flash_version,
e315cd28 1553 .start_scsi = qla24xx_start_scsi,
a9083016 1554 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1555};
1556
c3a2f0df
AV		 1557static struct isp_operations qla25xx_isp_ops = {
1558 .pci_config = qla25xx_pci_config,
1559 .reset_chip = qla24xx_reset_chip,
1560 .chip_diag = qla24xx_chip_diag,
1561 .config_rings = qla24xx_config_rings,
1562 .reset_adapter = qla24xx_reset_adapter,
1563 .nvram_config = qla24xx_nvram_config,
1564 .update_fw_options = qla24xx_update_fw_options,
1565 .load_risc = qla24xx_load_risc,
1566 .pci_info_str = qla24xx_pci_info_str,
1567 .fw_version_str = qla24xx_fw_version_str,
1568 .intr_handler = qla24xx_intr_handler,
1569 .enable_intrs = qla24xx_enable_intrs,
1570 .disable_intrs = qla24xx_disable_intrs,
1571 .abort_command = qla24xx_abort_command,
523ec773
AV		 1572 .target_reset = qla24xx_abort_target,
1573 .lun_reset = qla24xx_lun_reset,
c3a2f0df
AV		 1574 .fabric_login = qla24xx_login_fabric,
1575 .fabric_logout = qla24xx_fabric_logout,
1576 .calc_req_entries = NULL,
1577 .build_iocbs = NULL,
1578 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1579 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1580 .read_nvram = qla25xx_read_nvram_data,
1581 .write_nvram = qla25xx_write_nvram_data,
1582 .fw_dump = qla25xx_fw_dump,
1583 .beacon_on = qla24xx_beacon_on,
1584 .beacon_off = qla24xx_beacon_off,
1585 .beacon_blink = qla24xx_beacon_blink,
338c9161 1586 .read_optrom = qla25xx_read_optrom_data,
c3a2f0df
AV		 1587 .write_optrom = qla24xx_write_optrom_data,
1588 .get_flash_version = qla24xx_get_flash_version,
bad75002 1589 .start_scsi = qla24xx_dif_start_scsi,
a9083016 1590 .abort_isp = qla2x00_abort_isp,
c3a2f0df
AV		 1591};
1592
3a03eb79
AV		 1593static struct isp_operations qla81xx_isp_ops = {
1594 .pci_config = qla25xx_pci_config,
1595 .reset_chip = qla24xx_reset_chip,
1596 .chip_diag = qla24xx_chip_diag,
1597 .config_rings = qla24xx_config_rings,
1598 .reset_adapter = qla24xx_reset_adapter,
1599 .nvram_config = qla81xx_nvram_config,
1600 .update_fw_options = qla81xx_update_fw_options,
eaac30be 1601 .load_risc = qla81xx_load_risc,
3a03eb79
AV		 1602 .pci_info_str = qla24xx_pci_info_str,
1603 .fw_version_str = qla24xx_fw_version_str,
1604 .intr_handler = qla24xx_intr_handler,
1605 .enable_intrs = qla24xx_enable_intrs,
1606 .disable_intrs = qla24xx_disable_intrs,
1607 .abort_command = qla24xx_abort_command,
1608 .target_reset = qla24xx_abort_target,
1609 .lun_reset = qla24xx_lun_reset,
1610 .fabric_login = qla24xx_login_fabric,
1611 .fabric_logout = qla24xx_fabric_logout,
1612 .calc_req_entries = NULL,
1613 .build_iocbs = NULL,
1614 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1615 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
3d79038f
AV		 1616 .read_nvram = NULL,
1617 .write_nvram = NULL,
3a03eb79
AV		 1618 .fw_dump = qla81xx_fw_dump,
1619 .beacon_on = qla24xx_beacon_on,
1620 .beacon_off = qla24xx_beacon_off,
1621 .beacon_blink = qla24xx_beacon_blink,
1622 .read_optrom = qla25xx_read_optrom_data,
1623 .write_optrom = qla24xx_write_optrom_data,
1624 .get_flash_version = qla24xx_get_flash_version,
ba77ef53 1625 .start_scsi = qla24xx_dif_start_scsi,
a9083016
GM		 1626 .abort_isp = qla2x00_abort_isp,
1627};
1628
1629static struct isp_operations qla82xx_isp_ops = {
1630 .pci_config = qla82xx_pci_config,
1631 .reset_chip = qla82xx_reset_chip,
1632 .chip_diag = qla24xx_chip_diag,
1633 .config_rings = qla82xx_config_rings,
1634 .reset_adapter = qla24xx_reset_adapter,
1635 .nvram_config = qla81xx_nvram_config,
1636 .update_fw_options = qla24xx_update_fw_options,
1637 .load_risc = qla82xx_load_risc,
1638 .pci_info_str = qla82xx_pci_info_str,
1639 .fw_version_str = qla24xx_fw_version_str,
1640 .intr_handler = qla82xx_intr_handler,
1641 .enable_intrs = qla82xx_enable_intrs,
1642 .disable_intrs = qla82xx_disable_intrs,
1643 .abort_command = qla24xx_abort_command,
1644 .target_reset = qla24xx_abort_target,
1645 .lun_reset = qla24xx_lun_reset,
1646 .fabric_login = qla24xx_login_fabric,
1647 .fabric_logout = qla24xx_fabric_logout,
1648 .calc_req_entries = NULL,
1649 .build_iocbs = NULL,
1650 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1651 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1652 .read_nvram = qla24xx_read_nvram_data,
1653 .write_nvram = qla24xx_write_nvram_data,
1654 .fw_dump = qla24xx_fw_dump,
1655 .beacon_on = qla24xx_beacon_on,
1656 .beacon_off = qla24xx_beacon_off,
1657 .beacon_blink = qla24xx_beacon_blink,
1658 .read_optrom = qla82xx_read_optrom_data,
1659 .write_optrom = qla82xx_write_optrom_data,
1660 .get_flash_version = qla24xx_get_flash_version,
1661 .start_scsi = qla82xx_start_scsi,
1662 .abort_isp = qla82xx_abort_isp,
3a03eb79
AV		 1663};
1664
ea5b6382 1665static inline void
e315cd28 1666qla2x00_set_isp_flags(struct qla_hw_data *ha)
ea5b6382
AV		 1667{
1668 ha->device_type = DT_EXTENDED_IDS;
1669 switch (ha->pdev->device) {
1670 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1671 ha->device_type |= DT_ISP2100;
1672 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1673 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382
AV		 1674 break;
1675 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1676 ha->device_type |= DT_ISP2200;
1677 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1678 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382
AV		 1679 break;
1680 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1681 ha->device_type |= DT_ISP2300;
4a59f71d 1682 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1683 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1684 break;
1685 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1686 ha->device_type |= DT_ISP2312;
4a59f71d 1687 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1688 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1689 break;
1690 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1691 ha->device_type |= DT_ISP2322;
4a59f71d 1692 ha->device_type |= DT_ZIO_SUPPORTED;
ea5b6382
AV		 1693 if (ha->pdev->subsystem_vendor == 0x1028 &&
1694 ha->pdev->subsystem_device == 0x0170)
1695 ha->device_type |= DT_OEM_001;
441d1072 1696 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1697 break;
1698 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1699 ha->device_type |= DT_ISP6312;
441d1072 1700 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1701 break;
1702 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1703 ha->device_type |= DT_ISP6322;
441d1072 1704 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1705 break;
1706 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1707 ha->device_type |= DT_ISP2422;
4a59f71d 1708 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1709 ha->device_type |= DT_FWI2;
c76f2c01 1710 ha->device_type |= DT_IIDMA;
441d1072 1711 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382
AV		 1712 break;
1713 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1714 ha->device_type |= DT_ISP2432;
4a59f71d 1715 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1716 ha->device_type |= DT_FWI2;
c76f2c01 1717 ha->device_type |= DT_IIDMA;
441d1072 1718 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1719 break;
4d4df193
HK		 1720 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1721 ha->device_type |= DT_ISP8432;
1722 ha->device_type |= DT_ZIO_SUPPORTED;
1723 ha->device_type |= DT_FWI2;
1724 ha->device_type |= DT_IIDMA;
1725 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1726 break;
044cc6c8
AV		 1727 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1728 ha->device_type |= DT_ISP5422;
e428924c 1729 ha->device_type |= DT_FWI2;
441d1072 1730 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1731 break;
044cc6c8
AV		 1732 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1733 ha->device_type |= DT_ISP5432;
e428924c 1734 ha->device_type |= DT_FWI2;
441d1072 1735 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1736 break;
c3a2f0df
AV		 1737 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1738 ha->device_type |= DT_ISP2532;
1739 ha->device_type |= DT_ZIO_SUPPORTED;
1740 ha->device_type |= DT_FWI2;
1741 ha->device_type |= DT_IIDMA;
441d1072 1742 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1743 break;
3a03eb79
AV		 1744 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1745 ha->device_type |= DT_ISP8001;
1746 ha->device_type |= DT_ZIO_SUPPORTED;
1747 ha->device_type |= DT_FWI2;
1748 ha->device_type |= DT_IIDMA;
1749 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1750 break;
a9083016
GM		 1751 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1752 ha->device_type |= DT_ISP8021;
1753 ha->device_type |= DT_ZIO_SUPPORTED;
1754 ha->device_type |= DT_FWI2;
1755 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1756 /* Initialize 82XX ISP flags */
1757 qla82xx_init_flags(ha);
1758 break;
ea5b6382 1759 }
e5b68a61 1760
a9083016
GM		 1761 if (IS_QLA82XX(ha))
1762 ha->port_no = !(ha->portnum & 1);
1763 else
1764 /* Get adapter physical port no from interrupt pin register. */
1765 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1766
e5b68a61
AC		 1767 if (ha->port_no & 1)
1768 ha->flags.port0 = 1;
1769 else
1770 ha->flags.port0 = 0;
ea5b6382
AV		 1771}
1772
1da177e4 1773static int
e315cd28 1774qla2x00_iospace_config(struct qla_hw_data *ha)
1da177e4 1775{
3776541d 1776 resource_size_t pio;
73208dfd 1777 uint16_t msix;
68ca949c 1778 int cpus;
1da177e4 1779
a9083016
GM		 1780 if (IS_QLA82XX(ha))
1781 return qla82xx_iospace_config(ha);
1782
285d0321
AV		 1783 if (pci_request_selected_regions(ha->pdev, ha->bars,
1784 QLA2XXX_DRIVER_NAME)) {
1785 qla_printk(KERN_WARNING, ha,
1786 "Failed to reserve PIO/MMIO regions (%s)\n",
1787 pci_name(ha->pdev));
1788
1789 goto iospace_error_exit;
1790 }
1791 if (!(ha->bars & 1))
1792 goto skip_pio;
1793
1da177e4
LT		 1794 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1795 pio = pci_resource_start(ha->pdev, 0);
3776541d
AV		 1796 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1797 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1da177e4
LT		 1798 qla_printk(KERN_WARNING, ha,
1799 "Invalid PCI I/O region size (%s)...\n",
1800 pci_name(ha->pdev));
1801 pio = 0;
1802 }
1803 } else {
1804 qla_printk(KERN_WARNING, ha,
1805 "region #0 not a PIO resource (%s)...\n",
1806 pci_name(ha->pdev));
1807 pio = 0;
1808 }
285d0321 1809 ha->pio_address = pio;
1da177e4 1810
285d0321 1811skip_pio:
1da177e4 1812 /* Use MMIO operations for all accesses. */
3776541d 1813 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1da177e4 1814 qla_printk(KERN_ERR, ha,
3776541d 1815 "region #1 not an MMIO resource (%s), aborting\n",
1da177e4
LT		 1816 pci_name(ha->pdev));
1817 goto iospace_error_exit;
1818 }
3776541d 1819 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1da177e4
LT		 1820 qla_printk(KERN_ERR, ha,
1821 "Invalid PCI mem region size (%s), aborting\n",
1822 pci_name(ha->pdev));
1823 goto iospace_error_exit;
1824 }
1825
3776541d 1826 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1da177e4
LT		 1827 if (!ha->iobase) {
1828 qla_printk(KERN_ERR, ha,
1829 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
1830
1831 goto iospace_error_exit;
1832 }
1833
73208dfd 1834 /* Determine queue resources */
2afa19a9 1835 ha->max_req_queues = ha->max_rsp_queues = 1;
d84a47c2
MH		 1836 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1837 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
2afa19a9 1838 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
17d98630 1839 goto mqiobase_exit;
d84a47c2 1840
17d98630
AC		 1841 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1842 pci_resource_len(ha->pdev, 3));
1843 if (ha->mqiobase) {
1844 /* Read MSIX vector size of the board */
1845 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1846 ha->msix_count = msix;
68ca949c
AC		 1847 /* Max queues are bounded by available msix vectors */
1848 /* queue 0 uses two msix vectors */
1849 if (ql2xmultique_tag) {
1850 cpus = num_online_cpus();
27dc9c5a 1851 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
68ca949c
AC		 1852 (cpus + 1) : (ha->msix_count - 1);
1853 ha->max_req_queues = 2;
1854 } else if (ql2xmaxqueues > 1) {
2afa19a9
AC		 1855 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1856 QLA_MQ_SIZE : ql2xmaxqueues;
1857 DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
1858 " of request queues:%d\n", ha->max_req_queues));
1859 }
68ca949c
AC		 1860 qla_printk(KERN_INFO, ha,
1861 "MSI-X vector count: %d\n", msix);
2afa19a9
AC		 1862 } else
1863 qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
17d98630
AC		 1864
1865mqiobase_exit:
2afa19a9 1866 ha->msix_count = ha->max_rsp_queues + 1;
1da177e4
LT		 1867 return (0);
1868
1869iospace_error_exit:
1870 return (-ENOMEM);
1871}
1872
1e99e33a
AV		 1873static void
1874qla2xxx_scan_start(struct Scsi_Host *shost)
1875{
e315cd28 1876 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1877
cbc8eb67
AV		 1878 if (vha->hw->flags.running_gold_fw)
1879 return;
1880
e315cd28
AC		 1881 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1882 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1883 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1884 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1e99e33a
AV		 1885}
1886
1887static int
1888qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1889{
e315cd28 1890 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1891
e315cd28 1892 if (!vha->host)
1e99e33a 1893 return 1;
e315cd28 1894 if (time > vha->hw->loop_reset_delay * HZ)
1e99e33a
AV		 1895 return 1;
1896
e315cd28 1897 return atomic_read(&vha->loop_state) == LOOP_READY;
1e99e33a
AV		 1898}
1899
1da177e4
LT		 1900/*
1901 * PCI driver interface
1902 */
7ee61397
AV		 1903static int __devinit
1904qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1da177e4 1905{
a1541d5a 1906 int ret = -ENODEV;
1da177e4 1907 struct Scsi_Host *host;
e315cd28
AC		 1908 scsi_qla_host_t *base_vha = NULL;
1909 struct qla_hw_data *ha;
29856e28 1910 char pci_info[30];
1da177e4 1911 char fw_str[30];
5433383e 1912 struct scsi_host_template *sht;
c51da4ec 1913 int bars, max_id, mem_only = 0;
e315cd28 1914 uint16_t req_length = 0, rsp_length = 0;
73208dfd
AC		 1915 struct req_que *req = NULL;
1916 struct rsp_que *rsp = NULL;
1da177e4 1917
285d0321 1918 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
a5326f86 1919 sht = &qla2xxx_driver_template;
5433383e 1920 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
8bc69e7d 1921 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
4d4df193 1922 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
8bc69e7d 1923 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
c3a2f0df 1924 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
3a03eb79 1925 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
a9083016
GM		 1926 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1927 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
285d0321 1928 bars = pci_select_bars(pdev, IORESOURCE_MEM);
09483916 1929 mem_only = 1;
285d0321
AV		 1930 }
1931
09483916
BH		 1932 if (mem_only) {
1933 if (pci_enable_device_mem(pdev))
1934 goto probe_out;
1935 } else {
1936 if (pci_enable_device(pdev))
1937 goto probe_out;
1938 }
285d0321 1939
0927678f
JB		 1940 /* This may fail but that's ok */
1941 pci_enable_pcie_error_reporting(pdev);
285d0321 1942
e315cd28
AC		 1943 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
1944 if (!ha) {
1945 DEBUG(printk("Unable to allocate memory for ha\n"));
1946 goto probe_out;
1da177e4 1947 }
e315cd28 1948 ha->pdev = pdev;
1da177e4
LT		 1949
1950 /* Clear our data area */
285d0321 1951 ha->bars = bars;
09483916 1952 ha->mem_only = mem_only;
df4bf0bb 1953 spin_lock_init(&ha->hardware_lock);
339aa70e 1954 spin_lock_init(&ha->vport_slock);
1da177e4 1955
ea5b6382
AV		 1956 /* Set ISP-type information. */
1957 qla2x00_set_isp_flags(ha);
ca79cf66
DG		 1958
1959 /* Set EEH reset type to fundamental if required by hba */
1960 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
1961 pdev->needs_freset = 1;
ca79cf66
DG		 1962 }
1963
1da177e4
LT		 1964 /* Configure PCI I/O space */
1965 ret = qla2x00_iospace_config(ha);
a1541d5a 1966 if (ret)
e315cd28 1967 goto probe_hw_failed;
1da177e4 1968
1da177e4 1969 qla_printk(KERN_INFO, ha,
5433383e
AV		 1970 "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
1971 ha->iobase);
1da177e4 1972
1da177e4 1973 ha->prev_topology = 0;
fca29703 1974 ha->init_cb_size = sizeof(init_cb_t);
d8b45213 1975 ha->link_data_rate = PORT_SPEED_UNKNOWN;
854165f4 1976 ha->optrom_size = OPTROM_SIZE_2300;
1da177e4 1977
abbd8870 1978 /* Assign ISP specific operations. */
e315cd28 1979 max_id = MAX_TARGETS_2200;
1da177e4 1980 if (IS_QLA2100(ha)) {
e315cd28 1981 max_id = MAX_TARGETS_2100;
1da177e4 1982 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
e315cd28
AC		 1983 req_length = REQUEST_ENTRY_CNT_2100;
1984 rsp_length = RESPONSE_ENTRY_CNT_2100;
1985 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1986 ha->gid_list_info_size = 4;
3a03eb79
AV		 1987 ha->flash_conf_off = ~0;
1988 ha->flash_data_off = ~0;
1989 ha->nvram_conf_off = ~0;
1990 ha->nvram_data_off = ~0;
fd34f556 1991 ha->isp_ops = &qla2100_isp_ops;
1da177e4 1992 } else if (IS_QLA2200(ha)) {
1da177e4 1993 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 1994 req_length = REQUEST_ENTRY_CNT_2200;
1995 rsp_length = RESPONSE_ENTRY_CNT_2100;
1996 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1997 ha->gid_list_info_size = 4;
3a03eb79
AV		 1998 ha->flash_conf_off = ~0;
1999 ha->flash_data_off = ~0;
2000 ha->nvram_conf_off = ~0;
2001 ha->nvram_data_off = ~0;
fd34f556 2002 ha->isp_ops = &qla2100_isp_ops;
fca29703 2003 } else if (IS_QLA23XX(ha)) {
1da177e4 2004 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2005 req_length = REQUEST_ENTRY_CNT_2200;
2006 rsp_length = RESPONSE_ENTRY_CNT_2300;
2007 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
abbd8870 2008 ha->gid_list_info_size = 6;
854165f4
AV		 2009 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2010 ha->optrom_size = OPTROM_SIZE_2322;
3a03eb79
AV		 2011 ha->flash_conf_off = ~0;
2012 ha->flash_data_off = ~0;
2013 ha->nvram_conf_off = ~0;
2014 ha->nvram_data_off = ~0;
fd34f556 2015 ha->isp_ops = &qla2300_isp_ops;
4d4df193 2016 } else if (IS_QLA24XX_TYPE(ha)) {
fca29703 2017 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2018 req_length = REQUEST_ENTRY_CNT_24XX;
2019 rsp_length = RESPONSE_ENTRY_CNT_2300;
2020 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2c3dfe3f 2021 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
fca29703 2022 ha->gid_list_info_size = 8;
854165f4 2023 ha->optrom_size = OPTROM_SIZE_24XX;
73208dfd 2024 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
fd34f556 2025 ha->isp_ops = &qla24xx_isp_ops;
3a03eb79
AV		 2026 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2027 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2028 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2029 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
c3a2f0df 2030 } else if (IS_QLA25XX(ha)) {
c3a2f0df 2031 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2032 req_length = REQUEST_ENTRY_CNT_24XX;
2033 rsp_length = RESPONSE_ENTRY_CNT_2300;
2034 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
c3a2f0df 2035 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
c3a2f0df
AV		 2036 ha->gid_list_info_size = 8;
2037 ha->optrom_size = OPTROM_SIZE_25XX;
73208dfd 2038 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
c3a2f0df 2039 ha->isp_ops = &qla25xx_isp_ops;
3a03eb79
AV		 2040 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2041 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2042 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2043 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2044 } else if (IS_QLA81XX(ha)) {
2045 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2046 req_length = REQUEST_ENTRY_CNT_24XX;
2047 rsp_length = RESPONSE_ENTRY_CNT_2300;
2048 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2049 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2050 ha->gid_list_info_size = 8;
2051 ha->optrom_size = OPTROM_SIZE_81XX;
40859ae5 2052 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3a03eb79
AV		 2053 ha->isp_ops = &qla81xx_isp_ops;
2054 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2055 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2056 ha->nvram_conf_off = ~0;
2057 ha->nvram_data_off = ~0;
a9083016
GM		 2058 } else if (IS_QLA82XX(ha)) {
2059 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2060 req_length = REQUEST_ENTRY_CNT_82XX;
2061 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2062 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2063 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2064 ha->gid_list_info_size = 8;
2065 ha->optrom_size = OPTROM_SIZE_82XX;
2066 ha->isp_ops = &qla82xx_isp_ops;
2067 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2068 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2069 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2070 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
1da177e4 2071 }
1da177e4 2072
6c2f527c 2073 mutex_init(&ha->vport_lock);
0b05a1f0
MB		 2074 init_completion(&ha->mbx_cmd_comp);
2075 complete(&ha->mbx_cmd_comp);
2076 init_completion(&ha->mbx_intr_comp);
23f2ebd1 2077 init_completion(&ha->dcbx_comp);
1da177e4 2078
2c3dfe3f 2079 set_bit(0, (unsigned long *) ha->vp_idx_map);
1da177e4 2080
53303c42 2081 qla2x00_config_dma_addressing(ha);
73208dfd 2082 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
e315cd28 2083 if (!ret) {
1da177e4
LT		 2084 qla_printk(KERN_WARNING, ha,
2085 "[ERROR] Failed to allocate memory for adapter\n");
2086
e315cd28
AC		 2087 goto probe_hw_failed;
2088 }
2089
73208dfd 2090 req->max_q_depth = MAX_Q_DEPTH;
e315cd28 2091 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
73208dfd
AC		 2092 req->max_q_depth = ql2xmaxqdepth;
2093
e315cd28
AC		 2094
2095 base_vha = qla2x00_create_host(sht, ha);
2096 if (!base_vha) {
2097 qla_printk(KERN_WARNING, ha,
2098 "[ERROR] Failed to allocate memory for scsi_host\n");
2099
a1541d5a 2100 ret = -ENOMEM;
6e9f21f3 2101 qla2x00_mem_free(ha);
2afa19a9
AC		 2102 qla2x00_free_req_que(ha, req);
2103 qla2x00_free_rsp_que(ha, rsp);
e315cd28 2104 goto probe_hw_failed;
1da177e4
LT		 2105 }
2106
e315cd28
AC		 2107 pci_set_drvdata(pdev, base_vha);
2108
e315cd28 2109 host = base_vha->host;
2afa19a9 2110 base_vha->req = req;
73208dfd
AC		 2111 host->can_queue = req->length + 128;
2112 if (IS_QLA2XXX_MIDTYPE(ha))
e315cd28 2113 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
73208dfd 2114 else
e315cd28
AC		 2115 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2116 base_vha->vp_idx;
58548cb5
GM		 2117
2118 /* Set the SG table size based on ISP type */
2119 if (!IS_FWI2_CAPABLE(ha)) {
2120 if (IS_QLA2100(ha))
2121 host->sg_tablesize = 32;
2122 } else {
2123 if (!IS_QLA82XX(ha))
2124 host->sg_tablesize = QLA_SG_ALL;
2125 }
2126
e315cd28
AC		 2127 host->max_id = max_id;
2128 host->this_id = 255;
2129 host->cmd_per_lun = 3;
2130 host->unique_id = host->host_no;
0c470874
AE		 2131 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif)
2132 host->max_cmd_len = 32;
2133 else
2134 host->max_cmd_len = MAX_CMDSZ;
e315cd28
AC		 2135 host->max_channel = MAX_BUSES - 1;
2136 host->max_lun = MAX_LUNS;
2137 host->transportt = qla2xxx_transport_template;
9a069e19 2138 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
e315cd28 2139
73208dfd
AC		 2140 /* Set up the irqs */
2141 ret = qla2x00_request_irqs(ha, rsp);
2142 if (ret)
6e9f21f3 2143 goto probe_init_failed;
90a86fc0
JC		 2144
2145 pci_save_state(pdev);
2146
73208dfd 2147 /* Alloc arrays of request and response ring ptrs */
7163ea81 2148que_init:
73208dfd
AC		 2149 if (!qla2x00_alloc_queues(ha)) {
2150 qla_printk(KERN_WARNING, ha,
2151 "[ERROR] Failed to allocate memory for queue"
2152 " pointers\n");
6e9f21f3 2153 goto probe_init_failed;
73208dfd 2154 }
a9083016 2155
73208dfd
AC		 2156 ha->rsp_q_map[0] = rsp;
2157 ha->req_q_map[0] = req;
2afa19a9
AC		 2158 rsp->req = req;
2159 req->rsp = rsp;
2160 set_bit(0, ha->req_qid_map);
2161 set_bit(0, ha->rsp_qid_map);
08029990
AV		 2162 /* FWI2-capable only. */
2163 req->req_q_in = &ha->iobase->isp24.req_q_in;
2164 req->req_q_out = &ha->iobase->isp24.req_q_out;
2165 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2166 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
17d98630 2167 if (ha->mqenable) {
08029990
AV		 2168 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2169 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2170 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2171 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
17d98630
AC		 2172 }
2173
a9083016
GM		 2174 if (IS_QLA82XX(ha)) {
2175 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2176 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2177 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2178 }
2179
e315cd28 2180 if (qla2x00_initialize_adapter(base_vha)) {
1da177e4
LT		 2181 qla_printk(KERN_WARNING, ha,
2182 "Failed to initialize adapter\n");
2183
2184 DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
2185 "Adapter flags %x.\n",
e315cd28 2186 base_vha->host_no, base_vha->device_flags));
1da177e4 2187
a9083016
GM		 2188 if (IS_QLA82XX(ha)) {
2189 qla82xx_idc_lock(ha);
2190 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2191 QLA82XX_DEV_FAILED);
2192 qla82xx_idc_unlock(ha);
2193 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
2194 }
2195
a1541d5a 2196 ret = -ENODEV;
1da177e4
LT		 2197 goto probe_failed;
2198 }
2199
7163ea81
AC		 2200 if (ha->mqenable) {
2201 if (qla25xx_setup_mode(base_vha)) {
68ca949c
AC		 2202 qla_printk(KERN_WARNING, ha,
2203 "Can't create queues, falling back to single"
2204 " queue mode\n");
7163ea81
AC		 2205 goto que_init;
2206 }
2207 }
68ca949c 2208
cbc8eb67
AV		 2209 if (ha->flags.running_gold_fw)
2210 goto skip_dpc;
2211
1da177e4
LT		 2212 /*
2213 * Startup the kernel thread for this host adapter
2214 */
39a11240 2215 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
e315cd28 2216 "%s_dpc", base_vha->host_str);
39a11240 2217 if (IS_ERR(ha->dpc_thread)) {
1da177e4
LT		 2218 qla_printk(KERN_WARNING, ha,
2219 "Unable to start DPC thread!\n");
39a11240 2220 ret = PTR_ERR(ha->dpc_thread);
1da177e4
LT		 2221 goto probe_failed;
2222 }
1da177e4 2223
cbc8eb67 2224skip_dpc:
e315cd28
AC		 2225 list_add_tail(&base_vha->list, &ha->vp_list);
2226 base_vha->host->irq = ha->pdev->irq;
1da177e4
LT		 2227
2228 /* Initialized the timer */
e315cd28 2229 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
1da177e4
LT		 2230
2231 DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
e315cd28 2232 base_vha->host_no, ha));
d19044c3 2233
ba77ef53 2234 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) {
bad75002
AE		 2235 if (ha->fw_attributes & BIT_4) {
2236 base_vha->flags.difdix_supported = 1;
2237 DEBUG18(qla_printk(KERN_INFO, ha,
2238 "Registering for DIF/DIX type 1 and 3"
2239 " protection.\n"));
2240 scsi_host_set_prot(host,
2241 SHOST_DIF_TYPE1_PROTECTION
0c470874 2242 | SHOST_DIF_TYPE2_PROTECTION
bad75002
AE		 2243 | SHOST_DIF_TYPE3_PROTECTION
2244 | SHOST_DIX_TYPE1_PROTECTION
0c470874 2245 | SHOST_DIX_TYPE2_PROTECTION
bad75002
AE		 2246 | SHOST_DIX_TYPE3_PROTECTION);
2247 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2248 } else
2249 base_vha->flags.difdix_supported = 0;
2250 }
2251
a9083016
GM		 2252 ha->isp_ops->enable_intrs(ha);
2253
a1541d5a
AV		 2254 ret = scsi_add_host(host, &pdev->dev);
2255 if (ret)
2256 goto probe_failed;
2257
1486400f
MR		 2258 base_vha->flags.init_done = 1;
2259 base_vha->flags.online = 1;
2260
1e99e33a
AV		 2261 scsi_scan_host(host);
2262
e315cd28 2263 qla2x00_alloc_sysfs_attr(base_vha);
a1541d5a 2264
e315cd28 2265 qla2x00_init_host_attr(base_vha);
a1541d5a 2266
e315cd28 2267 qla2x00_dfs_setup(base_vha);
df613b96 2268
1da177e4
LT		 2269 qla_printk(KERN_INFO, ha, "\n"
2270 " QLogic Fibre Channel HBA Driver: %s\n"
2271 " QLogic %s - %s\n"
5433383e
AV		 2272 " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
2273 qla2x00_version_str, ha->model_number,
e315cd28
AC		 2274 ha->model_desc ? ha->model_desc : "", pdev->device,
2275 ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
2276 ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
2277 ha->isp_ops->fw_version_str(base_vha, fw_str));
1da177e4 2278
1da177e4
LT		 2279 return 0;
2280
6e9f21f3 2281probe_init_failed:
2afa19a9
AC		 2282 qla2x00_free_req_que(ha, req);
2283 qla2x00_free_rsp_que(ha, rsp);
2284 ha->max_req_queues = ha->max_rsp_queues = 0;
6e9f21f3 2285
1da177e4 2286probe_failed:
b9978769
AV		 2287 if (base_vha->timer_active)
2288 qla2x00_stop_timer(base_vha);
2289 base_vha->flags.online = 0;
2290 if (ha->dpc_thread) {
2291 struct task_struct *t = ha->dpc_thread;
2292
2293 ha->dpc_thread = NULL;
2294 kthread_stop(t);
2295 }
2296
e315cd28 2297 qla2x00_free_device(base_vha);
1da177e4 2298
e315cd28 2299 scsi_host_put(base_vha->host);
1da177e4 2300
e315cd28 2301probe_hw_failed:
a9083016
GM		 2302 if (IS_QLA82XX(ha)) {
2303 qla82xx_idc_lock(ha);
2304 qla82xx_clear_drv_active(ha);
2305 qla82xx_idc_unlock(ha);
2306 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2307 if (!ql2xdbwr)
2308 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2309 } else {
2310 if (ha->iobase)
2311 iounmap(ha->iobase);
2312 }
e315cd28
AC		 2313 pci_release_selected_regions(ha->pdev, ha->bars);
2314 kfree(ha);
2315 ha = NULL;
1da177e4 2316
a1541d5a 2317probe_out:
e315cd28 2318 pci_disable_device(pdev);
a1541d5a 2319 return ret;
1da177e4 2320}
1da177e4 2321
e30d1756
MI		 2322static void
2323qla2x00_shutdown(struct pci_dev *pdev)
2324{
2325 scsi_qla_host_t *vha;
2326 struct qla_hw_data *ha;
2327
2328 vha = pci_get_drvdata(pdev);
2329 ha = vha->hw;
2330
2331 /* Turn-off FCE trace */
2332 if (ha->flags.fce_enabled) {
2333 qla2x00_disable_fce_trace(vha, NULL, NULL);
2334 ha->flags.fce_enabled = 0;
2335 }
2336
2337 /* Turn-off EFT trace */
2338 if (ha->eft)
2339 qla2x00_disable_eft_trace(vha);
2340
2341 /* Stop currently executing firmware. */
2342 qla2x00_try_to_stop_firmware(vha);
2343
2344 /* Turn adapter off line */
2345 vha->flags.online = 0;
2346
2347 /* turn-off interrupts on the card */
2348 if (ha->interrupts_on) {
2349 vha->flags.init_done = 0;
2350 ha->isp_ops->disable_intrs(ha);
2351 }
2352
2353 qla2x00_free_irqs(vha);
2354
2355 qla2x00_free_fw_dump(ha);
2356}
2357
4c993f76 2358static void
7ee61397 2359qla2x00_remove_one(struct pci_dev *pdev)
1da177e4 2360{
feafb7b1 2361 scsi_qla_host_t *base_vha, *vha;
e315cd28 2362 struct qla_hw_data *ha;
feafb7b1 2363 unsigned long flags;
e315cd28
AC		 2364
2365 base_vha = pci_get_drvdata(pdev);
2366 ha = base_vha->hw;
2367
feafb7b1
AE		 2368 spin_lock_irqsave(&ha->vport_slock, flags);
2369 list_for_each_entry(vha, &ha->vp_list, list) {
2370 atomic_inc(&vha->vref_count);
2371
2372 if (vha && vha->fc_vport) {
2373 spin_unlock_irqrestore(&ha->vport_slock, flags);
2374
e315cd28 2375 fc_vport_terminate(vha->fc_vport);
feafb7b1
AE		 2376
2377 spin_lock_irqsave(&ha->vport_slock, flags);
2378 }
2379
2380 atomic_dec(&vha->vref_count);
e315cd28 2381 }
feafb7b1 2382 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 2383
e315cd28 2384 set_bit(UNLOADING, &base_vha->dpc_flags);
1da177e4 2385
b9978769
AV		 2386 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2387
e315cd28 2388 qla2x00_dfs_remove(base_vha);
c795c1e4 2389
e315cd28 2390 qla84xx_put_chip(base_vha);
c795c1e4 2391
b9978769
AV		 2392 /* Disable timer */
2393 if (base_vha->timer_active)
2394 qla2x00_stop_timer(base_vha);
2395
2396 base_vha->flags.online = 0;
2397
68ca949c
AC		 2398 /* Flush the work queue and remove it */
2399 if (ha->wq) {
2400 flush_workqueue(ha->wq);
2401 destroy_workqueue(ha->wq);
2402 ha->wq = NULL;
2403 }
2404
b9978769
AV		 2405 /* Kill the kernel thread for this host */
2406 if (ha->dpc_thread) {
2407 struct task_struct *t = ha->dpc_thread;
2408
2409 /*
2410 * qla2xxx_wake_dpc checks for ->dpc_thread
2411 * so we need to zero it out.
2412 */
2413 ha->dpc_thread = NULL;
2414 kthread_stop(t);
2415 }
2416
e315cd28 2417 qla2x00_free_sysfs_attr(base_vha);
df613b96 2418
e315cd28 2419 fc_remove_host(base_vha->host);
4d4df193 2420
e315cd28 2421 scsi_remove_host(base_vha->host);
1da177e4 2422
e315cd28 2423 qla2x00_free_device(base_vha);
bdf79621 2424
e315cd28 2425 scsi_host_put(base_vha->host);
1da177e4 2426
a9083016 2427 if (IS_QLA82XX(ha)) {
b963752f
GM		 2428 qla82xx_idc_lock(ha);
2429 qla82xx_clear_drv_active(ha);
2430 qla82xx_idc_unlock(ha);
2431
a9083016
GM		 2432 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2433 if (!ql2xdbwr)
2434 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2435 } else {
2436 if (ha->iobase)
2437 iounmap(ha->iobase);
1da177e4 2438
a9083016
GM		 2439 if (ha->mqiobase)
2440 iounmap(ha->mqiobase);
2441 }
73208dfd 2442
e315cd28
AC		 2443 pci_release_selected_regions(ha->pdev, ha->bars);
2444 kfree(ha);
2445 ha = NULL;
1da177e4 2446
90a86fc0
JC		 2447 pci_disable_pcie_error_reporting(pdev);
2448
665db93b 2449 pci_disable_device(pdev);
1da177e4
LT		 2450 pci_set_drvdata(pdev, NULL);
2451}
1da177e4
LT		 2452
2453static void
e315cd28 2454qla2x00_free_device(scsi_qla_host_t *vha)
1da177e4 2455{
e315cd28 2456 struct qla_hw_data *ha = vha->hw;
1da177e4 2457
85880801
AV		 2458 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2459
2460 /* Disable timer */
2461 if (vha->timer_active)
2462 qla2x00_stop_timer(vha);
2463
2464 /* Kill the kernel thread for this host */
2465 if (ha->dpc_thread) {
2466 struct task_struct *t = ha->dpc_thread;
2467
2468 /*
2469 * qla2xxx_wake_dpc checks for ->dpc_thread
2470 * so we need to zero it out.
2471 */
2472 ha->dpc_thread = NULL;
2473 kthread_stop(t);
2474 }
2475
2afa19a9
AC		 2476 qla25xx_delete_queues(vha);
2477
df613b96 2478 if (ha->flags.fce_enabled)
e315cd28 2479 qla2x00_disable_fce_trace(vha, NULL, NULL);
df613b96 2480
a7a167bf 2481 if (ha->eft)
e315cd28 2482 qla2x00_disable_eft_trace(vha);
a7a167bf 2483
f6ef3b18 2484 /* Stop currently executing firmware. */
e315cd28 2485 qla2x00_try_to_stop_firmware(vha);
1da177e4 2486
85880801
AV		 2487 vha->flags.online = 0;
2488
f6ef3b18 2489 /* turn-off interrupts on the card */
a9083016
GM		 2490 if (ha->interrupts_on) {
2491 vha->flags.init_done = 0;
fd34f556 2492 ha->isp_ops->disable_intrs(ha);
a9083016 2493 }
f6ef3b18 2494
e315cd28 2495 qla2x00_free_irqs(vha);
1da177e4 2496
8867048b
CD		 2497 qla2x00_free_fcports(vha);
2498
e315cd28 2499 qla2x00_mem_free(ha);
73208dfd
AC		 2500
2501 qla2x00_free_queues(ha);
1da177e4
LT		 2502}
2503
8867048b
CD		 2504void qla2x00_free_fcports(struct scsi_qla_host *vha)
2505{
2506 fc_port_t *fcport, *tfcport;
2507
2508 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2509 list_del(&fcport->list);
2510 kfree(fcport);
2511 fcport = NULL;
2512 }
2513}
2514
d97994dc 2515static inline void
e315cd28 2516qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
d97994dc
AV		 2517 int defer)
2518{
d97994dc 2519 struct fc_rport *rport;
67becc00 2520 scsi_qla_host_t *base_vha;
d97994dc
AV		 2521
2522 if (!fcport->rport)
2523 return;
2524
2525 rport = fcport->rport;
2526 if (defer) {
67becc00 2527 base_vha = pci_get_drvdata(vha->hw->pdev);
e315cd28 2528 spin_lock_irq(vha->host->host_lock);
d97994dc 2529 fcport->drport = rport;
e315cd28 2530 spin_unlock_irq(vha->host->host_lock);
67becc00
AV		 2531 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2532 qla2xxx_wake_dpc(base_vha);
5f3a9a20 2533 } else
d97994dc 2534 fc_remote_port_delete(rport);
d97994dc
AV		 2535}
2536
1da177e4
LT		 2537/*
2538 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2539 *
2540 * Input: ha = adapter block pointer. fcport = port structure pointer.
2541 *
2542 * Return: None.
2543 *
2544 * Context:
2545 */
e315cd28 2546void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
d97994dc 2547 int do_login, int defer)
1da177e4 2548{
2c3dfe3f 2549 if (atomic_read(&fcport->state) == FCS_ONLINE &&
e315cd28
AC		 2550 vha->vp_idx == fcport->vp_idx) {
2551 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2552 qla2x00_schedule_rport_del(vha, fcport, defer);
2553 }
fa2a1ce5 2554 /*
1da177e4
LT		 2555 * We may need to retry the login, so don't change the state of the
2556 * port but do the retries.
2557 */
2558 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2559 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2560
2561 if (!do_login)
2562 return;
2563
2564 if (fcport->login_retry == 0) {
e315cd28
AC		 2565 fcport->login_retry = vha->hw->login_retry_count;
2566 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2567
2568 DEBUG(printk("scsi(%ld): Port login retry: "
2569 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2570 "id = 0x%04x retry cnt=%d\n",
e315cd28 2571 vha->host_no,
1da177e4
LT		 2572 fcport->port_name[0],
2573 fcport->port_name[1],
2574 fcport->port_name[2],
2575 fcport->port_name[3],
2576 fcport->port_name[4],
2577 fcport->port_name[5],
2578 fcport->port_name[6],
2579 fcport->port_name[7],
2580 fcport->loop_id,
2581 fcport->login_retry));
2582 }
2583}
2584
2585/*
2586 * qla2x00_mark_all_devices_lost
2587 * Updates fcport state when device goes offline.
2588 *
2589 * Input:
2590 * ha = adapter block pointer.
2591 * fcport = port structure pointer.
2592 *
2593 * Return:
2594 * None.
2595 *
2596 * Context:
2597 */
2598void
e315cd28 2599qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
1da177e4
LT		 2600{
2601 fc_port_t *fcport;
2602
e315cd28 2603 list_for_each_entry(fcport, &vha->vp_fcports, list) {
0d6e61bc 2604 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
1da177e4 2605 continue;
0d6e61bc 2606
1da177e4
LT		 2607 /*
2608 * No point in marking the device as lost, if the device is
2609 * already DEAD.
2610 */
2611 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2612 continue;
e315cd28 2613 if (atomic_read(&fcport->state) == FCS_ONLINE) {
38170fa8 2614 atomic_set(&fcport->state, FCS_DEVICE_LOST);
0d6e61bc
AV		 2615 if (defer)
2616 qla2x00_schedule_rport_del(vha, fcport, defer);
2617 else if (vha->vp_idx == fcport->vp_idx)
2618 qla2x00_schedule_rport_del(vha, fcport, defer);
2619 }
1da177e4
LT		 2620 }
2621}
2622
2623/*
2624* qla2x00_mem_alloc
2625* Allocates adapter memory.
2626*
2627* Returns:
2628* 0 = success.
e8711085 2629* !0 = failure.
1da177e4 2630*/
e8711085 2631static int
73208dfd
AC		 2632qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2633 struct req_que **req, struct rsp_que **rsp)
1da177e4
LT		 2634{
2635 char name[16];
1da177e4 2636
e8711085 2637 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
e315cd28 2638 &ha->init_cb_dma, GFP_KERNEL);
e8711085 2639 if (!ha->init_cb)
e315cd28 2640 goto fail;
e8711085 2641
e315cd28
AC		 2642 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2643 &ha->gid_list_dma, GFP_KERNEL);
2644 if (!ha->gid_list)
e8711085 2645 goto fail_free_init_cb;
1da177e4 2646
e8711085
AV		 2647 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2648 if (!ha->srb_mempool)
e315cd28 2649 goto fail_free_gid_list;
e8711085 2650
a9083016
GM		 2651 if (IS_QLA82XX(ha)) {
2652 /* Allocate cache for CT6 Ctx. */
2653 if (!ctx_cachep) {
2654 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2655 sizeof(struct ct6_dsd), 0,
2656 SLAB_HWCACHE_ALIGN, NULL);
2657 if (!ctx_cachep)
2658 goto fail_free_gid_list;
2659 }
2660 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2661 ctx_cachep);
2662 if (!ha->ctx_mempool)
2663 goto fail_free_srb_mempool;
2664 }
2665
e8711085
AV		 2666 /* Get memory for cached NVRAM */
2667 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2668 if (!ha->nvram)
a9083016 2669 goto fail_free_ctx_mempool;
e8711085 2670
e315cd28
AC		 2671 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2672 ha->pdev->device);
2673 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2674 DMA_POOL_SIZE, 8, 0);
2675 if (!ha->s_dma_pool)
2676 goto fail_free_nvram;
2677
bad75002 2678 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2679 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2680 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2681 if (!ha->dl_dma_pool) {
2682 qla_printk(KERN_WARNING, ha,
2683 "Memory Allocation failed - dl_dma_pool\n");
2684 goto fail_s_dma_pool;
2685 }
2686
2687 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2688 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2689 if (!ha->fcp_cmnd_dma_pool) {
2690 qla_printk(KERN_WARNING, ha,
2691 "Memory Allocation failed - fcp_cmnd_dma_pool\n");
2692 goto fail_dl_dma_pool;
2693 }
2694 }
2695
e8711085
AV		 2696 /* Allocate memory for SNS commands */
2697 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
e315cd28 2698 /* Get consistent memory allocated for SNS commands */
e8711085 2699 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2700 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
e8711085 2701 if (!ha->sns_cmd)
e315cd28 2702 goto fail_dma_pool;
e8711085 2703 } else {
e315cd28 2704 /* Get consistent memory allocated for MS IOCB */
e8711085 2705 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
e315cd28 2706 &ha->ms_iocb_dma);
e8711085 2707 if (!ha->ms_iocb)
e315cd28
AC		 2708 goto fail_dma_pool;
2709 /* Get consistent memory allocated for CT SNS commands */
e8711085 2710 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2711 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
e8711085
AV		 2712 if (!ha->ct_sns)
2713 goto fail_free_ms_iocb;
1da177e4
LT		 2714 }
2715
e315cd28 2716 /* Allocate memory for request ring */
73208dfd
AC		 2717 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2718 if (!*req) {
e315cd28
AC		 2719 DEBUG(printk("Unable to allocate memory for req\n"));
2720 goto fail_req;
2721 }
73208dfd
AC		 2722 (*req)->length = req_len;
2723 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2724 ((*req)->length + 1) * sizeof(request_t),
2725 &(*req)->dma, GFP_KERNEL);
2726 if (!(*req)->ring) {
e315cd28
AC		 2727 DEBUG(printk("Unable to allocate memory for req_ring\n"));
2728 goto fail_req_ring;
2729 }
2730 /* Allocate memory for response ring */
73208dfd
AC		 2731 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2732 if (!*rsp) {
2733 qla_printk(KERN_WARNING, ha,
2734 "Unable to allocate memory for rsp\n");
e315cd28
AC		 2735 goto fail_rsp;
2736 }
73208dfd
AC		 2737 (*rsp)->hw = ha;
2738 (*rsp)->length = rsp_len;
2739 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2740 ((*rsp)->length + 1) * sizeof(response_t),
2741 &(*rsp)->dma, GFP_KERNEL);
2742 if (!(*rsp)->ring) {
2743 qla_printk(KERN_WARNING, ha,
2744 "Unable to allocate memory for rsp_ring\n");
e315cd28
AC		 2745 goto fail_rsp_ring;
2746 }
73208dfd
AC		 2747 (*req)->rsp = *rsp;
2748 (*rsp)->req = *req;
2749 /* Allocate memory for NVRAM data for vports */
2750 if (ha->nvram_npiv_size) {
2751 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2752 ha->nvram_npiv_size, GFP_KERNEL);
2753 if (!ha->npiv_info) {
2754 qla_printk(KERN_WARNING, ha,
2755 "Unable to allocate memory for npiv info\n");
2756 goto fail_npiv_info;
2757 }
2758 } else
2759 ha->npiv_info = NULL;
e8711085 2760
b64b0e8f 2761 /* Get consistent memory allocated for EX-INIT-CB. */
a9083016 2762 if (IS_QLA8XXX_TYPE(ha)) {
b64b0e8f
AV		 2763 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2764 &ha->ex_init_cb_dma);
2765 if (!ha->ex_init_cb)
2766 goto fail_ex_init_cb;
2767 }
2768
a9083016
GM		 2769 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2770
5ff1d584
AV		 2771 /* Get consistent memory allocated for Async Port-Database. */
2772 if (!IS_FWI2_CAPABLE(ha)) {
2773 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2774 &ha->async_pd_dma);
2775 if (!ha->async_pd)
2776 goto fail_async_pd;
2777 }
2778
e315cd28
AC		 2779 INIT_LIST_HEAD(&ha->vp_list);
2780 return 1;
2781
5ff1d584
AV		 2782fail_async_pd:
2783 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f
AV		 2784fail_ex_init_cb:
2785 kfree(ha->npiv_info);
73208dfd
AC		 2786fail_npiv_info:
2787 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2788 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2789 (*rsp)->ring = NULL;
2790 (*rsp)->dma = 0;
e315cd28 2791fail_rsp_ring:
73208dfd 2792 kfree(*rsp);
e315cd28 2793fail_rsp:
73208dfd
AC		 2794 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2795 sizeof(request_t), (*req)->ring, (*req)->dma);
2796 (*req)->ring = NULL;
2797 (*req)->dma = 0;
e315cd28 2798fail_req_ring:
73208dfd 2799 kfree(*req);
e315cd28
AC		 2800fail_req:
2801 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2802 ha->ct_sns, ha->ct_sns_dma);
2803 ha->ct_sns = NULL;
2804 ha->ct_sns_dma = 0;
e8711085
AV		 2805fail_free_ms_iocb:
2806 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2807 ha->ms_iocb = NULL;
2808 ha->ms_iocb_dma = 0;
e315cd28 2809fail_dma_pool:
bad75002 2810 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2811 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2812 ha->fcp_cmnd_dma_pool = NULL;
2813 }
2814fail_dl_dma_pool:
bad75002 2815 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2816 dma_pool_destroy(ha->dl_dma_pool);
2817 ha->dl_dma_pool = NULL;
2818 }
2819fail_s_dma_pool:
e315cd28
AC		 2820 dma_pool_destroy(ha->s_dma_pool);
2821 ha->s_dma_pool = NULL;
e8711085
AV		 2822fail_free_nvram:
2823 kfree(ha->nvram);
2824 ha->nvram = NULL;
a9083016
GM		 2825fail_free_ctx_mempool:
2826 mempool_destroy(ha->ctx_mempool);
2827 ha->ctx_mempool = NULL;
e8711085
AV		 2828fail_free_srb_mempool:
2829 mempool_destroy(ha->srb_mempool);
2830 ha->srb_mempool = NULL;
e8711085
AV		 2831fail_free_gid_list:
2832 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2833 ha->gid_list_dma);
e8711085
AV		 2834 ha->gid_list = NULL;
2835 ha->gid_list_dma = 0;
e315cd28
AC		 2836fail_free_init_cb:
2837 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
2838 ha->init_cb_dma);
2839 ha->init_cb = NULL;
2840 ha->init_cb_dma = 0;
e8711085 2841fail:
e315cd28 2842 DEBUG(printk("%s: Memory allocation failure\n", __func__));
e8711085 2843 return -ENOMEM;
1da177e4
LT		 2844}
2845
2846/*
e30d1756
MI		 2847* qla2x00_free_fw_dump
2848* Frees fw dump stuff.
1da177e4
LT		 2849*
2850* Input:
e30d1756 2851* ha = adapter block pointer.
1da177e4 2852*/
a824ebb3 2853static void
e30d1756 2854qla2x00_free_fw_dump(struct qla_hw_data *ha)
1da177e4 2855{
df613b96
AV		 2856 if (ha->fce)
2857 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
e30d1756 2858 ha->fce_dma);
df613b96 2859
a7a167bf
AV		 2860 if (ha->fw_dump) {
2861 if (ha->eft)
2862 dma_free_coherent(&ha->pdev->dev,
e30d1756 2863 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
a7a167bf
AV		 2864 vfree(ha->fw_dump);
2865 }
e30d1756
MI		 2866 ha->fce = NULL;
2867 ha->fce_dma = 0;
2868 ha->eft = NULL;
2869 ha->eft_dma = 0;
2870 ha->fw_dump = NULL;
2871 ha->fw_dumped = 0;
2872 ha->fw_dump_reading = 0;
2873}
2874
2875/*
2876* qla2x00_mem_free
2877* Frees all adapter allocated memory.
2878*
2879* Input:
2880* ha = adapter block pointer.
2881*/
2882static void
2883qla2x00_mem_free(struct qla_hw_data *ha)
2884{
2885 qla2x00_free_fw_dump(ha);
2886
2887 if (ha->srb_mempool)
2888 mempool_destroy(ha->srb_mempool);
a7a167bf 2889
11bbc1d8
AV		 2890 if (ha->dcbx_tlv)
2891 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
2892 ha->dcbx_tlv, ha->dcbx_tlv_dma);
2893
ce0423f4
AV		 2894 if (ha->xgmac_data)
2895 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
2896 ha->xgmac_data, ha->xgmac_data_dma);
2897
1da177e4
LT		 2898 if (ha->sns_cmd)
2899 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
e315cd28 2900 ha->sns_cmd, ha->sns_cmd_dma);
1da177e4
LT		 2901
2902 if (ha->ct_sns)
2903 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
e315cd28 2904 ha->ct_sns, ha->ct_sns_dma);
1da177e4 2905
88729e53
AV		 2906 if (ha->sfp_data)
2907 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
2908
ad0ecd61
JC		 2909 if (ha->edc_data)
2910 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
2911
1da177e4
LT		 2912 if (ha->ms_iocb)
2913 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2914
b64b0e8f 2915 if (ha->ex_init_cb)
a9083016
GM		 2916 dma_pool_free(ha->s_dma_pool,
2917 ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f 2918
5ff1d584
AV		 2919 if (ha->async_pd)
2920 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
2921
1da177e4
LT		 2922 if (ha->s_dma_pool)
2923 dma_pool_destroy(ha->s_dma_pool);
2924
1da177e4
LT		 2925 if (ha->gid_list)
2926 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2927 ha->gid_list_dma);
1da177e4 2928
a9083016
GM		 2929 if (IS_QLA82XX(ha)) {
2930 if (!list_empty(&ha->gbl_dsd_list)) {
2931 struct dsd_dma *dsd_ptr, *tdsd_ptr;
2932
2933 /* clean up allocated prev pool */
2934 list_for_each_entry_safe(dsd_ptr,
2935 tdsd_ptr, &ha->gbl_dsd_list, list) {
2936 dma_pool_free(ha->dl_dma_pool,
2937 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
2938 list_del(&dsd_ptr->list);
2939 kfree(dsd_ptr);
2940 }
2941 }
2942 }
2943
2944 if (ha->dl_dma_pool)
2945 dma_pool_destroy(ha->dl_dma_pool);
2946
2947 if (ha->fcp_cmnd_dma_pool)
2948 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2949
2950 if (ha->ctx_mempool)
2951 mempool_destroy(ha->ctx_mempool);
2952
e315cd28
AC		 2953 if (ha->init_cb)
2954 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
a9083016 2955 ha->init_cb, ha->init_cb_dma);
e315cd28
AC		 2956 vfree(ha->optrom_buffer);
2957 kfree(ha->nvram);
73208dfd 2958 kfree(ha->npiv_info);
1da177e4 2959
e8711085 2960 ha->srb_mempool = NULL;
a9083016 2961 ha->ctx_mempool = NULL;
1da177e4
LT		 2962 ha->sns_cmd = NULL;
2963 ha->sns_cmd_dma = 0;
2964 ha->ct_sns = NULL;
2965 ha->ct_sns_dma = 0;
2966 ha->ms_iocb = NULL;
2967 ha->ms_iocb_dma = 0;
1da177e4
LT		 2968 ha->init_cb = NULL;
2969 ha->init_cb_dma = 0;
b64b0e8f
AV		 2970 ha->ex_init_cb = NULL;
2971 ha->ex_init_cb_dma = 0;
5ff1d584
AV		 2972 ha->async_pd = NULL;
2973 ha->async_pd_dma = 0;
1da177e4
LT		 2974
2975 ha->s_dma_pool = NULL;
a9083016
GM		 2976 ha->dl_dma_pool = NULL;
2977 ha->fcp_cmnd_dma_pool = NULL;
1da177e4 2978
1da177e4
LT		 2979 ha->gid_list = NULL;
2980 ha->gid_list_dma = 0;
e315cd28 2981}
1da177e4 2982
e315cd28
AC		 2983struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
2984 struct qla_hw_data *ha)
2985{
2986 struct Scsi_Host *host;
2987 struct scsi_qla_host *vha = NULL;
854165f4 2988
e315cd28
AC		 2989 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
2990 if (host == NULL) {
2991 printk(KERN_WARNING
2992 "qla2xxx: Couldn't allocate host from scsi layer!\n");
2993 goto fail;
2994 }
2995
2996 /* Clear our data area */
2997 vha = shost_priv(host);
2998 memset(vha, 0, sizeof(scsi_qla_host_t));
2999
3000 vha->host = host;
3001 vha->host_no = host->host_no;
3002 vha->hw = ha;
3003
3004 INIT_LIST_HEAD(&vha->vp_fcports);
3005 INIT_LIST_HEAD(&vha->work_list);
3006 INIT_LIST_HEAD(&vha->list);
3007
f999f4c1
AV		 3008 spin_lock_init(&vha->work_lock);
3009
e315cd28
AC		 3010 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3011 return vha;
3012
3013fail:
3014 return vha;
1da177e4
LT		 3015}
3016
01ef66bb 3017static struct qla_work_evt *
f999f4c1 3018qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
0971de7f
AV		 3019{
3020 struct qla_work_evt *e;
feafb7b1
AE		 3021 uint8_t bail;
3022
3023 QLA_VHA_MARK_BUSY(vha, bail);
3024 if (bail)
3025 return NULL;
0971de7f 3026
f999f4c1 3027 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
feafb7b1
AE		 3028 if (!e) {
3029 QLA_VHA_MARK_NOT_BUSY(vha);
0971de7f 3030 return NULL;
feafb7b1 3031 }
0971de7f
AV		 3032
3033 INIT_LIST_HEAD(&e->list);
3034 e->type = type;
3035 e->flags = QLA_EVT_FLAG_FREE;
3036 return e;
3037}
3038
01ef66bb 3039static int
f999f4c1 3040qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
0971de7f 3041{
f999f4c1 3042 unsigned long flags;
0971de7f 3043
f999f4c1 3044 spin_lock_irqsave(&vha->work_lock, flags);
e315cd28 3045 list_add_tail(&e->list, &vha->work_list);
f999f4c1 3046 spin_unlock_irqrestore(&vha->work_lock, flags);
e315cd28 3047 qla2xxx_wake_dpc(vha);
f999f4c1 3048
0971de7f
AV		 3049 return QLA_SUCCESS;
3050}
3051
3052int
e315cd28 3053qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
0971de7f
AV		 3054 u32 data)
3055{
3056 struct qla_work_evt *e;
3057
f999f4c1 3058 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
0971de7f
AV		 3059 if (!e)
3060 return QLA_FUNCTION_FAILED;
3061
3062 e->u.aen.code = code;
3063 e->u.aen.data = data;
f999f4c1 3064 return qla2x00_post_work(vha, e);
0971de7f
AV		 3065}
3066
8a659571
AV		 3067int
3068qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3069{
3070 struct qla_work_evt *e;
3071
f999f4c1 3072 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
8a659571
AV		 3073 if (!e)
3074 return QLA_FUNCTION_FAILED;
3075
3076 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
f999f4c1 3077 return qla2x00_post_work(vha, e);
8a659571
AV		 3078}
3079
ac280b67
AV		 3080#define qla2x00_post_async_work(name, type) \
3081int qla2x00_post_async_##name##_work( \
3082 struct scsi_qla_host *vha, \
3083 fc_port_t *fcport, uint16_t *data) \
3084{ \
3085 struct qla_work_evt *e; \
3086 \
3087 e = qla2x00_alloc_work(vha, type); \
3088 if (!e) \
3089 return QLA_FUNCTION_FAILED; \
3090 \
3091 e->u.logio.fcport = fcport; \
3092 if (data) { \
3093 e->u.logio.data[0] = data[0]; \
3094 e->u.logio.data[1] = data[1]; \
3095 } \
3096 return qla2x00_post_work(vha, e); \
3097}
3098
3099qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3100qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3101qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3102qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
5ff1d584
AV		 3103qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3104qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
ac280b67 3105
3420d36c
AV		 3106int
3107qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3108{
3109 struct qla_work_evt *e;
3110
3111 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3112 if (!e)
3113 return QLA_FUNCTION_FAILED;
3114
3115 e->u.uevent.code = code;
3116 return qla2x00_post_work(vha, e);
3117}
3118
3119static void
3120qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3121{
3122 char event_string[40];
3123 char *envp[] = { event_string, NULL };
3124
3125 switch (code) {
3126 case QLA_UEVENT_CODE_FW_DUMP:
3127 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3128 vha->host_no);
3129 break;
3130 default:
3131 /* do nothing */
3132 break;
3133 }
3134 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3135}
3136
ac280b67 3137void
e315cd28 3138qla2x00_do_work(struct scsi_qla_host *vha)
0971de7f 3139{
f999f4c1
AV		 3140 struct qla_work_evt *e, *tmp;
3141 unsigned long flags;
3142 LIST_HEAD(work);
0971de7f 3143
f999f4c1
AV		 3144 spin_lock_irqsave(&vha->work_lock, flags);
3145 list_splice_init(&vha->work_list, &work);
3146 spin_unlock_irqrestore(&vha->work_lock, flags);
3147
3148 list_for_each_entry_safe(e, tmp, &work, list) {
0971de7f 3149 list_del_init(&e->list);
0971de7f
AV		 3150
3151 switch (e->type) {
3152 case QLA_EVT_AEN:
e315cd28 3153 fc_host_post_event(vha->host, fc_get_event_number(),
0971de7f
AV		 3154 e->u.aen.code, e->u.aen.data);
3155 break;
8a659571
AV		 3156 case QLA_EVT_IDC_ACK:
3157 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3158 break;
ac280b67
AV		 3159 case QLA_EVT_ASYNC_LOGIN:
3160 qla2x00_async_login(vha, e->u.logio.fcport,
3161 e->u.logio.data);
3162 break;
3163 case QLA_EVT_ASYNC_LOGIN_DONE:
3164 qla2x00_async_login_done(vha, e->u.logio.fcport,
3165 e->u.logio.data);
3166 break;
3167 case QLA_EVT_ASYNC_LOGOUT:
3168 qla2x00_async_logout(vha, e->u.logio.fcport);
3169 break;
3170 case QLA_EVT_ASYNC_LOGOUT_DONE:
3171 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3172 e->u.logio.data);
3173 break;
5ff1d584
AV		 3174 case QLA_EVT_ASYNC_ADISC:
3175 qla2x00_async_adisc(vha, e->u.logio.fcport,
3176 e->u.logio.data);
3177 break;
3178 case QLA_EVT_ASYNC_ADISC_DONE:
3179 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3180 e->u.logio.data);
3181 break;
3420d36c
AV		 3182 case QLA_EVT_UEVENT:
3183 qla2x00_uevent_emit(vha, e->u.uevent.code);
3184 break;
0971de7f
AV		 3185 }
3186 if (e->flags & QLA_EVT_FLAG_FREE)
3187 kfree(e);
feafb7b1
AE		 3188
3189 /* For each work completed decrement vha ref count */
3190 QLA_VHA_MARK_NOT_BUSY(vha);
e315cd28 3191 }
e315cd28 3192}
f999f4c1 3193
e315cd28
AC		 3194/* Relogins all the fcports of a vport
3195 * Context: dpc thread
3196 */
3197void qla2x00_relogin(struct scsi_qla_host *vha)
3198{
3199 fc_port_t *fcport;
c6b2fca8 3200 int status;
e315cd28
AC		 3201 uint16_t next_loopid = 0;
3202 struct qla_hw_data *ha = vha->hw;
ac280b67 3203 uint16_t data[2];
e315cd28
AC		 3204
3205 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3206 /*
3207 * If the port is not ONLINE then try to login
3208 * to it if we haven't run out of retries.
3209 */
5ff1d584
AV		 3210 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3211 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
ac280b67 3212 fcport->login_retry--;
e315cd28 3213 if (fcport->flags & FCF_FABRIC_DEVICE) {
f08b7251 3214 if (fcport->flags & FCF_FCP2_DEVICE)
e315cd28
AC		 3215 ha->isp_ops->fabric_logout(vha,
3216 fcport->loop_id,
3217 fcport->d_id.b.domain,
3218 fcport->d_id.b.area,
3219 fcport->d_id.b.al_pa);
3220
ac280b67 3221 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584 3222 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3223 data[0] = 0;
3224 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3225 status = qla2x00_post_async_login_work(
3226 vha, fcport, data);
3227 if (status == QLA_SUCCESS)
3228 continue;
3229 /* Attempt a retry. */
3230 status = 1;
3231 } else
3232 status = qla2x00_fabric_login(vha,
3233 fcport, &next_loopid);
e315cd28
AC		 3234 } else
3235 status = qla2x00_local_device_login(vha,
3236 fcport);
3237
e315cd28
AC		 3238 if (status == QLA_SUCCESS) {
3239 fcport->old_loop_id = fcport->loop_id;
3240
3241 DEBUG(printk("scsi(%ld): port login OK: logged "
3242 "in ID 0x%x\n", vha->host_no, fcport->loop_id));
3243
3244 qla2x00_update_fcport(vha, fcport);
3245
3246 } else if (status == 1) {
3247 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3248 /* retry the login again */
3249 DEBUG(printk("scsi(%ld): Retrying"
3250 " %d login again loop_id 0x%x\n",
3251 vha->host_no, fcport->login_retry,
3252 fcport->loop_id));
3253 } else {
3254 fcport->login_retry = 0;
3255 }
3256
3257 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3258 fcport->loop_id = FC_NO_LOOP_ID;
3259 }
3260 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3261 break;
0971de7f 3262 }
0971de7f
AV		 3263}
3264
1da177e4
LT		 3265/**************************************************************************
3266* qla2x00_do_dpc
3267* This kernel thread is a task that is schedule by the interrupt handler
3268* to perform the background processing for interrupts.
3269*
3270* Notes:
3271* This task always run in the context of a kernel thread. It
3272* is kick-off by the driver's detect code and starts up
3273* up one per adapter. It immediately goes to sleep and waits for
3274* some fibre event. When either the interrupt handler or
3275* the timer routine detects a event it will one of the task
3276* bits then wake us up.
3277**************************************************************************/
3278static int
3279qla2x00_do_dpc(void *data)
3280{
2c3dfe3f 3281 int rval;
e315cd28
AC		 3282 scsi_qla_host_t *base_vha;
3283 struct qla_hw_data *ha;
1da177e4 3284
e315cd28
AC		 3285 ha = (struct qla_hw_data *)data;
3286 base_vha = pci_get_drvdata(ha->pdev);
1da177e4 3287
1da177e4
LT		 3288 set_user_nice(current, -20);
3289
39a11240 3290 while (!kthread_should_stop()) {
1da177e4
LT		 3291 DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
3292
39a11240
CH		 3293 set_current_state(TASK_INTERRUPTIBLE);
3294 schedule();
3295 __set_current_state(TASK_RUNNING);
1da177e4
LT		 3296
3297 DEBUG3(printk("qla2x00: DPC handler waking up\n"));
3298
3299 /* Initialization not yet finished. Don't do anything yet. */
e315cd28 3300 if (!base_vha->flags.init_done)
1da177e4
LT		 3301 continue;
3302
85880801
AV		 3303 if (ha->flags.eeh_busy) {
3304 DEBUG17(qla_printk(KERN_WARNING, ha,
3305 "qla2x00_do_dpc: dpc_flags: %lx\n",
3306 base_vha->dpc_flags));
3307 continue;
3308 }
3309
e315cd28 3310 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
1da177e4
LT		 3311
3312 ha->dpc_active = 1;
3313
1da177e4 3314 if (ha->flags.mbox_busy) {
1da177e4
LT		 3315 ha->dpc_active = 0;
3316 continue;
3317 }
3318
e315cd28 3319 qla2x00_do_work(base_vha);
0971de7f 3320
a9083016
GM		 3321 if (IS_QLA82XX(ha)) {
3322 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3323 &base_vha->dpc_flags)) {
3324 qla82xx_idc_lock(ha);
3325 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3326 QLA82XX_DEV_FAILED);
3327 qla82xx_idc_unlock(ha);
3328 qla_printk(KERN_INFO, ha,
3329 "HW State: FAILED\n");
3330 qla82xx_device_state_handler(base_vha);
3331 continue;
3332 }
3333
3334 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3335 &base_vha->dpc_flags)) {
3336
3337 DEBUG(printk(KERN_INFO
3338 "scsi(%ld): dpc: sched "
3339 "qla82xx_fcoe_ctx_reset ha = %p\n",
3340 base_vha->host_no, ha));
3341 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3342 &base_vha->dpc_flags))) {
3343 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3344 /* FCoE-ctx reset failed.
3345 * Escalate to chip-reset
3346 */
3347 set_bit(ISP_ABORT_NEEDED,
3348 &base_vha->dpc_flags);
3349 }
3350 clear_bit(ABORT_ISP_ACTIVE,
3351 &base_vha->dpc_flags);
3352 }
3353
3354 DEBUG(printk("scsi(%ld): dpc:"
3355 " qla82xx_fcoe_ctx_reset end\n",
3356 base_vha->host_no));
3357 }
3358 }
3359
e315cd28
AC		 3360 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3361 &base_vha->dpc_flags)) {
1da177e4
LT		 3362
3363 DEBUG(printk("scsi(%ld): dpc: sched "
3364 "qla2x00_abort_isp ha = %p\n",
e315cd28 3365 base_vha->host_no, ha));
1da177e4 3366 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
e315cd28 3367 &base_vha->dpc_flags))) {
1da177e4 3368
a9083016 3369 if (ha->isp_ops->abort_isp(base_vha)) {
1da177e4
LT		 3370 /* failed. retry later */
3371 set_bit(ISP_ABORT_NEEDED,
e315cd28 3372 &base_vha->dpc_flags);
99363ef8 3373 }
e315cd28
AC		 3374 clear_bit(ABORT_ISP_ACTIVE,
3375 &base_vha->dpc_flags);
99363ef8
SJ		 3376 }
3377
1da177e4 3378 DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
e315cd28 3379 base_vha->host_no));
1da177e4
LT		 3380 }
3381
e315cd28
AC		 3382 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3383 qla2x00_update_fcports(base_vha);
3384 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
c9c5ced9 3385 }
d97994dc 3386
e315cd28
AC		 3387 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3388 &base_vha->dpc_flags) &&
3389 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
1da177e4
LT		 3390
3391 DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
e315cd28 3392 base_vha->host_no));
1da177e4 3393
e315cd28
AC		 3394 qla2x00_rst_aen(base_vha);
3395 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
1da177e4
LT		 3396 }
3397
3398 /* Retry each device up to login retry count */
e315cd28
AC		 3399 if ((test_and_clear_bit(RELOGIN_NEEDED,
3400 &base_vha->dpc_flags)) &&
3401 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3402 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
1da177e4
LT		 3403
3404 DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
e315cd28
AC		 3405 base_vha->host_no));
3406 qla2x00_relogin(base_vha);
3407
1da177e4 3408 DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
e315cd28 3409 base_vha->host_no));
1da177e4
LT		 3410 }
3411
e315cd28
AC		 3412 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3413 &base_vha->dpc_flags)) {
1da177e4
LT		 3414
3415 DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
e315cd28 3416 base_vha->host_no));
1da177e4
LT		 3417
3418 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
e315cd28 3419 &base_vha->dpc_flags))) {
1da177e4 3420
e315cd28 3421 rval = qla2x00_loop_resync(base_vha);
1da177e4 3422
e315cd28
AC		 3423 clear_bit(LOOP_RESYNC_ACTIVE,
3424 &base_vha->dpc_flags);
1da177e4
LT		 3425 }
3426
3427 DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
e315cd28 3428 base_vha->host_no));
1da177e4
LT		 3429 }
3430
e315cd28
AC		 3431 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3432 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3433 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3434 qla2xxx_flash_npiv_conf(base_vha);
272976ca
AV		 3435 }
3436
1da177e4 3437 if (!ha->interrupts_on)
fd34f556 3438 ha->isp_ops->enable_intrs(ha);
1da177e4 3439
e315cd28
AC		 3440 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3441 &base_vha->dpc_flags))
3442 ha->isp_ops->beacon_blink(base_vha);
f6df144c 3443
e315cd28 3444 qla2x00_do_dpc_all_vps(base_vha);
2c3dfe3f 3445
1da177e4
LT		 3446 ha->dpc_active = 0;
3447 } /* End of while(1) */
3448
e315cd28 3449 DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
1da177e4
LT		 3450
3451 /*
3452 * Make sure that nobody tries to wake us up again.
3453 */
1da177e4
LT		 3454 ha->dpc_active = 0;
3455
ac280b67
AV		 3456 /* Cleanup any residual CTX SRBs. */
3457 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3458
39a11240
CH		 3459 return 0;
3460}
3461
3462void
e315cd28 3463qla2xxx_wake_dpc(struct scsi_qla_host *vha)
39a11240 3464{
e315cd28 3465 struct qla_hw_data *ha = vha->hw;
c795c1e4
AV		 3466 struct task_struct *t = ha->dpc_thread;
3467
e315cd28 3468 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
c795c1e4 3469 wake_up_process(t);
1da177e4
LT		 3470}
3471
1da177e4
LT		 3472/*
3473* qla2x00_rst_aen
3474* Processes asynchronous reset.
3475*
3476* Input:
3477* ha = adapter block pointer.
3478*/
3479static void
e315cd28 3480qla2x00_rst_aen(scsi_qla_host_t *vha)
1da177e4 3481{
e315cd28
AC		 3482 if (vha->flags.online && !vha->flags.reset_active &&
3483 !atomic_read(&vha->loop_down_timer) &&
3484 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
1da177e4 3485 do {
e315cd28 3486 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3487
3488 /*
3489 * Issue marker command only when we are going to start
3490 * the I/O.
3491 */
e315cd28
AC		 3492 vha->marker_needed = 1;
3493 } while (!atomic_read(&vha->loop_down_timer) &&
3494 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
1da177e4
LT		 3495 }
3496}
3497
f4f051eb 3498static void
e315cd28 3499qla2x00_sp_free_dma(srb_t *sp)
f4f051eb
AV		 3500{
3501 struct scsi_cmnd *cmd = sp->cmd;
bad75002 3502 struct qla_hw_data *ha = sp->fcport->vha->hw;
f4f051eb
AV		 3503
3504 if (sp->flags & SRB_DMA_VALID) {
385d70b4 3505 scsi_dma_unmap(cmd);
f4f051eb
AV		 3506 sp->flags &= ~SRB_DMA_VALID;
3507 }
bad75002
AE		 3508
3509 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3510 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3511 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3512 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3513 }
3514
3515 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3516 /* List assured to be having elements */
3517 qla2x00_clean_dsd_pool(ha, sp);
3518 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3519 }
3520
3521 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3522 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3523 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3524 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3525 }
3526
fca29703 3527 CMD_SP(cmd) = NULL;
f4f051eb
AV		 3528}
3529
3dbe756a 3530static void
083a469d 3531qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
f4f051eb
AV		 3532{
3533 struct scsi_cmnd *cmd = sp->cmd;
3534
e315cd28 3535 qla2x00_sp_free_dma(sp);
f4f051eb 3536
a9083016
GM		 3537 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3538 struct ct6_dsd *ctx = sp->ctx;
3539 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3540 ctx->fcp_cmnd_dma);
3541 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3542 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3543 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3544 mempool_free(sp->ctx, ha->ctx_mempool);
3545 sp->ctx = NULL;
3546 }
f4f051eb 3547
a9083016 3548 mempool_free(sp, ha->srb_mempool);
f4f051eb
AV		 3549 cmd->scsi_done(cmd);
3550}
bdf79621 3551
083a469d
GM		 3552void
3553qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3554{
3555 if (atomic_read(&sp->ref_count) == 0) {
3556 DEBUG2(qla_printk(KERN_WARNING, ha,
3557 "SP reference-count to ZERO -- sp=%p\n", sp));
3558 DEBUG2(BUG());
3559 return;
3560 }
3561 if (!atomic_dec_and_test(&sp->ref_count))
3562 return;
3563 qla2x00_sp_final_compl(ha, sp);
3564}
3565
1da177e4
LT		 3566/**************************************************************************
3567* qla2x00_timer
3568*
3569* Description:
3570* One second timer
3571*
3572* Context: Interrupt
3573***************************************************************************/
2c3dfe3f 3574void
e315cd28 3575qla2x00_timer(scsi_qla_host_t *vha)
1da177e4 3576{
1da177e4 3577 unsigned long cpu_flags = 0;
1da177e4
LT		 3578 int start_dpc = 0;
3579 int index;
3580 srb_t *sp;
85880801 3581 uint16_t w;
e315cd28 3582 struct qla_hw_data *ha = vha->hw;
73208dfd 3583 struct req_que *req;
85880801 3584
a5b36321
LC		 3585 if (ha->flags.eeh_busy) {
3586 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3587 return;
3588 }
3589
a9083016
GM		 3590 if (IS_QLA82XX(ha))
3591 qla82xx_watchdog(vha);
3592
85880801
AV		 3593 /* Hardware read to raise pending EEH errors during mailbox waits. */
3594 if (!pci_channel_offline(ha->pdev))
3595 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
1da177e4
LT		 3596
3597 /* Loop down handler. */
e315cd28
AC		 3598 if (atomic_read(&vha->loop_down_timer) > 0 &&
3599 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
3600 && vha->flags.online) {
1da177e4 3601
e315cd28
AC		 3602 if (atomic_read(&vha->loop_down_timer) ==
3603 vha->loop_down_abort_time) {
1da177e4
LT		 3604
3605 DEBUG(printk("scsi(%ld): Loop Down - aborting the "
3606 "queues before time expire\n",
e315cd28 3607 vha->host_no));
1da177e4 3608
e315cd28
AC		 3609 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3610 atomic_set(&vha->loop_state, LOOP_DEAD);
1da177e4 3611
f08b7251
AV		 3612 /*
3613 * Schedule an ISP abort to return any FCP2-device
3614 * commands.
3615 */
2c3dfe3f 3616 /* NPIV - scan physical port only */
e315cd28 3617 if (!vha->vp_idx) {
2c3dfe3f
SJ		 3618 spin_lock_irqsave(&ha->hardware_lock,
3619 cpu_flags);
73208dfd 3620 req = ha->req_q_map[0];
2c3dfe3f
SJ		 3621 for (index = 1;
3622 index < MAX_OUTSTANDING_COMMANDS;
3623 index++) {
3624 fc_port_t *sfcp;
3625
e315cd28 3626 sp = req->outstanding_cmds[index];
2c3dfe3f
SJ		 3627 if (!sp)
3628 continue;
bad75002 3629 if (sp->ctx && !IS_PROT_IO(sp))
cf53b069 3630 continue;
2c3dfe3f 3631 sfcp = sp->fcport;
f08b7251 3632 if (!(sfcp->flags & FCF_FCP2_DEVICE))
2c3dfe3f 3633 continue;
bdf79621 3634
2c3dfe3f 3635 set_bit(ISP_ABORT_NEEDED,
e315cd28 3636 &vha->dpc_flags);
2c3dfe3f
SJ		 3637 break;
3638 }
3639 spin_unlock_irqrestore(&ha->hardware_lock,
e315cd28 3640 cpu_flags);
1da177e4 3641 }
1da177e4
LT		 3642 start_dpc++;
3643 }
3644
3645 /* if the loop has been down for 4 minutes, reinit adapter */
e315cd28 3646 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
0d6e61bc 3647 if (!(vha->device_flags & DFLG_NO_CABLE)) {
1da177e4
LT		 3648 DEBUG(printk("scsi(%ld): Loop down - "
3649 "aborting ISP.\n",
e315cd28 3650 vha->host_no));
1da177e4
LT		 3651 qla_printk(KERN_WARNING, ha,
3652 "Loop down - aborting ISP.\n");
3653
e315cd28 3654 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3655 }
3656 }
fca29703 3657 DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
e315cd28
AC		 3658 vha->host_no,
3659 atomic_read(&vha->loop_down_timer)));
1da177e4
LT		 3660 }
3661
f6df144c
AV		 3662 /* Check if beacon LED needs to be blinked */
3663 if (ha->beacon_blink_led == 1) {
e315cd28 3664 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
f6df144c
AV		 3665 start_dpc++;
3666 }
3667
550bf57d 3668 /* Process any deferred work. */
e315cd28 3669 if (!list_empty(&vha->work_list))
550bf57d
AV		 3670 start_dpc++;
3671
1da177e4 3672 /* Schedule the DPC routine if needed */
e315cd28
AC		 3673 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3674 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3675 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
1da177e4 3676 start_dpc ||
e315cd28
AC		 3677 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3678 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
a9083016
GM		 3679 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3680 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
e315cd28
AC		 3681 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3682 test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
3683 qla2xxx_wake_dpc(vha);
1da177e4 3684
e315cd28 3685 qla2x00_restart_timer(vha, WATCH_INTERVAL);
1da177e4
LT		 3686}
3687
5433383e
AV		 3688/* Firmware interface routines. */
3689
a9083016 3690#define FW_BLOBS 8
5433383e
AV		 3691#define FW_ISP21XX 0
3692#define FW_ISP22XX 1
3693#define FW_ISP2300 2
3694#define FW_ISP2322 3
48c02fde 3695#define FW_ISP24XX 4
c3a2f0df 3696#define FW_ISP25XX 5
3a03eb79 3697#define FW_ISP81XX 6
a9083016 3698#define FW_ISP82XX 7
5433383e 3699
bb8ee499
AV		 3700#define FW_FILE_ISP21XX "ql2100_fw.bin"
3701#define FW_FILE_ISP22XX "ql2200_fw.bin"
3702#define FW_FILE_ISP2300 "ql2300_fw.bin"
3703#define FW_FILE_ISP2322 "ql2322_fw.bin"
3704#define FW_FILE_ISP24XX "ql2400_fw.bin"
c3a2f0df 3705#define FW_FILE_ISP25XX "ql2500_fw.bin"
3a03eb79 3706#define FW_FILE_ISP81XX "ql8100_fw.bin"
a9083016 3707#define FW_FILE_ISP82XX "ql8200_fw.bin"
bb8ee499 3708
e1e82b6f 3709static DEFINE_MUTEX(qla_fw_lock);
5433383e
AV		 3710
3711static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
bb8ee499
AV		 3712 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3713 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3714 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3715 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3716 { .name = FW_FILE_ISP24XX, },
c3a2f0df 3717 { .name = FW_FILE_ISP25XX, },
3a03eb79 3718 { .name = FW_FILE_ISP81XX, },
a9083016 3719 { .name = FW_FILE_ISP82XX, },
5433383e
AV		 3720};
3721
3722struct fw_blob *
e315cd28 3723qla2x00_request_firmware(scsi_qla_host_t *vha)
5433383e 3724{
e315cd28 3725 struct qla_hw_data *ha = vha->hw;
5433383e
AV		 3726 struct fw_blob *blob;
3727
3728 blob = NULL;
3729 if (IS_QLA2100(ha)) {
3730 blob = &qla_fw_blobs[FW_ISP21XX];
3731 } else if (IS_QLA2200(ha)) {
3732 blob = &qla_fw_blobs[FW_ISP22XX];
48c02fde 3733 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5433383e 3734 blob = &qla_fw_blobs[FW_ISP2300];
48c02fde 3735 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5433383e 3736 blob = &qla_fw_blobs[FW_ISP2322];
4d4df193 3737 } else if (IS_QLA24XX_TYPE(ha)) {
5433383e 3738 blob = &qla_fw_blobs[FW_ISP24XX];
c3a2f0df
AV		 3739 } else if (IS_QLA25XX(ha)) {
3740 blob = &qla_fw_blobs[FW_ISP25XX];
3a03eb79
AV		 3741 } else if (IS_QLA81XX(ha)) {
3742 blob = &qla_fw_blobs[FW_ISP81XX];
a9083016
GM		 3743 } else if (IS_QLA82XX(ha)) {
3744 blob = &qla_fw_blobs[FW_ISP82XX];
5433383e
AV		 3745 }
3746
e1e82b6f 3747 mutex_lock(&qla_fw_lock);
5433383e
AV		 3748 if (blob->fw)
3749 goto out;
3750
3751 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
3752 DEBUG2(printk("scsi(%ld): Failed to load firmware image "
e315cd28 3753 "(%s).\n", vha->host_no, blob->name));
5433383e
AV		 3754 blob->fw = NULL;
3755 blob = NULL;
3756 goto out;
3757 }
3758
3759out:
e1e82b6f 3760 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3761 return blob;
3762}
3763
3764static void
3765qla2x00_release_firmware(void)
3766{
3767 int idx;
3768
e1e82b6f 3769 mutex_lock(&qla_fw_lock);
5433383e
AV		 3770 for (idx = 0; idx < FW_BLOBS; idx++)
3771 if (qla_fw_blobs[idx].fw)
3772 release_firmware(qla_fw_blobs[idx].fw);
e1e82b6f 3773 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3774}
3775
14e660e6
SJ		 3776static pci_ers_result_t
3777qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3778{
85880801
AV		 3779 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3780 struct qla_hw_data *ha = vha->hw;
3781
3782 DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
3783 state));
b9b12f73 3784
14e660e6
SJ		 3785 switch (state) {
3786 case pci_channel_io_normal:
85880801 3787 ha->flags.eeh_busy = 0;
14e660e6
SJ		 3788 return PCI_ERS_RESULT_CAN_RECOVER;
3789 case pci_channel_io_frozen:
85880801 3790 ha->flags.eeh_busy = 1;
a5b36321
LC		 3791 /* For ISP82XX complete any pending mailbox cmd */
3792 if (IS_QLA82XX(ha)) {
3793 ha->flags.fw_hung = 1;
3794 if (ha->flags.mbox_busy) {
3795 ha->flags.mbox_int = 1;
3796 DEBUG2(qla_printk(KERN_ERR, ha,
3797 "Due to pci channel io frozen, doing premature "
3798 "completion of mbx command\n"));
3799 complete(&ha->mbx_intr_comp);
3800 }
3801 }
90a86fc0 3802 qla2x00_free_irqs(vha);
14e660e6 3803 pci_disable_device(pdev);
bddd2d65
LC		 3804 /* Return back all IOs */
3805 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
14e660e6
SJ		 3806 return PCI_ERS_RESULT_NEED_RESET;
3807 case pci_channel_io_perm_failure:
85880801
AV		 3808 ha->flags.pci_channel_io_perm_failure = 1;
3809 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
14e660e6
SJ		 3810 return PCI_ERS_RESULT_DISCONNECT;
3811 }
3812 return PCI_ERS_RESULT_NEED_RESET;
3813}
3814
3815static pci_ers_result_t
3816qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
3817{
3818 int risc_paused = 0;
3819 uint32_t stat;
3820 unsigned long flags;
e315cd28
AC		 3821 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3822 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 3823 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3824 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
3825
bcc5b6d3
SK		 3826 if (IS_QLA82XX(ha))
3827 return PCI_ERS_RESULT_RECOVERED;
3828
14e660e6
SJ		 3829 spin_lock_irqsave(&ha->hardware_lock, flags);
3830 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
3831 stat = RD_REG_DWORD(&reg->hccr);
3832 if (stat & HCCR_RISC_PAUSE)
3833 risc_paused = 1;
3834 } else if (IS_QLA23XX(ha)) {
3835 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
3836 if (stat & HSR_RISC_PAUSED)
3837 risc_paused = 1;
3838 } else if (IS_FWI2_CAPABLE(ha)) {
3839 stat = RD_REG_DWORD(&reg24->host_status);
3840 if (stat & HSRX_RISC_PAUSED)
3841 risc_paused = 1;
3842 }
3843 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3844
3845 if (risc_paused) {
3846 qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
3847 "Dumping firmware!\n");
e315cd28 3848 ha->isp_ops->fw_dump(base_vha, 0);
14e660e6
SJ		 3849
3850 return PCI_ERS_RESULT_NEED_RESET;
3851 } else
3852 return PCI_ERS_RESULT_RECOVERED;
3853}
3854
a5b36321
LC		 3855uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
3856{
3857 uint32_t rval = QLA_FUNCTION_FAILED;
3858 uint32_t drv_active = 0;
3859 struct qla_hw_data *ha = base_vha->hw;
3860 int fn;
3861 struct pci_dev *other_pdev = NULL;
3862
3863 DEBUG17(qla_printk(KERN_INFO, ha,
3864 "scsi(%ld): In qla82xx_error_recovery\n", base_vha->host_no));
3865
3866 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3867
3868 if (base_vha->flags.online) {
3869 /* Abort all outstanding commands,
3870 * so as to be requeued later */
3871 qla2x00_abort_isp_cleanup(base_vha);
3872 }
3873
3874
3875 fn = PCI_FUNC(ha->pdev->devfn);
3876 while (fn > 0) {
3877 fn--;
3878 DEBUG17(qla_printk(KERN_INFO, ha,
3879 "Finding pci device at function = 0x%x\n", fn));
3880 other_pdev =
3881 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
3882 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
3883 fn));
3884
3885 if (!other_pdev)
3886 continue;
3887 if (atomic_read(&other_pdev->enable_cnt)) {
3888 DEBUG17(qla_printk(KERN_INFO, ha,
3889 "Found PCI func availabe and enabled at 0x%x\n",
3890 fn));
3891 pci_dev_put(other_pdev);
3892 break;
3893 }
3894 pci_dev_put(other_pdev);
3895 }
3896
3897 if (!fn) {
3898 /* Reset owner */
3899 DEBUG17(qla_printk(KERN_INFO, ha,
3900 "This devfn is reset owner = 0x%x\n", ha->pdev->devfn));
3901 qla82xx_idc_lock(ha);
3902
3903 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3904 QLA82XX_DEV_INITIALIZING);
3905
3906 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
3907 QLA82XX_IDC_VERSION);
3908
3909 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
3910 DEBUG17(qla_printk(KERN_INFO, ha,
3911 "drv_active = 0x%x\n", drv_active));
3912
3913 qla82xx_idc_unlock(ha);
3914 /* Reset if device is not already reset
3915 * drv_active would be 0 if a reset has already been done
3916 */
3917 if (drv_active)
3918 rval = qla82xx_start_firmware(base_vha);
3919 else
3920 rval = QLA_SUCCESS;
3921 qla82xx_idc_lock(ha);
3922
3923 if (rval != QLA_SUCCESS) {
3924 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
3925 qla82xx_clear_drv_active(ha);
3926 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3927 QLA82XX_DEV_FAILED);
3928 } else {
3929 qla_printk(KERN_INFO, ha, "HW State: READY\n");
3930 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3931 QLA82XX_DEV_READY);
3932 qla82xx_idc_unlock(ha);
3933 ha->flags.fw_hung = 0;
3934 rval = qla82xx_restart_isp(base_vha);
3935 qla82xx_idc_lock(ha);
3936 /* Clear driver state register */
3937 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
3938 qla82xx_set_drv_active(base_vha);
3939 }
3940 qla82xx_idc_unlock(ha);
3941 } else {
3942 DEBUG17(qla_printk(KERN_INFO, ha,
3943 "This devfn is not reset owner = 0x%x\n", ha->pdev->devfn));
3944 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
3945 QLA82XX_DEV_READY)) {
3946 ha->flags.fw_hung = 0;
3947 rval = qla82xx_restart_isp(base_vha);
3948 qla82xx_idc_lock(ha);
3949 qla82xx_set_drv_active(base_vha);
3950 qla82xx_idc_unlock(ha);
3951 }
3952 }
3953 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3954
3955 return rval;
3956}
3957
14e660e6
SJ		 3958static pci_ers_result_t
3959qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3960{
3961 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
e315cd28
AC		 3962 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3963 struct qla_hw_data *ha = base_vha->hw;
90a86fc0
JC		 3964 struct rsp_que *rsp;
3965 int rc, retries = 10;
09483916 3966
85880801
AV		 3967 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
3968
90a86fc0
JC		 3969 /* Workaround: qla2xxx driver which access hardware earlier
3970 * needs error state to be pci_channel_io_online.
3971 * Otherwise mailbox command timesout.
3972 */
3973 pdev->error_state = pci_channel_io_normal;
3974
3975 pci_restore_state(pdev);
3976
8c1496bd
RL		 3977 /* pci_restore_state() clears the saved_state flag of the device
3978 * save restored state which resets saved_state flag
3979 */
3980 pci_save_state(pdev);
3981
09483916
BH		 3982 if (ha->mem_only)
3983 rc = pci_enable_device_mem(pdev);
3984 else
3985 rc = pci_enable_device(pdev);
14e660e6 3986
09483916 3987 if (rc) {
14e660e6
SJ		 3988 qla_printk(KERN_WARNING, ha,
3989 "Can't re-enable PCI device after reset.\n");
a5b36321 3990 goto exit_slot_reset;
14e660e6 3991 }
14e660e6 3992
90a86fc0
JC		 3993 rsp = ha->rsp_q_map[0];
3994 if (qla2x00_request_irqs(ha, rsp))
a5b36321 3995 goto exit_slot_reset;
90a86fc0 3996
e315cd28 3997 if (ha->isp_ops->pci_config(base_vha))
a5b36321
LC		 3998 goto exit_slot_reset;
3999
4000 if (IS_QLA82XX(ha)) {
4001 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
4002 ret = PCI_ERS_RESULT_RECOVERED;
4003 goto exit_slot_reset;
4004 } else
4005 goto exit_slot_reset;
4006 }
14e660e6 4007
90a86fc0
JC		 4008 while (ha->flags.mbox_busy && retries--)
4009 msleep(1000);
85880801 4010
e315cd28 4011 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 4012 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
14e660e6 4013 ret = PCI_ERS_RESULT_RECOVERED;
e315cd28 4014 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
14e660e6 4015
90a86fc0 4016
a5b36321 4017exit_slot_reset:
85880801
AV		 4018 DEBUG17(qla_printk(KERN_WARNING, ha,
4019 "slot_reset-return:ret=%x\n", ret));
4020
14e660e6
SJ		 4021 return ret;
4022}
4023
4024static void
4025qla2xxx_pci_resume(struct pci_dev *pdev)
4026{
e315cd28
AC		 4027 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4028 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 4029 int ret;
4030
85880801
AV		 4031 DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
4032
e315cd28 4033 ret = qla2x00_wait_for_hba_online(base_vha);
14e660e6
SJ		 4034 if (ret != QLA_SUCCESS) {
4035 qla_printk(KERN_ERR, ha,
4036 "the device failed to resume I/O "
4037 "from slot/link_reset");
4038 }
85880801 4039
3e46f031
LC		 4040 pci_cleanup_aer_uncorrect_error_status(pdev);
4041
85880801 4042 ha->flags.eeh_busy = 0;
14e660e6
SJ		 4043}
4044
4045static struct pci_error_handlers qla2xxx_err_handler = {
4046 .error_detected = qla2xxx_pci_error_detected,
4047 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4048 .slot_reset = qla2xxx_pci_slot_reset,
4049 .resume = qla2xxx_pci_resume,
4050};
4051
5433383e 4052static struct pci_device_id qla2xxx_pci_tbl[] = {
47f5e069
AV		 4053 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4054 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4055 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4056 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4057 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4058 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4059 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4060 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4061 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4d4df193 4062 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
47f5e069
AV		 4063 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4064 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
c3a2f0df 4065 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
3a03eb79 4066 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
a9083016 4067 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5433383e
AV		 4068 { 0 },
4069};
4070MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4071
fca29703 4072static struct pci_driver qla2xxx_pci_driver = {
cb63067a 4073 .name = QLA2XXX_DRIVER_NAME,
0a21ef1e
JB		 4074 .driver = {
4075 .owner = THIS_MODULE,
4076 },
fca29703 4077 .id_table = qla2xxx_pci_tbl,
7ee61397 4078 .probe = qla2x00_probe_one,
4c993f76 4079 .remove = qla2x00_remove_one,
e30d1756 4080 .shutdown = qla2x00_shutdown,
14e660e6 4081 .err_handler = &qla2xxx_err_handler,
fca29703
AV		 4082};
4083
6a03b4cd
HZ		 4084static struct file_operations apidev_fops = {
4085 .owner = THIS_MODULE,
6038f373 4086 .llseek = noop_llseek,
6a03b4cd
HZ		 4087};
4088
1da177e4
LT		 4089/**
4090 * qla2x00_module_init - Module initialization.
4091 **/
4092static int __init
4093qla2x00_module_init(void)
4094{
fca29703
AV		 4095 int ret = 0;
4096
1da177e4 4097 /* Allocate cache for SRBs. */
354d6b21 4098 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
20c2df83 4099 SLAB_HWCACHE_ALIGN, NULL);
1da177e4
LT		 4100 if (srb_cachep == NULL) {
4101 printk(KERN_ERR
4102 "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
4103 return -ENOMEM;
4104 }
4105
4106 /* Derive version string. */
4107 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
11010fec 4108 if (ql2xextended_error_logging)
0181944f
AV		 4109 strcat(qla2x00_version_str, "-debug");
4110
1c97a12a
AV		 4111 qla2xxx_transport_template =
4112 fc_attach_transport(&qla2xxx_transport_functions);
2c3dfe3f
SJ		 4113 if (!qla2xxx_transport_template) {
4114 kmem_cache_destroy(srb_cachep);
1da177e4 4115 return -ENODEV;
2c3dfe3f 4116 }
6a03b4cd
HZ		 4117
4118 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4119 if (apidev_major < 0) {
4120 printk(KERN_WARNING "qla2xxx: Unable to register char device "
4121 "%s\n", QLA2XXX_APIDEV);
4122 }
4123
2c3dfe3f
SJ		 4124 qla2xxx_transport_vport_template =
4125 fc_attach_transport(&qla2xxx_transport_vport_functions);
4126 if (!qla2xxx_transport_vport_template) {
4127 kmem_cache_destroy(srb_cachep);
4128 fc_release_transport(qla2xxx_transport_template);
1da177e4 4129 return -ENODEV;
2c3dfe3f 4130 }
1da177e4 4131
fd9a29f0
AV		 4132 printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
4133 qla2x00_version_str);
7ee61397 4134 ret = pci_register_driver(&qla2xxx_pci_driver);
fca29703
AV		 4135 if (ret) {
4136 kmem_cache_destroy(srb_cachep);
4137 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4138 fc_release_transport(qla2xxx_transport_vport_template);
fca29703
AV		 4139 }
4140 return ret;
1da177e4
LT		 4141}
4142
4143/**
4144 * qla2x00_module_exit - Module cleanup.
4145 **/
4146static void __exit
4147qla2x00_module_exit(void)
4148{
6a03b4cd 4149 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7ee61397 4150 pci_unregister_driver(&qla2xxx_pci_driver);
5433383e 4151 qla2x00_release_firmware();
354d6b21 4152 kmem_cache_destroy(srb_cachep);
a9083016
GM		 4153 if (ctx_cachep)
4154 kmem_cache_destroy(ctx_cachep);
1da177e4 4155 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4156 fc_release_transport(qla2xxx_transport_vport_template);
1da177e4
LT		 4157}
4158
4159module_init(qla2x00_module_init);
4160module_exit(qla2x00_module_exit);
4161
4162MODULE_AUTHOR("QLogic Corporation");
4163MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4164MODULE_LICENSE("GPL");
4165MODULE_VERSION(QLA2XXX_VERSION);
bb8ee499
AV		 4166MODULE_FIRMWARE(FW_FILE_ISP21XX);
4167MODULE_FIRMWARE(FW_FILE_ISP22XX);
4168MODULE_FIRMWARE(FW_FILE_ISP2300);
4169MODULE_FIRMWARE(FW_FILE_ISP2322);
4170MODULE_FIRMWARE(FW_FILE_ISP24XX);
61623fc3 4171MODULE_FIRMWARE(FW_FILE_ISP25XX);
kernel source for telekom puls (alcatel/mediatek)