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[SCSI] qla2xxx: Initialize the vport_slock spinlock.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / qla2xxx / qla_os.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
de7c5d05 3 * Copyright (c) 2003-2010 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
8
9#include <linux/moduleparam.h>
10#include <linux/vmalloc.h>
1da177e4 11#include <linux/delay.h>
39a11240 12#include <linux/kthread.h>
e1e82b6f 13#include <linux/mutex.h>
3420d36c 14#include <linux/kobject.h>
5a0e3ad6 15#include <linux/slab.h>
1da177e4
LT		 16
17#include <scsi/scsi_tcq.h>
18#include <scsi/scsicam.h>
19#include <scsi/scsi_transport.h>
20#include <scsi/scsi_transport_fc.h>
21
22/*
23 * Driver version
24 */
25char qla2x00_version_str[40];
26
6a03b4cd
HZ		 27static int apidev_major;
28
1da177e4
LT		 29/*
30 * SRB allocation cache
31 */
e18b890b 32static struct kmem_cache *srb_cachep;
1da177e4 33
a9083016
GM		 34/*
35 * CT6 CTX allocation cache
36 */
37static struct kmem_cache *ctx_cachep;
38
1da177e4
LT		 39int ql2xlogintimeout = 20;
40module_param(ql2xlogintimeout, int, S_IRUGO|S_IRUSR);
41MODULE_PARM_DESC(ql2xlogintimeout,
42 "Login timeout value in seconds.");
43
a7b61842 44int qlport_down_retry;
1da177e4
LT		 45module_param(qlport_down_retry, int, S_IRUGO|S_IRUSR);
46MODULE_PARM_DESC(qlport_down_retry,
900d9f98 47 "Maximum number of command retries to a port that returns "
1da177e4
LT		 48 "a PORT-DOWN status.");
49
1da177e4
LT		 50int ql2xplogiabsentdevice;
51module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
52MODULE_PARM_DESC(ql2xplogiabsentdevice,
53 "Option to enable PLOGI to devices that are not present after "
900d9f98 54 "a Fabric scan. This is needed for several broken switches. "
1da177e4
LT		 55 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
56
1da177e4
LT		 57int ql2xloginretrycount = 0;
58module_param(ql2xloginretrycount, int, S_IRUGO|S_IRUSR);
59MODULE_PARM_DESC(ql2xloginretrycount,
60 "Specify an alternate value for the NVRAM login retry count.");
61
a7a167bf
AV		 62int ql2xallocfwdump = 1;
63module_param(ql2xallocfwdump, int, S_IRUGO|S_IRUSR);
64MODULE_PARM_DESC(ql2xallocfwdump,
65 "Option to enable allocation of memory for a firmware dump "
66 "during HBA initialization. Memory allocation requirements "
67 "vary by ISP type. Default is 1 - allocate memory.");
68
11010fec 69int ql2xextended_error_logging;
27d94035 70module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
11010fec 71MODULE_PARM_DESC(ql2xextended_error_logging,
0181944f
AV		 72 "Option to enable extended error logging, "
73 "Default is 0 - no logging. 1 - log errors.");
74
a9083016
GM		 75int ql2xshiftctondsd = 6;
76module_param(ql2xshiftctondsd, int, S_IRUGO|S_IRUSR);
77MODULE_PARM_DESC(ql2xshiftctondsd,
78 "Set to control shifting of command type processing "
79 "based on total number of SG elements.");
80
1da177e4
LT		 81static void qla2x00_free_device(scsi_qla_host_t *);
82
7e47e5ca 83int ql2xfdmienable=1;
cca5335c
AV		 84module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR);
85MODULE_PARM_DESC(ql2xfdmienable,
7794a5af
FW		 86 "Enables FDMI registrations. "
87 "0 - no FDMI. Default is 1 - perform FDMI.");
cca5335c 88
df7baa50
AV		 89#define MAX_Q_DEPTH 32
90static int ql2xmaxqdepth = MAX_Q_DEPTH;
91module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
92MODULE_PARM_DESC(ql2xmaxqdepth,
93 "Maximum queue depth to report for target devices.");
94
bad75002
AE		 95/* Do not change the value of this after module load */
96int ql2xenabledif = 1;
97module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
98MODULE_PARM_DESC(ql2xenabledif,
99 " Enable T10-CRC-DIF "
100 " Default is 0 - No DIF Support. 1 - Enable it");
101
102int ql2xenablehba_err_chk;
103module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
104MODULE_PARM_DESC(ql2xenablehba_err_chk,
105 " Enable T10-CRC-DIF Error isolation by HBA"
106 " Default is 0 - Error isolation disabled, 1 - Enable it");
107
e5896bd5
AV		 108int ql2xiidmaenable=1;
109module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
110MODULE_PARM_DESC(ql2xiidmaenable,
111 "Enables iIDMA settings "
112 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
113
73208dfd
AC		 114int ql2xmaxqueues = 1;
115module_param(ql2xmaxqueues, int, S_IRUGO|S_IRUSR);
116MODULE_PARM_DESC(ql2xmaxqueues,
117 "Enables MQ settings "
ae68230c
JP		 118 "Default is 1 for single queue. Set it to number "
119 "of queues in MQ mode.");
68ca949c
AC		 120
121int ql2xmultique_tag;
122module_param(ql2xmultique_tag, int, S_IRUGO|S_IRUSR);
123MODULE_PARM_DESC(ql2xmultique_tag,
124 "Enables CPU affinity settings for the driver "
125 "Default is 0 for no affinity of request and response IO. "
126 "Set it to 1 to turn on the cpu affinity.");
e337d907
AV		 127
128int ql2xfwloadbin;
129module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR);
130MODULE_PARM_DESC(ql2xfwloadbin,
131 "Option to specify location from which to load ISP firmware:\n"
132 " 2 -- load firmware via the request_firmware() (hotplug)\n"
133 " interface.\n"
134 " 1 -- load firmware from flash.\n"
135 " 0 -- use default semantics.\n");
136
ae97c91e
AV		 137int ql2xetsenable;
138module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR);
139MODULE_PARM_DESC(ql2xetsenable,
140 "Enables firmware ETS burst."
141 "Default is 0 - skip ETS enablement.");
142
6907869d 143int ql2xdbwr = 1;
a9083016
GM		 144module_param(ql2xdbwr, int, S_IRUGO|S_IRUSR);
145MODULE_PARM_DESC(ql2xdbwr,
146 "Option to specify scheme for request queue posting\n"
147 " 0 -- Regular doorbell.\n"
148 " 1 -- CAMRAM doorbell (faster).\n");
149
150int ql2xdontresethba;
151module_param(ql2xdontresethba, int, S_IRUGO|S_IRUSR);
152MODULE_PARM_DESC(ql2xdontresethba,
153 "Option to specify reset behaviour\n"
154 " 0 (Default) -- Reset on failure.\n"
155 " 1 -- Do not reset on failure.\n");
156
f4c496c1
GM		 157int ql2xtargetreset = 1;
158module_param(ql2xtargetreset, int, S_IRUGO|S_IRUSR);
159MODULE_PARM_DESC(ql2xtargetreset,
160 "Enable target reset."
161 "Default is 1 - use hw defaults.");
162
4da26e16
CD		 163int ql2xgffidenable;
164module_param(ql2xgffidenable, int, S_IRUGO|S_IRUSR);
165MODULE_PARM_DESC(ql2xgffidenable,
166 "Enables GFF_ID checks of port type. "
167 "Default is 0 - Do not use GFF_ID information.");
a9083016 168
3822263e
MI		 169int ql2xasynctmfenable;
170module_param(ql2xasynctmfenable, int, S_IRUGO|S_IRUSR);
171MODULE_PARM_DESC(ql2xasynctmfenable,
172 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
173 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
1da177e4 174/*
fa2a1ce5 175 * SCSI host template entry points
1da177e4
LT		 176 */
177static int qla2xxx_slave_configure(struct scsi_device * device);
f4f051eb 178static int qla2xxx_slave_alloc(struct scsi_device *);
1e99e33a
AV		 179static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
180static void qla2xxx_scan_start(struct Scsi_Host *);
f4f051eb 181static void qla2xxx_slave_destroy(struct scsi_device *);
a5326f86 182static int qla2xxx_queuecommand(struct scsi_cmnd *cmd,
fca29703 183 void (*fn)(struct scsi_cmnd *));
1da177e4
LT		 184static int qla2xxx_eh_abort(struct scsi_cmnd *);
185static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
523ec773 186static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
1da177e4
LT		 187static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
188static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
1da177e4 189
e881a172 190static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
ce7e4af7
AV		 191static int qla2x00_change_queue_type(struct scsi_device *, int);
192
a5326f86 193struct scsi_host_template qla2xxx_driver_template = {
1da177e4 194 .module = THIS_MODULE,
cb63067a 195 .name = QLA2XXX_DRIVER_NAME,
a5326f86 196 .queuecommand = qla2xxx_queuecommand,
fca29703
AV		 197
198 .eh_abort_handler = qla2xxx_eh_abort,
199 .eh_device_reset_handler = qla2xxx_eh_device_reset,
523ec773 200 .eh_target_reset_handler = qla2xxx_eh_target_reset,
fca29703
AV		 201 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
202 .eh_host_reset_handler = qla2xxx_eh_host_reset,
203
204 .slave_configure = qla2xxx_slave_configure,
205
206 .slave_alloc = qla2xxx_slave_alloc,
207 .slave_destroy = qla2xxx_slave_destroy,
ed677086
AV		 208 .scan_finished = qla2xxx_scan_finished,
209 .scan_start = qla2xxx_scan_start,
ce7e4af7
AV		 210 .change_queue_depth = qla2x00_change_queue_depth,
211 .change_queue_type = qla2x00_change_queue_type,
fca29703
AV		 212 .this_id = -1,
213 .cmd_per_lun = 3,
214 .use_clustering = ENABLE_CLUSTERING,
215 .sg_tablesize = SG_ALL,
216
217 .max_sectors = 0xFFFF,
afb046e2 218 .shost_attrs = qla2x00_host_attrs,
fca29703
AV		 219};
220
1da177e4 221static struct scsi_transport_template *qla2xxx_transport_template = NULL;
2c3dfe3f 222struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
1da177e4 223
1da177e4
LT		 224/* TODO Convert to inlines
225 *
226 * Timer routines
227 */
1da177e4 228
2c3dfe3f 229__inline__ void
e315cd28 230qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
1da177e4 231{
e315cd28
AC		 232 init_timer(&vha->timer);
233 vha->timer.expires = jiffies + interval * HZ;
234 vha->timer.data = (unsigned long)vha;
235 vha->timer.function = (void (*)(unsigned long))func;
236 add_timer(&vha->timer);
237 vha->timer_active = 1;
1da177e4
LT		 238}
239
240static inline void
e315cd28 241qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
1da177e4 242{
a9083016
GM		 243 /* Currently used for 82XX only. */
244 if (vha->device_flags & DFLG_DEV_FAILED)
245 return;
246
e315cd28 247 mod_timer(&vha->timer, jiffies + interval * HZ);
1da177e4
LT		 248}
249
a824ebb3 250static __inline__ void
e315cd28 251qla2x00_stop_timer(scsi_qla_host_t *vha)
1da177e4 252{
e315cd28
AC		 253 del_timer_sync(&vha->timer);
254 vha->timer_active = 0;
1da177e4
LT		 255}
256
1da177e4
LT		 257static int qla2x00_do_dpc(void *data);
258
259static void qla2x00_rst_aen(scsi_qla_host_t *);
260
73208dfd
AC		 261static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
262 struct req_que **, struct rsp_que **);
e315cd28
AC		 263static void qla2x00_mem_free(struct qla_hw_data *);
264static void qla2x00_sp_free_dma(srb_t *);
1da177e4 265
1da177e4 266/* -------------------------------------------------------------------------- */
73208dfd
AC		 267static int qla2x00_alloc_queues(struct qla_hw_data *ha)
268{
2afa19a9 269 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
73208dfd
AC		 270 GFP_KERNEL);
271 if (!ha->req_q_map) {
272 qla_printk(KERN_WARNING, ha,
273 "Unable to allocate memory for request queue ptrs\n");
274 goto fail_req_map;
275 }
276
2afa19a9 277 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
73208dfd
AC		 278 GFP_KERNEL);
279 if (!ha->rsp_q_map) {
280 qla_printk(KERN_WARNING, ha,
281 "Unable to allocate memory for response queue ptrs\n");
282 goto fail_rsp_map;
283 }
284 set_bit(0, ha->rsp_qid_map);
285 set_bit(0, ha->req_qid_map);
286 return 1;
287
288fail_rsp_map:
289 kfree(ha->req_q_map);
290 ha->req_q_map = NULL;
291fail_req_map:
292 return -ENOMEM;
293}
294
2afa19a9 295static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
73208dfd 296{
73208dfd
AC		 297 if (req && req->ring)
298 dma_free_coherent(&ha->pdev->dev,
299 (req->length + 1) * sizeof(request_t),
300 req->ring, req->dma);
301
302 kfree(req);
303 req = NULL;
304}
305
2afa19a9
AC		 306static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
307{
308 if (rsp && rsp->ring)
309 dma_free_coherent(&ha->pdev->dev,
310 (rsp->length + 1) * sizeof(response_t),
311 rsp->ring, rsp->dma);
312
313 kfree(rsp);
314 rsp = NULL;
315}
316
73208dfd
AC		 317static void qla2x00_free_queues(struct qla_hw_data *ha)
318{
319 struct req_que *req;
320 struct rsp_que *rsp;
321 int cnt;
322
2afa19a9 323 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
73208dfd 324 req = ha->req_q_map[cnt];
2afa19a9 325 qla2x00_free_req_que(ha, req);
73208dfd 326 }
73208dfd
AC		 327 kfree(ha->req_q_map);
328 ha->req_q_map = NULL;
2afa19a9
AC		 329
330 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
331 rsp = ha->rsp_q_map[cnt];
332 qla2x00_free_rsp_que(ha, rsp);
333 }
334 kfree(ha->rsp_q_map);
335 ha->rsp_q_map = NULL;
73208dfd
AC		 336}
337
68ca949c
AC		 338static int qla25xx_setup_mode(struct scsi_qla_host *vha)
339{
340 uint16_t options = 0;
341 int ques, req, ret;
342 struct qla_hw_data *ha = vha->hw;
343
7163ea81
AC		 344 if (!(ha->fw_attributes & BIT_6)) {
345 qla_printk(KERN_INFO, ha,
346 "Firmware is not multi-queue capable\n");
347 goto fail;
348 }
68ca949c 349 if (ql2xmultique_tag) {
68ca949c
AC		 350 /* create a request queue for IO */
351 options |= BIT_7;
352 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
353 QLA_DEFAULT_QUE_QOS);
354 if (!req) {
355 qla_printk(KERN_WARNING, ha,
356 "Can't create request queue\n");
357 goto fail;
358 }
7163ea81 359 ha->wq = create_workqueue("qla2xxx_wq");
68ca949c
AC		 360 vha->req = ha->req_q_map[req];
361 options |= BIT_1;
362 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
363 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
364 if (!ret) {
365 qla_printk(KERN_WARNING, ha,
366 "Response Queue create failed\n");
367 goto fail2;
368 }
369 }
7163ea81
AC		 370 ha->flags.cpu_affinity_enabled = 1;
371
68ca949c
AC		 372 DEBUG2(qla_printk(KERN_INFO, ha,
373 "CPU affinity mode enabled, no. of response"
374 " queues:%d, no. of request queues:%d\n",
375 ha->max_rsp_queues, ha->max_req_queues));
376 }
377 return 0;
378fail2:
379 qla25xx_delete_queues(vha);
7163ea81
AC		 380 destroy_workqueue(ha->wq);
381 ha->wq = NULL;
68ca949c
AC		 382fail:
383 ha->mqenable = 0;
7163ea81
AC		 384 kfree(ha->req_q_map);
385 kfree(ha->rsp_q_map);
386 ha->max_req_queues = ha->max_rsp_queues = 1;
68ca949c
AC		 387 return 1;
388}
389
1da177e4 390static char *
e315cd28 391qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
1da177e4 392{
e315cd28 393 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 394 static char *pci_bus_modes[] = {
395 "33", "66", "100", "133",
396 };
397 uint16_t pci_bus;
398
399 strcpy(str, "PCI");
400 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
401 if (pci_bus) {
402 strcat(str, "-X (");
403 strcat(str, pci_bus_modes[pci_bus]);
404 } else {
405 pci_bus = (ha->pci_attr & BIT_8) >> 8;
406 strcat(str, " (");
407 strcat(str, pci_bus_modes[pci_bus]);
408 }
409 strcat(str, " MHz)");
410
411 return (str);
412}
413
fca29703 414static char *
e315cd28 415qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
fca29703
AV		 416{
417 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
e315cd28 418 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 419 uint32_t pci_bus;
420 int pcie_reg;
421
422 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
423 if (pcie_reg) {
424 char lwstr[6];
425 uint16_t pcie_lstat, lspeed, lwidth;
426
427 pcie_reg += 0x12;
428 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
429 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
430 lwidth = (pcie_lstat &
431 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
432
433 strcpy(str, "PCIe (");
434 if (lspeed == 1)
c87a0d8c 435 strcat(str, "2.5GT/s ");
c3a2f0df 436 else if (lspeed == 2)
c87a0d8c 437 strcat(str, "5.0GT/s ");
fca29703
AV		 438 else
439 strcat(str, "<unknown> ");
440 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
441 strcat(str, lwstr);
442
443 return str;
444 }
445
446 strcpy(str, "PCI");
447 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
448 if (pci_bus == 0 || pci_bus == 8) {
449 strcat(str, " (");
450 strcat(str, pci_bus_modes[pci_bus >> 3]);
451 } else {
452 strcat(str, "-X ");
453 if (pci_bus & BIT_2)
454 strcat(str, "Mode 2");
455 else
456 strcat(str, "Mode 1");
457 strcat(str, " (");
458 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
459 }
460 strcat(str, " MHz)");
461
462 return str;
463}
464
e5f82ab8 465static char *
e315cd28 466qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
1da177e4
LT		 467{
468 char un_str[10];
e315cd28 469 struct qla_hw_data *ha = vha->hw;
fa2a1ce5 470
1da177e4
LT		 471 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
472 ha->fw_minor_version,
473 ha->fw_subminor_version);
474
475 if (ha->fw_attributes & BIT_9) {
476 strcat(str, "FLX");
477 return (str);
478 }
479
480 switch (ha->fw_attributes & 0xFF) {
481 case 0x7:
482 strcat(str, "EF");
483 break;
484 case 0x17:
485 strcat(str, "TP");
486 break;
487 case 0x37:
488 strcat(str, "IP");
489 break;
490 case 0x77:
491 strcat(str, "VI");
492 break;
493 default:
494 sprintf(un_str, "(%x)", ha->fw_attributes);
495 strcat(str, un_str);
496 break;
497 }
498 if (ha->fw_attributes & 0x100)
499 strcat(str, "X");
500
501 return (str);
502}
503
e5f82ab8 504static char *
e315cd28 505qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
fca29703 506{
e315cd28 507 struct qla_hw_data *ha = vha->hw;
f0883ac6 508
3a03eb79
AV		 509 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
510 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
fca29703 511 return str;
fca29703
AV		 512}
513
514static inline srb_t *
e315cd28 515qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
fca29703
AV		 516 struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
517{
518 srb_t *sp;
e315cd28 519 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 520
521 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
522 if (!sp)
523 return sp;
524
083a469d 525 atomic_set(&sp->ref_count, 1);
fca29703
AV		 526 sp->fcport = fcport;
527 sp->cmd = cmd;
528 sp->flags = 0;
529 CMD_SP(cmd) = (void *)sp;
530 cmd->scsi_done = done;
cf53b069 531 sp->ctx = NULL;
fca29703
AV		 532
533 return sp;
534}
535
1da177e4 536static int
a5326f86 537qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
fca29703 538{
e315cd28 539 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
fca29703 540 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
19a7b4ae 541 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
e315cd28
AC		 542 struct qla_hw_data *ha = vha->hw;
543 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
fca29703
AV		 544 srb_t *sp;
545 int rval;
546
85880801
AV		 547 if (ha->flags.eeh_busy) {
548 if (ha->flags.pci_channel_io_perm_failure)
b9b12f73 549 cmd->result = DID_NO_CONNECT << 16;
85880801
AV		 550 else
551 cmd->result = DID_REQUEUE << 16;
14e660e6
SJ		 552 goto qc24_fail_command;
553 }
554
19a7b4ae
JSEC		 555 rval = fc_remote_port_chkready(rport);
556 if (rval) {
557 cmd->result = rval;
fca29703
AV		 558 goto qc24_fail_command;
559 }
560
387f96b4 561 /* Close window on fcport/rport state-transitioning. */
7b594131
MC		 562 if (fcport->drport)
563 goto qc24_target_busy;
387f96b4 564
bad75002
AE		 565 if (!vha->flags.difdix_supported &&
566 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
567 DEBUG2(qla_printk(KERN_ERR, ha,
568 "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
569 cmd->cmnd[0]));
570 cmd->result = DID_NO_CONNECT << 16;
571 goto qc24_fail_command;
572 }
fca29703
AV		 573 if (atomic_read(&fcport->state) != FCS_ONLINE) {
574 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
e315cd28 575 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
fca29703
AV		 576 cmd->result = DID_NO_CONNECT << 16;
577 goto qc24_fail_command;
578 }
7b594131 579 goto qc24_target_busy;
fca29703
AV		 580 }
581
e315cd28 582 spin_unlock_irq(vha->host->host_lock);
fca29703 583
e315cd28 584 sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
fca29703
AV		 585 if (!sp)
586 goto qc24_host_busy_lock;
587
e315cd28 588 rval = ha->isp_ops->start_scsi(sp);
fca29703
AV		 589 if (rval != QLA_SUCCESS)
590 goto qc24_host_busy_free_sp;
591
e315cd28 592 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 593
594 return 0;
595
596qc24_host_busy_free_sp:
e315cd28
AC		 597 qla2x00_sp_free_dma(sp);
598 mempool_free(sp, ha->srb_mempool);
fca29703
AV		 599
600qc24_host_busy_lock:
e315cd28 601 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 602 return SCSI_MLQUEUE_HOST_BUSY;
603
7b594131
MC		 604qc24_target_busy:
605 return SCSI_MLQUEUE_TARGET_BUSY;
606
fca29703
AV		 607qc24_fail_command:
608 done(cmd);
609
610 return 0;
611}
612
613
1da177e4
LT		 614/*
615 * qla2x00_eh_wait_on_command
616 * Waits for the command to be returned by the Firmware for some
617 * max time.
618 *
619 * Input:
1da177e4 620 * cmd = Scsi Command to wait on.
1da177e4
LT		 621 *
622 * Return:
623 * Not Found : 0
624 * Found : 1
625 */
626static int
e315cd28 627qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1da177e4 628{
fe74c71f
AV		 629#define ABORT_POLLING_PERIOD 1000
630#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
f4f051eb 631 unsigned long wait_iter = ABORT_WAIT_ITER;
85880801
AV		 632 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
633 struct qla_hw_data *ha = vha->hw;
f4f051eb 634 int ret = QLA_SUCCESS;
1da177e4 635
85880801
AV		 636 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
637 DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
638 return ret;
639 }
640
d970432c 641 while (CMD_SP(cmd) && wait_iter--) {
fe74c71f 642 msleep(ABORT_POLLING_PERIOD);
f4f051eb
AV		 643 }
644 if (CMD_SP(cmd))
645 ret = QLA_FUNCTION_FAILED;
1da177e4 646
f4f051eb 647 return ret;
1da177e4
LT		 648}
649
650/*
651 * qla2x00_wait_for_hba_online
fa2a1ce5 652 * Wait till the HBA is online after going through
1da177e4
LT		 653 * <= MAX_RETRIES_OF_ISP_ABORT or
654 * finally HBA is disabled ie marked offline
655 *
656 * Input:
657 * ha - pointer to host adapter structure
fa2a1ce5
AV		 658 *
659 * Note:
1da177e4
LT		 660 * Does context switching-Release SPIN_LOCK
661 * (if any) before calling this routine.
662 *
663 * Return:
664 * Success (Adapter is online) : 0
665 * Failed (Adapter is offline/disabled) : 1
666 */
854165f4 667int
e315cd28 668qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1da177e4 669{
fca29703
AV		 670 int return_status;
671 unsigned long wait_online;
e315cd28
AC		 672 struct qla_hw_data *ha = vha->hw;
673 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 674
fa2a1ce5 675 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
e315cd28
AC		 676 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
677 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
678 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
679 ha->dpc_active) && time_before(jiffies, wait_online)) {
1da177e4
LT		 680
681 msleep(1000);
682 }
e315cd28 683 if (base_vha->flags.online)
fa2a1ce5 684 return_status = QLA_SUCCESS;
1da177e4
LT		 685 else
686 return_status = QLA_FUNCTION_FAILED;
687
1da177e4
LT		 688 return (return_status);
689}
690
86fbee86
LC		 691/*
692 * qla2x00_wait_for_reset_ready
693 * Wait till the HBA is online after going through
694 * <= MAX_RETRIES_OF_ISP_ABORT or
695 * finally HBA is disabled ie marked offline or flash
696 * operations are in progress.
697 *
698 * Input:
699 * ha - pointer to host adapter structure
700 *
701 * Note:
702 * Does context switching-Release SPIN_LOCK
703 * (if any) before calling this routine.
704 *
705 * Return:
706 * Success (Adapter is online/no flash ops) : 0
707 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
708 */
3dbe756a 709static int
86fbee86
LC		 710qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
711{
712 int return_status;
713 unsigned long wait_online;
714 struct qla_hw_data *ha = vha->hw;
715 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
716
717 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
718 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
719 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
720 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
721 ha->optrom_state != QLA_SWAITING ||
722 ha->dpc_active) && time_before(jiffies, wait_online))
723 msleep(1000);
724
725 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
726 return_status = QLA_SUCCESS;
727 else
728 return_status = QLA_FUNCTION_FAILED;
729
730 DEBUG2(printk("%s return_status=%d\n", __func__, return_status));
731
732 return return_status;
733}
734
2533cf67
LC		 735int
736qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
737{
738 int return_status;
739 unsigned long wait_reset;
740 struct qla_hw_data *ha = vha->hw;
741 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
742
743 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
744 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
745 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
746 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
747 ha->dpc_active) && time_before(jiffies, wait_reset)) {
748
749 msleep(1000);
750
751 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
752 ha->flags.chip_reset_done)
753 break;
754 }
755 if (ha->flags.chip_reset_done)
756 return_status = QLA_SUCCESS;
757 else
758 return_status = QLA_FUNCTION_FAILED;
759
760 return return_status;
761}
762
1da177e4
LT		 763/*
764 * qla2x00_wait_for_loop_ready
765 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
fa2a1ce5 766 * to be in LOOP_READY state.
1da177e4
LT		 767 * Input:
768 * ha - pointer to host adapter structure
fa2a1ce5
AV		 769 *
770 * Note:
1da177e4
LT		 771 * Does context switching-Release SPIN_LOCK
772 * (if any) before calling this routine.
fa2a1ce5 773 *
1da177e4
LT		 774 *
775 * Return:
776 * Success (LOOP_READY) : 0
777 * Failed (LOOP_NOT_READY) : 1
778 */
fa2a1ce5 779static inline int
e315cd28 780qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
1da177e4
LT		 781{
782 int return_status = QLA_SUCCESS;
783 unsigned long loop_timeout ;
e315cd28
AC		 784 struct qla_hw_data *ha = vha->hw;
785 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 786
787 /* wait for 5 min at the max for loop to be ready */
fa2a1ce5 788 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1da177e4 789
e315cd28
AC		 790 while ((!atomic_read(&base_vha->loop_down_timer) &&
791 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
792 atomic_read(&base_vha->loop_state) != LOOP_READY) {
793 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
57680080
RA		 794 return_status = QLA_FUNCTION_FAILED;
795 break;
796 }
1da177e4
LT		 797 msleep(1000);
798 if (time_after_eq(jiffies, loop_timeout)) {
799 return_status = QLA_FUNCTION_FAILED;
800 break;
801 }
802 }
fa2a1ce5 803 return (return_status);
1da177e4
LT		 804}
805
083a469d
GM		 806static void
807sp_get(struct srb *sp)
808{
809 atomic_inc(&sp->ref_count);
810}
811
1da177e4
LT		 812/**************************************************************************
813* qla2xxx_eh_abort
814*
815* Description:
816* The abort function will abort the specified command.
817*
818* Input:
819* cmd = Linux SCSI command packet to be aborted.
820*
821* Returns:
822* Either SUCCESS or FAILED.
823*
824* Note:
2ea00202 825* Only return FAILED if command not returned by firmware.
1da177e4 826**************************************************************************/
e5f82ab8 827static int
1da177e4
LT		 828qla2xxx_eh_abort(struct scsi_cmnd *cmd)
829{
e315cd28 830 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
f4f051eb 831 srb_t *sp;
17d98630 832 int ret, i;
f4f051eb 833 unsigned int id, lun;
18e144d3 834 unsigned long flags;
2ea00202 835 int wait = 0;
e315cd28 836 struct qla_hw_data *ha = vha->hw;
67c2e93a 837 struct req_que *req = vha->req;
17d98630 838 srb_t *spt;
083a469d 839 int got_ref = 0;
1da177e4 840
65d430fa 841 fc_block_scsi_eh(cmd);
07db5183 842
f4f051eb 843 if (!CMD_SP(cmd))
2ea00202 844 return SUCCESS;
1da177e4 845
2ea00202 846 ret = SUCCESS;
1da177e4 847
f4f051eb
AV		 848 id = cmd->device->id;
849 lun = cmd->device->lun;
17d98630
AC		 850 spt = (srb_t *) CMD_SP(cmd);
851 if (!spt)
852 return SUCCESS;
1da177e4 853
f4f051eb 854 /* Check active list for command command. */
e315cd28 855 spin_lock_irqsave(&ha->hardware_lock, flags);
17d98630
AC		 856 for (i = 1; i < MAX_OUTSTANDING_COMMANDS; i++) {
857 sp = req->outstanding_cmds[i];
1da177e4 858
17d98630
AC		 859 if (sp == NULL)
860 continue;
bad75002
AE		 861 if ((sp->ctx) && !(sp->flags & SRB_FCP_CMND_DMA_VALID) &&
862 !IS_PROT_IO(sp))
cf53b069 863 continue;
17d98630
AC		 864 if (sp->cmd != cmd)
865 continue;
1da177e4 866
09d1dc2a
MI		 867 DEBUG2(printk("%s(%ld): aborting sp %p from RISC.",
868 __func__, vha->host_no, sp));
17d98630 869
083a469d
GM		 870 /* Get a reference to the sp and drop the lock.*/
871 sp_get(sp);
872 got_ref++;
873
17d98630 874 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2afa19a9 875 if (ha->isp_ops->abort_command(sp)) {
17d98630
AC		 876 DEBUG2(printk("%s(%ld): abort_command "
877 "mbx failed.\n", __func__, vha->host_no));
2ac4b64f 878 ret = FAILED;
17d98630
AC		 879 } else {
880 DEBUG3(printk("%s(%ld): abort_command "
881 "mbx success.\n", __func__, vha->host_no));
882 wait = 1;
73208dfd 883 }
17d98630
AC		 884 spin_lock_irqsave(&ha->hardware_lock, flags);
885 break;
f4f051eb 886 }
e315cd28 887 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 888
f4f051eb 889 /* Wait for the command to be returned. */
2ea00202 890 if (wait) {
e315cd28 891 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
fa2a1ce5 892 qla_printk(KERN_ERR, ha,
09d1dc2a
MI		 893 "scsi(%ld:%d:%d): Abort handler timed out -- %x.\n",
894 vha->host_no, id, lun, ret);
2ea00202 895 ret = FAILED;
f4f051eb 896 }
1da177e4 897 }
1da177e4 898
083a469d
GM		 899 if (got_ref)
900 qla2x00_sp_compl(ha, sp);
901
fa2a1ce5 902 qla_printk(KERN_INFO, ha,
09d1dc2a
MI		 903 "scsi(%ld:%d:%d): Abort command issued -- %d %x.\n",
904 vha->host_no, id, lun, wait, ret);
1da177e4 905
f4f051eb
AV		 906 return ret;
907}
1da177e4 908
4d78c973 909int
e315cd28 910qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
4d78c973 911 unsigned int l, enum nexus_wait_type type)
f4f051eb 912{
17d98630 913 int cnt, match, status;
18e144d3 914 unsigned long flags;
e315cd28 915 struct qla_hw_data *ha = vha->hw;
73208dfd 916 struct req_que *req;
4d78c973 917 srb_t *sp;
1da177e4 918
523ec773 919 status = QLA_SUCCESS;
17d98630 920
e315cd28 921 spin_lock_irqsave(&ha->hardware_lock, flags);
67c2e93a 922 req = vha->req;
17d98630
AC		 923 for (cnt = 1; status == QLA_SUCCESS &&
924 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
925 sp = req->outstanding_cmds[cnt];
926 if (!sp)
523ec773 927 continue;
bad75002 928 if ((sp->ctx) && !IS_PROT_IO(sp))
cf53b069 929 continue;
17d98630
AC		 930 if (vha->vp_idx != sp->fcport->vha->vp_idx)
931 continue;
932 match = 0;
933 switch (type) {
934 case WAIT_HOST:
935 match = 1;
936 break;
937 case WAIT_TARGET:
938 match = sp->cmd->device->id == t;
939 break;
940 case WAIT_LUN:
941 match = (sp->cmd->device->id == t &&
942 sp->cmd->device->lun == l);
943 break;
73208dfd 944 }
17d98630
AC		 945 if (!match)
946 continue;
947
948 spin_unlock_irqrestore(&ha->hardware_lock, flags);
949 status = qla2x00_eh_wait_on_command(sp->cmd);
950 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 951 }
e315cd28 952 spin_unlock_irqrestore(&ha->hardware_lock, flags);
523ec773
AV		 953
954 return status;
1da177e4
LT		 955}
956
523ec773
AV		 957static char *reset_errors[] = {
958 "HBA not online",
959 "HBA not ready",
960 "Task management failed",
961 "Waiting for command completions",
962};
1da177e4 963
e5f82ab8 964static int
523ec773 965__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
2afa19a9 966 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1da177e4 967{
e315cd28 968 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 969 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
523ec773 970 int err;
1da177e4 971
65d430fa 972 fc_block_scsi_eh(cmd);
07db5183 973
b0328bee 974 if (!fcport)
523ec773 975 return FAILED;
1da177e4 976
e315cd28
AC		 977 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
978 vha->host_no, cmd->device->id, cmd->device->lun, name);
1da177e4 979
523ec773 980 err = 0;
e315cd28 981 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
523ec773
AV		 982 goto eh_reset_failed;
983 err = 1;
e315cd28 984 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
523ec773
AV		 985 goto eh_reset_failed;
986 err = 2;
2afa19a9
AC		 987 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
988 != QLA_SUCCESS)
523ec773
AV		 989 goto eh_reset_failed;
990 err = 3;
e315cd28 991 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
4d78c973 992 cmd->device->lun, type) != QLA_SUCCESS)
523ec773
AV		 993 goto eh_reset_failed;
994
e315cd28
AC		 995 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
996 vha->host_no, cmd->device->id, cmd->device->lun, name);
523ec773
AV		 997
998 return SUCCESS;
999
4d78c973 1000eh_reset_failed:
e315cd28
AC		 1001 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
1002 , vha->host_no, cmd->device->id, cmd->device->lun, name,
523ec773
AV		 1003 reset_errors[err]);
1004 return FAILED;
1005}
1da177e4 1006
523ec773
AV		 1007static int
1008qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1009{
e315cd28
AC		 1010 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1011 struct qla_hw_data *ha = vha->hw;
1da177e4 1012
523ec773
AV		 1013 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1014 ha->isp_ops->lun_reset);
1da177e4
LT		 1015}
1016
1da177e4 1017static int
523ec773 1018qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1da177e4 1019{
e315cd28
AC		 1020 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1021 struct qla_hw_data *ha = vha->hw;
1da177e4 1022
523ec773
AV		 1023 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1024 ha->isp_ops->target_reset);
1da177e4
LT		 1025}
1026
1da177e4
LT		 1027/**************************************************************************
1028* qla2xxx_eh_bus_reset
1029*
1030* Description:
1031* The bus reset function will reset the bus and abort any executing
1032* commands.
1033*
1034* Input:
1035* cmd = Linux SCSI command packet of the command that cause the
1036* bus reset.
1037*
1038* Returns:
1039* SUCCESS/FAILURE (defined as macro in scsi.h).
1040*
1041**************************************************************************/
e5f82ab8 1042static int
1da177e4
LT		 1043qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1044{
e315cd28 1045 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1046 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
2c3dfe3f 1047 int ret = FAILED;
f4f051eb 1048 unsigned int id, lun;
f4f051eb 1049
65d430fa 1050 fc_block_scsi_eh(cmd);
07db5183 1051
f4f051eb
AV		 1052 id = cmd->device->id;
1053 lun = cmd->device->lun;
1da177e4 1054
b0328bee 1055 if (!fcport)
f4f051eb 1056 return ret;
1da177e4 1057
e315cd28 1058 qla_printk(KERN_INFO, vha->hw,
749af3d5 1059 "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1060
e315cd28 1061 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1da177e4 1062 DEBUG2(printk("%s failed:board disabled\n",__func__));
f4f051eb 1063 goto eh_bus_reset_done;
1da177e4
LT		 1064 }
1065
e315cd28
AC		 1066 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
1067 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
f4f051eb 1068 ret = SUCCESS;
1da177e4 1069 }
f4f051eb
AV		 1070 if (ret == FAILED)
1071 goto eh_bus_reset_done;
1da177e4 1072
9a41a62b 1073 /* Flush outstanding commands. */
4d78c973 1074 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
523ec773 1075 QLA_SUCCESS)
9a41a62b 1076 ret = FAILED;
1da177e4 1077
f4f051eb 1078eh_bus_reset_done:
e315cd28 1079 qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
f4f051eb 1080 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1081
f4f051eb 1082 return ret;
1da177e4
LT		 1083}
1084
1085/**************************************************************************
1086* qla2xxx_eh_host_reset
1087*
1088* Description:
1089* The reset function will reset the Adapter.
1090*
1091* Input:
1092* cmd = Linux SCSI command packet of the command that cause the
1093* adapter reset.
1094*
1095* Returns:
1096* Either SUCCESS or FAILED.
1097*
1098* Note:
1099**************************************************************************/
e5f82ab8 1100static int
1da177e4
LT		 1101qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1102{
e315cd28 1103 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1104 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
e315cd28 1105 struct qla_hw_data *ha = vha->hw;
2c3dfe3f 1106 int ret = FAILED;
f4f051eb 1107 unsigned int id, lun;
e315cd28 1108 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 1109
65d430fa 1110 fc_block_scsi_eh(cmd);
07db5183 1111
f4f051eb
AV		 1112 id = cmd->device->id;
1113 lun = cmd->device->lun;
f4f051eb 1114
b0328bee 1115 if (!fcport)
f4f051eb 1116 return ret;
1da177e4 1117
1da177e4 1118 qla_printk(KERN_INFO, ha,
e315cd28 1119 "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1120
86fbee86 1121 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
f4f051eb 1122 goto eh_host_reset_lock;
1da177e4
LT		 1123
1124 /*
1125 * Fixme-may be dpc thread is active and processing
fa2a1ce5 1126 * loop_resync,so wait a while for it to
1da177e4
LT		 1127 * be completed and then issue big hammer.Otherwise
1128 * it may cause I/O failure as big hammer marks the
1129 * devices as lost kicking of the port_down_timer
1130 * while dpc is stuck for the mailbox to complete.
1131 */
e315cd28
AC		 1132 qla2x00_wait_for_loop_ready(vha);
1133 if (vha != base_vha) {
1134 if (qla2x00_vp_abort_isp(vha))
f4f051eb 1135 goto eh_host_reset_lock;
e315cd28 1136 } else {
a9083016
GM		 1137 if (IS_QLA82XX(vha->hw)) {
1138 if (!qla82xx_fcoe_ctx_reset(vha)) {
1139 /* Ctx reset success */
1140 ret = SUCCESS;
1141 goto eh_host_reset_lock;
1142 }
1143 /* fall thru if ctx reset failed */
1144 }
68ca949c
AC		 1145 if (ha->wq)
1146 flush_workqueue(ha->wq);
1147
e315cd28 1148 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 1149 if (ha->isp_ops->abort_isp(base_vha)) {
e315cd28
AC		 1150 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1151 /* failed. schedule dpc to try */
1152 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1153
1154 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
1155 goto eh_host_reset_lock;
1156 }
1157 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
fa2a1ce5 1158 }
1da177e4 1159
e315cd28 1160 /* Waiting for command to be returned to OS.*/
4d78c973 1161 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
e315cd28 1162 QLA_SUCCESS)
f4f051eb 1163 ret = SUCCESS;
1da177e4 1164
f4f051eb 1165eh_host_reset_lock:
f4f051eb
AV		 1166 qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
1167 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1168
f4f051eb
AV		 1169 return ret;
1170}
1da177e4
LT		 1171
1172/*
1173* qla2x00_loop_reset
1174* Issue loop reset.
1175*
1176* Input:
1177* ha = adapter block pointer.
1178*
1179* Returns:
1180* 0 = success
1181*/
a4722cf2 1182int
e315cd28 1183qla2x00_loop_reset(scsi_qla_host_t *vha)
1da177e4 1184{
0c8c39af 1185 int ret;
bdf79621 1186 struct fc_port *fcport;
e315cd28 1187 struct qla_hw_data *ha = vha->hw;
1da177e4 1188
f4c496c1 1189 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
55e5ed27
AV		 1190 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1191 if (fcport->port_type != FCT_TARGET)
1192 continue;
1193
1194 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1195 if (ret != QLA_SUCCESS) {
1196 DEBUG2_3(printk("%s(%ld): bus_reset failed: "
1197 "target_reset=%d d_id=%x.\n", __func__,
1198 vha->host_no, ret, fcport->d_id.b24));
1199 }
1200 }
1201 }
1202
a9083016 1203 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
e315cd28 1204 ret = qla2x00_full_login_lip(vha);
0c8c39af 1205 if (ret != QLA_SUCCESS) {
749af3d5 1206 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28 1207 "full_login_lip=%d.\n", __func__, vha->host_no,
0c8c39af 1208 ret));
749af3d5
AC		 1209 }
1210 atomic_set(&vha->loop_state, LOOP_DOWN);
1211 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1212 qla2x00_mark_all_devices_lost(vha, 0);
1213 qla2x00_wait_for_loop_ready(vha);
0c8c39af
AV		 1214 }
1215
0d6e61bc 1216 if (ha->flags.enable_lip_reset) {
e315cd28 1217 ret = qla2x00_lip_reset(vha);
0c8c39af 1218 if (ret != QLA_SUCCESS) {
749af3d5 1219 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28
AC		 1220 "lip_reset=%d.\n", __func__, vha->host_no, ret));
1221 } else
1222 qla2x00_wait_for_loop_ready(vha);
1da177e4
LT		 1223 }
1224
1da177e4 1225 /* Issue marker command only when we are going to start the I/O */
e315cd28 1226 vha->marker_needed = 1;
1da177e4 1227
0c8c39af 1228 return QLA_SUCCESS;
1da177e4
LT		 1229}
1230
df4bf0bb 1231void
e315cd28 1232qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
df4bf0bb 1233{
73208dfd 1234 int que, cnt;
df4bf0bb
AV		 1235 unsigned long flags;
1236 srb_t *sp;
ac280b67 1237 struct srb_ctx *ctx;
e315cd28 1238 struct qla_hw_data *ha = vha->hw;
73208dfd 1239 struct req_que *req;
df4bf0bb
AV		 1240
1241 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 1242 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 1243 req = ha->req_q_map[que];
73208dfd
AC		 1244 if (!req)
1245 continue;
1246 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1247 sp = req->outstanding_cmds[cnt];
e612d465 1248 if (sp) {
73208dfd 1249 req->outstanding_cmds[cnt] = NULL;
a9083016 1250 if (!sp->ctx ||
bad75002
AE		 1251 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1252 IS_PROT_IO(sp)) {
ac280b67
AV		 1253 sp->cmd->result = res;
1254 qla2x00_sp_compl(ha, sp);
1255 } else {
1256 ctx = sp->ctx;
6c452a45
AV		 1257 if (ctx->type == SRB_LOGIN_CMD ||
1258 ctx->type == SRB_LOGOUT_CMD) {
4916392b 1259 ctx->u.iocb_cmd->free(sp);
db3ad7f8 1260 } else {
6c452a45 1261 struct fc_bsg_job *bsg_job =
4916392b 1262 ctx->u.bsg_job;
6c452a45
AV		 1263 if (bsg_job->request->msgcode
1264 == FC_BSG_HST_CT)
db3ad7f8 1265 kfree(sp->fcport);
6c452a45
AV		 1266 bsg_job->req->errors = 0;
1267 bsg_job->reply->result = res;
4916392b 1268 bsg_job->job_done(bsg_job);
db3ad7f8 1269 kfree(sp->ctx);
6c452a45 1270 mempool_free(sp,
4916392b 1271 ha->srb_mempool);
db3ad7f8 1272 }
ac280b67 1273 }
73208dfd 1274 }
df4bf0bb
AV		 1275 }
1276 }
1277 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1278}
1279
f4f051eb
AV		 1280static int
1281qla2xxx_slave_alloc(struct scsi_device *sdev)
1da177e4 1282{
bdf79621 1283 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1da177e4 1284
19a7b4ae 1285 if (!rport || fc_remote_port_chkready(rport))
f4f051eb 1286 return -ENXIO;
bdf79621 1287
19a7b4ae 1288 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1da177e4 1289
f4f051eb
AV		 1290 return 0;
1291}
1da177e4 1292
f4f051eb
AV		 1293static int
1294qla2xxx_slave_configure(struct scsi_device *sdev)
1295{
e315cd28 1296 scsi_qla_host_t *vha = shost_priv(sdev->host);
2afa19a9 1297 struct req_que *req = vha->req;
8482e118 1298
f4f051eb 1299 if (sdev->tagged_supported)
73208dfd 1300 scsi_activate_tcq(sdev, req->max_q_depth);
f4f051eb 1301 else
73208dfd 1302 scsi_deactivate_tcq(sdev, req->max_q_depth);
f4f051eb
AV		 1303 return 0;
1304}
1da177e4 1305
f4f051eb
AV		 1306static void
1307qla2xxx_slave_destroy(struct scsi_device *sdev)
1308{
1309 sdev->hostdata = NULL;
1da177e4
LT		 1310}
1311
c45dd305
GM		 1312static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1313{
1314 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1315
1316 if (!scsi_track_queue_full(sdev, qdepth))
1317 return;
1318
1319 DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
1320 "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
1321 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1322 sdev->queue_depth));
1323}
1324
1325static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1326{
1327 fc_port_t *fcport = sdev->hostdata;
1328 struct scsi_qla_host *vha = fcport->vha;
1329 struct qla_hw_data *ha = vha->hw;
1330 struct req_que *req = NULL;
1331
1332 req = vha->req;
1333 if (!req)
1334 return;
1335
1336 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1337 return;
1338
1339 if (sdev->ordered_tags)
1340 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1341 else
1342 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1343
1344 DEBUG2(qla_printk(KERN_INFO, ha,
1345 "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
1346 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1347 sdev->queue_depth));
1348}
1349
ce7e4af7 1350static int
e881a172 1351qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
ce7e4af7 1352{
c45dd305
GM		 1353 switch (reason) {
1354 case SCSI_QDEPTH_DEFAULT:
1355 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1356 break;
1357 case SCSI_QDEPTH_QFULL:
1358 qla2x00_handle_queue_full(sdev, qdepth);
1359 break;
1360 case SCSI_QDEPTH_RAMP_UP:
1361 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1362 break;
1363 default:
08002af2 1364 return -EOPNOTSUPP;
c45dd305 1365 }
e881a172 1366
ce7e4af7
AV		 1367 return sdev->queue_depth;
1368}
1369
1370static int
1371qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1372{
1373 if (sdev->tagged_supported) {
1374 scsi_set_tag_type(sdev, tag_type);
1375 if (tag_type)
1376 scsi_activate_tcq(sdev, sdev->queue_depth);
1377 else
1378 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1379 } else
1380 tag_type = 0;
1381
1382 return tag_type;
1383}
1384
1da177e4
LT		 1385/**
1386 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1387 * @ha: HA context
1388 *
1389 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1390 * supported addressing method.
1391 */
1392static void
53303c42 1393qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1da177e4 1394{
7524f9b9 1395 /* Assume a 32bit DMA mask. */
1da177e4 1396 ha->flags.enable_64bit_addressing = 0;
1da177e4 1397
6a35528a 1398 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
7524f9b9
AV		 1399 /* Any upper-dword bits set? */
1400 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
6a35528a 1401 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
7524f9b9 1402 /* Ok, a 64bit DMA mask is applicable. */
1da177e4 1403 ha->flags.enable_64bit_addressing = 1;
fd34f556
AV		 1404 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1405 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
7524f9b9 1406 return;
1da177e4 1407 }
1da177e4 1408 }
7524f9b9 1409
284901a9
YH		 1410 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1411 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1da177e4
LT		 1412}
1413
fd34f556 1414static void
e315cd28 1415qla2x00_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1416{
1417 unsigned long flags = 0;
1418 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1419
1420 spin_lock_irqsave(&ha->hardware_lock, flags);
1421 ha->interrupts_on = 1;
1422 /* enable risc and host interrupts */
1423 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1424 RD_REG_WORD(&reg->ictrl);
1425 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1426
1427}
1428
1429static void
e315cd28 1430qla2x00_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1431{
1432 unsigned long flags = 0;
1433 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1434
1435 spin_lock_irqsave(&ha->hardware_lock, flags);
1436 ha->interrupts_on = 0;
1437 /* disable risc and host interrupts */
1438 WRT_REG_WORD(&reg->ictrl, 0);
1439 RD_REG_WORD(&reg->ictrl);
1440 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1441}
1442
1443static void
e315cd28 1444qla24xx_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1445{
1446 unsigned long flags = 0;
1447 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1448
1449 spin_lock_irqsave(&ha->hardware_lock, flags);
1450 ha->interrupts_on = 1;
1451 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1452 RD_REG_DWORD(&reg->ictrl);
1453 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1454}
1455
1456static void
e315cd28 1457qla24xx_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1458{
1459 unsigned long flags = 0;
1460 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1461
124f85e6
AV		 1462 if (IS_NOPOLLING_TYPE(ha))
1463 return;
fd34f556
AV		 1464 spin_lock_irqsave(&ha->hardware_lock, flags);
1465 ha->interrupts_on = 0;
1466 WRT_REG_DWORD(&reg->ictrl, 0);
1467 RD_REG_DWORD(&reg->ictrl);
1468 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1469}
1470
1471static struct isp_operations qla2100_isp_ops = {
1472 .pci_config = qla2100_pci_config,
1473 .reset_chip = qla2x00_reset_chip,
1474 .chip_diag = qla2x00_chip_diag,
1475 .config_rings = qla2x00_config_rings,
1476 .reset_adapter = qla2x00_reset_adapter,
1477 .nvram_config = qla2x00_nvram_config,
1478 .update_fw_options = qla2x00_update_fw_options,
1479 .load_risc = qla2x00_load_risc,
1480 .pci_info_str = qla2x00_pci_info_str,
1481 .fw_version_str = qla2x00_fw_version_str,
1482 .intr_handler = qla2100_intr_handler,
1483 .enable_intrs = qla2x00_enable_intrs,
1484 .disable_intrs = qla2x00_disable_intrs,
1485 .abort_command = qla2x00_abort_command,
523ec773
AV		 1486 .target_reset = qla2x00_abort_target,
1487 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1488 .fabric_login = qla2x00_login_fabric,
1489 .fabric_logout = qla2x00_fabric_logout,
1490 .calc_req_entries = qla2x00_calc_iocbs_32,
1491 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1492 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1493 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1494 .read_nvram = qla2x00_read_nvram_data,
1495 .write_nvram = qla2x00_write_nvram_data,
1496 .fw_dump = qla2100_fw_dump,
1497 .beacon_on = NULL,
1498 .beacon_off = NULL,
1499 .beacon_blink = NULL,
1500 .read_optrom = qla2x00_read_optrom_data,
1501 .write_optrom = qla2x00_write_optrom_data,
1502 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1503 .start_scsi = qla2x00_start_scsi,
a9083016 1504 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1505};
1506
1507static struct isp_operations qla2300_isp_ops = {
1508 .pci_config = qla2300_pci_config,
1509 .reset_chip = qla2x00_reset_chip,
1510 .chip_diag = qla2x00_chip_diag,
1511 .config_rings = qla2x00_config_rings,
1512 .reset_adapter = qla2x00_reset_adapter,
1513 .nvram_config = qla2x00_nvram_config,
1514 .update_fw_options = qla2x00_update_fw_options,
1515 .load_risc = qla2x00_load_risc,
1516 .pci_info_str = qla2x00_pci_info_str,
1517 .fw_version_str = qla2x00_fw_version_str,
1518 .intr_handler = qla2300_intr_handler,
1519 .enable_intrs = qla2x00_enable_intrs,
1520 .disable_intrs = qla2x00_disable_intrs,
1521 .abort_command = qla2x00_abort_command,
523ec773
AV		 1522 .target_reset = qla2x00_abort_target,
1523 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1524 .fabric_login = qla2x00_login_fabric,
1525 .fabric_logout = qla2x00_fabric_logout,
1526 .calc_req_entries = qla2x00_calc_iocbs_32,
1527 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1528 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1529 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1530 .read_nvram = qla2x00_read_nvram_data,
1531 .write_nvram = qla2x00_write_nvram_data,
1532 .fw_dump = qla2300_fw_dump,
1533 .beacon_on = qla2x00_beacon_on,
1534 .beacon_off = qla2x00_beacon_off,
1535 .beacon_blink = qla2x00_beacon_blink,
1536 .read_optrom = qla2x00_read_optrom_data,
1537 .write_optrom = qla2x00_write_optrom_data,
1538 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1539 .start_scsi = qla2x00_start_scsi,
a9083016 1540 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1541};
1542
1543static struct isp_operations qla24xx_isp_ops = {
1544 .pci_config = qla24xx_pci_config,
1545 .reset_chip = qla24xx_reset_chip,
1546 .chip_diag = qla24xx_chip_diag,
1547 .config_rings = qla24xx_config_rings,
1548 .reset_adapter = qla24xx_reset_adapter,
1549 .nvram_config = qla24xx_nvram_config,
1550 .update_fw_options = qla24xx_update_fw_options,
1551 .load_risc = qla24xx_load_risc,
1552 .pci_info_str = qla24xx_pci_info_str,
1553 .fw_version_str = qla24xx_fw_version_str,
1554 .intr_handler = qla24xx_intr_handler,
1555 .enable_intrs = qla24xx_enable_intrs,
1556 .disable_intrs = qla24xx_disable_intrs,
1557 .abort_command = qla24xx_abort_command,
523ec773
AV		 1558 .target_reset = qla24xx_abort_target,
1559 .lun_reset = qla24xx_lun_reset,
fd34f556
AV		 1560 .fabric_login = qla24xx_login_fabric,
1561 .fabric_logout = qla24xx_fabric_logout,
1562 .calc_req_entries = NULL,
1563 .build_iocbs = NULL,
1564 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1565 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1566 .read_nvram = qla24xx_read_nvram_data,
1567 .write_nvram = qla24xx_write_nvram_data,
1568 .fw_dump = qla24xx_fw_dump,
1569 .beacon_on = qla24xx_beacon_on,
1570 .beacon_off = qla24xx_beacon_off,
1571 .beacon_blink = qla24xx_beacon_blink,
1572 .read_optrom = qla24xx_read_optrom_data,
1573 .write_optrom = qla24xx_write_optrom_data,
1574 .get_flash_version = qla24xx_get_flash_version,
e315cd28 1575 .start_scsi = qla24xx_start_scsi,
a9083016 1576 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1577};
1578
c3a2f0df
AV		 1579static struct isp_operations qla25xx_isp_ops = {
1580 .pci_config = qla25xx_pci_config,
1581 .reset_chip = qla24xx_reset_chip,
1582 .chip_diag = qla24xx_chip_diag,
1583 .config_rings = qla24xx_config_rings,
1584 .reset_adapter = qla24xx_reset_adapter,
1585 .nvram_config = qla24xx_nvram_config,
1586 .update_fw_options = qla24xx_update_fw_options,
1587 .load_risc = qla24xx_load_risc,
1588 .pci_info_str = qla24xx_pci_info_str,
1589 .fw_version_str = qla24xx_fw_version_str,
1590 .intr_handler = qla24xx_intr_handler,
1591 .enable_intrs = qla24xx_enable_intrs,
1592 .disable_intrs = qla24xx_disable_intrs,
1593 .abort_command = qla24xx_abort_command,
523ec773
AV		 1594 .target_reset = qla24xx_abort_target,
1595 .lun_reset = qla24xx_lun_reset,
c3a2f0df
AV		 1596 .fabric_login = qla24xx_login_fabric,
1597 .fabric_logout = qla24xx_fabric_logout,
1598 .calc_req_entries = NULL,
1599 .build_iocbs = NULL,
1600 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1601 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1602 .read_nvram = qla25xx_read_nvram_data,
1603 .write_nvram = qla25xx_write_nvram_data,
1604 .fw_dump = qla25xx_fw_dump,
1605 .beacon_on = qla24xx_beacon_on,
1606 .beacon_off = qla24xx_beacon_off,
1607 .beacon_blink = qla24xx_beacon_blink,
338c9161 1608 .read_optrom = qla25xx_read_optrom_data,
c3a2f0df
AV		 1609 .write_optrom = qla24xx_write_optrom_data,
1610 .get_flash_version = qla24xx_get_flash_version,
bad75002 1611 .start_scsi = qla24xx_dif_start_scsi,
a9083016 1612 .abort_isp = qla2x00_abort_isp,
c3a2f0df
AV		 1613};
1614
3a03eb79
AV		 1615static struct isp_operations qla81xx_isp_ops = {
1616 .pci_config = qla25xx_pci_config,
1617 .reset_chip = qla24xx_reset_chip,
1618 .chip_diag = qla24xx_chip_diag,
1619 .config_rings = qla24xx_config_rings,
1620 .reset_adapter = qla24xx_reset_adapter,
1621 .nvram_config = qla81xx_nvram_config,
1622 .update_fw_options = qla81xx_update_fw_options,
eaac30be 1623 .load_risc = qla81xx_load_risc,
3a03eb79
AV		 1624 .pci_info_str = qla24xx_pci_info_str,
1625 .fw_version_str = qla24xx_fw_version_str,
1626 .intr_handler = qla24xx_intr_handler,
1627 .enable_intrs = qla24xx_enable_intrs,
1628 .disable_intrs = qla24xx_disable_intrs,
1629 .abort_command = qla24xx_abort_command,
1630 .target_reset = qla24xx_abort_target,
1631 .lun_reset = qla24xx_lun_reset,
1632 .fabric_login = qla24xx_login_fabric,
1633 .fabric_logout = qla24xx_fabric_logout,
1634 .calc_req_entries = NULL,
1635 .build_iocbs = NULL,
1636 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1637 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
3d79038f
AV		 1638 .read_nvram = NULL,
1639 .write_nvram = NULL,
3a03eb79
AV		 1640 .fw_dump = qla81xx_fw_dump,
1641 .beacon_on = qla24xx_beacon_on,
1642 .beacon_off = qla24xx_beacon_off,
1643 .beacon_blink = qla24xx_beacon_blink,
1644 .read_optrom = qla25xx_read_optrom_data,
1645 .write_optrom = qla24xx_write_optrom_data,
1646 .get_flash_version = qla24xx_get_flash_version,
ba77ef53 1647 .start_scsi = qla24xx_dif_start_scsi,
a9083016
GM		 1648 .abort_isp = qla2x00_abort_isp,
1649};
1650
1651static struct isp_operations qla82xx_isp_ops = {
1652 .pci_config = qla82xx_pci_config,
1653 .reset_chip = qla82xx_reset_chip,
1654 .chip_diag = qla24xx_chip_diag,
1655 .config_rings = qla82xx_config_rings,
1656 .reset_adapter = qla24xx_reset_adapter,
1657 .nvram_config = qla81xx_nvram_config,
1658 .update_fw_options = qla24xx_update_fw_options,
1659 .load_risc = qla82xx_load_risc,
1660 .pci_info_str = qla82xx_pci_info_str,
1661 .fw_version_str = qla24xx_fw_version_str,
1662 .intr_handler = qla82xx_intr_handler,
1663 .enable_intrs = qla82xx_enable_intrs,
1664 .disable_intrs = qla82xx_disable_intrs,
1665 .abort_command = qla24xx_abort_command,
1666 .target_reset = qla24xx_abort_target,
1667 .lun_reset = qla24xx_lun_reset,
1668 .fabric_login = qla24xx_login_fabric,
1669 .fabric_logout = qla24xx_fabric_logout,
1670 .calc_req_entries = NULL,
1671 .build_iocbs = NULL,
1672 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1673 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1674 .read_nvram = qla24xx_read_nvram_data,
1675 .write_nvram = qla24xx_write_nvram_data,
1676 .fw_dump = qla24xx_fw_dump,
1677 .beacon_on = qla24xx_beacon_on,
1678 .beacon_off = qla24xx_beacon_off,
1679 .beacon_blink = qla24xx_beacon_blink,
1680 .read_optrom = qla82xx_read_optrom_data,
1681 .write_optrom = qla82xx_write_optrom_data,
1682 .get_flash_version = qla24xx_get_flash_version,
1683 .start_scsi = qla82xx_start_scsi,
1684 .abort_isp = qla82xx_abort_isp,
3a03eb79
AV		 1685};
1686
ea5b6382 1687static inline void
e315cd28 1688qla2x00_set_isp_flags(struct qla_hw_data *ha)
ea5b6382
AV		 1689{
1690 ha->device_type = DT_EXTENDED_IDS;
1691 switch (ha->pdev->device) {
1692 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1693 ha->device_type |= DT_ISP2100;
1694 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1695 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382
AV		 1696 break;
1697 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1698 ha->device_type |= DT_ISP2200;
1699 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1700 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382
AV		 1701 break;
1702 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1703 ha->device_type |= DT_ISP2300;
4a59f71d 1704 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1705 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1706 break;
1707 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1708 ha->device_type |= DT_ISP2312;
4a59f71d 1709 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1710 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1711 break;
1712 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1713 ha->device_type |= DT_ISP2322;
4a59f71d 1714 ha->device_type |= DT_ZIO_SUPPORTED;
ea5b6382
AV		 1715 if (ha->pdev->subsystem_vendor == 0x1028 &&
1716 ha->pdev->subsystem_device == 0x0170)
1717 ha->device_type |= DT_OEM_001;
441d1072 1718 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1719 break;
1720 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1721 ha->device_type |= DT_ISP6312;
441d1072 1722 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1723 break;
1724 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1725 ha->device_type |= DT_ISP6322;
441d1072 1726 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1727 break;
1728 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1729 ha->device_type |= DT_ISP2422;
4a59f71d 1730 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1731 ha->device_type |= DT_FWI2;
c76f2c01 1732 ha->device_type |= DT_IIDMA;
441d1072 1733 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382
AV		 1734 break;
1735 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1736 ha->device_type |= DT_ISP2432;
4a59f71d 1737 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1738 ha->device_type |= DT_FWI2;
c76f2c01 1739 ha->device_type |= DT_IIDMA;
441d1072 1740 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1741 break;
4d4df193
HK		 1742 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1743 ha->device_type |= DT_ISP8432;
1744 ha->device_type |= DT_ZIO_SUPPORTED;
1745 ha->device_type |= DT_FWI2;
1746 ha->device_type |= DT_IIDMA;
1747 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1748 break;
044cc6c8
AV		 1749 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1750 ha->device_type |= DT_ISP5422;
e428924c 1751 ha->device_type |= DT_FWI2;
441d1072 1752 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1753 break;
044cc6c8
AV		 1754 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1755 ha->device_type |= DT_ISP5432;
e428924c 1756 ha->device_type |= DT_FWI2;
441d1072 1757 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1758 break;
c3a2f0df
AV		 1759 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1760 ha->device_type |= DT_ISP2532;
1761 ha->device_type |= DT_ZIO_SUPPORTED;
1762 ha->device_type |= DT_FWI2;
1763 ha->device_type |= DT_IIDMA;
441d1072 1764 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1765 break;
3a03eb79
AV		 1766 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1767 ha->device_type |= DT_ISP8001;
1768 ha->device_type |= DT_ZIO_SUPPORTED;
1769 ha->device_type |= DT_FWI2;
1770 ha->device_type |= DT_IIDMA;
1771 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1772 break;
a9083016
GM		 1773 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1774 ha->device_type |= DT_ISP8021;
1775 ha->device_type |= DT_ZIO_SUPPORTED;
1776 ha->device_type |= DT_FWI2;
1777 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1778 /* Initialize 82XX ISP flags */
1779 qla82xx_init_flags(ha);
1780 break;
ea5b6382 1781 }
e5b68a61 1782
a9083016
GM		 1783 if (IS_QLA82XX(ha))
1784 ha->port_no = !(ha->portnum & 1);
1785 else
1786 /* Get adapter physical port no from interrupt pin register. */
1787 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1788
e5b68a61
AC		 1789 if (ha->port_no & 1)
1790 ha->flags.port0 = 1;
1791 else
1792 ha->flags.port0 = 0;
ea5b6382
AV		 1793}
1794
1da177e4 1795static int
e315cd28 1796qla2x00_iospace_config(struct qla_hw_data *ha)
1da177e4 1797{
3776541d 1798 resource_size_t pio;
73208dfd 1799 uint16_t msix;
68ca949c 1800 int cpus;
1da177e4 1801
a9083016
GM		 1802 if (IS_QLA82XX(ha))
1803 return qla82xx_iospace_config(ha);
1804
285d0321
AV		 1805 if (pci_request_selected_regions(ha->pdev, ha->bars,
1806 QLA2XXX_DRIVER_NAME)) {
1807 qla_printk(KERN_WARNING, ha,
1808 "Failed to reserve PIO/MMIO regions (%s)\n",
1809 pci_name(ha->pdev));
1810
1811 goto iospace_error_exit;
1812 }
1813 if (!(ha->bars & 1))
1814 goto skip_pio;
1815
1da177e4
LT		 1816 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1817 pio = pci_resource_start(ha->pdev, 0);
3776541d
AV		 1818 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1819 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1da177e4
LT		 1820 qla_printk(KERN_WARNING, ha,
1821 "Invalid PCI I/O region size (%s)...\n",
1822 pci_name(ha->pdev));
1823 pio = 0;
1824 }
1825 } else {
1826 qla_printk(KERN_WARNING, ha,
1827 "region #0 not a PIO resource (%s)...\n",
1828 pci_name(ha->pdev));
1829 pio = 0;
1830 }
285d0321 1831 ha->pio_address = pio;
1da177e4 1832
285d0321 1833skip_pio:
1da177e4 1834 /* Use MMIO operations for all accesses. */
3776541d 1835 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1da177e4 1836 qla_printk(KERN_ERR, ha,
3776541d 1837 "region #1 not an MMIO resource (%s), aborting\n",
1da177e4
LT		 1838 pci_name(ha->pdev));
1839 goto iospace_error_exit;
1840 }
3776541d 1841 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1da177e4
LT		 1842 qla_printk(KERN_ERR, ha,
1843 "Invalid PCI mem region size (%s), aborting\n",
1844 pci_name(ha->pdev));
1845 goto iospace_error_exit;
1846 }
1847
3776541d 1848 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1da177e4
LT		 1849 if (!ha->iobase) {
1850 qla_printk(KERN_ERR, ha,
1851 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
1852
1853 goto iospace_error_exit;
1854 }
1855
73208dfd 1856 /* Determine queue resources */
2afa19a9 1857 ha->max_req_queues = ha->max_rsp_queues = 1;
d84a47c2
MH		 1858 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1859 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
2afa19a9 1860 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
17d98630 1861 goto mqiobase_exit;
d84a47c2 1862
17d98630
AC		 1863 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1864 pci_resource_len(ha->pdev, 3));
1865 if (ha->mqiobase) {
1866 /* Read MSIX vector size of the board */
1867 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1868 ha->msix_count = msix;
68ca949c
AC		 1869 /* Max queues are bounded by available msix vectors */
1870 /* queue 0 uses two msix vectors */
1871 if (ql2xmultique_tag) {
1872 cpus = num_online_cpus();
27dc9c5a 1873 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
68ca949c
AC		 1874 (cpus + 1) : (ha->msix_count - 1);
1875 ha->max_req_queues = 2;
1876 } else if (ql2xmaxqueues > 1) {
2afa19a9
AC		 1877 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1878 QLA_MQ_SIZE : ql2xmaxqueues;
1879 DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
1880 " of request queues:%d\n", ha->max_req_queues));
1881 }
68ca949c
AC		 1882 qla_printk(KERN_INFO, ha,
1883 "MSI-X vector count: %d\n", msix);
2afa19a9
AC		 1884 } else
1885 qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
17d98630
AC		 1886
1887mqiobase_exit:
2afa19a9 1888 ha->msix_count = ha->max_rsp_queues + 1;
1da177e4
LT		 1889 return (0);
1890
1891iospace_error_exit:
1892 return (-ENOMEM);
1893}
1894
1e99e33a
AV		 1895static void
1896qla2xxx_scan_start(struct Scsi_Host *shost)
1897{
e315cd28 1898 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1899
cbc8eb67
AV		 1900 if (vha->hw->flags.running_gold_fw)
1901 return;
1902
e315cd28
AC		 1903 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1904 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1905 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1906 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1e99e33a
AV		 1907}
1908
1909static int
1910qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1911{
e315cd28 1912 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1913
e315cd28 1914 if (!vha->host)
1e99e33a 1915 return 1;
e315cd28 1916 if (time > vha->hw->loop_reset_delay * HZ)
1e99e33a
AV		 1917 return 1;
1918
e315cd28 1919 return atomic_read(&vha->loop_state) == LOOP_READY;
1e99e33a
AV		 1920}
1921
1da177e4
LT		 1922/*
1923 * PCI driver interface
1924 */
7ee61397
AV		 1925static int __devinit
1926qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1da177e4 1927{
a1541d5a 1928 int ret = -ENODEV;
1da177e4 1929 struct Scsi_Host *host;
e315cd28
AC		 1930 scsi_qla_host_t *base_vha = NULL;
1931 struct qla_hw_data *ha;
29856e28 1932 char pci_info[30];
1da177e4 1933 char fw_str[30];
5433383e 1934 struct scsi_host_template *sht;
c51da4ec 1935 int bars, max_id, mem_only = 0;
e315cd28 1936 uint16_t req_length = 0, rsp_length = 0;
73208dfd
AC		 1937 struct req_que *req = NULL;
1938 struct rsp_que *rsp = NULL;
1da177e4 1939
285d0321 1940 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
a5326f86 1941 sht = &qla2xxx_driver_template;
5433383e 1942 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
8bc69e7d 1943 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
4d4df193 1944 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
8bc69e7d 1945 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
c3a2f0df 1946 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
3a03eb79 1947 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
a9083016
GM		 1948 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1949 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
285d0321 1950 bars = pci_select_bars(pdev, IORESOURCE_MEM);
09483916 1951 mem_only = 1;
285d0321
AV		 1952 }
1953
09483916
BH		 1954 if (mem_only) {
1955 if (pci_enable_device_mem(pdev))
1956 goto probe_out;
1957 } else {
1958 if (pci_enable_device(pdev))
1959 goto probe_out;
1960 }
285d0321 1961
0927678f
JB		 1962 /* This may fail but that's ok */
1963 pci_enable_pcie_error_reporting(pdev);
285d0321 1964
e315cd28
AC		 1965 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
1966 if (!ha) {
1967 DEBUG(printk("Unable to allocate memory for ha\n"));
1968 goto probe_out;
1da177e4 1969 }
e315cd28 1970 ha->pdev = pdev;
1da177e4
LT		 1971
1972 /* Clear our data area */
285d0321 1973 ha->bars = bars;
09483916 1974 ha->mem_only = mem_only;
df4bf0bb 1975 spin_lock_init(&ha->hardware_lock);
339aa70e 1976 spin_lock_init(&ha->vport_slock);
1da177e4 1977
ea5b6382
AV		 1978 /* Set ISP-type information. */
1979 qla2x00_set_isp_flags(ha);
ca79cf66
DG		 1980
1981 /* Set EEH reset type to fundamental if required by hba */
1982 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
1983 pdev->needs_freset = 1;
ca79cf66
DG		 1984 }
1985
1da177e4
LT		 1986 /* Configure PCI I/O space */
1987 ret = qla2x00_iospace_config(ha);
a1541d5a 1988 if (ret)
e315cd28 1989 goto probe_hw_failed;
1da177e4 1990
1da177e4 1991 qla_printk(KERN_INFO, ha,
5433383e
AV		 1992 "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
1993 ha->iobase);
1da177e4 1994
1da177e4 1995 ha->prev_topology = 0;
fca29703 1996 ha->init_cb_size = sizeof(init_cb_t);
d8b45213 1997 ha->link_data_rate = PORT_SPEED_UNKNOWN;
854165f4 1998 ha->optrom_size = OPTROM_SIZE_2300;
1da177e4 1999
abbd8870 2000 /* Assign ISP specific operations. */
e315cd28 2001 max_id = MAX_TARGETS_2200;
1da177e4 2002 if (IS_QLA2100(ha)) {
e315cd28 2003 max_id = MAX_TARGETS_2100;
1da177e4 2004 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
e315cd28
AC		 2005 req_length = REQUEST_ENTRY_CNT_2100;
2006 rsp_length = RESPONSE_ENTRY_CNT_2100;
2007 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 2008 ha->gid_list_info_size = 4;
3a03eb79
AV		 2009 ha->flash_conf_off = ~0;
2010 ha->flash_data_off = ~0;
2011 ha->nvram_conf_off = ~0;
2012 ha->nvram_data_off = ~0;
fd34f556 2013 ha->isp_ops = &qla2100_isp_ops;
1da177e4 2014 } else if (IS_QLA2200(ha)) {
1da177e4 2015 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2016 req_length = REQUEST_ENTRY_CNT_2200;
2017 rsp_length = RESPONSE_ENTRY_CNT_2100;
2018 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 2019 ha->gid_list_info_size = 4;
3a03eb79
AV		 2020 ha->flash_conf_off = ~0;
2021 ha->flash_data_off = ~0;
2022 ha->nvram_conf_off = ~0;
2023 ha->nvram_data_off = ~0;
fd34f556 2024 ha->isp_ops = &qla2100_isp_ops;
fca29703 2025 } else if (IS_QLA23XX(ha)) {
1da177e4 2026 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2027 req_length = REQUEST_ENTRY_CNT_2200;
2028 rsp_length = RESPONSE_ENTRY_CNT_2300;
2029 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
abbd8870 2030 ha->gid_list_info_size = 6;
854165f4
AV		 2031 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2032 ha->optrom_size = OPTROM_SIZE_2322;
3a03eb79
AV		 2033 ha->flash_conf_off = ~0;
2034 ha->flash_data_off = ~0;
2035 ha->nvram_conf_off = ~0;
2036 ha->nvram_data_off = ~0;
fd34f556 2037 ha->isp_ops = &qla2300_isp_ops;
4d4df193 2038 } else if (IS_QLA24XX_TYPE(ha)) {
fca29703 2039 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2040 req_length = REQUEST_ENTRY_CNT_24XX;
2041 rsp_length = RESPONSE_ENTRY_CNT_2300;
2042 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2c3dfe3f 2043 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
fca29703 2044 ha->gid_list_info_size = 8;
854165f4 2045 ha->optrom_size = OPTROM_SIZE_24XX;
73208dfd 2046 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
fd34f556 2047 ha->isp_ops = &qla24xx_isp_ops;
3a03eb79
AV		 2048 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2049 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2050 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2051 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
c3a2f0df 2052 } else if (IS_QLA25XX(ha)) {
c3a2f0df 2053 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2054 req_length = REQUEST_ENTRY_CNT_24XX;
2055 rsp_length = RESPONSE_ENTRY_CNT_2300;
2056 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
c3a2f0df 2057 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
c3a2f0df
AV		 2058 ha->gid_list_info_size = 8;
2059 ha->optrom_size = OPTROM_SIZE_25XX;
73208dfd 2060 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
c3a2f0df 2061 ha->isp_ops = &qla25xx_isp_ops;
3a03eb79
AV		 2062 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2063 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2064 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2065 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2066 } else if (IS_QLA81XX(ha)) {
2067 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2068 req_length = REQUEST_ENTRY_CNT_24XX;
2069 rsp_length = RESPONSE_ENTRY_CNT_2300;
2070 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2071 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2072 ha->gid_list_info_size = 8;
2073 ha->optrom_size = OPTROM_SIZE_81XX;
40859ae5 2074 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3a03eb79
AV		 2075 ha->isp_ops = &qla81xx_isp_ops;
2076 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2077 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2078 ha->nvram_conf_off = ~0;
2079 ha->nvram_data_off = ~0;
a9083016
GM		 2080 } else if (IS_QLA82XX(ha)) {
2081 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2082 req_length = REQUEST_ENTRY_CNT_82XX;
2083 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2084 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2085 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2086 ha->gid_list_info_size = 8;
2087 ha->optrom_size = OPTROM_SIZE_82XX;
2088 ha->isp_ops = &qla82xx_isp_ops;
2089 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2090 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2091 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2092 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
1da177e4 2093 }
1da177e4 2094
6c2f527c 2095 mutex_init(&ha->vport_lock);
0b05a1f0
MB		 2096 init_completion(&ha->mbx_cmd_comp);
2097 complete(&ha->mbx_cmd_comp);
2098 init_completion(&ha->mbx_intr_comp);
23f2ebd1 2099 init_completion(&ha->dcbx_comp);
1da177e4 2100
2c3dfe3f 2101 set_bit(0, (unsigned long *) ha->vp_idx_map);
1da177e4 2102
53303c42 2103 qla2x00_config_dma_addressing(ha);
73208dfd 2104 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
e315cd28 2105 if (!ret) {
1da177e4
LT		 2106 qla_printk(KERN_WARNING, ha,
2107 "[ERROR] Failed to allocate memory for adapter\n");
2108
e315cd28
AC		 2109 goto probe_hw_failed;
2110 }
2111
73208dfd 2112 req->max_q_depth = MAX_Q_DEPTH;
e315cd28 2113 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
73208dfd
AC		 2114 req->max_q_depth = ql2xmaxqdepth;
2115
e315cd28
AC		 2116
2117 base_vha = qla2x00_create_host(sht, ha);
2118 if (!base_vha) {
2119 qla_printk(KERN_WARNING, ha,
2120 "[ERROR] Failed to allocate memory for scsi_host\n");
2121
a1541d5a 2122 ret = -ENOMEM;
6e9f21f3 2123 qla2x00_mem_free(ha);
2afa19a9
AC		 2124 qla2x00_free_req_que(ha, req);
2125 qla2x00_free_rsp_que(ha, rsp);
e315cd28 2126 goto probe_hw_failed;
1da177e4
LT		 2127 }
2128
e315cd28
AC		 2129 pci_set_drvdata(pdev, base_vha);
2130
e315cd28 2131 host = base_vha->host;
2afa19a9 2132 base_vha->req = req;
73208dfd
AC		 2133 host->can_queue = req->length + 128;
2134 if (IS_QLA2XXX_MIDTYPE(ha))
e315cd28 2135 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
73208dfd 2136 else
e315cd28
AC		 2137 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2138 base_vha->vp_idx;
58548cb5
GM		 2139
2140 /* Set the SG table size based on ISP type */
2141 if (!IS_FWI2_CAPABLE(ha)) {
2142 if (IS_QLA2100(ha))
2143 host->sg_tablesize = 32;
2144 } else {
2145 if (!IS_QLA82XX(ha))
2146 host->sg_tablesize = QLA_SG_ALL;
2147 }
2148
e315cd28
AC		 2149 host->max_id = max_id;
2150 host->this_id = 255;
2151 host->cmd_per_lun = 3;
2152 host->unique_id = host->host_no;
0c470874
AE		 2153 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif)
2154 host->max_cmd_len = 32;
2155 else
2156 host->max_cmd_len = MAX_CMDSZ;
e315cd28
AC		 2157 host->max_channel = MAX_BUSES - 1;
2158 host->max_lun = MAX_LUNS;
2159 host->transportt = qla2xxx_transport_template;
9a069e19 2160 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
e315cd28 2161
73208dfd
AC		 2162 /* Set up the irqs */
2163 ret = qla2x00_request_irqs(ha, rsp);
2164 if (ret)
6e9f21f3 2165 goto probe_init_failed;
90a86fc0
JC		 2166
2167 pci_save_state(pdev);
2168
73208dfd 2169 /* Alloc arrays of request and response ring ptrs */
7163ea81 2170que_init:
73208dfd
AC		 2171 if (!qla2x00_alloc_queues(ha)) {
2172 qla_printk(KERN_WARNING, ha,
2173 "[ERROR] Failed to allocate memory for queue"
2174 " pointers\n");
6e9f21f3 2175 goto probe_init_failed;
73208dfd 2176 }
a9083016 2177
73208dfd
AC		 2178 ha->rsp_q_map[0] = rsp;
2179 ha->req_q_map[0] = req;
2afa19a9
AC		 2180 rsp->req = req;
2181 req->rsp = rsp;
2182 set_bit(0, ha->req_qid_map);
2183 set_bit(0, ha->rsp_qid_map);
08029990
AV		 2184 /* FWI2-capable only. */
2185 req->req_q_in = &ha->iobase->isp24.req_q_in;
2186 req->req_q_out = &ha->iobase->isp24.req_q_out;
2187 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2188 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
17d98630 2189 if (ha->mqenable) {
08029990
AV		 2190 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2191 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2192 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2193 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
17d98630
AC		 2194 }
2195
a9083016
GM		 2196 if (IS_QLA82XX(ha)) {
2197 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2198 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2199 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2200 }
2201
e315cd28 2202 if (qla2x00_initialize_adapter(base_vha)) {
1da177e4
LT		 2203 qla_printk(KERN_WARNING, ha,
2204 "Failed to initialize adapter\n");
2205
2206 DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
2207 "Adapter flags %x.\n",
e315cd28 2208 base_vha->host_no, base_vha->device_flags));
1da177e4 2209
a9083016
GM		 2210 if (IS_QLA82XX(ha)) {
2211 qla82xx_idc_lock(ha);
2212 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2213 QLA82XX_DEV_FAILED);
2214 qla82xx_idc_unlock(ha);
2215 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
2216 }
2217
a1541d5a 2218 ret = -ENODEV;
1da177e4
LT		 2219 goto probe_failed;
2220 }
2221
7163ea81
AC		 2222 if (ha->mqenable) {
2223 if (qla25xx_setup_mode(base_vha)) {
68ca949c
AC		 2224 qla_printk(KERN_WARNING, ha,
2225 "Can't create queues, falling back to single"
2226 " queue mode\n");
7163ea81
AC		 2227 goto que_init;
2228 }
2229 }
68ca949c 2230
cbc8eb67
AV		 2231 if (ha->flags.running_gold_fw)
2232 goto skip_dpc;
2233
1da177e4
LT		 2234 /*
2235 * Startup the kernel thread for this host adapter
2236 */
39a11240 2237 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
e315cd28 2238 "%s_dpc", base_vha->host_str);
39a11240 2239 if (IS_ERR(ha->dpc_thread)) {
1da177e4
LT		 2240 qla_printk(KERN_WARNING, ha,
2241 "Unable to start DPC thread!\n");
39a11240 2242 ret = PTR_ERR(ha->dpc_thread);
1da177e4
LT		 2243 goto probe_failed;
2244 }
1da177e4 2245
cbc8eb67 2246skip_dpc:
e315cd28
AC		 2247 list_add_tail(&base_vha->list, &ha->vp_list);
2248 base_vha->host->irq = ha->pdev->irq;
1da177e4
LT		 2249
2250 /* Initialized the timer */
e315cd28 2251 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
1da177e4
LT		 2252
2253 DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
e315cd28 2254 base_vha->host_no, ha));
d19044c3 2255
ba77ef53 2256 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) {
bad75002
AE		 2257 if (ha->fw_attributes & BIT_4) {
2258 base_vha->flags.difdix_supported = 1;
2259 DEBUG18(qla_printk(KERN_INFO, ha,
2260 "Registering for DIF/DIX type 1 and 3"
2261 " protection.\n"));
2262 scsi_host_set_prot(host,
2263 SHOST_DIF_TYPE1_PROTECTION
0c470874 2264 | SHOST_DIF_TYPE2_PROTECTION
bad75002
AE		 2265 | SHOST_DIF_TYPE3_PROTECTION
2266 | SHOST_DIX_TYPE1_PROTECTION
0c470874 2267 | SHOST_DIX_TYPE2_PROTECTION
bad75002
AE		 2268 | SHOST_DIX_TYPE3_PROTECTION);
2269 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2270 } else
2271 base_vha->flags.difdix_supported = 0;
2272 }
2273
a9083016
GM		 2274 ha->isp_ops->enable_intrs(ha);
2275
a1541d5a
AV		 2276 ret = scsi_add_host(host, &pdev->dev);
2277 if (ret)
2278 goto probe_failed;
2279
1486400f
MR		 2280 base_vha->flags.init_done = 1;
2281 base_vha->flags.online = 1;
2282
1e99e33a
AV		 2283 scsi_scan_host(host);
2284
e315cd28 2285 qla2x00_alloc_sysfs_attr(base_vha);
a1541d5a 2286
e315cd28 2287 qla2x00_init_host_attr(base_vha);
a1541d5a 2288
e315cd28 2289 qla2x00_dfs_setup(base_vha);
df613b96 2290
1da177e4
LT		 2291 qla_printk(KERN_INFO, ha, "\n"
2292 " QLogic Fibre Channel HBA Driver: %s\n"
2293 " QLogic %s - %s\n"
5433383e
AV		 2294 " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
2295 qla2x00_version_str, ha->model_number,
e315cd28
AC		 2296 ha->model_desc ? ha->model_desc : "", pdev->device,
2297 ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
2298 ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
2299 ha->isp_ops->fw_version_str(base_vha, fw_str));
1da177e4 2300
1da177e4
LT		 2301 return 0;
2302
6e9f21f3 2303probe_init_failed:
2afa19a9
AC		 2304 qla2x00_free_req_que(ha, req);
2305 qla2x00_free_rsp_que(ha, rsp);
2306 ha->max_req_queues = ha->max_rsp_queues = 0;
6e9f21f3 2307
1da177e4 2308probe_failed:
b9978769
AV		 2309 if (base_vha->timer_active)
2310 qla2x00_stop_timer(base_vha);
2311 base_vha->flags.online = 0;
2312 if (ha->dpc_thread) {
2313 struct task_struct *t = ha->dpc_thread;
2314
2315 ha->dpc_thread = NULL;
2316 kthread_stop(t);
2317 }
2318
e315cd28 2319 qla2x00_free_device(base_vha);
1da177e4 2320
e315cd28 2321 scsi_host_put(base_vha->host);
1da177e4 2322
e315cd28 2323probe_hw_failed:
a9083016
GM		 2324 if (IS_QLA82XX(ha)) {
2325 qla82xx_idc_lock(ha);
2326 qla82xx_clear_drv_active(ha);
2327 qla82xx_idc_unlock(ha);
2328 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2329 if (!ql2xdbwr)
2330 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2331 } else {
2332 if (ha->iobase)
2333 iounmap(ha->iobase);
2334 }
e315cd28
AC		 2335 pci_release_selected_regions(ha->pdev, ha->bars);
2336 kfree(ha);
2337 ha = NULL;
1da177e4 2338
a1541d5a 2339probe_out:
e315cd28 2340 pci_disable_device(pdev);
a1541d5a 2341 return ret;
1da177e4 2342}
1da177e4 2343
4c993f76 2344static void
7ee61397 2345qla2x00_remove_one(struct pci_dev *pdev)
1da177e4 2346{
feafb7b1 2347 scsi_qla_host_t *base_vha, *vha;
e315cd28 2348 struct qla_hw_data *ha;
feafb7b1 2349 unsigned long flags;
e315cd28
AC		 2350
2351 base_vha = pci_get_drvdata(pdev);
2352 ha = base_vha->hw;
2353
feafb7b1
AE		 2354 spin_lock_irqsave(&ha->vport_slock, flags);
2355 list_for_each_entry(vha, &ha->vp_list, list) {
2356 atomic_inc(&vha->vref_count);
2357
2358 if (vha && vha->fc_vport) {
2359 spin_unlock_irqrestore(&ha->vport_slock, flags);
2360
e315cd28 2361 fc_vport_terminate(vha->fc_vport);
feafb7b1
AE		 2362
2363 spin_lock_irqsave(&ha->vport_slock, flags);
2364 }
2365
2366 atomic_dec(&vha->vref_count);
e315cd28 2367 }
feafb7b1 2368 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 2369
e315cd28 2370 set_bit(UNLOADING, &base_vha->dpc_flags);
1da177e4 2371
b9978769
AV		 2372 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2373
e315cd28 2374 qla2x00_dfs_remove(base_vha);
c795c1e4 2375
e315cd28 2376 qla84xx_put_chip(base_vha);
c795c1e4 2377
b9978769
AV		 2378 /* Disable timer */
2379 if (base_vha->timer_active)
2380 qla2x00_stop_timer(base_vha);
2381
2382 base_vha->flags.online = 0;
2383
68ca949c
AC		 2384 /* Flush the work queue and remove it */
2385 if (ha->wq) {
2386 flush_workqueue(ha->wq);
2387 destroy_workqueue(ha->wq);
2388 ha->wq = NULL;
2389 }
2390
b9978769
AV		 2391 /* Kill the kernel thread for this host */
2392 if (ha->dpc_thread) {
2393 struct task_struct *t = ha->dpc_thread;
2394
2395 /*
2396 * qla2xxx_wake_dpc checks for ->dpc_thread
2397 * so we need to zero it out.
2398 */
2399 ha->dpc_thread = NULL;
2400 kthread_stop(t);
2401 }
2402
e315cd28 2403 qla2x00_free_sysfs_attr(base_vha);
df613b96 2404
e315cd28 2405 fc_remove_host(base_vha->host);
4d4df193 2406
e315cd28 2407 scsi_remove_host(base_vha->host);
1da177e4 2408
e315cd28 2409 qla2x00_free_device(base_vha);
bdf79621 2410
e315cd28 2411 scsi_host_put(base_vha->host);
1da177e4 2412
a9083016 2413 if (IS_QLA82XX(ha)) {
b963752f
GM		 2414 qla82xx_idc_lock(ha);
2415 qla82xx_clear_drv_active(ha);
2416 qla82xx_idc_unlock(ha);
2417
a9083016
GM		 2418 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2419 if (!ql2xdbwr)
2420 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2421 } else {
2422 if (ha->iobase)
2423 iounmap(ha->iobase);
1da177e4 2424
a9083016
GM		 2425 if (ha->mqiobase)
2426 iounmap(ha->mqiobase);
2427 }
73208dfd 2428
e315cd28
AC		 2429 pci_release_selected_regions(ha->pdev, ha->bars);
2430 kfree(ha);
2431 ha = NULL;
1da177e4 2432
90a86fc0
JC		 2433 pci_disable_pcie_error_reporting(pdev);
2434
665db93b 2435 pci_disable_device(pdev);
1da177e4
LT		 2436 pci_set_drvdata(pdev, NULL);
2437}
1da177e4
LT		 2438
2439static void
e315cd28 2440qla2x00_free_device(scsi_qla_host_t *vha)
1da177e4 2441{
e315cd28 2442 struct qla_hw_data *ha = vha->hw;
1da177e4 2443
85880801
AV		 2444 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2445
2446 /* Disable timer */
2447 if (vha->timer_active)
2448 qla2x00_stop_timer(vha);
2449
2450 /* Kill the kernel thread for this host */
2451 if (ha->dpc_thread) {
2452 struct task_struct *t = ha->dpc_thread;
2453
2454 /*
2455 * qla2xxx_wake_dpc checks for ->dpc_thread
2456 * so we need to zero it out.
2457 */
2458 ha->dpc_thread = NULL;
2459 kthread_stop(t);
2460 }
2461
2afa19a9
AC		 2462 qla25xx_delete_queues(vha);
2463
df613b96 2464 if (ha->flags.fce_enabled)
e315cd28 2465 qla2x00_disable_fce_trace(vha, NULL, NULL);
df613b96 2466
a7a167bf 2467 if (ha->eft)
e315cd28 2468 qla2x00_disable_eft_trace(vha);
a7a167bf 2469
f6ef3b18 2470 /* Stop currently executing firmware. */
e315cd28 2471 qla2x00_try_to_stop_firmware(vha);
1da177e4 2472
85880801
AV		 2473 vha->flags.online = 0;
2474
f6ef3b18 2475 /* turn-off interrupts on the card */
a9083016
GM		 2476 if (ha->interrupts_on) {
2477 vha->flags.init_done = 0;
fd34f556 2478 ha->isp_ops->disable_intrs(ha);
a9083016 2479 }
f6ef3b18 2480
e315cd28 2481 qla2x00_free_irqs(vha);
1da177e4 2482
8867048b
CD		 2483 qla2x00_free_fcports(vha);
2484
e315cd28 2485 qla2x00_mem_free(ha);
73208dfd
AC		 2486
2487 qla2x00_free_queues(ha);
1da177e4
LT		 2488}
2489
8867048b
CD		 2490void qla2x00_free_fcports(struct scsi_qla_host *vha)
2491{
2492 fc_port_t *fcport, *tfcport;
2493
2494 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2495 list_del(&fcport->list);
2496 kfree(fcport);
2497 fcport = NULL;
2498 }
2499}
2500
d97994dc 2501static inline void
e315cd28 2502qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
d97994dc
AV		 2503 int defer)
2504{
d97994dc 2505 struct fc_rport *rport;
67becc00 2506 scsi_qla_host_t *base_vha;
d97994dc
AV		 2507
2508 if (!fcport->rport)
2509 return;
2510
2511 rport = fcport->rport;
2512 if (defer) {
67becc00 2513 base_vha = pci_get_drvdata(vha->hw->pdev);
e315cd28 2514 spin_lock_irq(vha->host->host_lock);
d97994dc 2515 fcport->drport = rport;
e315cd28 2516 spin_unlock_irq(vha->host->host_lock);
67becc00
AV		 2517 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2518 qla2xxx_wake_dpc(base_vha);
5f3a9a20 2519 } else
d97994dc 2520 fc_remote_port_delete(rport);
d97994dc
AV		 2521}
2522
1da177e4
LT		 2523/*
2524 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2525 *
2526 * Input: ha = adapter block pointer. fcport = port structure pointer.
2527 *
2528 * Return: None.
2529 *
2530 * Context:
2531 */
e315cd28 2532void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
d97994dc 2533 int do_login, int defer)
1da177e4 2534{
2c3dfe3f 2535 if (atomic_read(&fcport->state) == FCS_ONLINE &&
e315cd28
AC		 2536 vha->vp_idx == fcport->vp_idx) {
2537 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2538 qla2x00_schedule_rport_del(vha, fcport, defer);
2539 }
fa2a1ce5 2540 /*
1da177e4
LT		 2541 * We may need to retry the login, so don't change the state of the
2542 * port but do the retries.
2543 */
2544 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2545 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2546
2547 if (!do_login)
2548 return;
2549
2550 if (fcport->login_retry == 0) {
e315cd28
AC		 2551 fcport->login_retry = vha->hw->login_retry_count;
2552 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2553
2554 DEBUG(printk("scsi(%ld): Port login retry: "
2555 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2556 "id = 0x%04x retry cnt=%d\n",
e315cd28 2557 vha->host_no,
1da177e4
LT		 2558 fcport->port_name[0],
2559 fcport->port_name[1],
2560 fcport->port_name[2],
2561 fcport->port_name[3],
2562 fcport->port_name[4],
2563 fcport->port_name[5],
2564 fcport->port_name[6],
2565 fcport->port_name[7],
2566 fcport->loop_id,
2567 fcport->login_retry));
2568 }
2569}
2570
2571/*
2572 * qla2x00_mark_all_devices_lost
2573 * Updates fcport state when device goes offline.
2574 *
2575 * Input:
2576 * ha = adapter block pointer.
2577 * fcport = port structure pointer.
2578 *
2579 * Return:
2580 * None.
2581 *
2582 * Context:
2583 */
2584void
e315cd28 2585qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
1da177e4
LT		 2586{
2587 fc_port_t *fcport;
2588
e315cd28 2589 list_for_each_entry(fcport, &vha->vp_fcports, list) {
0d6e61bc 2590 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
1da177e4 2591 continue;
0d6e61bc 2592
1da177e4
LT		 2593 /*
2594 * No point in marking the device as lost, if the device is
2595 * already DEAD.
2596 */
2597 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2598 continue;
e315cd28 2599 if (atomic_read(&fcport->state) == FCS_ONLINE) {
0d6e61bc
AV		 2600 if (defer)
2601 qla2x00_schedule_rport_del(vha, fcport, defer);
2602 else if (vha->vp_idx == fcport->vp_idx)
2603 qla2x00_schedule_rport_del(vha, fcport, defer);
2604 }
2605 atomic_set(&fcport->state, FCS_DEVICE_LOST);
1da177e4
LT		 2606 }
2607}
2608
2609/*
2610* qla2x00_mem_alloc
2611* Allocates adapter memory.
2612*
2613* Returns:
2614* 0 = success.
e8711085 2615* !0 = failure.
1da177e4 2616*/
e8711085 2617static int
73208dfd
AC		 2618qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2619 struct req_que **req, struct rsp_que **rsp)
1da177e4
LT		 2620{
2621 char name[16];
1da177e4 2622
e8711085 2623 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
e315cd28 2624 &ha->init_cb_dma, GFP_KERNEL);
e8711085 2625 if (!ha->init_cb)
e315cd28 2626 goto fail;
e8711085 2627
e315cd28
AC		 2628 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2629 &ha->gid_list_dma, GFP_KERNEL);
2630 if (!ha->gid_list)
e8711085 2631 goto fail_free_init_cb;
1da177e4 2632
e8711085
AV		 2633 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2634 if (!ha->srb_mempool)
e315cd28 2635 goto fail_free_gid_list;
e8711085 2636
a9083016
GM		 2637 if (IS_QLA82XX(ha)) {
2638 /* Allocate cache for CT6 Ctx. */
2639 if (!ctx_cachep) {
2640 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2641 sizeof(struct ct6_dsd), 0,
2642 SLAB_HWCACHE_ALIGN, NULL);
2643 if (!ctx_cachep)
2644 goto fail_free_gid_list;
2645 }
2646 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2647 ctx_cachep);
2648 if (!ha->ctx_mempool)
2649 goto fail_free_srb_mempool;
2650 }
2651
e8711085
AV		 2652 /* Get memory for cached NVRAM */
2653 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2654 if (!ha->nvram)
a9083016 2655 goto fail_free_ctx_mempool;
e8711085 2656
e315cd28
AC		 2657 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2658 ha->pdev->device);
2659 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2660 DMA_POOL_SIZE, 8, 0);
2661 if (!ha->s_dma_pool)
2662 goto fail_free_nvram;
2663
bad75002 2664 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2665 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2666 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2667 if (!ha->dl_dma_pool) {
2668 qla_printk(KERN_WARNING, ha,
2669 "Memory Allocation failed - dl_dma_pool\n");
2670 goto fail_s_dma_pool;
2671 }
2672
2673 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2674 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2675 if (!ha->fcp_cmnd_dma_pool) {
2676 qla_printk(KERN_WARNING, ha,
2677 "Memory Allocation failed - fcp_cmnd_dma_pool\n");
2678 goto fail_dl_dma_pool;
2679 }
2680 }
2681
e8711085
AV		 2682 /* Allocate memory for SNS commands */
2683 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
e315cd28 2684 /* Get consistent memory allocated for SNS commands */
e8711085 2685 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2686 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
e8711085 2687 if (!ha->sns_cmd)
e315cd28 2688 goto fail_dma_pool;
e8711085 2689 } else {
e315cd28 2690 /* Get consistent memory allocated for MS IOCB */
e8711085 2691 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
e315cd28 2692 &ha->ms_iocb_dma);
e8711085 2693 if (!ha->ms_iocb)
e315cd28
AC		 2694 goto fail_dma_pool;
2695 /* Get consistent memory allocated for CT SNS commands */
e8711085 2696 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2697 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
e8711085
AV		 2698 if (!ha->ct_sns)
2699 goto fail_free_ms_iocb;
1da177e4
LT		 2700 }
2701
e315cd28 2702 /* Allocate memory for request ring */
73208dfd
AC		 2703 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2704 if (!*req) {
e315cd28
AC		 2705 DEBUG(printk("Unable to allocate memory for req\n"));
2706 goto fail_req;
2707 }
73208dfd
AC		 2708 (*req)->length = req_len;
2709 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2710 ((*req)->length + 1) * sizeof(request_t),
2711 &(*req)->dma, GFP_KERNEL);
2712 if (!(*req)->ring) {
e315cd28
AC		 2713 DEBUG(printk("Unable to allocate memory for req_ring\n"));
2714 goto fail_req_ring;
2715 }
2716 /* Allocate memory for response ring */
73208dfd
AC		 2717 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2718 if (!*rsp) {
2719 qla_printk(KERN_WARNING, ha,
2720 "Unable to allocate memory for rsp\n");
e315cd28
AC		 2721 goto fail_rsp;
2722 }
73208dfd
AC		 2723 (*rsp)->hw = ha;
2724 (*rsp)->length = rsp_len;
2725 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2726 ((*rsp)->length + 1) * sizeof(response_t),
2727 &(*rsp)->dma, GFP_KERNEL);
2728 if (!(*rsp)->ring) {
2729 qla_printk(KERN_WARNING, ha,
2730 "Unable to allocate memory for rsp_ring\n");
e315cd28
AC		 2731 goto fail_rsp_ring;
2732 }
73208dfd
AC		 2733 (*req)->rsp = *rsp;
2734 (*rsp)->req = *req;
2735 /* Allocate memory for NVRAM data for vports */
2736 if (ha->nvram_npiv_size) {
2737 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2738 ha->nvram_npiv_size, GFP_KERNEL);
2739 if (!ha->npiv_info) {
2740 qla_printk(KERN_WARNING, ha,
2741 "Unable to allocate memory for npiv info\n");
2742 goto fail_npiv_info;
2743 }
2744 } else
2745 ha->npiv_info = NULL;
e8711085 2746
b64b0e8f 2747 /* Get consistent memory allocated for EX-INIT-CB. */
a9083016 2748 if (IS_QLA8XXX_TYPE(ha)) {
b64b0e8f
AV		 2749 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2750 &ha->ex_init_cb_dma);
2751 if (!ha->ex_init_cb)
2752 goto fail_ex_init_cb;
2753 }
2754
a9083016
GM		 2755 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2756
5ff1d584
AV		 2757 /* Get consistent memory allocated for Async Port-Database. */
2758 if (!IS_FWI2_CAPABLE(ha)) {
2759 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2760 &ha->async_pd_dma);
2761 if (!ha->async_pd)
2762 goto fail_async_pd;
2763 }
2764
e315cd28
AC		 2765 INIT_LIST_HEAD(&ha->vp_list);
2766 return 1;
2767
5ff1d584
AV		 2768fail_async_pd:
2769 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f
AV		 2770fail_ex_init_cb:
2771 kfree(ha->npiv_info);
73208dfd
AC		 2772fail_npiv_info:
2773 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2774 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2775 (*rsp)->ring = NULL;
2776 (*rsp)->dma = 0;
e315cd28 2777fail_rsp_ring:
73208dfd 2778 kfree(*rsp);
e315cd28 2779fail_rsp:
73208dfd
AC		 2780 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2781 sizeof(request_t), (*req)->ring, (*req)->dma);
2782 (*req)->ring = NULL;
2783 (*req)->dma = 0;
e315cd28 2784fail_req_ring:
73208dfd 2785 kfree(*req);
e315cd28
AC		 2786fail_req:
2787 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2788 ha->ct_sns, ha->ct_sns_dma);
2789 ha->ct_sns = NULL;
2790 ha->ct_sns_dma = 0;
e8711085
AV		 2791fail_free_ms_iocb:
2792 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2793 ha->ms_iocb = NULL;
2794 ha->ms_iocb_dma = 0;
e315cd28 2795fail_dma_pool:
bad75002 2796 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2797 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2798 ha->fcp_cmnd_dma_pool = NULL;
2799 }
2800fail_dl_dma_pool:
bad75002 2801 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2802 dma_pool_destroy(ha->dl_dma_pool);
2803 ha->dl_dma_pool = NULL;
2804 }
2805fail_s_dma_pool:
e315cd28
AC		 2806 dma_pool_destroy(ha->s_dma_pool);
2807 ha->s_dma_pool = NULL;
e8711085
AV		 2808fail_free_nvram:
2809 kfree(ha->nvram);
2810 ha->nvram = NULL;
a9083016
GM		 2811fail_free_ctx_mempool:
2812 mempool_destroy(ha->ctx_mempool);
2813 ha->ctx_mempool = NULL;
e8711085
AV		 2814fail_free_srb_mempool:
2815 mempool_destroy(ha->srb_mempool);
2816 ha->srb_mempool = NULL;
e8711085
AV		 2817fail_free_gid_list:
2818 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2819 ha->gid_list_dma);
e8711085
AV		 2820 ha->gid_list = NULL;
2821 ha->gid_list_dma = 0;
e315cd28
AC		 2822fail_free_init_cb:
2823 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
2824 ha->init_cb_dma);
2825 ha->init_cb = NULL;
2826 ha->init_cb_dma = 0;
e8711085 2827fail:
e315cd28 2828 DEBUG(printk("%s: Memory allocation failure\n", __func__));
e8711085 2829 return -ENOMEM;
1da177e4
LT		 2830}
2831
2832/*
2833* qla2x00_mem_free
2834* Frees all adapter allocated memory.
2835*
2836* Input:
2837* ha = adapter block pointer.
2838*/
a824ebb3 2839static void
e315cd28 2840qla2x00_mem_free(struct qla_hw_data *ha)
1da177e4 2841{
e8711085
AV		 2842 if (ha->srb_mempool)
2843 mempool_destroy(ha->srb_mempool);
1da177e4 2844
df613b96
AV		 2845 if (ha->fce)
2846 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
e315cd28 2847 ha->fce_dma);
df613b96 2848
a7a167bf
AV		 2849 if (ha->fw_dump) {
2850 if (ha->eft)
2851 dma_free_coherent(&ha->pdev->dev,
e315cd28 2852 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
a7a167bf
AV		 2853 vfree(ha->fw_dump);
2854 }
2855
11bbc1d8
AV		 2856 if (ha->dcbx_tlv)
2857 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
2858 ha->dcbx_tlv, ha->dcbx_tlv_dma);
2859
ce0423f4
AV		 2860 if (ha->xgmac_data)
2861 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
2862 ha->xgmac_data, ha->xgmac_data_dma);
2863
1da177e4
LT		 2864 if (ha->sns_cmd)
2865 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
e315cd28 2866 ha->sns_cmd, ha->sns_cmd_dma);
1da177e4
LT		 2867
2868 if (ha->ct_sns)
2869 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
e315cd28 2870 ha->ct_sns, ha->ct_sns_dma);
1da177e4 2871
88729e53
AV		 2872 if (ha->sfp_data)
2873 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
2874
ad0ecd61
JC		 2875 if (ha->edc_data)
2876 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
2877
1da177e4
LT		 2878 if (ha->ms_iocb)
2879 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2880
b64b0e8f 2881 if (ha->ex_init_cb)
a9083016
GM		 2882 dma_pool_free(ha->s_dma_pool,
2883 ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f 2884
5ff1d584
AV		 2885 if (ha->async_pd)
2886 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
2887
1da177e4
LT		 2888 if (ha->s_dma_pool)
2889 dma_pool_destroy(ha->s_dma_pool);
2890
1da177e4
LT		 2891 if (ha->gid_list)
2892 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2893 ha->gid_list_dma);
1da177e4 2894
a9083016
GM		 2895 if (IS_QLA82XX(ha)) {
2896 if (!list_empty(&ha->gbl_dsd_list)) {
2897 struct dsd_dma *dsd_ptr, *tdsd_ptr;
2898
2899 /* clean up allocated prev pool */
2900 list_for_each_entry_safe(dsd_ptr,
2901 tdsd_ptr, &ha->gbl_dsd_list, list) {
2902 dma_pool_free(ha->dl_dma_pool,
2903 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
2904 list_del(&dsd_ptr->list);
2905 kfree(dsd_ptr);
2906 }
2907 }
2908 }
2909
2910 if (ha->dl_dma_pool)
2911 dma_pool_destroy(ha->dl_dma_pool);
2912
2913 if (ha->fcp_cmnd_dma_pool)
2914 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2915
2916 if (ha->ctx_mempool)
2917 mempool_destroy(ha->ctx_mempool);
2918
e315cd28
AC		 2919 if (ha->init_cb)
2920 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
a9083016 2921 ha->init_cb, ha->init_cb_dma);
e315cd28
AC		 2922 vfree(ha->optrom_buffer);
2923 kfree(ha->nvram);
73208dfd 2924 kfree(ha->npiv_info);
1da177e4 2925
e8711085 2926 ha->srb_mempool = NULL;
a9083016 2927 ha->ctx_mempool = NULL;
a7a167bf
AV		 2928 ha->eft = NULL;
2929 ha->eft_dma = 0;
1da177e4
LT		 2930 ha->sns_cmd = NULL;
2931 ha->sns_cmd_dma = 0;
2932 ha->ct_sns = NULL;
2933 ha->ct_sns_dma = 0;
2934 ha->ms_iocb = NULL;
2935 ha->ms_iocb_dma = 0;
1da177e4
LT		 2936 ha->init_cb = NULL;
2937 ha->init_cb_dma = 0;
b64b0e8f
AV		 2938 ha->ex_init_cb = NULL;
2939 ha->ex_init_cb_dma = 0;
5ff1d584
AV		 2940 ha->async_pd = NULL;
2941 ha->async_pd_dma = 0;
1da177e4
LT		 2942
2943 ha->s_dma_pool = NULL;
a9083016
GM		 2944 ha->dl_dma_pool = NULL;
2945 ha->fcp_cmnd_dma_pool = NULL;
1da177e4 2946
1da177e4
LT		 2947 ha->gid_list = NULL;
2948 ha->gid_list_dma = 0;
2949
e315cd28
AC		 2950 ha->fw_dump = NULL;
2951 ha->fw_dumped = 0;
2952 ha->fw_dump_reading = 0;
e315cd28 2953}
1da177e4 2954
e315cd28
AC		 2955struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
2956 struct qla_hw_data *ha)
2957{
2958 struct Scsi_Host *host;
2959 struct scsi_qla_host *vha = NULL;
854165f4 2960
e315cd28
AC		 2961 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
2962 if (host == NULL) {
2963 printk(KERN_WARNING
2964 "qla2xxx: Couldn't allocate host from scsi layer!\n");
2965 goto fail;
2966 }
2967
2968 /* Clear our data area */
2969 vha = shost_priv(host);
2970 memset(vha, 0, sizeof(scsi_qla_host_t));
2971
2972 vha->host = host;
2973 vha->host_no = host->host_no;
2974 vha->hw = ha;
2975
2976 INIT_LIST_HEAD(&vha->vp_fcports);
2977 INIT_LIST_HEAD(&vha->work_list);
2978 INIT_LIST_HEAD(&vha->list);
2979
f999f4c1
AV		 2980 spin_lock_init(&vha->work_lock);
2981
e315cd28
AC		 2982 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
2983 return vha;
2984
2985fail:
2986 return vha;
1da177e4
LT		 2987}
2988
01ef66bb 2989static struct qla_work_evt *
f999f4c1 2990qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
0971de7f
AV		 2991{
2992 struct qla_work_evt *e;
feafb7b1
AE		 2993 uint8_t bail;
2994
2995 QLA_VHA_MARK_BUSY(vha, bail);
2996 if (bail)
2997 return NULL;
0971de7f 2998
f999f4c1 2999 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
feafb7b1
AE		 3000 if (!e) {
3001 QLA_VHA_MARK_NOT_BUSY(vha);
0971de7f 3002 return NULL;
feafb7b1 3003 }
0971de7f
AV		 3004
3005 INIT_LIST_HEAD(&e->list);
3006 e->type = type;
3007 e->flags = QLA_EVT_FLAG_FREE;
3008 return e;
3009}
3010
01ef66bb 3011static int
f999f4c1 3012qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
0971de7f 3013{
f999f4c1 3014 unsigned long flags;
0971de7f 3015
f999f4c1 3016 spin_lock_irqsave(&vha->work_lock, flags);
e315cd28 3017 list_add_tail(&e->list, &vha->work_list);
f999f4c1 3018 spin_unlock_irqrestore(&vha->work_lock, flags);
e315cd28 3019 qla2xxx_wake_dpc(vha);
f999f4c1 3020
0971de7f
AV		 3021 return QLA_SUCCESS;
3022}
3023
3024int
e315cd28 3025qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
0971de7f
AV		 3026 u32 data)
3027{
3028 struct qla_work_evt *e;
3029
f999f4c1 3030 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
0971de7f
AV		 3031 if (!e)
3032 return QLA_FUNCTION_FAILED;
3033
3034 e->u.aen.code = code;
3035 e->u.aen.data = data;
f999f4c1 3036 return qla2x00_post_work(vha, e);
0971de7f
AV		 3037}
3038
8a659571
AV		 3039int
3040qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3041{
3042 struct qla_work_evt *e;
3043
f999f4c1 3044 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
8a659571
AV		 3045 if (!e)
3046 return QLA_FUNCTION_FAILED;
3047
3048 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
f999f4c1 3049 return qla2x00_post_work(vha, e);
8a659571
AV		 3050}
3051
ac280b67
AV		 3052#define qla2x00_post_async_work(name, type) \
3053int qla2x00_post_async_##name##_work( \
3054 struct scsi_qla_host *vha, \
3055 fc_port_t *fcport, uint16_t *data) \
3056{ \
3057 struct qla_work_evt *e; \
3058 \
3059 e = qla2x00_alloc_work(vha, type); \
3060 if (!e) \
3061 return QLA_FUNCTION_FAILED; \
3062 \
3063 e->u.logio.fcport = fcport; \
3064 if (data) { \
3065 e->u.logio.data[0] = data[0]; \
3066 e->u.logio.data[1] = data[1]; \
3067 } \
3068 return qla2x00_post_work(vha, e); \
3069}
3070
3071qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3072qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3073qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3074qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
5ff1d584
AV		 3075qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3076qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
ac280b67 3077
3420d36c
AV		 3078int
3079qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3080{
3081 struct qla_work_evt *e;
3082
3083 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3084 if (!e)
3085 return QLA_FUNCTION_FAILED;
3086
3087 e->u.uevent.code = code;
3088 return qla2x00_post_work(vha, e);
3089}
3090
3091static void
3092qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3093{
3094 char event_string[40];
3095 char *envp[] = { event_string, NULL };
3096
3097 switch (code) {
3098 case QLA_UEVENT_CODE_FW_DUMP:
3099 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3100 vha->host_no);
3101 break;
3102 default:
3103 /* do nothing */
3104 break;
3105 }
3106 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3107}
3108
ac280b67 3109void
e315cd28 3110qla2x00_do_work(struct scsi_qla_host *vha)
0971de7f 3111{
f999f4c1
AV		 3112 struct qla_work_evt *e, *tmp;
3113 unsigned long flags;
3114 LIST_HEAD(work);
0971de7f 3115
f999f4c1
AV		 3116 spin_lock_irqsave(&vha->work_lock, flags);
3117 list_splice_init(&vha->work_list, &work);
3118 spin_unlock_irqrestore(&vha->work_lock, flags);
3119
3120 list_for_each_entry_safe(e, tmp, &work, list) {
0971de7f 3121 list_del_init(&e->list);
0971de7f
AV		 3122
3123 switch (e->type) {
3124 case QLA_EVT_AEN:
e315cd28 3125 fc_host_post_event(vha->host, fc_get_event_number(),
0971de7f
AV		 3126 e->u.aen.code, e->u.aen.data);
3127 break;
8a659571
AV		 3128 case QLA_EVT_IDC_ACK:
3129 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3130 break;
ac280b67
AV		 3131 case QLA_EVT_ASYNC_LOGIN:
3132 qla2x00_async_login(vha, e->u.logio.fcport,
3133 e->u.logio.data);
3134 break;
3135 case QLA_EVT_ASYNC_LOGIN_DONE:
3136 qla2x00_async_login_done(vha, e->u.logio.fcport,
3137 e->u.logio.data);
3138 break;
3139 case QLA_EVT_ASYNC_LOGOUT:
3140 qla2x00_async_logout(vha, e->u.logio.fcport);
3141 break;
3142 case QLA_EVT_ASYNC_LOGOUT_DONE:
3143 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3144 e->u.logio.data);
3145 break;
5ff1d584
AV		 3146 case QLA_EVT_ASYNC_ADISC:
3147 qla2x00_async_adisc(vha, e->u.logio.fcport,
3148 e->u.logio.data);
3149 break;
3150 case QLA_EVT_ASYNC_ADISC_DONE:
3151 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3152 e->u.logio.data);
3153 break;
3420d36c
AV		 3154 case QLA_EVT_UEVENT:
3155 qla2x00_uevent_emit(vha, e->u.uevent.code);
3156 break;
0971de7f
AV		 3157 }
3158 if (e->flags & QLA_EVT_FLAG_FREE)
3159 kfree(e);
feafb7b1
AE		 3160
3161 /* For each work completed decrement vha ref count */
3162 QLA_VHA_MARK_NOT_BUSY(vha);
e315cd28 3163 }
e315cd28 3164}
f999f4c1 3165
e315cd28
AC		 3166/* Relogins all the fcports of a vport
3167 * Context: dpc thread
3168 */
3169void qla2x00_relogin(struct scsi_qla_host *vha)
3170{
3171 fc_port_t *fcport;
c6b2fca8 3172 int status;
e315cd28
AC		 3173 uint16_t next_loopid = 0;
3174 struct qla_hw_data *ha = vha->hw;
ac280b67 3175 uint16_t data[2];
e315cd28
AC		 3176
3177 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3178 /*
3179 * If the port is not ONLINE then try to login
3180 * to it if we haven't run out of retries.
3181 */
5ff1d584
AV		 3182 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3183 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
ac280b67 3184 fcport->login_retry--;
e315cd28 3185 if (fcport->flags & FCF_FABRIC_DEVICE) {
f08b7251 3186 if (fcport->flags & FCF_FCP2_DEVICE)
e315cd28
AC		 3187 ha->isp_ops->fabric_logout(vha,
3188 fcport->loop_id,
3189 fcport->d_id.b.domain,
3190 fcport->d_id.b.area,
3191 fcport->d_id.b.al_pa);
3192
ac280b67 3193 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584 3194 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3195 data[0] = 0;
3196 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3197 status = qla2x00_post_async_login_work(
3198 vha, fcport, data);
3199 if (status == QLA_SUCCESS)
3200 continue;
3201 /* Attempt a retry. */
3202 status = 1;
3203 } else
3204 status = qla2x00_fabric_login(vha,
3205 fcport, &next_loopid);
e315cd28
AC		 3206 } else
3207 status = qla2x00_local_device_login(vha,
3208 fcport);
3209
e315cd28
AC		 3210 if (status == QLA_SUCCESS) {
3211 fcport->old_loop_id = fcport->loop_id;
3212
3213 DEBUG(printk("scsi(%ld): port login OK: logged "
3214 "in ID 0x%x\n", vha->host_no, fcport->loop_id));
3215
3216 qla2x00_update_fcport(vha, fcport);
3217
3218 } else if (status == 1) {
3219 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3220 /* retry the login again */
3221 DEBUG(printk("scsi(%ld): Retrying"
3222 " %d login again loop_id 0x%x\n",
3223 vha->host_no, fcport->login_retry,
3224 fcport->loop_id));
3225 } else {
3226 fcport->login_retry = 0;
3227 }
3228
3229 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3230 fcport->loop_id = FC_NO_LOOP_ID;
3231 }
3232 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3233 break;
0971de7f 3234 }
0971de7f
AV		 3235}
3236
1da177e4
LT		 3237/**************************************************************************
3238* qla2x00_do_dpc
3239* This kernel thread is a task that is schedule by the interrupt handler
3240* to perform the background processing for interrupts.
3241*
3242* Notes:
3243* This task always run in the context of a kernel thread. It
3244* is kick-off by the driver's detect code and starts up
3245* up one per adapter. It immediately goes to sleep and waits for
3246* some fibre event. When either the interrupt handler or
3247* the timer routine detects a event it will one of the task
3248* bits then wake us up.
3249**************************************************************************/
3250static int
3251qla2x00_do_dpc(void *data)
3252{
2c3dfe3f 3253 int rval;
e315cd28
AC		 3254 scsi_qla_host_t *base_vha;
3255 struct qla_hw_data *ha;
1da177e4 3256
e315cd28
AC		 3257 ha = (struct qla_hw_data *)data;
3258 base_vha = pci_get_drvdata(ha->pdev);
1da177e4 3259
1da177e4
LT		 3260 set_user_nice(current, -20);
3261
39a11240 3262 while (!kthread_should_stop()) {
1da177e4
LT		 3263 DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
3264
39a11240
CH		 3265 set_current_state(TASK_INTERRUPTIBLE);
3266 schedule();
3267 __set_current_state(TASK_RUNNING);
1da177e4
LT		 3268
3269 DEBUG3(printk("qla2x00: DPC handler waking up\n"));
3270
3271 /* Initialization not yet finished. Don't do anything yet. */
e315cd28 3272 if (!base_vha->flags.init_done)
1da177e4
LT		 3273 continue;
3274
85880801
AV		 3275 if (ha->flags.eeh_busy) {
3276 DEBUG17(qla_printk(KERN_WARNING, ha,
3277 "qla2x00_do_dpc: dpc_flags: %lx\n",
3278 base_vha->dpc_flags));
3279 continue;
3280 }
3281
e315cd28 3282 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
1da177e4
LT		 3283
3284 ha->dpc_active = 1;
3285
1da177e4 3286 if (ha->flags.mbox_busy) {
1da177e4
LT		 3287 ha->dpc_active = 0;
3288 continue;
3289 }
3290
e315cd28 3291 qla2x00_do_work(base_vha);
0971de7f 3292
a9083016
GM		 3293 if (IS_QLA82XX(ha)) {
3294 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3295 &base_vha->dpc_flags)) {
3296 qla82xx_idc_lock(ha);
3297 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3298 QLA82XX_DEV_FAILED);
3299 qla82xx_idc_unlock(ha);
3300 qla_printk(KERN_INFO, ha,
3301 "HW State: FAILED\n");
3302 qla82xx_device_state_handler(base_vha);
3303 continue;
3304 }
3305
3306 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3307 &base_vha->dpc_flags)) {
3308
3309 DEBUG(printk(KERN_INFO
3310 "scsi(%ld): dpc: sched "
3311 "qla82xx_fcoe_ctx_reset ha = %p\n",
3312 base_vha->host_no, ha));
3313 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3314 &base_vha->dpc_flags))) {
3315 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3316 /* FCoE-ctx reset failed.
3317 * Escalate to chip-reset
3318 */
3319 set_bit(ISP_ABORT_NEEDED,
3320 &base_vha->dpc_flags);
3321 }
3322 clear_bit(ABORT_ISP_ACTIVE,
3323 &base_vha->dpc_flags);
3324 }
3325
3326 DEBUG(printk("scsi(%ld): dpc:"
3327 " qla82xx_fcoe_ctx_reset end\n",
3328 base_vha->host_no));
3329 }
3330 }
3331
e315cd28
AC		 3332 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3333 &base_vha->dpc_flags)) {
1da177e4
LT		 3334
3335 DEBUG(printk("scsi(%ld): dpc: sched "
3336 "qla2x00_abort_isp ha = %p\n",
e315cd28 3337 base_vha->host_no, ha));
1da177e4 3338 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
e315cd28 3339 &base_vha->dpc_flags))) {
1da177e4 3340
a9083016 3341 if (ha->isp_ops->abort_isp(base_vha)) {
1da177e4
LT		 3342 /* failed. retry later */
3343 set_bit(ISP_ABORT_NEEDED,
e315cd28 3344 &base_vha->dpc_flags);
99363ef8 3345 }
e315cd28
AC		 3346 clear_bit(ABORT_ISP_ACTIVE,
3347 &base_vha->dpc_flags);
99363ef8
SJ		 3348 }
3349
1da177e4 3350 DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
e315cd28 3351 base_vha->host_no));
1da177e4
LT		 3352 }
3353
e315cd28
AC		 3354 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3355 qla2x00_update_fcports(base_vha);
3356 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
c9c5ced9 3357 }
d97994dc 3358
e315cd28
AC		 3359 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3360 &base_vha->dpc_flags) &&
3361 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
1da177e4
LT		 3362
3363 DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
e315cd28 3364 base_vha->host_no));
1da177e4 3365
e315cd28
AC		 3366 qla2x00_rst_aen(base_vha);
3367 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
1da177e4
LT		 3368 }
3369
3370 /* Retry each device up to login retry count */
e315cd28
AC		 3371 if ((test_and_clear_bit(RELOGIN_NEEDED,
3372 &base_vha->dpc_flags)) &&
3373 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3374 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
1da177e4
LT		 3375
3376 DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
e315cd28
AC		 3377 base_vha->host_no));
3378 qla2x00_relogin(base_vha);
3379
1da177e4 3380 DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
e315cd28 3381 base_vha->host_no));
1da177e4
LT		 3382 }
3383
e315cd28
AC		 3384 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3385 &base_vha->dpc_flags)) {
1da177e4
LT		 3386
3387 DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
e315cd28 3388 base_vha->host_no));
1da177e4
LT		 3389
3390 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
e315cd28 3391 &base_vha->dpc_flags))) {
1da177e4 3392
e315cd28 3393 rval = qla2x00_loop_resync(base_vha);
1da177e4 3394
e315cd28
AC		 3395 clear_bit(LOOP_RESYNC_ACTIVE,
3396 &base_vha->dpc_flags);
1da177e4
LT		 3397 }
3398
3399 DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
e315cd28 3400 base_vha->host_no));
1da177e4
LT		 3401 }
3402
e315cd28
AC		 3403 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3404 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3405 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3406 qla2xxx_flash_npiv_conf(base_vha);
272976ca
AV		 3407 }
3408
1da177e4 3409 if (!ha->interrupts_on)
fd34f556 3410 ha->isp_ops->enable_intrs(ha);
1da177e4 3411
e315cd28
AC		 3412 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3413 &base_vha->dpc_flags))
3414 ha->isp_ops->beacon_blink(base_vha);
f6df144c 3415
e315cd28 3416 qla2x00_do_dpc_all_vps(base_vha);
2c3dfe3f 3417
1da177e4
LT		 3418 ha->dpc_active = 0;
3419 } /* End of while(1) */
3420
e315cd28 3421 DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
1da177e4
LT		 3422
3423 /*
3424 * Make sure that nobody tries to wake us up again.
3425 */
1da177e4
LT		 3426 ha->dpc_active = 0;
3427
ac280b67
AV		 3428 /* Cleanup any residual CTX SRBs. */
3429 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3430
39a11240
CH		 3431 return 0;
3432}
3433
3434void
e315cd28 3435qla2xxx_wake_dpc(struct scsi_qla_host *vha)
39a11240 3436{
e315cd28 3437 struct qla_hw_data *ha = vha->hw;
c795c1e4
AV		 3438 struct task_struct *t = ha->dpc_thread;
3439
e315cd28 3440 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
c795c1e4 3441 wake_up_process(t);
1da177e4
LT		 3442}
3443
1da177e4
LT		 3444/*
3445* qla2x00_rst_aen
3446* Processes asynchronous reset.
3447*
3448* Input:
3449* ha = adapter block pointer.
3450*/
3451static void
e315cd28 3452qla2x00_rst_aen(scsi_qla_host_t *vha)
1da177e4 3453{
e315cd28
AC		 3454 if (vha->flags.online && !vha->flags.reset_active &&
3455 !atomic_read(&vha->loop_down_timer) &&
3456 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
1da177e4 3457 do {
e315cd28 3458 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3459
3460 /*
3461 * Issue marker command only when we are going to start
3462 * the I/O.
3463 */
e315cd28
AC		 3464 vha->marker_needed = 1;
3465 } while (!atomic_read(&vha->loop_down_timer) &&
3466 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
1da177e4
LT		 3467 }
3468}
3469
f4f051eb 3470static void
e315cd28 3471qla2x00_sp_free_dma(srb_t *sp)
f4f051eb
AV		 3472{
3473 struct scsi_cmnd *cmd = sp->cmd;
bad75002 3474 struct qla_hw_data *ha = sp->fcport->vha->hw;
f4f051eb
AV		 3475
3476 if (sp->flags & SRB_DMA_VALID) {
385d70b4 3477 scsi_dma_unmap(cmd);
f4f051eb
AV		 3478 sp->flags &= ~SRB_DMA_VALID;
3479 }
bad75002
AE		 3480
3481 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3482 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3483 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3484 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3485 }
3486
3487 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3488 /* List assured to be having elements */
3489 qla2x00_clean_dsd_pool(ha, sp);
3490 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3491 }
3492
3493 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3494 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3495 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3496 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3497 }
3498
fca29703 3499 CMD_SP(cmd) = NULL;
f4f051eb
AV		 3500}
3501
3dbe756a 3502static void
083a469d 3503qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
f4f051eb
AV		 3504{
3505 struct scsi_cmnd *cmd = sp->cmd;
3506
e315cd28 3507 qla2x00_sp_free_dma(sp);
f4f051eb 3508
a9083016
GM		 3509 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3510 struct ct6_dsd *ctx = sp->ctx;
3511 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3512 ctx->fcp_cmnd_dma);
3513 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3514 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3515 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3516 mempool_free(sp->ctx, ha->ctx_mempool);
3517 sp->ctx = NULL;
3518 }
f4f051eb 3519
a9083016 3520 mempool_free(sp, ha->srb_mempool);
f4f051eb
AV		 3521 cmd->scsi_done(cmd);
3522}
bdf79621 3523
083a469d
GM		 3524void
3525qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3526{
3527 if (atomic_read(&sp->ref_count) == 0) {
3528 DEBUG2(qla_printk(KERN_WARNING, ha,
3529 "SP reference-count to ZERO -- sp=%p\n", sp));
3530 DEBUG2(BUG());
3531 return;
3532 }
3533 if (!atomic_dec_and_test(&sp->ref_count))
3534 return;
3535 qla2x00_sp_final_compl(ha, sp);
3536}
3537
1da177e4
LT		 3538/**************************************************************************
3539* qla2x00_timer
3540*
3541* Description:
3542* One second timer
3543*
3544* Context: Interrupt
3545***************************************************************************/
2c3dfe3f 3546void
e315cd28 3547qla2x00_timer(scsi_qla_host_t *vha)
1da177e4 3548{
1da177e4 3549 unsigned long cpu_flags = 0;
1da177e4
LT		 3550 int start_dpc = 0;
3551 int index;
3552 srb_t *sp;
85880801 3553 uint16_t w;
e315cd28 3554 struct qla_hw_data *ha = vha->hw;
73208dfd 3555 struct req_que *req;
85880801 3556
a5b36321
LC		 3557 if (ha->flags.eeh_busy) {
3558 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3559 return;
3560 }
3561
a9083016
GM		 3562 if (IS_QLA82XX(ha))
3563 qla82xx_watchdog(vha);
3564
85880801
AV		 3565 /* Hardware read to raise pending EEH errors during mailbox waits. */
3566 if (!pci_channel_offline(ha->pdev))
3567 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
1da177e4
LT		 3568
3569 /* Loop down handler. */
e315cd28
AC		 3570 if (atomic_read(&vha->loop_down_timer) > 0 &&
3571 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
3572 && vha->flags.online) {
1da177e4 3573
e315cd28
AC		 3574 if (atomic_read(&vha->loop_down_timer) ==
3575 vha->loop_down_abort_time) {
1da177e4
LT		 3576
3577 DEBUG(printk("scsi(%ld): Loop Down - aborting the "
3578 "queues before time expire\n",
e315cd28 3579 vha->host_no));
1da177e4 3580
e315cd28
AC		 3581 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3582 atomic_set(&vha->loop_state, LOOP_DEAD);
1da177e4 3583
f08b7251
AV		 3584 /*
3585 * Schedule an ISP abort to return any FCP2-device
3586 * commands.
3587 */
2c3dfe3f 3588 /* NPIV - scan physical port only */
e315cd28 3589 if (!vha->vp_idx) {
2c3dfe3f
SJ		 3590 spin_lock_irqsave(&ha->hardware_lock,
3591 cpu_flags);
73208dfd 3592 req = ha->req_q_map[0];
2c3dfe3f
SJ		 3593 for (index = 1;
3594 index < MAX_OUTSTANDING_COMMANDS;
3595 index++) {
3596 fc_port_t *sfcp;
3597
e315cd28 3598 sp = req->outstanding_cmds[index];
2c3dfe3f
SJ		 3599 if (!sp)
3600 continue;
bad75002 3601 if (sp->ctx && !IS_PROT_IO(sp))
cf53b069 3602 continue;
2c3dfe3f 3603 sfcp = sp->fcport;
f08b7251 3604 if (!(sfcp->flags & FCF_FCP2_DEVICE))
2c3dfe3f 3605 continue;
bdf79621 3606
2c3dfe3f 3607 set_bit(ISP_ABORT_NEEDED,
e315cd28 3608 &vha->dpc_flags);
2c3dfe3f
SJ		 3609 break;
3610 }
3611 spin_unlock_irqrestore(&ha->hardware_lock,
e315cd28 3612 cpu_flags);
1da177e4 3613 }
1da177e4
LT		 3614 start_dpc++;
3615 }
3616
3617 /* if the loop has been down for 4 minutes, reinit adapter */
e315cd28 3618 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
0d6e61bc 3619 if (!(vha->device_flags & DFLG_NO_CABLE)) {
1da177e4
LT		 3620 DEBUG(printk("scsi(%ld): Loop down - "
3621 "aborting ISP.\n",
e315cd28 3622 vha->host_no));
1da177e4
LT		 3623 qla_printk(KERN_WARNING, ha,
3624 "Loop down - aborting ISP.\n");
3625
e315cd28 3626 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3627 }
3628 }
fca29703 3629 DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
e315cd28
AC		 3630 vha->host_no,
3631 atomic_read(&vha->loop_down_timer)));
1da177e4
LT		 3632 }
3633
f6df144c
AV		 3634 /* Check if beacon LED needs to be blinked */
3635 if (ha->beacon_blink_led == 1) {
e315cd28 3636 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
f6df144c
AV		 3637 start_dpc++;
3638 }
3639
550bf57d 3640 /* Process any deferred work. */
e315cd28 3641 if (!list_empty(&vha->work_list))
550bf57d
AV		 3642 start_dpc++;
3643
1da177e4 3644 /* Schedule the DPC routine if needed */
e315cd28
AC		 3645 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3646 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3647 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
1da177e4 3648 start_dpc ||
e315cd28
AC		 3649 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3650 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
a9083016
GM		 3651 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3652 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
e315cd28
AC		 3653 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3654 test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
3655 qla2xxx_wake_dpc(vha);
1da177e4 3656
e315cd28 3657 qla2x00_restart_timer(vha, WATCH_INTERVAL);
1da177e4
LT		 3658}
3659
5433383e
AV		 3660/* Firmware interface routines. */
3661
a9083016 3662#define FW_BLOBS 8
5433383e
AV		 3663#define FW_ISP21XX 0
3664#define FW_ISP22XX 1
3665#define FW_ISP2300 2
3666#define FW_ISP2322 3
48c02fde 3667#define FW_ISP24XX 4
c3a2f0df 3668#define FW_ISP25XX 5
3a03eb79 3669#define FW_ISP81XX 6
a9083016 3670#define FW_ISP82XX 7
5433383e 3671
bb8ee499
AV		 3672#define FW_FILE_ISP21XX "ql2100_fw.bin"
3673#define FW_FILE_ISP22XX "ql2200_fw.bin"
3674#define FW_FILE_ISP2300 "ql2300_fw.bin"
3675#define FW_FILE_ISP2322 "ql2322_fw.bin"
3676#define FW_FILE_ISP24XX "ql2400_fw.bin"
c3a2f0df 3677#define FW_FILE_ISP25XX "ql2500_fw.bin"
3a03eb79 3678#define FW_FILE_ISP81XX "ql8100_fw.bin"
a9083016 3679#define FW_FILE_ISP82XX "ql8200_fw.bin"
bb8ee499 3680
e1e82b6f 3681static DEFINE_MUTEX(qla_fw_lock);
5433383e
AV		 3682
3683static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
bb8ee499
AV		 3684 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3685 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3686 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3687 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3688 { .name = FW_FILE_ISP24XX, },
c3a2f0df 3689 { .name = FW_FILE_ISP25XX, },
3a03eb79 3690 { .name = FW_FILE_ISP81XX, },
a9083016 3691 { .name = FW_FILE_ISP82XX, },
5433383e
AV		 3692};
3693
3694struct fw_blob *
e315cd28 3695qla2x00_request_firmware(scsi_qla_host_t *vha)
5433383e 3696{
e315cd28 3697 struct qla_hw_data *ha = vha->hw;
5433383e
AV		 3698 struct fw_blob *blob;
3699
3700 blob = NULL;
3701 if (IS_QLA2100(ha)) {
3702 blob = &qla_fw_blobs[FW_ISP21XX];
3703 } else if (IS_QLA2200(ha)) {
3704 blob = &qla_fw_blobs[FW_ISP22XX];
48c02fde 3705 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5433383e 3706 blob = &qla_fw_blobs[FW_ISP2300];
48c02fde 3707 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5433383e 3708 blob = &qla_fw_blobs[FW_ISP2322];
4d4df193 3709 } else if (IS_QLA24XX_TYPE(ha)) {
5433383e 3710 blob = &qla_fw_blobs[FW_ISP24XX];
c3a2f0df
AV		 3711 } else if (IS_QLA25XX(ha)) {
3712 blob = &qla_fw_blobs[FW_ISP25XX];
3a03eb79
AV		 3713 } else if (IS_QLA81XX(ha)) {
3714 blob = &qla_fw_blobs[FW_ISP81XX];
a9083016
GM		 3715 } else if (IS_QLA82XX(ha)) {
3716 blob = &qla_fw_blobs[FW_ISP82XX];
5433383e
AV		 3717 }
3718
e1e82b6f 3719 mutex_lock(&qla_fw_lock);
5433383e
AV		 3720 if (blob->fw)
3721 goto out;
3722
3723 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
3724 DEBUG2(printk("scsi(%ld): Failed to load firmware image "
e315cd28 3725 "(%s).\n", vha->host_no, blob->name));
5433383e
AV		 3726 blob->fw = NULL;
3727 blob = NULL;
3728 goto out;
3729 }
3730
3731out:
e1e82b6f 3732 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3733 return blob;
3734}
3735
3736static void
3737qla2x00_release_firmware(void)
3738{
3739 int idx;
3740
e1e82b6f 3741 mutex_lock(&qla_fw_lock);
5433383e
AV		 3742 for (idx = 0; idx < FW_BLOBS; idx++)
3743 if (qla_fw_blobs[idx].fw)
3744 release_firmware(qla_fw_blobs[idx].fw);
e1e82b6f 3745 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3746}
3747
14e660e6
SJ		 3748static pci_ers_result_t
3749qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3750{
85880801
AV		 3751 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3752 struct qla_hw_data *ha = vha->hw;
3753
3754 DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
3755 state));
b9b12f73 3756
14e660e6
SJ		 3757 switch (state) {
3758 case pci_channel_io_normal:
85880801 3759 ha->flags.eeh_busy = 0;
14e660e6
SJ		 3760 return PCI_ERS_RESULT_CAN_RECOVER;
3761 case pci_channel_io_frozen:
85880801 3762 ha->flags.eeh_busy = 1;
a5b36321
LC		 3763 /* For ISP82XX complete any pending mailbox cmd */
3764 if (IS_QLA82XX(ha)) {
3765 ha->flags.fw_hung = 1;
3766 if (ha->flags.mbox_busy) {
3767 ha->flags.mbox_int = 1;
3768 DEBUG2(qla_printk(KERN_ERR, ha,
3769 "Due to pci channel io frozen, doing premature "
3770 "completion of mbx command\n"));
3771 complete(&ha->mbx_intr_comp);
3772 }
3773 }
90a86fc0 3774 qla2x00_free_irqs(vha);
14e660e6 3775 pci_disable_device(pdev);
bddd2d65
LC		 3776 /* Return back all IOs */
3777 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
14e660e6
SJ		 3778 return PCI_ERS_RESULT_NEED_RESET;
3779 case pci_channel_io_perm_failure:
85880801
AV		 3780 ha->flags.pci_channel_io_perm_failure = 1;
3781 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
14e660e6
SJ		 3782 return PCI_ERS_RESULT_DISCONNECT;
3783 }
3784 return PCI_ERS_RESULT_NEED_RESET;
3785}
3786
3787static pci_ers_result_t
3788qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
3789{
3790 int risc_paused = 0;
3791 uint32_t stat;
3792 unsigned long flags;
e315cd28
AC		 3793 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3794 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 3795 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3796 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
3797
bcc5b6d3
SK		 3798 if (IS_QLA82XX(ha))
3799 return PCI_ERS_RESULT_RECOVERED;
3800
14e660e6
SJ		 3801 spin_lock_irqsave(&ha->hardware_lock, flags);
3802 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
3803 stat = RD_REG_DWORD(&reg->hccr);
3804 if (stat & HCCR_RISC_PAUSE)
3805 risc_paused = 1;
3806 } else if (IS_QLA23XX(ha)) {
3807 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
3808 if (stat & HSR_RISC_PAUSED)
3809 risc_paused = 1;
3810 } else if (IS_FWI2_CAPABLE(ha)) {
3811 stat = RD_REG_DWORD(&reg24->host_status);
3812 if (stat & HSRX_RISC_PAUSED)
3813 risc_paused = 1;
3814 }
3815 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3816
3817 if (risc_paused) {
3818 qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
3819 "Dumping firmware!\n");
e315cd28 3820 ha->isp_ops->fw_dump(base_vha, 0);
14e660e6
SJ		 3821
3822 return PCI_ERS_RESULT_NEED_RESET;
3823 } else
3824 return PCI_ERS_RESULT_RECOVERED;
3825}
3826
a5b36321
LC		 3827uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
3828{
3829 uint32_t rval = QLA_FUNCTION_FAILED;
3830 uint32_t drv_active = 0;
3831 struct qla_hw_data *ha = base_vha->hw;
3832 int fn;
3833 struct pci_dev *other_pdev = NULL;
3834
3835 DEBUG17(qla_printk(KERN_INFO, ha,
3836 "scsi(%ld): In qla82xx_error_recovery\n", base_vha->host_no));
3837
3838 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3839
3840 if (base_vha->flags.online) {
3841 /* Abort all outstanding commands,
3842 * so as to be requeued later */
3843 qla2x00_abort_isp_cleanup(base_vha);
3844 }
3845
3846
3847 fn = PCI_FUNC(ha->pdev->devfn);
3848 while (fn > 0) {
3849 fn--;
3850 DEBUG17(qla_printk(KERN_INFO, ha,
3851 "Finding pci device at function = 0x%x\n", fn));
3852 other_pdev =
3853 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
3854 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
3855 fn));
3856
3857 if (!other_pdev)
3858 continue;
3859 if (atomic_read(&other_pdev->enable_cnt)) {
3860 DEBUG17(qla_printk(KERN_INFO, ha,
3861 "Found PCI func availabe and enabled at 0x%x\n",
3862 fn));
3863 pci_dev_put(other_pdev);
3864 break;
3865 }
3866 pci_dev_put(other_pdev);
3867 }
3868
3869 if (!fn) {
3870 /* Reset owner */
3871 DEBUG17(qla_printk(KERN_INFO, ha,
3872 "This devfn is reset owner = 0x%x\n", ha->pdev->devfn));
3873 qla82xx_idc_lock(ha);
3874
3875 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3876 QLA82XX_DEV_INITIALIZING);
3877
3878 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
3879 QLA82XX_IDC_VERSION);
3880
3881 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
3882 DEBUG17(qla_printk(KERN_INFO, ha,
3883 "drv_active = 0x%x\n", drv_active));
3884
3885 qla82xx_idc_unlock(ha);
3886 /* Reset if device is not already reset
3887 * drv_active would be 0 if a reset has already been done
3888 */
3889 if (drv_active)
3890 rval = qla82xx_start_firmware(base_vha);
3891 else
3892 rval = QLA_SUCCESS;
3893 qla82xx_idc_lock(ha);
3894
3895 if (rval != QLA_SUCCESS) {
3896 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
3897 qla82xx_clear_drv_active(ha);
3898 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3899 QLA82XX_DEV_FAILED);
3900 } else {
3901 qla_printk(KERN_INFO, ha, "HW State: READY\n");
3902 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3903 QLA82XX_DEV_READY);
3904 qla82xx_idc_unlock(ha);
3905 ha->flags.fw_hung = 0;
3906 rval = qla82xx_restart_isp(base_vha);
3907 qla82xx_idc_lock(ha);
3908 /* Clear driver state register */
3909 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
3910 qla82xx_set_drv_active(base_vha);
3911 }
3912 qla82xx_idc_unlock(ha);
3913 } else {
3914 DEBUG17(qla_printk(KERN_INFO, ha,
3915 "This devfn is not reset owner = 0x%x\n", ha->pdev->devfn));
3916 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
3917 QLA82XX_DEV_READY)) {
3918 ha->flags.fw_hung = 0;
3919 rval = qla82xx_restart_isp(base_vha);
3920 qla82xx_idc_lock(ha);
3921 qla82xx_set_drv_active(base_vha);
3922 qla82xx_idc_unlock(ha);
3923 }
3924 }
3925 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3926
3927 return rval;
3928}
3929
14e660e6
SJ		 3930static pci_ers_result_t
3931qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3932{
3933 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
e315cd28
AC		 3934 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3935 struct qla_hw_data *ha = base_vha->hw;
90a86fc0
JC		 3936 struct rsp_que *rsp;
3937 int rc, retries = 10;
09483916 3938
85880801
AV		 3939 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
3940
90a86fc0
JC		 3941 /* Workaround: qla2xxx driver which access hardware earlier
3942 * needs error state to be pci_channel_io_online.
3943 * Otherwise mailbox command timesout.
3944 */
3945 pdev->error_state = pci_channel_io_normal;
3946
3947 pci_restore_state(pdev);
3948
8c1496bd
RL		 3949 /* pci_restore_state() clears the saved_state flag of the device
3950 * save restored state which resets saved_state flag
3951 */
3952 pci_save_state(pdev);
3953
09483916
BH		 3954 if (ha->mem_only)
3955 rc = pci_enable_device_mem(pdev);
3956 else
3957 rc = pci_enable_device(pdev);
14e660e6 3958
09483916 3959 if (rc) {
14e660e6
SJ		 3960 qla_printk(KERN_WARNING, ha,
3961 "Can't re-enable PCI device after reset.\n");
a5b36321 3962 goto exit_slot_reset;
14e660e6 3963 }
14e660e6 3964
90a86fc0
JC		 3965 rsp = ha->rsp_q_map[0];
3966 if (qla2x00_request_irqs(ha, rsp))
a5b36321 3967 goto exit_slot_reset;
90a86fc0 3968
e315cd28 3969 if (ha->isp_ops->pci_config(base_vha))
a5b36321
LC		 3970 goto exit_slot_reset;
3971
3972 if (IS_QLA82XX(ha)) {
3973 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
3974 ret = PCI_ERS_RESULT_RECOVERED;
3975 goto exit_slot_reset;
3976 } else
3977 goto exit_slot_reset;
3978 }
14e660e6 3979
90a86fc0
JC		 3980 while (ha->flags.mbox_busy && retries--)
3981 msleep(1000);
85880801 3982
e315cd28 3983 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 3984 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
14e660e6 3985 ret = PCI_ERS_RESULT_RECOVERED;
e315cd28 3986 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
14e660e6 3987
90a86fc0 3988
a5b36321 3989exit_slot_reset:
85880801
AV		 3990 DEBUG17(qla_printk(KERN_WARNING, ha,
3991 "slot_reset-return:ret=%x\n", ret));
3992
14e660e6
SJ		 3993 return ret;
3994}
3995
3996static void
3997qla2xxx_pci_resume(struct pci_dev *pdev)
3998{
e315cd28
AC		 3999 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4000 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 4001 int ret;
4002
85880801
AV		 4003 DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
4004
e315cd28 4005 ret = qla2x00_wait_for_hba_online(base_vha);
14e660e6
SJ		 4006 if (ret != QLA_SUCCESS) {
4007 qla_printk(KERN_ERR, ha,
4008 "the device failed to resume I/O "
4009 "from slot/link_reset");
4010 }
85880801 4011
3e46f031
LC		 4012 pci_cleanup_aer_uncorrect_error_status(pdev);
4013
85880801 4014 ha->flags.eeh_busy = 0;
14e660e6
SJ		 4015}
4016
4017static struct pci_error_handlers qla2xxx_err_handler = {
4018 .error_detected = qla2xxx_pci_error_detected,
4019 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4020 .slot_reset = qla2xxx_pci_slot_reset,
4021 .resume = qla2xxx_pci_resume,
4022};
4023
5433383e 4024static struct pci_device_id qla2xxx_pci_tbl[] = {
47f5e069
AV		 4025 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4026 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4027 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4028 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4029 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4030 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4031 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4032 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4033 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4d4df193 4034 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
47f5e069
AV		 4035 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4036 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
c3a2f0df 4037 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
3a03eb79 4038 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
a9083016 4039 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5433383e
AV		 4040 { 0 },
4041};
4042MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4043
fca29703 4044static struct pci_driver qla2xxx_pci_driver = {
cb63067a 4045 .name = QLA2XXX_DRIVER_NAME,
0a21ef1e
JB		 4046 .driver = {
4047 .owner = THIS_MODULE,
4048 },
fca29703 4049 .id_table = qla2xxx_pci_tbl,
7ee61397 4050 .probe = qla2x00_probe_one,
4c993f76 4051 .remove = qla2x00_remove_one,
14e660e6 4052 .err_handler = &qla2xxx_err_handler,
fca29703
AV		 4053};
4054
6a03b4cd
HZ		 4055static struct file_operations apidev_fops = {
4056 .owner = THIS_MODULE,
6038f373 4057 .llseek = noop_llseek,
6a03b4cd
HZ		 4058};
4059
1da177e4
LT		 4060/**
4061 * qla2x00_module_init - Module initialization.
4062 **/
4063static int __init
4064qla2x00_module_init(void)
4065{
fca29703
AV		 4066 int ret = 0;
4067
1da177e4 4068 /* Allocate cache for SRBs. */
354d6b21 4069 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
20c2df83 4070 SLAB_HWCACHE_ALIGN, NULL);
1da177e4
LT		 4071 if (srb_cachep == NULL) {
4072 printk(KERN_ERR
4073 "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
4074 return -ENOMEM;
4075 }
4076
4077 /* Derive version string. */
4078 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
11010fec 4079 if (ql2xextended_error_logging)
0181944f
AV		 4080 strcat(qla2x00_version_str, "-debug");
4081
1c97a12a
AV		 4082 qla2xxx_transport_template =
4083 fc_attach_transport(&qla2xxx_transport_functions);
2c3dfe3f
SJ		 4084 if (!qla2xxx_transport_template) {
4085 kmem_cache_destroy(srb_cachep);
1da177e4 4086 return -ENODEV;
2c3dfe3f 4087 }
6a03b4cd
HZ		 4088
4089 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4090 if (apidev_major < 0) {
4091 printk(KERN_WARNING "qla2xxx: Unable to register char device "
4092 "%s\n", QLA2XXX_APIDEV);
4093 }
4094
2c3dfe3f
SJ		 4095 qla2xxx_transport_vport_template =
4096 fc_attach_transport(&qla2xxx_transport_vport_functions);
4097 if (!qla2xxx_transport_vport_template) {
4098 kmem_cache_destroy(srb_cachep);
4099 fc_release_transport(qla2xxx_transport_template);
1da177e4 4100 return -ENODEV;
2c3dfe3f 4101 }
1da177e4 4102
fd9a29f0
AV		 4103 printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
4104 qla2x00_version_str);
7ee61397 4105 ret = pci_register_driver(&qla2xxx_pci_driver);
fca29703
AV		 4106 if (ret) {
4107 kmem_cache_destroy(srb_cachep);
4108 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4109 fc_release_transport(qla2xxx_transport_vport_template);
fca29703
AV		 4110 }
4111 return ret;
1da177e4
LT		 4112}
4113
4114/**
4115 * qla2x00_module_exit - Module cleanup.
4116 **/
4117static void __exit
4118qla2x00_module_exit(void)
4119{
6a03b4cd 4120 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7ee61397 4121 pci_unregister_driver(&qla2xxx_pci_driver);
5433383e 4122 qla2x00_release_firmware();
354d6b21 4123 kmem_cache_destroy(srb_cachep);
a9083016
GM		 4124 if (ctx_cachep)
4125 kmem_cache_destroy(ctx_cachep);
1da177e4 4126 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4127 fc_release_transport(qla2xxx_transport_vport_template);
1da177e4
LT		 4128}
4129
4130module_init(qla2x00_module_init);
4131module_exit(qla2x00_module_exit);
4132
4133MODULE_AUTHOR("QLogic Corporation");
4134MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4135MODULE_LICENSE("GPL");
4136MODULE_VERSION(QLA2XXX_VERSION);
bb8ee499
AV		 4137MODULE_FIRMWARE(FW_FILE_ISP21XX);
4138MODULE_FIRMWARE(FW_FILE_ISP22XX);
4139MODULE_FIRMWARE(FW_FILE_ISP2300);
4140MODULE_FIRMWARE(FW_FILE_ISP2322);
4141MODULE_FIRMWARE(FW_FILE_ISP24XX);
61623fc3 4142MODULE_FIRMWARE(FW_FILE_ISP25XX);
kernel source for telekom puls (alcatel/mediatek)