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[SCSI] qla2xxx: Perform FCoE context reset before trying adapter reset for ISP82xx.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / qla2xxx / qla_os.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
07e264b7 3 * Copyright (c) 2003-2011 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
8
9#include <linux/moduleparam.h>
10#include <linux/vmalloc.h>
1da177e4 11#include <linux/delay.h>
39a11240 12#include <linux/kthread.h>
e1e82b6f 13#include <linux/mutex.h>
3420d36c 14#include <linux/kobject.h>
5a0e3ad6 15#include <linux/slab.h>
1da177e4
LT		 16
17#include <scsi/scsi_tcq.h>
18#include <scsi/scsicam.h>
19#include <scsi/scsi_transport.h>
20#include <scsi/scsi_transport_fc.h>
21
22/*
23 * Driver version
24 */
25char qla2x00_version_str[40];
26
6a03b4cd
HZ		 27static int apidev_major;
28
1da177e4
LT		 29/*
30 * SRB allocation cache
31 */
e18b890b 32static struct kmem_cache *srb_cachep;
1da177e4 33
a9083016
GM		 34/*
35 * CT6 CTX allocation cache
36 */
37static struct kmem_cache *ctx_cachep;
38
1da177e4 39int ql2xlogintimeout = 20;
f2019cb1 40module_param(ql2xlogintimeout, int, S_IRUGO);
1da177e4
LT		 41MODULE_PARM_DESC(ql2xlogintimeout,
42 "Login timeout value in seconds.");
43
a7b61842 44int qlport_down_retry;
f2019cb1 45module_param(qlport_down_retry, int, S_IRUGO);
1da177e4 46MODULE_PARM_DESC(qlport_down_retry,
900d9f98 47 "Maximum number of command retries to a port that returns "
1da177e4
LT		 48 "a PORT-DOWN status.");
49
1da177e4
LT		 50int ql2xplogiabsentdevice;
51module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
52MODULE_PARM_DESC(ql2xplogiabsentdevice,
53 "Option to enable PLOGI to devices that are not present after "
900d9f98 54 "a Fabric scan. This is needed for several broken switches. "
1da177e4
LT		 55 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
56
1da177e4 57int ql2xloginretrycount = 0;
f2019cb1 58module_param(ql2xloginretrycount, int, S_IRUGO);
1da177e4
LT		 59MODULE_PARM_DESC(ql2xloginretrycount,
60 "Specify an alternate value for the NVRAM login retry count.");
61
a7a167bf 62int ql2xallocfwdump = 1;
f2019cb1 63module_param(ql2xallocfwdump, int, S_IRUGO);
a7a167bf
AV		 64MODULE_PARM_DESC(ql2xallocfwdump,
65 "Option to enable allocation of memory for a firmware dump "
66 "during HBA initialization. Memory allocation requirements "
67 "vary by ISP type. Default is 1 - allocate memory.");
68
11010fec 69int ql2xextended_error_logging;
27d94035 70module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
11010fec 71MODULE_PARM_DESC(ql2xextended_error_logging,
0181944f
AV		 72 "Option to enable extended error logging, "
73 "Default is 0 - no logging. 1 - log errors.");
74
a9083016 75int ql2xshiftctondsd = 6;
f2019cb1 76module_param(ql2xshiftctondsd, int, S_IRUGO);
a9083016
GM		 77MODULE_PARM_DESC(ql2xshiftctondsd,
78 "Set to control shifting of command type processing "
79 "based on total number of SG elements.");
80
1da177e4
LT		 81static void qla2x00_free_device(scsi_qla_host_t *);
82
7e47e5ca 83int ql2xfdmienable=1;
f2019cb1 84module_param(ql2xfdmienable, int, S_IRUGO);
cca5335c 85MODULE_PARM_DESC(ql2xfdmienable,
7794a5af
FW		 86 "Enables FDMI registrations. "
87 "0 - no FDMI. Default is 1 - perform FDMI.");
cca5335c 88
df7baa50
AV		 89#define MAX_Q_DEPTH 32
90static int ql2xmaxqdepth = MAX_Q_DEPTH;
91module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
92MODULE_PARM_DESC(ql2xmaxqdepth,
93 "Maximum queue depth to report for target devices.");
94
bad75002
AE		 95/* Do not change the value of this after module load */
96int ql2xenabledif = 1;
97module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
98MODULE_PARM_DESC(ql2xenabledif,
99 " Enable T10-CRC-DIF "
100 " Default is 0 - No DIF Support. 1 - Enable it");
101
102int ql2xenablehba_err_chk;
103module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
104MODULE_PARM_DESC(ql2xenablehba_err_chk,
105 " Enable T10-CRC-DIF Error isolation by HBA"
106 " Default is 0 - Error isolation disabled, 1 - Enable it");
107
e5896bd5 108int ql2xiidmaenable=1;
f2019cb1 109module_param(ql2xiidmaenable, int, S_IRUGO);
e5896bd5
AV		 110MODULE_PARM_DESC(ql2xiidmaenable,
111 "Enables iIDMA settings "
112 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
113
73208dfd 114int ql2xmaxqueues = 1;
f2019cb1 115module_param(ql2xmaxqueues, int, S_IRUGO);
73208dfd
AC		 116MODULE_PARM_DESC(ql2xmaxqueues,
117 "Enables MQ settings "
ae68230c
JP		 118 "Default is 1 for single queue. Set it to number "
119 "of queues in MQ mode.");
68ca949c
AC		 120
121int ql2xmultique_tag;
f2019cb1 122module_param(ql2xmultique_tag, int, S_IRUGO);
68ca949c
AC		 123MODULE_PARM_DESC(ql2xmultique_tag,
124 "Enables CPU affinity settings for the driver "
125 "Default is 0 for no affinity of request and response IO. "
126 "Set it to 1 to turn on the cpu affinity.");
e337d907
AV		 127
128int ql2xfwloadbin;
f2019cb1 129module_param(ql2xfwloadbin, int, S_IRUGO);
e337d907
AV		 130MODULE_PARM_DESC(ql2xfwloadbin,
131 "Option to specify location from which to load ISP firmware:\n"
132 " 2 -- load firmware via the request_firmware() (hotplug)\n"
133 " interface.\n"
134 " 1 -- load firmware from flash.\n"
135 " 0 -- use default semantics.\n");
136
ae97c91e 137int ql2xetsenable;
f2019cb1 138module_param(ql2xetsenable, int, S_IRUGO);
ae97c91e
AV		 139MODULE_PARM_DESC(ql2xetsenable,
140 "Enables firmware ETS burst."
141 "Default is 0 - skip ETS enablement.");
142
6907869d 143int ql2xdbwr = 1;
f2019cb1 144module_param(ql2xdbwr, int, S_IRUGO);
a9083016
GM		 145MODULE_PARM_DESC(ql2xdbwr,
146 "Option to specify scheme for request queue posting\n"
147 " 0 -- Regular doorbell.\n"
148 " 1 -- CAMRAM doorbell (faster).\n");
149
f4c496c1 150int ql2xtargetreset = 1;
f2019cb1 151module_param(ql2xtargetreset, int, S_IRUGO);
f4c496c1
GM		 152MODULE_PARM_DESC(ql2xtargetreset,
153 "Enable target reset."
154 "Default is 1 - use hw defaults.");
155
4da26e16 156int ql2xgffidenable;
f2019cb1 157module_param(ql2xgffidenable, int, S_IRUGO);
4da26e16
CD		 158MODULE_PARM_DESC(ql2xgffidenable,
159 "Enables GFF_ID checks of port type. "
160 "Default is 0 - Do not use GFF_ID information.");
a9083016 161
3822263e 162int ql2xasynctmfenable;
f2019cb1 163module_param(ql2xasynctmfenable, int, S_IRUGO);
3822263e
MI		 164MODULE_PARM_DESC(ql2xasynctmfenable,
165 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
166 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
1da177e4 167/*
fa2a1ce5 168 * SCSI host template entry points
1da177e4
LT		 169 */
170static int qla2xxx_slave_configure(struct scsi_device * device);
f4f051eb 171static int qla2xxx_slave_alloc(struct scsi_device *);
1e99e33a
AV		 172static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
173static void qla2xxx_scan_start(struct Scsi_Host *);
f4f051eb 174static void qla2xxx_slave_destroy(struct scsi_device *);
f281233d 175static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
1da177e4
LT		 176static int qla2xxx_eh_abort(struct scsi_cmnd *);
177static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
523ec773 178static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
1da177e4
LT		 179static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
180static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
1da177e4 181
e881a172 182static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
ce7e4af7
AV		 183static int qla2x00_change_queue_type(struct scsi_device *, int);
184
a5326f86 185struct scsi_host_template qla2xxx_driver_template = {
1da177e4 186 .module = THIS_MODULE,
cb63067a 187 .name = QLA2XXX_DRIVER_NAME,
a5326f86 188 .queuecommand = qla2xxx_queuecommand,
fca29703
AV		 189
190 .eh_abort_handler = qla2xxx_eh_abort,
191 .eh_device_reset_handler = qla2xxx_eh_device_reset,
523ec773 192 .eh_target_reset_handler = qla2xxx_eh_target_reset,
fca29703
AV		 193 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
194 .eh_host_reset_handler = qla2xxx_eh_host_reset,
195
196 .slave_configure = qla2xxx_slave_configure,
197
198 .slave_alloc = qla2xxx_slave_alloc,
199 .slave_destroy = qla2xxx_slave_destroy,
ed677086
AV		 200 .scan_finished = qla2xxx_scan_finished,
201 .scan_start = qla2xxx_scan_start,
ce7e4af7
AV		 202 .change_queue_depth = qla2x00_change_queue_depth,
203 .change_queue_type = qla2x00_change_queue_type,
fca29703
AV		 204 .this_id = -1,
205 .cmd_per_lun = 3,
206 .use_clustering = ENABLE_CLUSTERING,
207 .sg_tablesize = SG_ALL,
208
209 .max_sectors = 0xFFFF,
afb046e2 210 .shost_attrs = qla2x00_host_attrs,
fca29703
AV		 211};
212
1da177e4 213static struct scsi_transport_template *qla2xxx_transport_template = NULL;
2c3dfe3f 214struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
1da177e4 215
1da177e4
LT		 216/* TODO Convert to inlines
217 *
218 * Timer routines
219 */
1da177e4 220
2c3dfe3f 221__inline__ void
e315cd28 222qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
1da177e4 223{
e315cd28
AC		 224 init_timer(&vha->timer);
225 vha->timer.expires = jiffies + interval * HZ;
226 vha->timer.data = (unsigned long)vha;
227 vha->timer.function = (void (*)(unsigned long))func;
228 add_timer(&vha->timer);
229 vha->timer_active = 1;
1da177e4
LT		 230}
231
232static inline void
e315cd28 233qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
1da177e4 234{
a9083016
GM		 235 /* Currently used for 82XX only. */
236 if (vha->device_flags & DFLG_DEV_FAILED)
237 return;
238
e315cd28 239 mod_timer(&vha->timer, jiffies + interval * HZ);
1da177e4
LT		 240}
241
a824ebb3 242static __inline__ void
e315cd28 243qla2x00_stop_timer(scsi_qla_host_t *vha)
1da177e4 244{
e315cd28
AC		 245 del_timer_sync(&vha->timer);
246 vha->timer_active = 0;
1da177e4
LT		 247}
248
1da177e4
LT		 249static int qla2x00_do_dpc(void *data);
250
251static void qla2x00_rst_aen(scsi_qla_host_t *);
252
73208dfd
AC		 253static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
254 struct req_que **, struct rsp_que **);
e30d1756 255static void qla2x00_free_fw_dump(struct qla_hw_data *);
e315cd28
AC		 256static void qla2x00_mem_free(struct qla_hw_data *);
257static void qla2x00_sp_free_dma(srb_t *);
1da177e4 258
1da177e4 259/* -------------------------------------------------------------------------- */
73208dfd
AC		 260static int qla2x00_alloc_queues(struct qla_hw_data *ha)
261{
2afa19a9 262 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
73208dfd
AC		 263 GFP_KERNEL);
264 if (!ha->req_q_map) {
265 qla_printk(KERN_WARNING, ha,
266 "Unable to allocate memory for request queue ptrs\n");
267 goto fail_req_map;
268 }
269
2afa19a9 270 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
73208dfd
AC		 271 GFP_KERNEL);
272 if (!ha->rsp_q_map) {
273 qla_printk(KERN_WARNING, ha,
274 "Unable to allocate memory for response queue ptrs\n");
275 goto fail_rsp_map;
276 }
277 set_bit(0, ha->rsp_qid_map);
278 set_bit(0, ha->req_qid_map);
279 return 1;
280
281fail_rsp_map:
282 kfree(ha->req_q_map);
283 ha->req_q_map = NULL;
284fail_req_map:
285 return -ENOMEM;
286}
287
2afa19a9 288static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
73208dfd 289{
73208dfd
AC		 290 if (req && req->ring)
291 dma_free_coherent(&ha->pdev->dev,
292 (req->length + 1) * sizeof(request_t),
293 req->ring, req->dma);
294
295 kfree(req);
296 req = NULL;
297}
298
2afa19a9
AC		 299static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
300{
301 if (rsp && rsp->ring)
302 dma_free_coherent(&ha->pdev->dev,
303 (rsp->length + 1) * sizeof(response_t),
304 rsp->ring, rsp->dma);
305
306 kfree(rsp);
307 rsp = NULL;
308}
309
73208dfd
AC		 310static void qla2x00_free_queues(struct qla_hw_data *ha)
311{
312 struct req_que *req;
313 struct rsp_que *rsp;
314 int cnt;
315
2afa19a9 316 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
73208dfd 317 req = ha->req_q_map[cnt];
2afa19a9 318 qla2x00_free_req_que(ha, req);
73208dfd 319 }
73208dfd
AC		 320 kfree(ha->req_q_map);
321 ha->req_q_map = NULL;
2afa19a9
AC		 322
323 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
324 rsp = ha->rsp_q_map[cnt];
325 qla2x00_free_rsp_que(ha, rsp);
326 }
327 kfree(ha->rsp_q_map);
328 ha->rsp_q_map = NULL;
73208dfd
AC		 329}
330
68ca949c
AC		 331static int qla25xx_setup_mode(struct scsi_qla_host *vha)
332{
333 uint16_t options = 0;
334 int ques, req, ret;
335 struct qla_hw_data *ha = vha->hw;
336
7163ea81
AC		 337 if (!(ha->fw_attributes & BIT_6)) {
338 qla_printk(KERN_INFO, ha,
339 "Firmware is not multi-queue capable\n");
340 goto fail;
341 }
68ca949c 342 if (ql2xmultique_tag) {
68ca949c
AC		 343 /* create a request queue for IO */
344 options |= BIT_7;
345 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
346 QLA_DEFAULT_QUE_QOS);
347 if (!req) {
348 qla_printk(KERN_WARNING, ha,
349 "Can't create request queue\n");
350 goto fail;
351 }
278274d5 352 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
68ca949c
AC		 353 vha->req = ha->req_q_map[req];
354 options |= BIT_1;
355 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
356 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
357 if (!ret) {
358 qla_printk(KERN_WARNING, ha,
359 "Response Queue create failed\n");
360 goto fail2;
361 }
362 }
7163ea81
AC		 363 ha->flags.cpu_affinity_enabled = 1;
364
68ca949c
AC		 365 DEBUG2(qla_printk(KERN_INFO, ha,
366 "CPU affinity mode enabled, no. of response"
367 " queues:%d, no. of request queues:%d\n",
368 ha->max_rsp_queues, ha->max_req_queues));
369 }
370 return 0;
371fail2:
372 qla25xx_delete_queues(vha);
7163ea81
AC		 373 destroy_workqueue(ha->wq);
374 ha->wq = NULL;
68ca949c
AC		 375fail:
376 ha->mqenable = 0;
7163ea81
AC		 377 kfree(ha->req_q_map);
378 kfree(ha->rsp_q_map);
379 ha->max_req_queues = ha->max_rsp_queues = 1;
68ca949c
AC		 380 return 1;
381}
382
1da177e4 383static char *
e315cd28 384qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
1da177e4 385{
e315cd28 386 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 387 static char *pci_bus_modes[] = {
388 "33", "66", "100", "133",
389 };
390 uint16_t pci_bus;
391
392 strcpy(str, "PCI");
393 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
394 if (pci_bus) {
395 strcat(str, "-X (");
396 strcat(str, pci_bus_modes[pci_bus]);
397 } else {
398 pci_bus = (ha->pci_attr & BIT_8) >> 8;
399 strcat(str, " (");
400 strcat(str, pci_bus_modes[pci_bus]);
401 }
402 strcat(str, " MHz)");
403
404 return (str);
405}
406
fca29703 407static char *
e315cd28 408qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
fca29703
AV		 409{
410 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
e315cd28 411 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 412 uint32_t pci_bus;
413 int pcie_reg;
414
415 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
416 if (pcie_reg) {
417 char lwstr[6];
418 uint16_t pcie_lstat, lspeed, lwidth;
419
420 pcie_reg += 0x12;
421 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
422 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
423 lwidth = (pcie_lstat &
424 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
425
426 strcpy(str, "PCIe (");
427 if (lspeed == 1)
c87a0d8c 428 strcat(str, "2.5GT/s ");
c3a2f0df 429 else if (lspeed == 2)
c87a0d8c 430 strcat(str, "5.0GT/s ");
fca29703
AV		 431 else
432 strcat(str, "<unknown> ");
433 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
434 strcat(str, lwstr);
435
436 return str;
437 }
438
439 strcpy(str, "PCI");
440 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
441 if (pci_bus == 0 || pci_bus == 8) {
442 strcat(str, " (");
443 strcat(str, pci_bus_modes[pci_bus >> 3]);
444 } else {
445 strcat(str, "-X ");
446 if (pci_bus & BIT_2)
447 strcat(str, "Mode 2");
448 else
449 strcat(str, "Mode 1");
450 strcat(str, " (");
451 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
452 }
453 strcat(str, " MHz)");
454
455 return str;
456}
457
e5f82ab8 458static char *
e315cd28 459qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
1da177e4
LT		 460{
461 char un_str[10];
e315cd28 462 struct qla_hw_data *ha = vha->hw;
fa2a1ce5 463
1da177e4
LT		 464 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
465 ha->fw_minor_version,
466 ha->fw_subminor_version);
467
468 if (ha->fw_attributes & BIT_9) {
469 strcat(str, "FLX");
470 return (str);
471 }
472
473 switch (ha->fw_attributes & 0xFF) {
474 case 0x7:
475 strcat(str, "EF");
476 break;
477 case 0x17:
478 strcat(str, "TP");
479 break;
480 case 0x37:
481 strcat(str, "IP");
482 break;
483 case 0x77:
484 strcat(str, "VI");
485 break;
486 default:
487 sprintf(un_str, "(%x)", ha->fw_attributes);
488 strcat(str, un_str);
489 break;
490 }
491 if (ha->fw_attributes & 0x100)
492 strcat(str, "X");
493
494 return (str);
495}
496
e5f82ab8 497static char *
e315cd28 498qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
fca29703 499{
e315cd28 500 struct qla_hw_data *ha = vha->hw;
f0883ac6 501
3a03eb79
AV		 502 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
503 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
fca29703 504 return str;
fca29703
AV		 505}
506
507static inline srb_t *
e315cd28 508qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
f5e3e40b 509 struct scsi_cmnd *cmd)
fca29703
AV		 510{
511 srb_t *sp;
e315cd28 512 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 513
514 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
515 if (!sp)
516 return sp;
517
083a469d 518 atomic_set(&sp->ref_count, 1);
fca29703
AV		 519 sp->fcport = fcport;
520 sp->cmd = cmd;
521 sp->flags = 0;
522 CMD_SP(cmd) = (void *)sp;
cf53b069 523 sp->ctx = NULL;
fca29703
AV		 524
525 return sp;
526}
527
1da177e4 528static int
f5e3e40b 529qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
fca29703 530{
e315cd28 531 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
fca29703 532 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
19a7b4ae 533 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
e315cd28
AC		 534 struct qla_hw_data *ha = vha->hw;
535 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
fca29703
AV		 536 srb_t *sp;
537 int rval;
538
85880801
AV		 539 if (ha->flags.eeh_busy) {
540 if (ha->flags.pci_channel_io_perm_failure)
b9b12f73 541 cmd->result = DID_NO_CONNECT << 16;
85880801
AV		 542 else
543 cmd->result = DID_REQUEUE << 16;
14e660e6
SJ		 544 goto qc24_fail_command;
545 }
546
19a7b4ae
JSEC		 547 rval = fc_remote_port_chkready(rport);
548 if (rval) {
549 cmd->result = rval;
fca29703
AV		 550 goto qc24_fail_command;
551 }
552
bad75002
AE		 553 if (!vha->flags.difdix_supported &&
554 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
555 DEBUG2(qla_printk(KERN_ERR, ha,
556 "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
557 cmd->cmnd[0]));
558 cmd->result = DID_NO_CONNECT << 16;
559 goto qc24_fail_command;
560 }
fca29703
AV		 561 if (atomic_read(&fcport->state) != FCS_ONLINE) {
562 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
38170fa8 563 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
fca29703
AV		 564 cmd->result = DID_NO_CONNECT << 16;
565 goto qc24_fail_command;
566 }
7b594131 567 goto qc24_target_busy;
fca29703
AV		 568 }
569
f5e3e40b 570 sp = qla2x00_get_new_sp(base_vha, fcport, cmd);
fca29703 571 if (!sp)
f5e3e40b 572 goto qc24_host_busy;
fca29703 573
e315cd28 574 rval = ha->isp_ops->start_scsi(sp);
fca29703
AV		 575 if (rval != QLA_SUCCESS)
576 goto qc24_host_busy_free_sp;
577
fca29703
AV		 578 return 0;
579
580qc24_host_busy_free_sp:
e315cd28
AC		 581 qla2x00_sp_free_dma(sp);
582 mempool_free(sp, ha->srb_mempool);
fca29703 583
f5e3e40b 584qc24_host_busy:
fca29703
AV		 585 return SCSI_MLQUEUE_HOST_BUSY;
586
7b594131
MC		 587qc24_target_busy:
588 return SCSI_MLQUEUE_TARGET_BUSY;
589
fca29703 590qc24_fail_command:
f5e3e40b 591 cmd->scsi_done(cmd);
fca29703
AV		 592
593 return 0;
594}
595
1da177e4
LT		 596/*
597 * qla2x00_eh_wait_on_command
598 * Waits for the command to be returned by the Firmware for some
599 * max time.
600 *
601 * Input:
1da177e4 602 * cmd = Scsi Command to wait on.
1da177e4
LT		 603 *
604 * Return:
605 * Not Found : 0
606 * Found : 1
607 */
608static int
e315cd28 609qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1da177e4 610{
fe74c71f
AV		 611#define ABORT_POLLING_PERIOD 1000
612#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
f4f051eb 613 unsigned long wait_iter = ABORT_WAIT_ITER;
85880801
AV		 614 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
615 struct qla_hw_data *ha = vha->hw;
f4f051eb 616 int ret = QLA_SUCCESS;
1da177e4 617
85880801
AV		 618 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
619 DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
620 return ret;
621 }
622
d970432c 623 while (CMD_SP(cmd) && wait_iter--) {
fe74c71f 624 msleep(ABORT_POLLING_PERIOD);
f4f051eb
AV		 625 }
626 if (CMD_SP(cmd))
627 ret = QLA_FUNCTION_FAILED;
1da177e4 628
f4f051eb 629 return ret;
1da177e4
LT		 630}
631
632/*
633 * qla2x00_wait_for_hba_online
fa2a1ce5 634 * Wait till the HBA is online after going through
1da177e4
LT		 635 * <= MAX_RETRIES_OF_ISP_ABORT or
636 * finally HBA is disabled ie marked offline
637 *
638 * Input:
639 * ha - pointer to host adapter structure
fa2a1ce5
AV		 640 *
641 * Note:
1da177e4
LT		 642 * Does context switching-Release SPIN_LOCK
643 * (if any) before calling this routine.
644 *
645 * Return:
646 * Success (Adapter is online) : 0
647 * Failed (Adapter is offline/disabled) : 1
648 */
854165f4 649int
e315cd28 650qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1da177e4 651{
fca29703
AV		 652 int return_status;
653 unsigned long wait_online;
e315cd28
AC		 654 struct qla_hw_data *ha = vha->hw;
655 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 656
fa2a1ce5 657 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
e315cd28
AC		 658 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
659 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
660 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
661 ha->dpc_active) && time_before(jiffies, wait_online)) {
1da177e4
LT		 662
663 msleep(1000);
664 }
e315cd28 665 if (base_vha->flags.online)
fa2a1ce5 666 return_status = QLA_SUCCESS;
1da177e4
LT		 667 else
668 return_status = QLA_FUNCTION_FAILED;
669
1da177e4
LT		 670 return (return_status);
671}
672
86fbee86
LC		 673/*
674 * qla2x00_wait_for_reset_ready
675 * Wait till the HBA is online after going through
676 * <= MAX_RETRIES_OF_ISP_ABORT or
677 * finally HBA is disabled ie marked offline or flash
678 * operations are in progress.
679 *
680 * Input:
681 * ha - pointer to host adapter structure
682 *
683 * Note:
684 * Does context switching-Release SPIN_LOCK
685 * (if any) before calling this routine.
686 *
687 * Return:
688 * Success (Adapter is online/no flash ops) : 0
689 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
690 */
3dbe756a 691static int
86fbee86
LC		 692qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
693{
694 int return_status;
695 unsigned long wait_online;
696 struct qla_hw_data *ha = vha->hw;
697 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
698
699 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
700 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
701 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
702 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
703 ha->optrom_state != QLA_SWAITING ||
704 ha->dpc_active) && time_before(jiffies, wait_online))
705 msleep(1000);
706
707 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
708 return_status = QLA_SUCCESS;
709 else
710 return_status = QLA_FUNCTION_FAILED;
711
712 DEBUG2(printk("%s return_status=%d\n", __func__, return_status));
713
714 return return_status;
715}
716
2533cf67
LC		 717int
718qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
719{
720 int return_status;
721 unsigned long wait_reset;
722 struct qla_hw_data *ha = vha->hw;
723 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
724
725 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
726 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
727 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
728 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
729 ha->dpc_active) && time_before(jiffies, wait_reset)) {
730
731 msleep(1000);
732
733 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
734 ha->flags.chip_reset_done)
735 break;
736 }
737 if (ha->flags.chip_reset_done)
738 return_status = QLA_SUCCESS;
739 else
740 return_status = QLA_FUNCTION_FAILED;
741
742 return return_status;
743}
744
1da177e4
LT		 745/*
746 * qla2x00_wait_for_loop_ready
747 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
fa2a1ce5 748 * to be in LOOP_READY state.
1da177e4
LT		 749 * Input:
750 * ha - pointer to host adapter structure
fa2a1ce5
AV		 751 *
752 * Note:
1da177e4
LT		 753 * Does context switching-Release SPIN_LOCK
754 * (if any) before calling this routine.
fa2a1ce5 755 *
1da177e4
LT		 756 *
757 * Return:
758 * Success (LOOP_READY) : 0
759 * Failed (LOOP_NOT_READY) : 1
760 */
fa2a1ce5 761static inline int
e315cd28 762qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
1da177e4
LT		 763{
764 int return_status = QLA_SUCCESS;
765 unsigned long loop_timeout ;
e315cd28
AC		 766 struct qla_hw_data *ha = vha->hw;
767 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 768
769 /* wait for 5 min at the max for loop to be ready */
fa2a1ce5 770 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1da177e4 771
e315cd28
AC		 772 while ((!atomic_read(&base_vha->loop_down_timer) &&
773 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
774 atomic_read(&base_vha->loop_state) != LOOP_READY) {
775 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
57680080
RA		 776 return_status = QLA_FUNCTION_FAILED;
777 break;
778 }
1da177e4
LT		 779 msleep(1000);
780 if (time_after_eq(jiffies, loop_timeout)) {
781 return_status = QLA_FUNCTION_FAILED;
782 break;
783 }
784 }
fa2a1ce5 785 return (return_status);
1da177e4
LT		 786}
787
083a469d
GM		 788static void
789sp_get(struct srb *sp)
790{
791 atomic_inc(&sp->ref_count);
792}
793
1da177e4
LT		 794/**************************************************************************
795* qla2xxx_eh_abort
796*
797* Description:
798* The abort function will abort the specified command.
799*
800* Input:
801* cmd = Linux SCSI command packet to be aborted.
802*
803* Returns:
804* Either SUCCESS or FAILED.
805*
806* Note:
2ea00202 807* Only return FAILED if command not returned by firmware.
1da177e4 808**************************************************************************/
e5f82ab8 809static int
1da177e4
LT		 810qla2xxx_eh_abort(struct scsi_cmnd *cmd)
811{
e315cd28 812 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
f4f051eb 813 srb_t *sp;
4e98d3b8 814 int ret;
f4f051eb 815 unsigned int id, lun;
18e144d3 816 unsigned long flags;
2ea00202 817 int wait = 0;
e315cd28 818 struct qla_hw_data *ha = vha->hw;
1da177e4 819
f4f051eb 820 if (!CMD_SP(cmd))
2ea00202 821 return SUCCESS;
1da177e4 822
4e98d3b8
AV		 823 ret = fc_block_scsi_eh(cmd);
824 if (ret != 0)
825 return ret;
826 ret = SUCCESS;
827
f4f051eb
AV		 828 id = cmd->device->id;
829 lun = cmd->device->lun;
1da177e4 830
e315cd28 831 spin_lock_irqsave(&ha->hardware_lock, flags);
170babc3
MC		 832 sp = (srb_t *) CMD_SP(cmd);
833 if (!sp) {
834 spin_unlock_irqrestore(&ha->hardware_lock, flags);
835 return SUCCESS;
836 }
1da177e4 837
170babc3
MC		 838 DEBUG2(printk("%s(%ld): aborting sp %p from RISC.",
839 __func__, vha->host_no, sp));
17d98630 840
170babc3
MC		 841 /* Get a reference to the sp and drop the lock.*/
842 sp_get(sp);
083a469d 843
e315cd28 844 spin_unlock_irqrestore(&ha->hardware_lock, flags);
170babc3
MC		 845 if (ha->isp_ops->abort_command(sp)) {
846 DEBUG2(printk("%s(%ld): abort_command "
847 "mbx failed.\n", __func__, vha->host_no));
848 ret = FAILED;
849 } else {
850 DEBUG3(printk("%s(%ld): abort_command "
851 "mbx success.\n", __func__, vha->host_no));
852 wait = 1;
853 }
854 qla2x00_sp_compl(ha, sp);
1da177e4 855
f4f051eb 856 /* Wait for the command to be returned. */
2ea00202 857 if (wait) {
e315cd28 858 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
fa2a1ce5 859 qla_printk(KERN_ERR, ha,
09d1dc2a
MI		 860 "scsi(%ld:%d:%d): Abort handler timed out -- %x.\n",
861 vha->host_no, id, lun, ret);
2ea00202 862 ret = FAILED;
f4f051eb 863 }
1da177e4 864 }
1da177e4 865
fa2a1ce5 866 qla_printk(KERN_INFO, ha,
09d1dc2a
MI		 867 "scsi(%ld:%d:%d): Abort command issued -- %d %x.\n",
868 vha->host_no, id, lun, wait, ret);
1da177e4 869
f4f051eb
AV		 870 return ret;
871}
1da177e4 872
4d78c973 873int
e315cd28 874qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
4d78c973 875 unsigned int l, enum nexus_wait_type type)
f4f051eb 876{
17d98630 877 int cnt, match, status;
18e144d3 878 unsigned long flags;
e315cd28 879 struct qla_hw_data *ha = vha->hw;
73208dfd 880 struct req_que *req;
4d78c973 881 srb_t *sp;
1da177e4 882
523ec773 883 status = QLA_SUCCESS;
17d98630 884
e315cd28 885 spin_lock_irqsave(&ha->hardware_lock, flags);
67c2e93a 886 req = vha->req;
17d98630
AC		 887 for (cnt = 1; status == QLA_SUCCESS &&
888 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
889 sp = req->outstanding_cmds[cnt];
890 if (!sp)
523ec773 891 continue;
bad75002 892 if ((sp->ctx) && !IS_PROT_IO(sp))
cf53b069 893 continue;
17d98630
AC		 894 if (vha->vp_idx != sp->fcport->vha->vp_idx)
895 continue;
896 match = 0;
897 switch (type) {
898 case WAIT_HOST:
899 match = 1;
900 break;
901 case WAIT_TARGET:
902 match = sp->cmd->device->id == t;
903 break;
904 case WAIT_LUN:
905 match = (sp->cmd->device->id == t &&
906 sp->cmd->device->lun == l);
907 break;
73208dfd 908 }
17d98630
AC		 909 if (!match)
910 continue;
911
912 spin_unlock_irqrestore(&ha->hardware_lock, flags);
913 status = qla2x00_eh_wait_on_command(sp->cmd);
914 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 915 }
e315cd28 916 spin_unlock_irqrestore(&ha->hardware_lock, flags);
523ec773
AV		 917
918 return status;
1da177e4
LT		 919}
920
523ec773
AV		 921static char *reset_errors[] = {
922 "HBA not online",
923 "HBA not ready",
924 "Task management failed",
925 "Waiting for command completions",
926};
1da177e4 927
e5f82ab8 928static int
523ec773 929__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
2afa19a9 930 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1da177e4 931{
e315cd28 932 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 933 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
523ec773 934 int err;
1da177e4 935
b0328bee 936 if (!fcport)
523ec773 937 return FAILED;
1da177e4 938
4e98d3b8
AV		 939 err = fc_block_scsi_eh(cmd);
940 if (err != 0)
941 return err;
942
e315cd28
AC		 943 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
944 vha->host_no, cmd->device->id, cmd->device->lun, name);
1da177e4 945
523ec773 946 err = 0;
e315cd28 947 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
523ec773
AV		 948 goto eh_reset_failed;
949 err = 1;
e315cd28 950 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
523ec773
AV		 951 goto eh_reset_failed;
952 err = 2;
2afa19a9
AC		 953 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
954 != QLA_SUCCESS)
523ec773
AV		 955 goto eh_reset_failed;
956 err = 3;
e315cd28 957 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
4d78c973 958 cmd->device->lun, type) != QLA_SUCCESS)
523ec773
AV		 959 goto eh_reset_failed;
960
e315cd28
AC		 961 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
962 vha->host_no, cmd->device->id, cmd->device->lun, name);
523ec773
AV		 963
964 return SUCCESS;
965
4d78c973 966eh_reset_failed:
e315cd28
AC		 967 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
968 , vha->host_no, cmd->device->id, cmd->device->lun, name,
523ec773
AV		 969 reset_errors[err]);
970 return FAILED;
971}
1da177e4 972
523ec773
AV		 973static int
974qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
975{
e315cd28
AC		 976 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
977 struct qla_hw_data *ha = vha->hw;
1da177e4 978
523ec773
AV		 979 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
980 ha->isp_ops->lun_reset);
1da177e4
LT		 981}
982
1da177e4 983static int
523ec773 984qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1da177e4 985{
e315cd28
AC		 986 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
987 struct qla_hw_data *ha = vha->hw;
1da177e4 988
523ec773
AV		 989 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
990 ha->isp_ops->target_reset);
1da177e4
LT		 991}
992
1da177e4
LT		 993/**************************************************************************
994* qla2xxx_eh_bus_reset
995*
996* Description:
997* The bus reset function will reset the bus and abort any executing
998* commands.
999*
1000* Input:
1001* cmd = Linux SCSI command packet of the command that cause the
1002* bus reset.
1003*
1004* Returns:
1005* SUCCESS/FAILURE (defined as macro in scsi.h).
1006*
1007**************************************************************************/
e5f82ab8 1008static int
1da177e4
LT		 1009qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1010{
e315cd28 1011 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1012 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
2c3dfe3f 1013 int ret = FAILED;
f4f051eb 1014 unsigned int id, lun;
f4f051eb 1015
f4f051eb
AV		 1016 id = cmd->device->id;
1017 lun = cmd->device->lun;
1da177e4 1018
b0328bee 1019 if (!fcport)
f4f051eb 1020 return ret;
1da177e4 1021
4e98d3b8
AV		 1022 ret = fc_block_scsi_eh(cmd);
1023 if (ret != 0)
1024 return ret;
1025 ret = FAILED;
1026
e315cd28 1027 qla_printk(KERN_INFO, vha->hw,
749af3d5 1028 "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1029
e315cd28 1030 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1da177e4 1031 DEBUG2(printk("%s failed:board disabled\n",__func__));
f4f051eb 1032 goto eh_bus_reset_done;
1da177e4
LT		 1033 }
1034
e315cd28
AC		 1035 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
1036 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
f4f051eb 1037 ret = SUCCESS;
1da177e4 1038 }
f4f051eb
AV		 1039 if (ret == FAILED)
1040 goto eh_bus_reset_done;
1da177e4 1041
9a41a62b 1042 /* Flush outstanding commands. */
4d78c973 1043 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
523ec773 1044 QLA_SUCCESS)
9a41a62b 1045 ret = FAILED;
1da177e4 1046
f4f051eb 1047eh_bus_reset_done:
e315cd28 1048 qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
25985edc 1049 (ret == FAILED) ? "failed" : "succeeded");
1da177e4 1050
f4f051eb 1051 return ret;
1da177e4
LT		 1052}
1053
1054/**************************************************************************
1055* qla2xxx_eh_host_reset
1056*
1057* Description:
1058* The reset function will reset the Adapter.
1059*
1060* Input:
1061* cmd = Linux SCSI command packet of the command that cause the
1062* adapter reset.
1063*
1064* Returns:
1065* Either SUCCESS or FAILED.
1066*
1067* Note:
1068**************************************************************************/
e5f82ab8 1069static int
1da177e4
LT		 1070qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1071{
e315cd28 1072 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1073 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
e315cd28 1074 struct qla_hw_data *ha = vha->hw;
2c3dfe3f 1075 int ret = FAILED;
f4f051eb 1076 unsigned int id, lun;
e315cd28 1077 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 1078
f4f051eb
AV		 1079 id = cmd->device->id;
1080 lun = cmd->device->lun;
f4f051eb 1081
b0328bee 1082 if (!fcport)
f4f051eb 1083 return ret;
1da177e4 1084
4e98d3b8
AV		 1085 ret = fc_block_scsi_eh(cmd);
1086 if (ret != 0)
1087 return ret;
1088 ret = FAILED;
1089
1da177e4 1090 qla_printk(KERN_INFO, ha,
e315cd28 1091 "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1092
86fbee86 1093 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
f4f051eb 1094 goto eh_host_reset_lock;
1da177e4
LT		 1095
1096 /*
1097 * Fixme-may be dpc thread is active and processing
fa2a1ce5 1098 * loop_resync,so wait a while for it to
1da177e4
LT		 1099 * be completed and then issue big hammer.Otherwise
1100 * it may cause I/O failure as big hammer marks the
1101 * devices as lost kicking of the port_down_timer
1102 * while dpc is stuck for the mailbox to complete.
1103 */
e315cd28
AC		 1104 qla2x00_wait_for_loop_ready(vha);
1105 if (vha != base_vha) {
1106 if (qla2x00_vp_abort_isp(vha))
f4f051eb 1107 goto eh_host_reset_lock;
e315cd28 1108 } else {
a9083016
GM		 1109 if (IS_QLA82XX(vha->hw)) {
1110 if (!qla82xx_fcoe_ctx_reset(vha)) {
1111 /* Ctx reset success */
1112 ret = SUCCESS;
1113 goto eh_host_reset_lock;
1114 }
1115 /* fall thru if ctx reset failed */
1116 }
68ca949c
AC		 1117 if (ha->wq)
1118 flush_workqueue(ha->wq);
1119
e315cd28 1120 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 1121 if (ha->isp_ops->abort_isp(base_vha)) {
e315cd28
AC		 1122 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1123 /* failed. schedule dpc to try */
1124 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1125
1126 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
1127 goto eh_host_reset_lock;
1128 }
1129 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
fa2a1ce5 1130 }
1da177e4 1131
e315cd28 1132 /* Waiting for command to be returned to OS.*/
4d78c973 1133 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
e315cd28 1134 QLA_SUCCESS)
f4f051eb 1135 ret = SUCCESS;
1da177e4 1136
f4f051eb 1137eh_host_reset_lock:
f4f051eb 1138 qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
25985edc 1139 (ret == FAILED) ? "failed" : "succeeded");
1da177e4 1140
f4f051eb
AV		 1141 return ret;
1142}
1da177e4
LT		 1143
1144/*
1145* qla2x00_loop_reset
1146* Issue loop reset.
1147*
1148* Input:
1149* ha = adapter block pointer.
1150*
1151* Returns:
1152* 0 = success
1153*/
a4722cf2 1154int
e315cd28 1155qla2x00_loop_reset(scsi_qla_host_t *vha)
1da177e4 1156{
0c8c39af 1157 int ret;
bdf79621 1158 struct fc_port *fcport;
e315cd28 1159 struct qla_hw_data *ha = vha->hw;
1da177e4 1160
f4c496c1 1161 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
55e5ed27
AV		 1162 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1163 if (fcport->port_type != FCT_TARGET)
1164 continue;
1165
1166 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1167 if (ret != QLA_SUCCESS) {
1168 DEBUG2_3(printk("%s(%ld): bus_reset failed: "
1169 "target_reset=%d d_id=%x.\n", __func__,
1170 vha->host_no, ret, fcport->d_id.b24));
1171 }
1172 }
1173 }
1174
a9083016 1175 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
e315cd28 1176 ret = qla2x00_full_login_lip(vha);
0c8c39af 1177 if (ret != QLA_SUCCESS) {
749af3d5 1178 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28 1179 "full_login_lip=%d.\n", __func__, vha->host_no,
0c8c39af 1180 ret));
749af3d5
AC		 1181 }
1182 atomic_set(&vha->loop_state, LOOP_DOWN);
1183 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1184 qla2x00_mark_all_devices_lost(vha, 0);
1185 qla2x00_wait_for_loop_ready(vha);
0c8c39af
AV		 1186 }
1187
0d6e61bc 1188 if (ha->flags.enable_lip_reset) {
e315cd28 1189 ret = qla2x00_lip_reset(vha);
0c8c39af 1190 if (ret != QLA_SUCCESS) {
749af3d5 1191 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28
AC		 1192 "lip_reset=%d.\n", __func__, vha->host_no, ret));
1193 } else
1194 qla2x00_wait_for_loop_ready(vha);
1da177e4
LT		 1195 }
1196
1da177e4 1197 /* Issue marker command only when we are going to start the I/O */
e315cd28 1198 vha->marker_needed = 1;
1da177e4 1199
0c8c39af 1200 return QLA_SUCCESS;
1da177e4
LT		 1201}
1202
df4bf0bb 1203void
e315cd28 1204qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
df4bf0bb 1205{
73208dfd 1206 int que, cnt;
df4bf0bb
AV		 1207 unsigned long flags;
1208 srb_t *sp;
ac280b67 1209 struct srb_ctx *ctx;
e315cd28 1210 struct qla_hw_data *ha = vha->hw;
73208dfd 1211 struct req_que *req;
df4bf0bb
AV		 1212
1213 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 1214 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 1215 req = ha->req_q_map[que];
73208dfd
AC		 1216 if (!req)
1217 continue;
1218 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1219 sp = req->outstanding_cmds[cnt];
e612d465 1220 if (sp) {
73208dfd 1221 req->outstanding_cmds[cnt] = NULL;
a9083016 1222 if (!sp->ctx ||
bad75002
AE		 1223 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1224 IS_PROT_IO(sp)) {
ac280b67
AV		 1225 sp->cmd->result = res;
1226 qla2x00_sp_compl(ha, sp);
1227 } else {
1228 ctx = sp->ctx;
6c452a45
AV		 1229 if (ctx->type == SRB_LOGIN_CMD ||
1230 ctx->type == SRB_LOGOUT_CMD) {
4916392b 1231 ctx->u.iocb_cmd->free(sp);
db3ad7f8 1232 } else {
6c452a45 1233 struct fc_bsg_job *bsg_job =
4916392b 1234 ctx->u.bsg_job;
6c452a45
AV		 1235 if (bsg_job->request->msgcode
1236 == FC_BSG_HST_CT)
db3ad7f8 1237 kfree(sp->fcport);
6c452a45
AV		 1238 bsg_job->req->errors = 0;
1239 bsg_job->reply->result = res;
4916392b 1240 bsg_job->job_done(bsg_job);
db3ad7f8 1241 kfree(sp->ctx);
6c452a45 1242 mempool_free(sp,
4916392b 1243 ha->srb_mempool);
db3ad7f8 1244 }
ac280b67 1245 }
73208dfd 1246 }
df4bf0bb
AV		 1247 }
1248 }
1249 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1250}
1251
f4f051eb
AV		 1252static int
1253qla2xxx_slave_alloc(struct scsi_device *sdev)
1da177e4 1254{
bdf79621 1255 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1da177e4 1256
19a7b4ae 1257 if (!rport || fc_remote_port_chkready(rport))
f4f051eb 1258 return -ENXIO;
bdf79621 1259
19a7b4ae 1260 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1da177e4 1261
f4f051eb
AV		 1262 return 0;
1263}
1da177e4 1264
f4f051eb
AV		 1265static int
1266qla2xxx_slave_configure(struct scsi_device *sdev)
1267{
e315cd28 1268 scsi_qla_host_t *vha = shost_priv(sdev->host);
2afa19a9 1269 struct req_que *req = vha->req;
8482e118 1270
f4f051eb 1271 if (sdev->tagged_supported)
73208dfd 1272 scsi_activate_tcq(sdev, req->max_q_depth);
f4f051eb 1273 else
73208dfd 1274 scsi_deactivate_tcq(sdev, req->max_q_depth);
f4f051eb
AV		 1275 return 0;
1276}
1da177e4 1277
f4f051eb
AV		 1278static void
1279qla2xxx_slave_destroy(struct scsi_device *sdev)
1280{
1281 sdev->hostdata = NULL;
1da177e4
LT		 1282}
1283
c45dd305
GM		 1284static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1285{
1286 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1287
1288 if (!scsi_track_queue_full(sdev, qdepth))
1289 return;
1290
1291 DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
1292 "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
1293 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1294 sdev->queue_depth));
1295}
1296
1297static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1298{
1299 fc_port_t *fcport = sdev->hostdata;
1300 struct scsi_qla_host *vha = fcport->vha;
1301 struct qla_hw_data *ha = vha->hw;
1302 struct req_que *req = NULL;
1303
1304 req = vha->req;
1305 if (!req)
1306 return;
1307
1308 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1309 return;
1310
1311 if (sdev->ordered_tags)
1312 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1313 else
1314 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1315
1316 DEBUG2(qla_printk(KERN_INFO, ha,
1317 "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
1318 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1319 sdev->queue_depth));
1320}
1321
ce7e4af7 1322static int
e881a172 1323qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
ce7e4af7 1324{
c45dd305
GM		 1325 switch (reason) {
1326 case SCSI_QDEPTH_DEFAULT:
1327 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1328 break;
1329 case SCSI_QDEPTH_QFULL:
1330 qla2x00_handle_queue_full(sdev, qdepth);
1331 break;
1332 case SCSI_QDEPTH_RAMP_UP:
1333 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1334 break;
1335 default:
08002af2 1336 return -EOPNOTSUPP;
c45dd305 1337 }
e881a172 1338
ce7e4af7
AV		 1339 return sdev->queue_depth;
1340}
1341
1342static int
1343qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1344{
1345 if (sdev->tagged_supported) {
1346 scsi_set_tag_type(sdev, tag_type);
1347 if (tag_type)
1348 scsi_activate_tcq(sdev, sdev->queue_depth);
1349 else
1350 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1351 } else
1352 tag_type = 0;
1353
1354 return tag_type;
1355}
1356
1da177e4
LT		 1357/**
1358 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1359 * @ha: HA context
1360 *
1361 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1362 * supported addressing method.
1363 */
1364static void
53303c42 1365qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1da177e4 1366{
7524f9b9 1367 /* Assume a 32bit DMA mask. */
1da177e4 1368 ha->flags.enable_64bit_addressing = 0;
1da177e4 1369
6a35528a 1370 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
7524f9b9
AV		 1371 /* Any upper-dword bits set? */
1372 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
6a35528a 1373 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
7524f9b9 1374 /* Ok, a 64bit DMA mask is applicable. */
1da177e4 1375 ha->flags.enable_64bit_addressing = 1;
fd34f556
AV		 1376 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1377 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
7524f9b9 1378 return;
1da177e4 1379 }
1da177e4 1380 }
7524f9b9 1381
284901a9
YH		 1382 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1383 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1da177e4
LT		 1384}
1385
fd34f556 1386static void
e315cd28 1387qla2x00_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1388{
1389 unsigned long flags = 0;
1390 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1391
1392 spin_lock_irqsave(&ha->hardware_lock, flags);
1393 ha->interrupts_on = 1;
1394 /* enable risc and host interrupts */
1395 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1396 RD_REG_WORD(&reg->ictrl);
1397 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1398
1399}
1400
1401static void
e315cd28 1402qla2x00_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1403{
1404 unsigned long flags = 0;
1405 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1406
1407 spin_lock_irqsave(&ha->hardware_lock, flags);
1408 ha->interrupts_on = 0;
1409 /* disable risc and host interrupts */
1410 WRT_REG_WORD(&reg->ictrl, 0);
1411 RD_REG_WORD(&reg->ictrl);
1412 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1413}
1414
1415static void
e315cd28 1416qla24xx_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1417{
1418 unsigned long flags = 0;
1419 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1420
1421 spin_lock_irqsave(&ha->hardware_lock, flags);
1422 ha->interrupts_on = 1;
1423 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1424 RD_REG_DWORD(&reg->ictrl);
1425 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1426}
1427
1428static void
e315cd28 1429qla24xx_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1430{
1431 unsigned long flags = 0;
1432 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1433
124f85e6
AV		 1434 if (IS_NOPOLLING_TYPE(ha))
1435 return;
fd34f556
AV		 1436 spin_lock_irqsave(&ha->hardware_lock, flags);
1437 ha->interrupts_on = 0;
1438 WRT_REG_DWORD(&reg->ictrl, 0);
1439 RD_REG_DWORD(&reg->ictrl);
1440 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1441}
1442
1443static struct isp_operations qla2100_isp_ops = {
1444 .pci_config = qla2100_pci_config,
1445 .reset_chip = qla2x00_reset_chip,
1446 .chip_diag = qla2x00_chip_diag,
1447 .config_rings = qla2x00_config_rings,
1448 .reset_adapter = qla2x00_reset_adapter,
1449 .nvram_config = qla2x00_nvram_config,
1450 .update_fw_options = qla2x00_update_fw_options,
1451 .load_risc = qla2x00_load_risc,
1452 .pci_info_str = qla2x00_pci_info_str,
1453 .fw_version_str = qla2x00_fw_version_str,
1454 .intr_handler = qla2100_intr_handler,
1455 .enable_intrs = qla2x00_enable_intrs,
1456 .disable_intrs = qla2x00_disable_intrs,
1457 .abort_command = qla2x00_abort_command,
523ec773
AV		 1458 .target_reset = qla2x00_abort_target,
1459 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1460 .fabric_login = qla2x00_login_fabric,
1461 .fabric_logout = qla2x00_fabric_logout,
1462 .calc_req_entries = qla2x00_calc_iocbs_32,
1463 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1464 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1465 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1466 .read_nvram = qla2x00_read_nvram_data,
1467 .write_nvram = qla2x00_write_nvram_data,
1468 .fw_dump = qla2100_fw_dump,
1469 .beacon_on = NULL,
1470 .beacon_off = NULL,
1471 .beacon_blink = NULL,
1472 .read_optrom = qla2x00_read_optrom_data,
1473 .write_optrom = qla2x00_write_optrom_data,
1474 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1475 .start_scsi = qla2x00_start_scsi,
a9083016 1476 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1477};
1478
1479static struct isp_operations qla2300_isp_ops = {
1480 .pci_config = qla2300_pci_config,
1481 .reset_chip = qla2x00_reset_chip,
1482 .chip_diag = qla2x00_chip_diag,
1483 .config_rings = qla2x00_config_rings,
1484 .reset_adapter = qla2x00_reset_adapter,
1485 .nvram_config = qla2x00_nvram_config,
1486 .update_fw_options = qla2x00_update_fw_options,
1487 .load_risc = qla2x00_load_risc,
1488 .pci_info_str = qla2x00_pci_info_str,
1489 .fw_version_str = qla2x00_fw_version_str,
1490 .intr_handler = qla2300_intr_handler,
1491 .enable_intrs = qla2x00_enable_intrs,
1492 .disable_intrs = qla2x00_disable_intrs,
1493 .abort_command = qla2x00_abort_command,
523ec773
AV		 1494 .target_reset = qla2x00_abort_target,
1495 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1496 .fabric_login = qla2x00_login_fabric,
1497 .fabric_logout = qla2x00_fabric_logout,
1498 .calc_req_entries = qla2x00_calc_iocbs_32,
1499 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1500 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1501 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1502 .read_nvram = qla2x00_read_nvram_data,
1503 .write_nvram = qla2x00_write_nvram_data,
1504 .fw_dump = qla2300_fw_dump,
1505 .beacon_on = qla2x00_beacon_on,
1506 .beacon_off = qla2x00_beacon_off,
1507 .beacon_blink = qla2x00_beacon_blink,
1508 .read_optrom = qla2x00_read_optrom_data,
1509 .write_optrom = qla2x00_write_optrom_data,
1510 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1511 .start_scsi = qla2x00_start_scsi,
a9083016 1512 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1513};
1514
1515static struct isp_operations qla24xx_isp_ops = {
1516 .pci_config = qla24xx_pci_config,
1517 .reset_chip = qla24xx_reset_chip,
1518 .chip_diag = qla24xx_chip_diag,
1519 .config_rings = qla24xx_config_rings,
1520 .reset_adapter = qla24xx_reset_adapter,
1521 .nvram_config = qla24xx_nvram_config,
1522 .update_fw_options = qla24xx_update_fw_options,
1523 .load_risc = qla24xx_load_risc,
1524 .pci_info_str = qla24xx_pci_info_str,
1525 .fw_version_str = qla24xx_fw_version_str,
1526 .intr_handler = qla24xx_intr_handler,
1527 .enable_intrs = qla24xx_enable_intrs,
1528 .disable_intrs = qla24xx_disable_intrs,
1529 .abort_command = qla24xx_abort_command,
523ec773
AV		 1530 .target_reset = qla24xx_abort_target,
1531 .lun_reset = qla24xx_lun_reset,
fd34f556
AV		 1532 .fabric_login = qla24xx_login_fabric,
1533 .fabric_logout = qla24xx_fabric_logout,
1534 .calc_req_entries = NULL,
1535 .build_iocbs = NULL,
1536 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1537 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1538 .read_nvram = qla24xx_read_nvram_data,
1539 .write_nvram = qla24xx_write_nvram_data,
1540 .fw_dump = qla24xx_fw_dump,
1541 .beacon_on = qla24xx_beacon_on,
1542 .beacon_off = qla24xx_beacon_off,
1543 .beacon_blink = qla24xx_beacon_blink,
1544 .read_optrom = qla24xx_read_optrom_data,
1545 .write_optrom = qla24xx_write_optrom_data,
1546 .get_flash_version = qla24xx_get_flash_version,
e315cd28 1547 .start_scsi = qla24xx_start_scsi,
a9083016 1548 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1549};
1550
c3a2f0df
AV		 1551static struct isp_operations qla25xx_isp_ops = {
1552 .pci_config = qla25xx_pci_config,
1553 .reset_chip = qla24xx_reset_chip,
1554 .chip_diag = qla24xx_chip_diag,
1555 .config_rings = qla24xx_config_rings,
1556 .reset_adapter = qla24xx_reset_adapter,
1557 .nvram_config = qla24xx_nvram_config,
1558 .update_fw_options = qla24xx_update_fw_options,
1559 .load_risc = qla24xx_load_risc,
1560 .pci_info_str = qla24xx_pci_info_str,
1561 .fw_version_str = qla24xx_fw_version_str,
1562 .intr_handler = qla24xx_intr_handler,
1563 .enable_intrs = qla24xx_enable_intrs,
1564 .disable_intrs = qla24xx_disable_intrs,
1565 .abort_command = qla24xx_abort_command,
523ec773
AV		 1566 .target_reset = qla24xx_abort_target,
1567 .lun_reset = qla24xx_lun_reset,
c3a2f0df
AV		 1568 .fabric_login = qla24xx_login_fabric,
1569 .fabric_logout = qla24xx_fabric_logout,
1570 .calc_req_entries = NULL,
1571 .build_iocbs = NULL,
1572 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1573 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1574 .read_nvram = qla25xx_read_nvram_data,
1575 .write_nvram = qla25xx_write_nvram_data,
1576 .fw_dump = qla25xx_fw_dump,
1577 .beacon_on = qla24xx_beacon_on,
1578 .beacon_off = qla24xx_beacon_off,
1579 .beacon_blink = qla24xx_beacon_blink,
338c9161 1580 .read_optrom = qla25xx_read_optrom_data,
c3a2f0df
AV		 1581 .write_optrom = qla24xx_write_optrom_data,
1582 .get_flash_version = qla24xx_get_flash_version,
bad75002 1583 .start_scsi = qla24xx_dif_start_scsi,
a9083016 1584 .abort_isp = qla2x00_abort_isp,
c3a2f0df
AV		 1585};
1586
3a03eb79
AV		 1587static struct isp_operations qla81xx_isp_ops = {
1588 .pci_config = qla25xx_pci_config,
1589 .reset_chip = qla24xx_reset_chip,
1590 .chip_diag = qla24xx_chip_diag,
1591 .config_rings = qla24xx_config_rings,
1592 .reset_adapter = qla24xx_reset_adapter,
1593 .nvram_config = qla81xx_nvram_config,
1594 .update_fw_options = qla81xx_update_fw_options,
eaac30be 1595 .load_risc = qla81xx_load_risc,
3a03eb79
AV		 1596 .pci_info_str = qla24xx_pci_info_str,
1597 .fw_version_str = qla24xx_fw_version_str,
1598 .intr_handler = qla24xx_intr_handler,
1599 .enable_intrs = qla24xx_enable_intrs,
1600 .disable_intrs = qla24xx_disable_intrs,
1601 .abort_command = qla24xx_abort_command,
1602 .target_reset = qla24xx_abort_target,
1603 .lun_reset = qla24xx_lun_reset,
1604 .fabric_login = qla24xx_login_fabric,
1605 .fabric_logout = qla24xx_fabric_logout,
1606 .calc_req_entries = NULL,
1607 .build_iocbs = NULL,
1608 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1609 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
3d79038f
AV		 1610 .read_nvram = NULL,
1611 .write_nvram = NULL,
3a03eb79
AV		 1612 .fw_dump = qla81xx_fw_dump,
1613 .beacon_on = qla24xx_beacon_on,
1614 .beacon_off = qla24xx_beacon_off,
1615 .beacon_blink = qla24xx_beacon_blink,
1616 .read_optrom = qla25xx_read_optrom_data,
1617 .write_optrom = qla24xx_write_optrom_data,
1618 .get_flash_version = qla24xx_get_flash_version,
ba77ef53 1619 .start_scsi = qla24xx_dif_start_scsi,
a9083016
GM		 1620 .abort_isp = qla2x00_abort_isp,
1621};
1622
1623static struct isp_operations qla82xx_isp_ops = {
1624 .pci_config = qla82xx_pci_config,
1625 .reset_chip = qla82xx_reset_chip,
1626 .chip_diag = qla24xx_chip_diag,
1627 .config_rings = qla82xx_config_rings,
1628 .reset_adapter = qla24xx_reset_adapter,
1629 .nvram_config = qla81xx_nvram_config,
1630 .update_fw_options = qla24xx_update_fw_options,
1631 .load_risc = qla82xx_load_risc,
1632 .pci_info_str = qla82xx_pci_info_str,
1633 .fw_version_str = qla24xx_fw_version_str,
1634 .intr_handler = qla82xx_intr_handler,
1635 .enable_intrs = qla82xx_enable_intrs,
1636 .disable_intrs = qla82xx_disable_intrs,
1637 .abort_command = qla24xx_abort_command,
1638 .target_reset = qla24xx_abort_target,
1639 .lun_reset = qla24xx_lun_reset,
1640 .fabric_login = qla24xx_login_fabric,
1641 .fabric_logout = qla24xx_fabric_logout,
1642 .calc_req_entries = NULL,
1643 .build_iocbs = NULL,
1644 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1645 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1646 .read_nvram = qla24xx_read_nvram_data,
1647 .write_nvram = qla24xx_write_nvram_data,
1648 .fw_dump = qla24xx_fw_dump,
1649 .beacon_on = qla24xx_beacon_on,
1650 .beacon_off = qla24xx_beacon_off,
1651 .beacon_blink = qla24xx_beacon_blink,
1652 .read_optrom = qla82xx_read_optrom_data,
1653 .write_optrom = qla82xx_write_optrom_data,
1654 .get_flash_version = qla24xx_get_flash_version,
1655 .start_scsi = qla82xx_start_scsi,
1656 .abort_isp = qla82xx_abort_isp,
3a03eb79
AV		 1657};
1658
ea5b6382 1659static inline void
e315cd28 1660qla2x00_set_isp_flags(struct qla_hw_data *ha)
ea5b6382
AV		 1661{
1662 ha->device_type = DT_EXTENDED_IDS;
1663 switch (ha->pdev->device) {
1664 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1665 ha->device_type |= DT_ISP2100;
1666 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1667 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382
AV		 1668 break;
1669 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1670 ha->device_type |= DT_ISP2200;
1671 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1672 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382
AV		 1673 break;
1674 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1675 ha->device_type |= DT_ISP2300;
4a59f71d 1676 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1677 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1678 break;
1679 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1680 ha->device_type |= DT_ISP2312;
4a59f71d 1681 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1682 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1683 break;
1684 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1685 ha->device_type |= DT_ISP2322;
4a59f71d 1686 ha->device_type |= DT_ZIO_SUPPORTED;
ea5b6382
AV		 1687 if (ha->pdev->subsystem_vendor == 0x1028 &&
1688 ha->pdev->subsystem_device == 0x0170)
1689 ha->device_type |= DT_OEM_001;
441d1072 1690 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1691 break;
1692 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1693 ha->device_type |= DT_ISP6312;
441d1072 1694 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1695 break;
1696 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1697 ha->device_type |= DT_ISP6322;
441d1072 1698 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1699 break;
1700 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1701 ha->device_type |= DT_ISP2422;
4a59f71d 1702 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1703 ha->device_type |= DT_FWI2;
c76f2c01 1704 ha->device_type |= DT_IIDMA;
441d1072 1705 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382
AV		 1706 break;
1707 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1708 ha->device_type |= DT_ISP2432;
4a59f71d 1709 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1710 ha->device_type |= DT_FWI2;
c76f2c01 1711 ha->device_type |= DT_IIDMA;
441d1072 1712 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1713 break;
4d4df193
HK		 1714 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1715 ha->device_type |= DT_ISP8432;
1716 ha->device_type |= DT_ZIO_SUPPORTED;
1717 ha->device_type |= DT_FWI2;
1718 ha->device_type |= DT_IIDMA;
1719 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1720 break;
044cc6c8
AV		 1721 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1722 ha->device_type |= DT_ISP5422;
e428924c 1723 ha->device_type |= DT_FWI2;
441d1072 1724 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1725 break;
044cc6c8
AV		 1726 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1727 ha->device_type |= DT_ISP5432;
e428924c 1728 ha->device_type |= DT_FWI2;
441d1072 1729 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1730 break;
c3a2f0df
AV		 1731 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1732 ha->device_type |= DT_ISP2532;
1733 ha->device_type |= DT_ZIO_SUPPORTED;
1734 ha->device_type |= DT_FWI2;
1735 ha->device_type |= DT_IIDMA;
441d1072 1736 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1737 break;
3a03eb79
AV		 1738 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1739 ha->device_type |= DT_ISP8001;
1740 ha->device_type |= DT_ZIO_SUPPORTED;
1741 ha->device_type |= DT_FWI2;
1742 ha->device_type |= DT_IIDMA;
1743 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1744 break;
a9083016
GM		 1745 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1746 ha->device_type |= DT_ISP8021;
1747 ha->device_type |= DT_ZIO_SUPPORTED;
1748 ha->device_type |= DT_FWI2;
1749 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1750 /* Initialize 82XX ISP flags */
1751 qla82xx_init_flags(ha);
1752 break;
ea5b6382 1753 }
e5b68a61 1754
a9083016
GM		 1755 if (IS_QLA82XX(ha))
1756 ha->port_no = !(ha->portnum & 1);
1757 else
1758 /* Get adapter physical port no from interrupt pin register. */
1759 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1760
e5b68a61
AC		 1761 if (ha->port_no & 1)
1762 ha->flags.port0 = 1;
1763 else
1764 ha->flags.port0 = 0;
ea5b6382
AV		 1765}
1766
1da177e4 1767static int
e315cd28 1768qla2x00_iospace_config(struct qla_hw_data *ha)
1da177e4 1769{
3776541d 1770 resource_size_t pio;
73208dfd 1771 uint16_t msix;
68ca949c 1772 int cpus;
1da177e4 1773
a9083016
GM		 1774 if (IS_QLA82XX(ha))
1775 return qla82xx_iospace_config(ha);
1776
285d0321
AV		 1777 if (pci_request_selected_regions(ha->pdev, ha->bars,
1778 QLA2XXX_DRIVER_NAME)) {
1779 qla_printk(KERN_WARNING, ha,
1780 "Failed to reserve PIO/MMIO regions (%s)\n",
1781 pci_name(ha->pdev));
1782
1783 goto iospace_error_exit;
1784 }
1785 if (!(ha->bars & 1))
1786 goto skip_pio;
1787
1da177e4
LT		 1788 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1789 pio = pci_resource_start(ha->pdev, 0);
3776541d
AV		 1790 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1791 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1da177e4
LT		 1792 qla_printk(KERN_WARNING, ha,
1793 "Invalid PCI I/O region size (%s)...\n",
1794 pci_name(ha->pdev));
1795 pio = 0;
1796 }
1797 } else {
1798 qla_printk(KERN_WARNING, ha,
1799 "region #0 not a PIO resource (%s)...\n",
1800 pci_name(ha->pdev));
1801 pio = 0;
1802 }
285d0321 1803 ha->pio_address = pio;
1da177e4 1804
285d0321 1805skip_pio:
1da177e4 1806 /* Use MMIO operations for all accesses. */
3776541d 1807 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1da177e4 1808 qla_printk(KERN_ERR, ha,
3776541d 1809 "region #1 not an MMIO resource (%s), aborting\n",
1da177e4
LT		 1810 pci_name(ha->pdev));
1811 goto iospace_error_exit;
1812 }
3776541d 1813 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1da177e4
LT		 1814 qla_printk(KERN_ERR, ha,
1815 "Invalid PCI mem region size (%s), aborting\n",
1816 pci_name(ha->pdev));
1817 goto iospace_error_exit;
1818 }
1819
3776541d 1820 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1da177e4
LT		 1821 if (!ha->iobase) {
1822 qla_printk(KERN_ERR, ha,
1823 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
1824
1825 goto iospace_error_exit;
1826 }
1827
73208dfd 1828 /* Determine queue resources */
2afa19a9 1829 ha->max_req_queues = ha->max_rsp_queues = 1;
d84a47c2
MH		 1830 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1831 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
2afa19a9 1832 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
17d98630 1833 goto mqiobase_exit;
d84a47c2 1834
17d98630
AC		 1835 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1836 pci_resource_len(ha->pdev, 3));
1837 if (ha->mqiobase) {
1838 /* Read MSIX vector size of the board */
1839 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1840 ha->msix_count = msix;
68ca949c
AC		 1841 /* Max queues are bounded by available msix vectors */
1842 /* queue 0 uses two msix vectors */
1843 if (ql2xmultique_tag) {
1844 cpus = num_online_cpus();
27dc9c5a 1845 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
68ca949c
AC		 1846 (cpus + 1) : (ha->msix_count - 1);
1847 ha->max_req_queues = 2;
1848 } else if (ql2xmaxqueues > 1) {
2afa19a9
AC		 1849 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1850 QLA_MQ_SIZE : ql2xmaxqueues;
1851 DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
1852 " of request queues:%d\n", ha->max_req_queues));
1853 }
68ca949c
AC		 1854 qla_printk(KERN_INFO, ha,
1855 "MSI-X vector count: %d\n", msix);
2afa19a9
AC		 1856 } else
1857 qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
17d98630
AC		 1858
1859mqiobase_exit:
2afa19a9 1860 ha->msix_count = ha->max_rsp_queues + 1;
1da177e4
LT		 1861 return (0);
1862
1863iospace_error_exit:
1864 return (-ENOMEM);
1865}
1866
1e99e33a
AV		 1867static void
1868qla2xxx_scan_start(struct Scsi_Host *shost)
1869{
e315cd28 1870 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1871
cbc8eb67
AV		 1872 if (vha->hw->flags.running_gold_fw)
1873 return;
1874
e315cd28
AC		 1875 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1876 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1877 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1878 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1e99e33a
AV		 1879}
1880
1881static int
1882qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1883{
e315cd28 1884 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1885
e315cd28 1886 if (!vha->host)
1e99e33a 1887 return 1;
e315cd28 1888 if (time > vha->hw->loop_reset_delay * HZ)
1e99e33a
AV		 1889 return 1;
1890
e315cd28 1891 return atomic_read(&vha->loop_state) == LOOP_READY;
1e99e33a
AV		 1892}
1893
1da177e4
LT		 1894/*
1895 * PCI driver interface
1896 */
7ee61397
AV		 1897static int __devinit
1898qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1da177e4 1899{
a1541d5a 1900 int ret = -ENODEV;
1da177e4 1901 struct Scsi_Host *host;
e315cd28
AC		 1902 scsi_qla_host_t *base_vha = NULL;
1903 struct qla_hw_data *ha;
29856e28 1904 char pci_info[30];
1da177e4 1905 char fw_str[30];
5433383e 1906 struct scsi_host_template *sht;
c51da4ec 1907 int bars, max_id, mem_only = 0;
e315cd28 1908 uint16_t req_length = 0, rsp_length = 0;
73208dfd
AC		 1909 struct req_que *req = NULL;
1910 struct rsp_que *rsp = NULL;
1da177e4 1911
285d0321 1912 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
a5326f86 1913 sht = &qla2xxx_driver_template;
5433383e 1914 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
8bc69e7d 1915 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
4d4df193 1916 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
8bc69e7d 1917 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
c3a2f0df 1918 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
3a03eb79 1919 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
a9083016
GM		 1920 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1921 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
285d0321 1922 bars = pci_select_bars(pdev, IORESOURCE_MEM);
09483916 1923 mem_only = 1;
285d0321
AV		 1924 }
1925
09483916
BH		 1926 if (mem_only) {
1927 if (pci_enable_device_mem(pdev))
1928 goto probe_out;
1929 } else {
1930 if (pci_enable_device(pdev))
1931 goto probe_out;
1932 }
285d0321 1933
0927678f
JB		 1934 /* This may fail but that's ok */
1935 pci_enable_pcie_error_reporting(pdev);
285d0321 1936
e315cd28
AC		 1937 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
1938 if (!ha) {
1939 DEBUG(printk("Unable to allocate memory for ha\n"));
1940 goto probe_out;
1da177e4 1941 }
e315cd28 1942 ha->pdev = pdev;
1da177e4
LT		 1943
1944 /* Clear our data area */
285d0321 1945 ha->bars = bars;
09483916 1946 ha->mem_only = mem_only;
df4bf0bb 1947 spin_lock_init(&ha->hardware_lock);
339aa70e 1948 spin_lock_init(&ha->vport_slock);
1da177e4 1949
ea5b6382
AV		 1950 /* Set ISP-type information. */
1951 qla2x00_set_isp_flags(ha);
ca79cf66
DG		 1952
1953 /* Set EEH reset type to fundamental if required by hba */
1954 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
1955 pdev->needs_freset = 1;
ca79cf66
DG		 1956 }
1957
1da177e4
LT		 1958 /* Configure PCI I/O space */
1959 ret = qla2x00_iospace_config(ha);
a1541d5a 1960 if (ret)
e315cd28 1961 goto probe_hw_failed;
1da177e4 1962
1da177e4 1963 qla_printk(KERN_INFO, ha,
5433383e
AV		 1964 "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
1965 ha->iobase);
1da177e4 1966
1da177e4 1967 ha->prev_topology = 0;
fca29703 1968 ha->init_cb_size = sizeof(init_cb_t);
d8b45213 1969 ha->link_data_rate = PORT_SPEED_UNKNOWN;
854165f4 1970 ha->optrom_size = OPTROM_SIZE_2300;
1da177e4 1971
abbd8870 1972 /* Assign ISP specific operations. */
e315cd28 1973 max_id = MAX_TARGETS_2200;
1da177e4 1974 if (IS_QLA2100(ha)) {
e315cd28 1975 max_id = MAX_TARGETS_2100;
1da177e4 1976 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
e315cd28
AC		 1977 req_length = REQUEST_ENTRY_CNT_2100;
1978 rsp_length = RESPONSE_ENTRY_CNT_2100;
1979 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1980 ha->gid_list_info_size = 4;
3a03eb79
AV		 1981 ha->flash_conf_off = ~0;
1982 ha->flash_data_off = ~0;
1983 ha->nvram_conf_off = ~0;
1984 ha->nvram_data_off = ~0;
fd34f556 1985 ha->isp_ops = &qla2100_isp_ops;
1da177e4 1986 } else if (IS_QLA2200(ha)) {
1da177e4 1987 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 1988 req_length = REQUEST_ENTRY_CNT_2200;
1989 rsp_length = RESPONSE_ENTRY_CNT_2100;
1990 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1991 ha->gid_list_info_size = 4;
3a03eb79
AV		 1992 ha->flash_conf_off = ~0;
1993 ha->flash_data_off = ~0;
1994 ha->nvram_conf_off = ~0;
1995 ha->nvram_data_off = ~0;
fd34f556 1996 ha->isp_ops = &qla2100_isp_ops;
fca29703 1997 } else if (IS_QLA23XX(ha)) {
1da177e4 1998 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 1999 req_length = REQUEST_ENTRY_CNT_2200;
2000 rsp_length = RESPONSE_ENTRY_CNT_2300;
2001 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
abbd8870 2002 ha->gid_list_info_size = 6;
854165f4
AV		 2003 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2004 ha->optrom_size = OPTROM_SIZE_2322;
3a03eb79
AV		 2005 ha->flash_conf_off = ~0;
2006 ha->flash_data_off = ~0;
2007 ha->nvram_conf_off = ~0;
2008 ha->nvram_data_off = ~0;
fd34f556 2009 ha->isp_ops = &qla2300_isp_ops;
4d4df193 2010 } else if (IS_QLA24XX_TYPE(ha)) {
fca29703 2011 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2012 req_length = REQUEST_ENTRY_CNT_24XX;
2013 rsp_length = RESPONSE_ENTRY_CNT_2300;
2014 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2c3dfe3f 2015 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
fca29703 2016 ha->gid_list_info_size = 8;
854165f4 2017 ha->optrom_size = OPTROM_SIZE_24XX;
73208dfd 2018 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
fd34f556 2019 ha->isp_ops = &qla24xx_isp_ops;
3a03eb79
AV		 2020 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2021 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2022 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2023 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
c3a2f0df 2024 } else if (IS_QLA25XX(ha)) {
c3a2f0df 2025 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2026 req_length = REQUEST_ENTRY_CNT_24XX;
2027 rsp_length = RESPONSE_ENTRY_CNT_2300;
2028 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
c3a2f0df 2029 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
c3a2f0df
AV		 2030 ha->gid_list_info_size = 8;
2031 ha->optrom_size = OPTROM_SIZE_25XX;
73208dfd 2032 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
c3a2f0df 2033 ha->isp_ops = &qla25xx_isp_ops;
3a03eb79
AV		 2034 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2035 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2036 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2037 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2038 } else if (IS_QLA81XX(ha)) {
2039 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2040 req_length = REQUEST_ENTRY_CNT_24XX;
2041 rsp_length = RESPONSE_ENTRY_CNT_2300;
2042 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2043 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2044 ha->gid_list_info_size = 8;
2045 ha->optrom_size = OPTROM_SIZE_81XX;
40859ae5 2046 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3a03eb79
AV		 2047 ha->isp_ops = &qla81xx_isp_ops;
2048 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2049 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2050 ha->nvram_conf_off = ~0;
2051 ha->nvram_data_off = ~0;
a9083016
GM		 2052 } else if (IS_QLA82XX(ha)) {
2053 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2054 req_length = REQUEST_ENTRY_CNT_82XX;
2055 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2056 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2057 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2058 ha->gid_list_info_size = 8;
2059 ha->optrom_size = OPTROM_SIZE_82XX;
087c621e 2060 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
a9083016
GM		 2061 ha->isp_ops = &qla82xx_isp_ops;
2062 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2063 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2064 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2065 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
1da177e4 2066 }
1da177e4 2067
6c2f527c 2068 mutex_init(&ha->vport_lock);
0b05a1f0
MB		 2069 init_completion(&ha->mbx_cmd_comp);
2070 complete(&ha->mbx_cmd_comp);
2071 init_completion(&ha->mbx_intr_comp);
23f2ebd1 2072 init_completion(&ha->dcbx_comp);
1da177e4 2073
2c3dfe3f 2074 set_bit(0, (unsigned long *) ha->vp_idx_map);
1da177e4 2075
53303c42 2076 qla2x00_config_dma_addressing(ha);
73208dfd 2077 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
e315cd28 2078 if (!ret) {
1da177e4
LT		 2079 qla_printk(KERN_WARNING, ha,
2080 "[ERROR] Failed to allocate memory for adapter\n");
2081
e315cd28
AC		 2082 goto probe_hw_failed;
2083 }
2084
73208dfd 2085 req->max_q_depth = MAX_Q_DEPTH;
e315cd28 2086 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
73208dfd
AC		 2087 req->max_q_depth = ql2xmaxqdepth;
2088
e315cd28
AC		 2089
2090 base_vha = qla2x00_create_host(sht, ha);
2091 if (!base_vha) {
2092 qla_printk(KERN_WARNING, ha,
2093 "[ERROR] Failed to allocate memory for scsi_host\n");
2094
a1541d5a 2095 ret = -ENOMEM;
6e9f21f3 2096 qla2x00_mem_free(ha);
2afa19a9
AC		 2097 qla2x00_free_req_que(ha, req);
2098 qla2x00_free_rsp_que(ha, rsp);
e315cd28 2099 goto probe_hw_failed;
1da177e4
LT		 2100 }
2101
e315cd28
AC		 2102 pci_set_drvdata(pdev, base_vha);
2103
e315cd28 2104 host = base_vha->host;
2afa19a9 2105 base_vha->req = req;
73208dfd
AC		 2106 host->can_queue = req->length + 128;
2107 if (IS_QLA2XXX_MIDTYPE(ha))
e315cd28 2108 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
73208dfd 2109 else
e315cd28
AC		 2110 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2111 base_vha->vp_idx;
58548cb5
GM		 2112
2113 /* Set the SG table size based on ISP type */
2114 if (!IS_FWI2_CAPABLE(ha)) {
2115 if (IS_QLA2100(ha))
2116 host->sg_tablesize = 32;
2117 } else {
2118 if (!IS_QLA82XX(ha))
2119 host->sg_tablesize = QLA_SG_ALL;
2120 }
2121
e315cd28
AC		 2122 host->max_id = max_id;
2123 host->this_id = 255;
2124 host->cmd_per_lun = 3;
2125 host->unique_id = host->host_no;
0c470874
AE		 2126 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif)
2127 host->max_cmd_len = 32;
2128 else
2129 host->max_cmd_len = MAX_CMDSZ;
e315cd28
AC		 2130 host->max_channel = MAX_BUSES - 1;
2131 host->max_lun = MAX_LUNS;
2132 host->transportt = qla2xxx_transport_template;
9a069e19 2133 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
e315cd28 2134
73208dfd
AC		 2135 /* Set up the irqs */
2136 ret = qla2x00_request_irqs(ha, rsp);
2137 if (ret)
6e9f21f3 2138 goto probe_init_failed;
90a86fc0
JC		 2139
2140 pci_save_state(pdev);
2141
73208dfd 2142 /* Alloc arrays of request and response ring ptrs */
7163ea81 2143que_init:
73208dfd
AC		 2144 if (!qla2x00_alloc_queues(ha)) {
2145 qla_printk(KERN_WARNING, ha,
2146 "[ERROR] Failed to allocate memory for queue"
2147 " pointers\n");
6e9f21f3 2148 goto probe_init_failed;
73208dfd 2149 }
a9083016 2150
73208dfd
AC		 2151 ha->rsp_q_map[0] = rsp;
2152 ha->req_q_map[0] = req;
2afa19a9
AC		 2153 rsp->req = req;
2154 req->rsp = rsp;
2155 set_bit(0, ha->req_qid_map);
2156 set_bit(0, ha->rsp_qid_map);
08029990
AV		 2157 /* FWI2-capable only. */
2158 req->req_q_in = &ha->iobase->isp24.req_q_in;
2159 req->req_q_out = &ha->iobase->isp24.req_q_out;
2160 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2161 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
17d98630 2162 if (ha->mqenable) {
08029990
AV		 2163 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2164 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2165 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2166 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
17d98630
AC		 2167 }
2168
a9083016
GM		 2169 if (IS_QLA82XX(ha)) {
2170 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2171 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2172 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2173 }
2174
e315cd28 2175 if (qla2x00_initialize_adapter(base_vha)) {
1da177e4
LT		 2176 qla_printk(KERN_WARNING, ha,
2177 "Failed to initialize adapter\n");
2178
2179 DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
2180 "Adapter flags %x.\n",
e315cd28 2181 base_vha->host_no, base_vha->device_flags));
1da177e4 2182
a9083016
GM		 2183 if (IS_QLA82XX(ha)) {
2184 qla82xx_idc_lock(ha);
2185 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2186 QLA82XX_DEV_FAILED);
2187 qla82xx_idc_unlock(ha);
2188 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
2189 }
2190
a1541d5a 2191 ret = -ENODEV;
1da177e4
LT		 2192 goto probe_failed;
2193 }
2194
7163ea81
AC		 2195 if (ha->mqenable) {
2196 if (qla25xx_setup_mode(base_vha)) {
68ca949c
AC		 2197 qla_printk(KERN_WARNING, ha,
2198 "Can't create queues, falling back to single"
2199 " queue mode\n");
7163ea81
AC		 2200 goto que_init;
2201 }
2202 }
68ca949c 2203
cbc8eb67
AV		 2204 if (ha->flags.running_gold_fw)
2205 goto skip_dpc;
2206
1da177e4
LT		 2207 /*
2208 * Startup the kernel thread for this host adapter
2209 */
39a11240 2210 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
e315cd28 2211 "%s_dpc", base_vha->host_str);
39a11240 2212 if (IS_ERR(ha->dpc_thread)) {
1da177e4
LT		 2213 qla_printk(KERN_WARNING, ha,
2214 "Unable to start DPC thread!\n");
39a11240 2215 ret = PTR_ERR(ha->dpc_thread);
1da177e4
LT		 2216 goto probe_failed;
2217 }
1da177e4 2218
cbc8eb67 2219skip_dpc:
e315cd28
AC		 2220 list_add_tail(&base_vha->list, &ha->vp_list);
2221 base_vha->host->irq = ha->pdev->irq;
1da177e4
LT		 2222
2223 /* Initialized the timer */
e315cd28 2224 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
1da177e4
LT		 2225
2226 DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
e315cd28 2227 base_vha->host_no, ha));
d19044c3 2228
ba77ef53 2229 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) {
bad75002
AE		 2230 if (ha->fw_attributes & BIT_4) {
2231 base_vha->flags.difdix_supported = 1;
2232 DEBUG18(qla_printk(KERN_INFO, ha,
2233 "Registering for DIF/DIX type 1 and 3"
2234 " protection.\n"));
2235 scsi_host_set_prot(host,
2236 SHOST_DIF_TYPE1_PROTECTION
0c470874 2237 | SHOST_DIF_TYPE2_PROTECTION
bad75002
AE		 2238 | SHOST_DIF_TYPE3_PROTECTION
2239 | SHOST_DIX_TYPE1_PROTECTION
0c470874 2240 | SHOST_DIX_TYPE2_PROTECTION
bad75002
AE		 2241 | SHOST_DIX_TYPE3_PROTECTION);
2242 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2243 } else
2244 base_vha->flags.difdix_supported = 0;
2245 }
2246
a9083016
GM		 2247 ha->isp_ops->enable_intrs(ha);
2248
a1541d5a
AV		 2249 ret = scsi_add_host(host, &pdev->dev);
2250 if (ret)
2251 goto probe_failed;
2252
1486400f
MR		 2253 base_vha->flags.init_done = 1;
2254 base_vha->flags.online = 1;
2255
1e99e33a
AV		 2256 scsi_scan_host(host);
2257
e315cd28 2258 qla2x00_alloc_sysfs_attr(base_vha);
a1541d5a 2259
e315cd28 2260 qla2x00_init_host_attr(base_vha);
a1541d5a 2261
e315cd28 2262 qla2x00_dfs_setup(base_vha);
df613b96 2263
1da177e4
LT		 2264 qla_printk(KERN_INFO, ha, "\n"
2265 " QLogic Fibre Channel HBA Driver: %s\n"
2266 " QLogic %s - %s\n"
5433383e
AV		 2267 " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
2268 qla2x00_version_str, ha->model_number,
e315cd28
AC		 2269 ha->model_desc ? ha->model_desc : "", pdev->device,
2270 ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
2271 ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
2272 ha->isp_ops->fw_version_str(base_vha, fw_str));
1da177e4 2273
1da177e4
LT		 2274 return 0;
2275
6e9f21f3 2276probe_init_failed:
2afa19a9
AC		 2277 qla2x00_free_req_que(ha, req);
2278 qla2x00_free_rsp_que(ha, rsp);
2279 ha->max_req_queues = ha->max_rsp_queues = 0;
6e9f21f3 2280
1da177e4 2281probe_failed:
b9978769
AV		 2282 if (base_vha->timer_active)
2283 qla2x00_stop_timer(base_vha);
2284 base_vha->flags.online = 0;
2285 if (ha->dpc_thread) {
2286 struct task_struct *t = ha->dpc_thread;
2287
2288 ha->dpc_thread = NULL;
2289 kthread_stop(t);
2290 }
2291
e315cd28 2292 qla2x00_free_device(base_vha);
1da177e4 2293
e315cd28 2294 scsi_host_put(base_vha->host);
1da177e4 2295
e315cd28 2296probe_hw_failed:
a9083016
GM		 2297 if (IS_QLA82XX(ha)) {
2298 qla82xx_idc_lock(ha);
2299 qla82xx_clear_drv_active(ha);
2300 qla82xx_idc_unlock(ha);
2301 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2302 if (!ql2xdbwr)
2303 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2304 } else {
2305 if (ha->iobase)
2306 iounmap(ha->iobase);
2307 }
e315cd28
AC		 2308 pci_release_selected_regions(ha->pdev, ha->bars);
2309 kfree(ha);
2310 ha = NULL;
1da177e4 2311
a1541d5a 2312probe_out:
e315cd28 2313 pci_disable_device(pdev);
a1541d5a 2314 return ret;
1da177e4 2315}
1da177e4 2316
e30d1756
MI		 2317static void
2318qla2x00_shutdown(struct pci_dev *pdev)
2319{
2320 scsi_qla_host_t *vha;
2321 struct qla_hw_data *ha;
2322
2323 vha = pci_get_drvdata(pdev);
2324 ha = vha->hw;
2325
2326 /* Turn-off FCE trace */
2327 if (ha->flags.fce_enabled) {
2328 qla2x00_disable_fce_trace(vha, NULL, NULL);
2329 ha->flags.fce_enabled = 0;
2330 }
2331
2332 /* Turn-off EFT trace */
2333 if (ha->eft)
2334 qla2x00_disable_eft_trace(vha);
2335
2336 /* Stop currently executing firmware. */
2337 qla2x00_try_to_stop_firmware(vha);
2338
2339 /* Turn adapter off line */
2340 vha->flags.online = 0;
2341
2342 /* turn-off interrupts on the card */
2343 if (ha->interrupts_on) {
2344 vha->flags.init_done = 0;
2345 ha->isp_ops->disable_intrs(ha);
2346 }
2347
2348 qla2x00_free_irqs(vha);
2349
2350 qla2x00_free_fw_dump(ha);
2351}
2352
4c993f76 2353static void
7ee61397 2354qla2x00_remove_one(struct pci_dev *pdev)
1da177e4 2355{
feafb7b1 2356 scsi_qla_host_t *base_vha, *vha;
e315cd28 2357 struct qla_hw_data *ha;
feafb7b1 2358 unsigned long flags;
e315cd28
AC		 2359
2360 base_vha = pci_get_drvdata(pdev);
2361 ha = base_vha->hw;
2362
feafb7b1
AE		 2363 spin_lock_irqsave(&ha->vport_slock, flags);
2364 list_for_each_entry(vha, &ha->vp_list, list) {
2365 atomic_inc(&vha->vref_count);
2366
8ae598d0 2367 if (vha->fc_vport) {
feafb7b1
AE		 2368 spin_unlock_irqrestore(&ha->vport_slock, flags);
2369
e315cd28 2370 fc_vport_terminate(vha->fc_vport);
feafb7b1
AE		 2371
2372 spin_lock_irqsave(&ha->vport_slock, flags);
2373 }
2374
2375 atomic_dec(&vha->vref_count);
e315cd28 2376 }
feafb7b1 2377 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 2378
e315cd28 2379 set_bit(UNLOADING, &base_vha->dpc_flags);
1da177e4 2380
b9978769
AV		 2381 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2382
e315cd28 2383 qla2x00_dfs_remove(base_vha);
c795c1e4 2384
e315cd28 2385 qla84xx_put_chip(base_vha);
c795c1e4 2386
b9978769
AV		 2387 /* Disable timer */
2388 if (base_vha->timer_active)
2389 qla2x00_stop_timer(base_vha);
2390
2391 base_vha->flags.online = 0;
2392
68ca949c
AC		 2393 /* Flush the work queue and remove it */
2394 if (ha->wq) {
2395 flush_workqueue(ha->wq);
2396 destroy_workqueue(ha->wq);
2397 ha->wq = NULL;
2398 }
2399
b9978769
AV		 2400 /* Kill the kernel thread for this host */
2401 if (ha->dpc_thread) {
2402 struct task_struct *t = ha->dpc_thread;
2403
2404 /*
2405 * qla2xxx_wake_dpc checks for ->dpc_thread
2406 * so we need to zero it out.
2407 */
2408 ha->dpc_thread = NULL;
2409 kthread_stop(t);
2410 }
2411
e315cd28 2412 qla2x00_free_sysfs_attr(base_vha);
df613b96 2413
e315cd28 2414 fc_remove_host(base_vha->host);
4d4df193 2415
e315cd28 2416 scsi_remove_host(base_vha->host);
1da177e4 2417
e315cd28 2418 qla2x00_free_device(base_vha);
bdf79621 2419
e315cd28 2420 scsi_host_put(base_vha->host);
1da177e4 2421
a9083016 2422 if (IS_QLA82XX(ha)) {
b963752f
GM		 2423 qla82xx_idc_lock(ha);
2424 qla82xx_clear_drv_active(ha);
2425 qla82xx_idc_unlock(ha);
2426
a9083016
GM		 2427 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2428 if (!ql2xdbwr)
2429 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2430 } else {
2431 if (ha->iobase)
2432 iounmap(ha->iobase);
1da177e4 2433
a9083016
GM		 2434 if (ha->mqiobase)
2435 iounmap(ha->mqiobase);
2436 }
73208dfd 2437
e315cd28
AC		 2438 pci_release_selected_regions(ha->pdev, ha->bars);
2439 kfree(ha);
2440 ha = NULL;
1da177e4 2441
90a86fc0
JC		 2442 pci_disable_pcie_error_reporting(pdev);
2443
665db93b 2444 pci_disable_device(pdev);
1da177e4
LT		 2445 pci_set_drvdata(pdev, NULL);
2446}
1da177e4
LT		 2447
2448static void
e315cd28 2449qla2x00_free_device(scsi_qla_host_t *vha)
1da177e4 2450{
e315cd28 2451 struct qla_hw_data *ha = vha->hw;
1da177e4 2452
85880801
AV		 2453 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2454
2455 /* Disable timer */
2456 if (vha->timer_active)
2457 qla2x00_stop_timer(vha);
2458
2459 /* Kill the kernel thread for this host */
2460 if (ha->dpc_thread) {
2461 struct task_struct *t = ha->dpc_thread;
2462
2463 /*
2464 * qla2xxx_wake_dpc checks for ->dpc_thread
2465 * so we need to zero it out.
2466 */
2467 ha->dpc_thread = NULL;
2468 kthread_stop(t);
2469 }
2470
2afa19a9
AC		 2471 qla25xx_delete_queues(vha);
2472
df613b96 2473 if (ha->flags.fce_enabled)
e315cd28 2474 qla2x00_disable_fce_trace(vha, NULL, NULL);
df613b96 2475
a7a167bf 2476 if (ha->eft)
e315cd28 2477 qla2x00_disable_eft_trace(vha);
a7a167bf 2478
f6ef3b18 2479 /* Stop currently executing firmware. */
e315cd28 2480 qla2x00_try_to_stop_firmware(vha);
1da177e4 2481
85880801
AV		 2482 vha->flags.online = 0;
2483
f6ef3b18 2484 /* turn-off interrupts on the card */
a9083016
GM		 2485 if (ha->interrupts_on) {
2486 vha->flags.init_done = 0;
fd34f556 2487 ha->isp_ops->disable_intrs(ha);
a9083016 2488 }
f6ef3b18 2489
e315cd28 2490 qla2x00_free_irqs(vha);
1da177e4 2491
8867048b
CD		 2492 qla2x00_free_fcports(vha);
2493
e315cd28 2494 qla2x00_mem_free(ha);
73208dfd
AC		 2495
2496 qla2x00_free_queues(ha);
1da177e4
LT		 2497}
2498
8867048b
CD		 2499void qla2x00_free_fcports(struct scsi_qla_host *vha)
2500{
2501 fc_port_t *fcport, *tfcport;
2502
2503 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2504 list_del(&fcport->list);
2505 kfree(fcport);
2506 fcport = NULL;
2507 }
2508}
2509
d97994dc 2510static inline void
e315cd28 2511qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
d97994dc
AV		 2512 int defer)
2513{
d97994dc 2514 struct fc_rport *rport;
67becc00 2515 scsi_qla_host_t *base_vha;
044d78e1 2516 unsigned long flags;
d97994dc
AV		 2517
2518 if (!fcport->rport)
2519 return;
2520
2521 rport = fcport->rport;
2522 if (defer) {
67becc00 2523 base_vha = pci_get_drvdata(vha->hw->pdev);
044d78e1 2524 spin_lock_irqsave(vha->host->host_lock, flags);
d97994dc 2525 fcport->drport = rport;
044d78e1 2526 spin_unlock_irqrestore(vha->host->host_lock, flags);
67becc00
AV		 2527 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2528 qla2xxx_wake_dpc(base_vha);
5f3a9a20 2529 } else
d97994dc 2530 fc_remote_port_delete(rport);
d97994dc
AV		 2531}
2532
1da177e4
LT		 2533/*
2534 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2535 *
2536 * Input: ha = adapter block pointer. fcport = port structure pointer.
2537 *
2538 * Return: None.
2539 *
2540 * Context:
2541 */
e315cd28 2542void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
d97994dc 2543 int do_login, int defer)
1da177e4 2544{
2c3dfe3f 2545 if (atomic_read(&fcport->state) == FCS_ONLINE &&
e315cd28
AC		 2546 vha->vp_idx == fcport->vp_idx) {
2547 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2548 qla2x00_schedule_rport_del(vha, fcport, defer);
2549 }
fa2a1ce5 2550 /*
1da177e4
LT		 2551 * We may need to retry the login, so don't change the state of the
2552 * port but do the retries.
2553 */
2554 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2555 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2556
2557 if (!do_login)
2558 return;
2559
2560 if (fcport->login_retry == 0) {
e315cd28
AC		 2561 fcport->login_retry = vha->hw->login_retry_count;
2562 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2563
2564 DEBUG(printk("scsi(%ld): Port login retry: "
2565 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2566 "id = 0x%04x retry cnt=%d\n",
e315cd28 2567 vha->host_no,
1da177e4
LT		 2568 fcport->port_name[0],
2569 fcport->port_name[1],
2570 fcport->port_name[2],
2571 fcport->port_name[3],
2572 fcport->port_name[4],
2573 fcport->port_name[5],
2574 fcport->port_name[6],
2575 fcport->port_name[7],
2576 fcport->loop_id,
2577 fcport->login_retry));
2578 }
2579}
2580
2581/*
2582 * qla2x00_mark_all_devices_lost
2583 * Updates fcport state when device goes offline.
2584 *
2585 * Input:
2586 * ha = adapter block pointer.
2587 * fcport = port structure pointer.
2588 *
2589 * Return:
2590 * None.
2591 *
2592 * Context:
2593 */
2594void
e315cd28 2595qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
1da177e4
LT		 2596{
2597 fc_port_t *fcport;
2598
e315cd28 2599 list_for_each_entry(fcport, &vha->vp_fcports, list) {
0d6e61bc 2600 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
1da177e4 2601 continue;
0d6e61bc 2602
1da177e4
LT		 2603 /*
2604 * No point in marking the device as lost, if the device is
2605 * already DEAD.
2606 */
2607 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2608 continue;
e315cd28 2609 if (atomic_read(&fcport->state) == FCS_ONLINE) {
38170fa8 2610 atomic_set(&fcport->state, FCS_DEVICE_LOST);
0d6e61bc
AV		 2611 if (defer)
2612 qla2x00_schedule_rport_del(vha, fcport, defer);
2613 else if (vha->vp_idx == fcport->vp_idx)
2614 qla2x00_schedule_rport_del(vha, fcport, defer);
2615 }
1da177e4
LT		 2616 }
2617}
2618
2619/*
2620* qla2x00_mem_alloc
2621* Allocates adapter memory.
2622*
2623* Returns:
2624* 0 = success.
e8711085 2625* !0 = failure.
1da177e4 2626*/
e8711085 2627static int
73208dfd
AC		 2628qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2629 struct req_que **req, struct rsp_que **rsp)
1da177e4
LT		 2630{
2631 char name[16];
1da177e4 2632
e8711085 2633 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
e315cd28 2634 &ha->init_cb_dma, GFP_KERNEL);
e8711085 2635 if (!ha->init_cb)
e315cd28 2636 goto fail;
e8711085 2637
e315cd28
AC		 2638 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2639 &ha->gid_list_dma, GFP_KERNEL);
2640 if (!ha->gid_list)
e8711085 2641 goto fail_free_init_cb;
1da177e4 2642
e8711085
AV		 2643 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2644 if (!ha->srb_mempool)
e315cd28 2645 goto fail_free_gid_list;
e8711085 2646
a9083016
GM		 2647 if (IS_QLA82XX(ha)) {
2648 /* Allocate cache for CT6 Ctx. */
2649 if (!ctx_cachep) {
2650 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2651 sizeof(struct ct6_dsd), 0,
2652 SLAB_HWCACHE_ALIGN, NULL);
2653 if (!ctx_cachep)
2654 goto fail_free_gid_list;
2655 }
2656 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2657 ctx_cachep);
2658 if (!ha->ctx_mempool)
2659 goto fail_free_srb_mempool;
2660 }
2661
e8711085
AV		 2662 /* Get memory for cached NVRAM */
2663 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2664 if (!ha->nvram)
a9083016 2665 goto fail_free_ctx_mempool;
e8711085 2666
e315cd28
AC		 2667 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2668 ha->pdev->device);
2669 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2670 DMA_POOL_SIZE, 8, 0);
2671 if (!ha->s_dma_pool)
2672 goto fail_free_nvram;
2673
bad75002 2674 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2675 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2676 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2677 if (!ha->dl_dma_pool) {
2678 qla_printk(KERN_WARNING, ha,
2679 "Memory Allocation failed - dl_dma_pool\n");
2680 goto fail_s_dma_pool;
2681 }
2682
2683 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2684 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2685 if (!ha->fcp_cmnd_dma_pool) {
2686 qla_printk(KERN_WARNING, ha,
2687 "Memory Allocation failed - fcp_cmnd_dma_pool\n");
2688 goto fail_dl_dma_pool;
2689 }
2690 }
2691
e8711085
AV		 2692 /* Allocate memory for SNS commands */
2693 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
e315cd28 2694 /* Get consistent memory allocated for SNS commands */
e8711085 2695 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2696 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
e8711085 2697 if (!ha->sns_cmd)
e315cd28 2698 goto fail_dma_pool;
e8711085 2699 } else {
e315cd28 2700 /* Get consistent memory allocated for MS IOCB */
e8711085 2701 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
e315cd28 2702 &ha->ms_iocb_dma);
e8711085 2703 if (!ha->ms_iocb)
e315cd28
AC		 2704 goto fail_dma_pool;
2705 /* Get consistent memory allocated for CT SNS commands */
e8711085 2706 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2707 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
e8711085
AV		 2708 if (!ha->ct_sns)
2709 goto fail_free_ms_iocb;
1da177e4
LT		 2710 }
2711
e315cd28 2712 /* Allocate memory for request ring */
73208dfd
AC		 2713 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2714 if (!*req) {
e315cd28
AC		 2715 DEBUG(printk("Unable to allocate memory for req\n"));
2716 goto fail_req;
2717 }
73208dfd
AC		 2718 (*req)->length = req_len;
2719 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2720 ((*req)->length + 1) * sizeof(request_t),
2721 &(*req)->dma, GFP_KERNEL);
2722 if (!(*req)->ring) {
e315cd28
AC		 2723 DEBUG(printk("Unable to allocate memory for req_ring\n"));
2724 goto fail_req_ring;
2725 }
2726 /* Allocate memory for response ring */
73208dfd
AC		 2727 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2728 if (!*rsp) {
2729 qla_printk(KERN_WARNING, ha,
2730 "Unable to allocate memory for rsp\n");
e315cd28
AC		 2731 goto fail_rsp;
2732 }
73208dfd
AC		 2733 (*rsp)->hw = ha;
2734 (*rsp)->length = rsp_len;
2735 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2736 ((*rsp)->length + 1) * sizeof(response_t),
2737 &(*rsp)->dma, GFP_KERNEL);
2738 if (!(*rsp)->ring) {
2739 qla_printk(KERN_WARNING, ha,
2740 "Unable to allocate memory for rsp_ring\n");
e315cd28
AC		 2741 goto fail_rsp_ring;
2742 }
73208dfd
AC		 2743 (*req)->rsp = *rsp;
2744 (*rsp)->req = *req;
2745 /* Allocate memory for NVRAM data for vports */
2746 if (ha->nvram_npiv_size) {
2747 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2748 ha->nvram_npiv_size, GFP_KERNEL);
2749 if (!ha->npiv_info) {
2750 qla_printk(KERN_WARNING, ha,
2751 "Unable to allocate memory for npiv info\n");
2752 goto fail_npiv_info;
2753 }
2754 } else
2755 ha->npiv_info = NULL;
e8711085 2756
b64b0e8f 2757 /* Get consistent memory allocated for EX-INIT-CB. */
a9083016 2758 if (IS_QLA8XXX_TYPE(ha)) {
b64b0e8f
AV		 2759 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2760 &ha->ex_init_cb_dma);
2761 if (!ha->ex_init_cb)
2762 goto fail_ex_init_cb;
2763 }
2764
a9083016
GM		 2765 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2766
5ff1d584
AV		 2767 /* Get consistent memory allocated for Async Port-Database. */
2768 if (!IS_FWI2_CAPABLE(ha)) {
2769 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2770 &ha->async_pd_dma);
2771 if (!ha->async_pd)
2772 goto fail_async_pd;
2773 }
2774
e315cd28
AC		 2775 INIT_LIST_HEAD(&ha->vp_list);
2776 return 1;
2777
5ff1d584
AV		 2778fail_async_pd:
2779 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f
AV		 2780fail_ex_init_cb:
2781 kfree(ha->npiv_info);
73208dfd
AC		 2782fail_npiv_info:
2783 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2784 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2785 (*rsp)->ring = NULL;
2786 (*rsp)->dma = 0;
e315cd28 2787fail_rsp_ring:
73208dfd 2788 kfree(*rsp);
e315cd28 2789fail_rsp:
73208dfd
AC		 2790 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2791 sizeof(request_t), (*req)->ring, (*req)->dma);
2792 (*req)->ring = NULL;
2793 (*req)->dma = 0;
e315cd28 2794fail_req_ring:
73208dfd 2795 kfree(*req);
e315cd28
AC		 2796fail_req:
2797 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2798 ha->ct_sns, ha->ct_sns_dma);
2799 ha->ct_sns = NULL;
2800 ha->ct_sns_dma = 0;
e8711085
AV		 2801fail_free_ms_iocb:
2802 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2803 ha->ms_iocb = NULL;
2804 ha->ms_iocb_dma = 0;
e315cd28 2805fail_dma_pool:
bad75002 2806 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2807 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2808 ha->fcp_cmnd_dma_pool = NULL;
2809 }
2810fail_dl_dma_pool:
bad75002 2811 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2812 dma_pool_destroy(ha->dl_dma_pool);
2813 ha->dl_dma_pool = NULL;
2814 }
2815fail_s_dma_pool:
e315cd28
AC		 2816 dma_pool_destroy(ha->s_dma_pool);
2817 ha->s_dma_pool = NULL;
e8711085
AV		 2818fail_free_nvram:
2819 kfree(ha->nvram);
2820 ha->nvram = NULL;
a9083016
GM		 2821fail_free_ctx_mempool:
2822 mempool_destroy(ha->ctx_mempool);
2823 ha->ctx_mempool = NULL;
e8711085
AV		 2824fail_free_srb_mempool:
2825 mempool_destroy(ha->srb_mempool);
2826 ha->srb_mempool = NULL;
e8711085
AV		 2827fail_free_gid_list:
2828 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2829 ha->gid_list_dma);
e8711085
AV		 2830 ha->gid_list = NULL;
2831 ha->gid_list_dma = 0;
e315cd28
AC		 2832fail_free_init_cb:
2833 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
2834 ha->init_cb_dma);
2835 ha->init_cb = NULL;
2836 ha->init_cb_dma = 0;
e8711085 2837fail:
e315cd28 2838 DEBUG(printk("%s: Memory allocation failure\n", __func__));
e8711085 2839 return -ENOMEM;
1da177e4
LT		 2840}
2841
2842/*
e30d1756
MI		 2843* qla2x00_free_fw_dump
2844* Frees fw dump stuff.
1da177e4
LT		 2845*
2846* Input:
e30d1756 2847* ha = adapter block pointer.
1da177e4 2848*/
a824ebb3 2849static void
e30d1756 2850qla2x00_free_fw_dump(struct qla_hw_data *ha)
1da177e4 2851{
df613b96
AV		 2852 if (ha->fce)
2853 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
e30d1756 2854 ha->fce_dma);
df613b96 2855
a7a167bf
AV		 2856 if (ha->fw_dump) {
2857 if (ha->eft)
2858 dma_free_coherent(&ha->pdev->dev,
e30d1756 2859 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
a7a167bf
AV		 2860 vfree(ha->fw_dump);
2861 }
e30d1756
MI		 2862 ha->fce = NULL;
2863 ha->fce_dma = 0;
2864 ha->eft = NULL;
2865 ha->eft_dma = 0;
2866 ha->fw_dump = NULL;
2867 ha->fw_dumped = 0;
2868 ha->fw_dump_reading = 0;
2869}
2870
2871/*
2872* qla2x00_mem_free
2873* Frees all adapter allocated memory.
2874*
2875* Input:
2876* ha = adapter block pointer.
2877*/
2878static void
2879qla2x00_mem_free(struct qla_hw_data *ha)
2880{
2881 qla2x00_free_fw_dump(ha);
2882
2883 if (ha->srb_mempool)
2884 mempool_destroy(ha->srb_mempool);
a7a167bf 2885
11bbc1d8
AV		 2886 if (ha->dcbx_tlv)
2887 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
2888 ha->dcbx_tlv, ha->dcbx_tlv_dma);
2889
ce0423f4
AV		 2890 if (ha->xgmac_data)
2891 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
2892 ha->xgmac_data, ha->xgmac_data_dma);
2893
1da177e4
LT		 2894 if (ha->sns_cmd)
2895 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
e315cd28 2896 ha->sns_cmd, ha->sns_cmd_dma);
1da177e4
LT		 2897
2898 if (ha->ct_sns)
2899 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
e315cd28 2900 ha->ct_sns, ha->ct_sns_dma);
1da177e4 2901
88729e53
AV		 2902 if (ha->sfp_data)
2903 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
2904
ad0ecd61
JC		 2905 if (ha->edc_data)
2906 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
2907
1da177e4
LT		 2908 if (ha->ms_iocb)
2909 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2910
b64b0e8f 2911 if (ha->ex_init_cb)
a9083016
GM		 2912 dma_pool_free(ha->s_dma_pool,
2913 ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f 2914
5ff1d584
AV		 2915 if (ha->async_pd)
2916 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
2917
1da177e4
LT		 2918 if (ha->s_dma_pool)
2919 dma_pool_destroy(ha->s_dma_pool);
2920
1da177e4
LT		 2921 if (ha->gid_list)
2922 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2923 ha->gid_list_dma);
1da177e4 2924
a9083016
GM		 2925 if (IS_QLA82XX(ha)) {
2926 if (!list_empty(&ha->gbl_dsd_list)) {
2927 struct dsd_dma *dsd_ptr, *tdsd_ptr;
2928
2929 /* clean up allocated prev pool */
2930 list_for_each_entry_safe(dsd_ptr,
2931 tdsd_ptr, &ha->gbl_dsd_list, list) {
2932 dma_pool_free(ha->dl_dma_pool,
2933 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
2934 list_del(&dsd_ptr->list);
2935 kfree(dsd_ptr);
2936 }
2937 }
2938 }
2939
2940 if (ha->dl_dma_pool)
2941 dma_pool_destroy(ha->dl_dma_pool);
2942
2943 if (ha->fcp_cmnd_dma_pool)
2944 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2945
2946 if (ha->ctx_mempool)
2947 mempool_destroy(ha->ctx_mempool);
2948
e315cd28
AC		 2949 if (ha->init_cb)
2950 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
a9083016 2951 ha->init_cb, ha->init_cb_dma);
e315cd28
AC		 2952 vfree(ha->optrom_buffer);
2953 kfree(ha->nvram);
73208dfd 2954 kfree(ha->npiv_info);
1da177e4 2955
e8711085 2956 ha->srb_mempool = NULL;
a9083016 2957 ha->ctx_mempool = NULL;
1da177e4
LT		 2958 ha->sns_cmd = NULL;
2959 ha->sns_cmd_dma = 0;
2960 ha->ct_sns = NULL;
2961 ha->ct_sns_dma = 0;
2962 ha->ms_iocb = NULL;
2963 ha->ms_iocb_dma = 0;
1da177e4
LT		 2964 ha->init_cb = NULL;
2965 ha->init_cb_dma = 0;
b64b0e8f
AV		 2966 ha->ex_init_cb = NULL;
2967 ha->ex_init_cb_dma = 0;
5ff1d584
AV		 2968 ha->async_pd = NULL;
2969 ha->async_pd_dma = 0;
1da177e4
LT		 2970
2971 ha->s_dma_pool = NULL;
a9083016
GM		 2972 ha->dl_dma_pool = NULL;
2973 ha->fcp_cmnd_dma_pool = NULL;
1da177e4 2974
1da177e4
LT		 2975 ha->gid_list = NULL;
2976 ha->gid_list_dma = 0;
e315cd28 2977}
1da177e4 2978
e315cd28
AC		 2979struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
2980 struct qla_hw_data *ha)
2981{
2982 struct Scsi_Host *host;
2983 struct scsi_qla_host *vha = NULL;
854165f4 2984
e315cd28
AC		 2985 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
2986 if (host == NULL) {
2987 printk(KERN_WARNING
2988 "qla2xxx: Couldn't allocate host from scsi layer!\n");
2989 goto fail;
2990 }
2991
2992 /* Clear our data area */
2993 vha = shost_priv(host);
2994 memset(vha, 0, sizeof(scsi_qla_host_t));
2995
2996 vha->host = host;
2997 vha->host_no = host->host_no;
2998 vha->hw = ha;
2999
3000 INIT_LIST_HEAD(&vha->vp_fcports);
3001 INIT_LIST_HEAD(&vha->work_list);
3002 INIT_LIST_HEAD(&vha->list);
3003
f999f4c1
AV		 3004 spin_lock_init(&vha->work_lock);
3005
e315cd28
AC		 3006 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3007 return vha;
3008
3009fail:
3010 return vha;
1da177e4
LT		 3011}
3012
01ef66bb 3013static struct qla_work_evt *
f999f4c1 3014qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
0971de7f
AV		 3015{
3016 struct qla_work_evt *e;
feafb7b1
AE		 3017 uint8_t bail;
3018
3019 QLA_VHA_MARK_BUSY(vha, bail);
3020 if (bail)
3021 return NULL;
0971de7f 3022
f999f4c1 3023 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
feafb7b1
AE		 3024 if (!e) {
3025 QLA_VHA_MARK_NOT_BUSY(vha);
0971de7f 3026 return NULL;
feafb7b1 3027 }
0971de7f
AV		 3028
3029 INIT_LIST_HEAD(&e->list);
3030 e->type = type;
3031 e->flags = QLA_EVT_FLAG_FREE;
3032 return e;
3033}
3034
01ef66bb 3035static int
f999f4c1 3036qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
0971de7f 3037{
f999f4c1 3038 unsigned long flags;
0971de7f 3039
f999f4c1 3040 spin_lock_irqsave(&vha->work_lock, flags);
e315cd28 3041 list_add_tail(&e->list, &vha->work_list);
f999f4c1 3042 spin_unlock_irqrestore(&vha->work_lock, flags);
e315cd28 3043 qla2xxx_wake_dpc(vha);
f999f4c1 3044
0971de7f
AV		 3045 return QLA_SUCCESS;
3046}
3047
3048int
e315cd28 3049qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
0971de7f
AV		 3050 u32 data)
3051{
3052 struct qla_work_evt *e;
3053
f999f4c1 3054 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
0971de7f
AV		 3055 if (!e)
3056 return QLA_FUNCTION_FAILED;
3057
3058 e->u.aen.code = code;
3059 e->u.aen.data = data;
f999f4c1 3060 return qla2x00_post_work(vha, e);
0971de7f
AV		 3061}
3062
8a659571
AV		 3063int
3064qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3065{
3066 struct qla_work_evt *e;
3067
f999f4c1 3068 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
8a659571
AV		 3069 if (!e)
3070 return QLA_FUNCTION_FAILED;
3071
3072 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
f999f4c1 3073 return qla2x00_post_work(vha, e);
8a659571
AV		 3074}
3075
ac280b67
AV		 3076#define qla2x00_post_async_work(name, type) \
3077int qla2x00_post_async_##name##_work( \
3078 struct scsi_qla_host *vha, \
3079 fc_port_t *fcport, uint16_t *data) \
3080{ \
3081 struct qla_work_evt *e; \
3082 \
3083 e = qla2x00_alloc_work(vha, type); \
3084 if (!e) \
3085 return QLA_FUNCTION_FAILED; \
3086 \
3087 e->u.logio.fcport = fcport; \
3088 if (data) { \
3089 e->u.logio.data[0] = data[0]; \
3090 e->u.logio.data[1] = data[1]; \
3091 } \
3092 return qla2x00_post_work(vha, e); \
3093}
3094
3095qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3096qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3097qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3098qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
5ff1d584
AV		 3099qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3100qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
ac280b67 3101
3420d36c
AV		 3102int
3103qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3104{
3105 struct qla_work_evt *e;
3106
3107 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3108 if (!e)
3109 return QLA_FUNCTION_FAILED;
3110
3111 e->u.uevent.code = code;
3112 return qla2x00_post_work(vha, e);
3113}
3114
3115static void
3116qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3117{
3118 char event_string[40];
3119 char *envp[] = { event_string, NULL };
3120
3121 switch (code) {
3122 case QLA_UEVENT_CODE_FW_DUMP:
3123 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3124 vha->host_no);
3125 break;
3126 default:
3127 /* do nothing */
3128 break;
3129 }
3130 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3131}
3132
ac280b67 3133void
e315cd28 3134qla2x00_do_work(struct scsi_qla_host *vha)
0971de7f 3135{
f999f4c1
AV		 3136 struct qla_work_evt *e, *tmp;
3137 unsigned long flags;
3138 LIST_HEAD(work);
0971de7f 3139
f999f4c1
AV		 3140 spin_lock_irqsave(&vha->work_lock, flags);
3141 list_splice_init(&vha->work_list, &work);
3142 spin_unlock_irqrestore(&vha->work_lock, flags);
3143
3144 list_for_each_entry_safe(e, tmp, &work, list) {
0971de7f 3145 list_del_init(&e->list);
0971de7f
AV		 3146
3147 switch (e->type) {
3148 case QLA_EVT_AEN:
e315cd28 3149 fc_host_post_event(vha->host, fc_get_event_number(),
0971de7f
AV		 3150 e->u.aen.code, e->u.aen.data);
3151 break;
8a659571
AV		 3152 case QLA_EVT_IDC_ACK:
3153 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3154 break;
ac280b67
AV		 3155 case QLA_EVT_ASYNC_LOGIN:
3156 qla2x00_async_login(vha, e->u.logio.fcport,
3157 e->u.logio.data);
3158 break;
3159 case QLA_EVT_ASYNC_LOGIN_DONE:
3160 qla2x00_async_login_done(vha, e->u.logio.fcport,
3161 e->u.logio.data);
3162 break;
3163 case QLA_EVT_ASYNC_LOGOUT:
3164 qla2x00_async_logout(vha, e->u.logio.fcport);
3165 break;
3166 case QLA_EVT_ASYNC_LOGOUT_DONE:
3167 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3168 e->u.logio.data);
3169 break;
5ff1d584
AV		 3170 case QLA_EVT_ASYNC_ADISC:
3171 qla2x00_async_adisc(vha, e->u.logio.fcport,
3172 e->u.logio.data);
3173 break;
3174 case QLA_EVT_ASYNC_ADISC_DONE:
3175 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3176 e->u.logio.data);
3177 break;
3420d36c
AV		 3178 case QLA_EVT_UEVENT:
3179 qla2x00_uevent_emit(vha, e->u.uevent.code);
3180 break;
0971de7f
AV		 3181 }
3182 if (e->flags & QLA_EVT_FLAG_FREE)
3183 kfree(e);
feafb7b1
AE		 3184
3185 /* For each work completed decrement vha ref count */
3186 QLA_VHA_MARK_NOT_BUSY(vha);
e315cd28 3187 }
e315cd28 3188}
f999f4c1 3189
e315cd28
AC		 3190/* Relogins all the fcports of a vport
3191 * Context: dpc thread
3192 */
3193void qla2x00_relogin(struct scsi_qla_host *vha)
3194{
3195 fc_port_t *fcport;
c6b2fca8 3196 int status;
e315cd28
AC		 3197 uint16_t next_loopid = 0;
3198 struct qla_hw_data *ha = vha->hw;
ac280b67 3199 uint16_t data[2];
e315cd28
AC		 3200
3201 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3202 /*
3203 * If the port is not ONLINE then try to login
3204 * to it if we haven't run out of retries.
3205 */
5ff1d584
AV		 3206 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3207 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
ac280b67 3208 fcport->login_retry--;
e315cd28 3209 if (fcport->flags & FCF_FABRIC_DEVICE) {
f08b7251 3210 if (fcport->flags & FCF_FCP2_DEVICE)
e315cd28
AC		 3211 ha->isp_ops->fabric_logout(vha,
3212 fcport->loop_id,
3213 fcport->d_id.b.domain,
3214 fcport->d_id.b.area,
3215 fcport->d_id.b.al_pa);
3216
ac280b67 3217 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584 3218 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3219 data[0] = 0;
3220 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3221 status = qla2x00_post_async_login_work(
3222 vha, fcport, data);
3223 if (status == QLA_SUCCESS)
3224 continue;
3225 /* Attempt a retry. */
3226 status = 1;
3227 } else
3228 status = qla2x00_fabric_login(vha,
3229 fcport, &next_loopid);
e315cd28
AC		 3230 } else
3231 status = qla2x00_local_device_login(vha,
3232 fcport);
3233
e315cd28
AC		 3234 if (status == QLA_SUCCESS) {
3235 fcport->old_loop_id = fcport->loop_id;
3236
3237 DEBUG(printk("scsi(%ld): port login OK: logged "
3238 "in ID 0x%x\n", vha->host_no, fcport->loop_id));
3239
3240 qla2x00_update_fcport(vha, fcport);
3241
3242 } else if (status == 1) {
3243 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3244 /* retry the login again */
3245 DEBUG(printk("scsi(%ld): Retrying"
3246 " %d login again loop_id 0x%x\n",
3247 vha->host_no, fcport->login_retry,
3248 fcport->loop_id));
3249 } else {
3250 fcport->login_retry = 0;
3251 }
3252
3253 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3254 fcport->loop_id = FC_NO_LOOP_ID;
3255 }
3256 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3257 break;
0971de7f 3258 }
0971de7f
AV		 3259}
3260
1da177e4
LT		 3261/**************************************************************************
3262* qla2x00_do_dpc
3263* This kernel thread is a task that is schedule by the interrupt handler
3264* to perform the background processing for interrupts.
3265*
3266* Notes:
3267* This task always run in the context of a kernel thread. It
3268* is kick-off by the driver's detect code and starts up
3269* up one per adapter. It immediately goes to sleep and waits for
3270* some fibre event. When either the interrupt handler or
3271* the timer routine detects a event it will one of the task
3272* bits then wake us up.
3273**************************************************************************/
3274static int
3275qla2x00_do_dpc(void *data)
3276{
2c3dfe3f 3277 int rval;
e315cd28
AC		 3278 scsi_qla_host_t *base_vha;
3279 struct qla_hw_data *ha;
1da177e4 3280
e315cd28
AC		 3281 ha = (struct qla_hw_data *)data;
3282 base_vha = pci_get_drvdata(ha->pdev);
1da177e4 3283
1da177e4
LT		 3284 set_user_nice(current, -20);
3285
563585ec 3286 set_current_state(TASK_INTERRUPTIBLE);
39a11240 3287 while (!kthread_should_stop()) {
1da177e4
LT		 3288 DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
3289
39a11240
CH		 3290 schedule();
3291 __set_current_state(TASK_RUNNING);
1da177e4
LT		 3292
3293 DEBUG3(printk("qla2x00: DPC handler waking up\n"));
3294
3295 /* Initialization not yet finished. Don't do anything yet. */
e315cd28 3296 if (!base_vha->flags.init_done)
1da177e4
LT		 3297 continue;
3298
85880801
AV		 3299 if (ha->flags.eeh_busy) {
3300 DEBUG17(qla_printk(KERN_WARNING, ha,
3301 "qla2x00_do_dpc: dpc_flags: %lx\n",
3302 base_vha->dpc_flags));
3303 continue;
3304 }
3305
e315cd28 3306 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
1da177e4
LT		 3307
3308 ha->dpc_active = 1;
3309
1da177e4 3310 if (ha->flags.mbox_busy) {
1da177e4
LT		 3311 ha->dpc_active = 0;
3312 continue;
3313 }
3314
e315cd28 3315 qla2x00_do_work(base_vha);
0971de7f 3316
a9083016
GM		 3317 if (IS_QLA82XX(ha)) {
3318 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3319 &base_vha->dpc_flags)) {
3320 qla82xx_idc_lock(ha);
3321 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3322 QLA82XX_DEV_FAILED);
3323 qla82xx_idc_unlock(ha);
3324 qla_printk(KERN_INFO, ha,
3325 "HW State: FAILED\n");
3326 qla82xx_device_state_handler(base_vha);
3327 continue;
3328 }
3329
3330 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3331 &base_vha->dpc_flags)) {
3332
3333 DEBUG(printk(KERN_INFO
3334 "scsi(%ld): dpc: sched "
3335 "qla82xx_fcoe_ctx_reset ha = %p\n",
3336 base_vha->host_no, ha));
3337 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3338 &base_vha->dpc_flags))) {
3339 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3340 /* FCoE-ctx reset failed.
3341 * Escalate to chip-reset
3342 */
3343 set_bit(ISP_ABORT_NEEDED,
3344 &base_vha->dpc_flags);
3345 }
3346 clear_bit(ABORT_ISP_ACTIVE,
3347 &base_vha->dpc_flags);
3348 }
3349
3350 DEBUG(printk("scsi(%ld): dpc:"
3351 " qla82xx_fcoe_ctx_reset end\n",
3352 base_vha->host_no));
3353 }
3354 }
3355
e315cd28
AC		 3356 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3357 &base_vha->dpc_flags)) {
1da177e4
LT		 3358
3359 DEBUG(printk("scsi(%ld): dpc: sched "
3360 "qla2x00_abort_isp ha = %p\n",
e315cd28 3361 base_vha->host_no, ha));
1da177e4 3362 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
e315cd28 3363 &base_vha->dpc_flags))) {
1da177e4 3364
a9083016 3365 if (ha->isp_ops->abort_isp(base_vha)) {
1da177e4
LT		 3366 /* failed. retry later */
3367 set_bit(ISP_ABORT_NEEDED,
e315cd28 3368 &base_vha->dpc_flags);
99363ef8 3369 }
e315cd28
AC		 3370 clear_bit(ABORT_ISP_ACTIVE,
3371 &base_vha->dpc_flags);
99363ef8
SJ		 3372 }
3373
1da177e4 3374 DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
e315cd28 3375 base_vha->host_no));
1da177e4
LT		 3376 }
3377
e315cd28
AC		 3378 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3379 qla2x00_update_fcports(base_vha);
3380 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
c9c5ced9 3381 }
d97994dc 3382
579d12b5
SK		 3383 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
3384 DEBUG(printk(KERN_INFO "scsi(%ld): dpc: sched "
3385 "qla2x00_quiesce_needed ha = %p\n",
3386 base_vha->host_no, ha));
3387 qla82xx_device_state_handler(base_vha);
3388 clear_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags);
3389 if (!ha->flags.quiesce_owner) {
3390 qla2x00_perform_loop_resync(base_vha);
3391
3392 qla82xx_idc_lock(ha);
3393 qla82xx_clear_qsnt_ready(base_vha);
3394 qla82xx_idc_unlock(ha);
3395 }
3396 }
3397
e315cd28
AC		 3398 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3399 &base_vha->dpc_flags) &&
3400 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
1da177e4
LT		 3401
3402 DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
e315cd28 3403 base_vha->host_no));
1da177e4 3404
e315cd28
AC		 3405 qla2x00_rst_aen(base_vha);
3406 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
1da177e4
LT		 3407 }
3408
3409 /* Retry each device up to login retry count */
e315cd28
AC		 3410 if ((test_and_clear_bit(RELOGIN_NEEDED,
3411 &base_vha->dpc_flags)) &&
3412 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3413 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
1da177e4
LT		 3414
3415 DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
e315cd28
AC		 3416 base_vha->host_no));
3417 qla2x00_relogin(base_vha);
3418
1da177e4 3419 DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
e315cd28 3420 base_vha->host_no));
1da177e4
LT		 3421 }
3422
e315cd28
AC		 3423 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3424 &base_vha->dpc_flags)) {
1da177e4
LT		 3425
3426 DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
e315cd28 3427 base_vha->host_no));
1da177e4
LT		 3428
3429 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
e315cd28 3430 &base_vha->dpc_flags))) {
1da177e4 3431
e315cd28 3432 rval = qla2x00_loop_resync(base_vha);
1da177e4 3433
e315cd28
AC		 3434 clear_bit(LOOP_RESYNC_ACTIVE,
3435 &base_vha->dpc_flags);
1da177e4
LT		 3436 }
3437
3438 DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
e315cd28 3439 base_vha->host_no));
1da177e4
LT		 3440 }
3441
e315cd28
AC		 3442 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3443 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3444 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3445 qla2xxx_flash_npiv_conf(base_vha);
272976ca
AV		 3446 }
3447
1da177e4 3448 if (!ha->interrupts_on)
fd34f556 3449 ha->isp_ops->enable_intrs(ha);
1da177e4 3450
e315cd28
AC		 3451 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3452 &base_vha->dpc_flags))
3453 ha->isp_ops->beacon_blink(base_vha);
f6df144c 3454
e315cd28 3455 qla2x00_do_dpc_all_vps(base_vha);
2c3dfe3f 3456
1da177e4 3457 ha->dpc_active = 0;
563585ec 3458 set_current_state(TASK_INTERRUPTIBLE);
1da177e4 3459 } /* End of while(1) */
563585ec 3460 __set_current_state(TASK_RUNNING);
1da177e4 3461
e315cd28 3462 DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
1da177e4
LT		 3463
3464 /*
3465 * Make sure that nobody tries to wake us up again.
3466 */
1da177e4
LT		 3467 ha->dpc_active = 0;
3468
ac280b67
AV		 3469 /* Cleanup any residual CTX SRBs. */
3470 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3471
39a11240
CH		 3472 return 0;
3473}
3474
3475void
e315cd28 3476qla2xxx_wake_dpc(struct scsi_qla_host *vha)
39a11240 3477{
e315cd28 3478 struct qla_hw_data *ha = vha->hw;
c795c1e4
AV		 3479 struct task_struct *t = ha->dpc_thread;
3480
e315cd28 3481 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
c795c1e4 3482 wake_up_process(t);
1da177e4
LT		 3483}
3484
1da177e4
LT		 3485/*
3486* qla2x00_rst_aen
3487* Processes asynchronous reset.
3488*
3489* Input:
3490* ha = adapter block pointer.
3491*/
3492static void
e315cd28 3493qla2x00_rst_aen(scsi_qla_host_t *vha)
1da177e4 3494{
e315cd28
AC		 3495 if (vha->flags.online && !vha->flags.reset_active &&
3496 !atomic_read(&vha->loop_down_timer) &&
3497 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
1da177e4 3498 do {
e315cd28 3499 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3500
3501 /*
3502 * Issue marker command only when we are going to start
3503 * the I/O.
3504 */
e315cd28
AC		 3505 vha->marker_needed = 1;
3506 } while (!atomic_read(&vha->loop_down_timer) &&
3507 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
1da177e4
LT		 3508 }
3509}
3510
f4f051eb 3511static void
e315cd28 3512qla2x00_sp_free_dma(srb_t *sp)
f4f051eb
AV		 3513{
3514 struct scsi_cmnd *cmd = sp->cmd;
bad75002 3515 struct qla_hw_data *ha = sp->fcport->vha->hw;
f4f051eb
AV		 3516
3517 if (sp->flags & SRB_DMA_VALID) {
385d70b4 3518 scsi_dma_unmap(cmd);
f4f051eb
AV		 3519 sp->flags &= ~SRB_DMA_VALID;
3520 }
bad75002
AE		 3521
3522 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3523 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3524 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3525 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3526 }
3527
3528 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3529 /* List assured to be having elements */
3530 qla2x00_clean_dsd_pool(ha, sp);
3531 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3532 }
3533
3534 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3535 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3536 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3537 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3538 }
3539
fca29703 3540 CMD_SP(cmd) = NULL;
f4f051eb
AV		 3541}
3542
3dbe756a 3543static void
083a469d 3544qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
f4f051eb
AV		 3545{
3546 struct scsi_cmnd *cmd = sp->cmd;
3547
e315cd28 3548 qla2x00_sp_free_dma(sp);
f4f051eb 3549
a9083016
GM		 3550 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3551 struct ct6_dsd *ctx = sp->ctx;
3552 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3553 ctx->fcp_cmnd_dma);
3554 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3555 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3556 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3557 mempool_free(sp->ctx, ha->ctx_mempool);
3558 sp->ctx = NULL;
3559 }
f4f051eb 3560
a9083016 3561 mempool_free(sp, ha->srb_mempool);
f4f051eb
AV		 3562 cmd->scsi_done(cmd);
3563}
bdf79621 3564
083a469d
GM		 3565void
3566qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3567{
3568 if (atomic_read(&sp->ref_count) == 0) {
3569 DEBUG2(qla_printk(KERN_WARNING, ha,
3570 "SP reference-count to ZERO -- sp=%p\n", sp));
3571 DEBUG2(BUG());
3572 return;
3573 }
3574 if (!atomic_dec_and_test(&sp->ref_count))
3575 return;
3576 qla2x00_sp_final_compl(ha, sp);
3577}
3578
1da177e4
LT		 3579/**************************************************************************
3580* qla2x00_timer
3581*
3582* Description:
3583* One second timer
3584*
3585* Context: Interrupt
3586***************************************************************************/
2c3dfe3f 3587void
e315cd28 3588qla2x00_timer(scsi_qla_host_t *vha)
1da177e4 3589{
1da177e4 3590 unsigned long cpu_flags = 0;
1da177e4
LT		 3591 int start_dpc = 0;
3592 int index;
3593 srb_t *sp;
85880801 3594 uint16_t w;
e315cd28 3595 struct qla_hw_data *ha = vha->hw;
73208dfd 3596 struct req_que *req;
85880801 3597
a5b36321
LC		 3598 if (ha->flags.eeh_busy) {
3599 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3600 return;
3601 }
3602
85880801
AV		 3603 /* Hardware read to raise pending EEH errors during mailbox waits. */
3604 if (!pci_channel_offline(ha->pdev))
3605 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
1da177e4 3606
579d12b5
SK		 3607 if (IS_QLA82XX(ha)) {
3608 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
3609 start_dpc++;
3610 qla82xx_watchdog(vha);
3611 }
3612
1da177e4 3613 /* Loop down handler. */
e315cd28 3614 if (atomic_read(&vha->loop_down_timer) > 0 &&
8f7daead
GM		 3615 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
3616 !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
e315cd28 3617 && vha->flags.online) {
1da177e4 3618
e315cd28
AC		 3619 if (atomic_read(&vha->loop_down_timer) ==
3620 vha->loop_down_abort_time) {
1da177e4
LT		 3621
3622 DEBUG(printk("scsi(%ld): Loop Down - aborting the "
3623 "queues before time expire\n",
e315cd28 3624 vha->host_no));
1da177e4 3625
e315cd28
AC		 3626 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3627 atomic_set(&vha->loop_state, LOOP_DEAD);
1da177e4 3628
f08b7251
AV		 3629 /*
3630 * Schedule an ISP abort to return any FCP2-device
3631 * commands.
3632 */
2c3dfe3f 3633 /* NPIV - scan physical port only */
e315cd28 3634 if (!vha->vp_idx) {
2c3dfe3f
SJ		 3635 spin_lock_irqsave(&ha->hardware_lock,
3636 cpu_flags);
73208dfd 3637 req = ha->req_q_map[0];
2c3dfe3f
SJ		 3638 for (index = 1;
3639 index < MAX_OUTSTANDING_COMMANDS;
3640 index++) {
3641 fc_port_t *sfcp;
3642
e315cd28 3643 sp = req->outstanding_cmds[index];
2c3dfe3f
SJ		 3644 if (!sp)
3645 continue;
bad75002 3646 if (sp->ctx && !IS_PROT_IO(sp))
cf53b069 3647 continue;
2c3dfe3f 3648 sfcp = sp->fcport;
f08b7251 3649 if (!(sfcp->flags & FCF_FCP2_DEVICE))
2c3dfe3f 3650 continue;
bdf79621 3651
8f7daead
GM		 3652 if (IS_QLA82XX(ha))
3653 set_bit(FCOE_CTX_RESET_NEEDED,
3654 &vha->dpc_flags);
3655 else
3656 set_bit(ISP_ABORT_NEEDED,
e315cd28 3657 &vha->dpc_flags);
2c3dfe3f
SJ		 3658 break;
3659 }
3660 spin_unlock_irqrestore(&ha->hardware_lock,
e315cd28 3661 cpu_flags);
1da177e4 3662 }
1da177e4
LT		 3663 start_dpc++;
3664 }
3665
3666 /* if the loop has been down for 4 minutes, reinit adapter */
e315cd28 3667 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
0d6e61bc 3668 if (!(vha->device_flags & DFLG_NO_CABLE)) {
1da177e4
LT		 3669 DEBUG(printk("scsi(%ld): Loop down - "
3670 "aborting ISP.\n",
e315cd28 3671 vha->host_no));
1da177e4
LT		 3672 qla_printk(KERN_WARNING, ha,
3673 "Loop down - aborting ISP.\n");
3674
8f7daead
GM		 3675 if (IS_QLA82XX(ha))
3676 set_bit(FCOE_CTX_RESET_NEEDED,
3677 &vha->dpc_flags);
3678 else
3679 set_bit(ISP_ABORT_NEEDED,
3680 &vha->dpc_flags);
1da177e4
LT		 3681 }
3682 }
fca29703 3683 DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
e315cd28
AC		 3684 vha->host_no,
3685 atomic_read(&vha->loop_down_timer)));
1da177e4
LT		 3686 }
3687
f6df144c
AV		 3688 /* Check if beacon LED needs to be blinked */
3689 if (ha->beacon_blink_led == 1) {
e315cd28 3690 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
f6df144c
AV		 3691 start_dpc++;
3692 }
3693
550bf57d 3694 /* Process any deferred work. */
e315cd28 3695 if (!list_empty(&vha->work_list))
550bf57d
AV		 3696 start_dpc++;
3697
1da177e4 3698 /* Schedule the DPC routine if needed */
e315cd28
AC		 3699 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3700 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3701 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
1da177e4 3702 start_dpc ||
e315cd28
AC		 3703 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3704 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
a9083016
GM		 3705 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3706 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
e315cd28
AC		 3707 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3708 test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
3709 qla2xxx_wake_dpc(vha);
1da177e4 3710
e315cd28 3711 qla2x00_restart_timer(vha, WATCH_INTERVAL);
1da177e4
LT		 3712}
3713
5433383e
AV		 3714/* Firmware interface routines. */
3715
a9083016 3716#define FW_BLOBS 8
5433383e
AV		 3717#define FW_ISP21XX 0
3718#define FW_ISP22XX 1
3719#define FW_ISP2300 2
3720#define FW_ISP2322 3
48c02fde 3721#define FW_ISP24XX 4
c3a2f0df 3722#define FW_ISP25XX 5
3a03eb79 3723#define FW_ISP81XX 6
a9083016 3724#define FW_ISP82XX 7
5433383e 3725
bb8ee499
AV		 3726#define FW_FILE_ISP21XX "ql2100_fw.bin"
3727#define FW_FILE_ISP22XX "ql2200_fw.bin"
3728#define FW_FILE_ISP2300 "ql2300_fw.bin"
3729#define FW_FILE_ISP2322 "ql2322_fw.bin"
3730#define FW_FILE_ISP24XX "ql2400_fw.bin"
c3a2f0df 3731#define FW_FILE_ISP25XX "ql2500_fw.bin"
3a03eb79 3732#define FW_FILE_ISP81XX "ql8100_fw.bin"
a9083016 3733#define FW_FILE_ISP82XX "ql8200_fw.bin"
bb8ee499 3734
e1e82b6f 3735static DEFINE_MUTEX(qla_fw_lock);
5433383e
AV		 3736
3737static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
bb8ee499
AV		 3738 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3739 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3740 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3741 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3742 { .name = FW_FILE_ISP24XX, },
c3a2f0df 3743 { .name = FW_FILE_ISP25XX, },
3a03eb79 3744 { .name = FW_FILE_ISP81XX, },
a9083016 3745 { .name = FW_FILE_ISP82XX, },
5433383e
AV		 3746};
3747
3748struct fw_blob *
e315cd28 3749qla2x00_request_firmware(scsi_qla_host_t *vha)
5433383e 3750{
e315cd28 3751 struct qla_hw_data *ha = vha->hw;
5433383e
AV		 3752 struct fw_blob *blob;
3753
3754 blob = NULL;
3755 if (IS_QLA2100(ha)) {
3756 blob = &qla_fw_blobs[FW_ISP21XX];
3757 } else if (IS_QLA2200(ha)) {
3758 blob = &qla_fw_blobs[FW_ISP22XX];
48c02fde 3759 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5433383e 3760 blob = &qla_fw_blobs[FW_ISP2300];
48c02fde 3761 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5433383e 3762 blob = &qla_fw_blobs[FW_ISP2322];
4d4df193 3763 } else if (IS_QLA24XX_TYPE(ha)) {
5433383e 3764 blob = &qla_fw_blobs[FW_ISP24XX];
c3a2f0df
AV		 3765 } else if (IS_QLA25XX(ha)) {
3766 blob = &qla_fw_blobs[FW_ISP25XX];
3a03eb79
AV		 3767 } else if (IS_QLA81XX(ha)) {
3768 blob = &qla_fw_blobs[FW_ISP81XX];
a9083016
GM		 3769 } else if (IS_QLA82XX(ha)) {
3770 blob = &qla_fw_blobs[FW_ISP82XX];
5433383e
AV		 3771 }
3772
e1e82b6f 3773 mutex_lock(&qla_fw_lock);
5433383e
AV		 3774 if (blob->fw)
3775 goto out;
3776
3777 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
3778 DEBUG2(printk("scsi(%ld): Failed to load firmware image "
e315cd28 3779 "(%s).\n", vha->host_no, blob->name));
5433383e
AV		 3780 blob->fw = NULL;
3781 blob = NULL;
3782 goto out;
3783 }
3784
3785out:
e1e82b6f 3786 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3787 return blob;
3788}
3789
3790static void
3791qla2x00_release_firmware(void)
3792{
3793 int idx;
3794
e1e82b6f 3795 mutex_lock(&qla_fw_lock);
5433383e
AV		 3796 for (idx = 0; idx < FW_BLOBS; idx++)
3797 if (qla_fw_blobs[idx].fw)
3798 release_firmware(qla_fw_blobs[idx].fw);
e1e82b6f 3799 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3800}
3801
14e660e6
SJ		 3802static pci_ers_result_t
3803qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3804{
85880801
AV		 3805 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3806 struct qla_hw_data *ha = vha->hw;
3807
3808 DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
3809 state));
b9b12f73 3810
14e660e6
SJ		 3811 switch (state) {
3812 case pci_channel_io_normal:
85880801 3813 ha->flags.eeh_busy = 0;
14e660e6
SJ		 3814 return PCI_ERS_RESULT_CAN_RECOVER;
3815 case pci_channel_io_frozen:
85880801 3816 ha->flags.eeh_busy = 1;
a5b36321
LC		 3817 /* For ISP82XX complete any pending mailbox cmd */
3818 if (IS_QLA82XX(ha)) {
7190575f 3819 ha->flags.isp82xx_fw_hung = 1;
a5b36321
LC		 3820 if (ha->flags.mbox_busy) {
3821 ha->flags.mbox_int = 1;
3822 DEBUG2(qla_printk(KERN_ERR, ha,
3823 "Due to pci channel io frozen, doing premature "
3824 "completion of mbx command\n"));
3825 complete(&ha->mbx_intr_comp);
3826 }
3827 }
90a86fc0 3828 qla2x00_free_irqs(vha);
14e660e6 3829 pci_disable_device(pdev);
bddd2d65
LC		 3830 /* Return back all IOs */
3831 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
14e660e6
SJ		 3832 return PCI_ERS_RESULT_NEED_RESET;
3833 case pci_channel_io_perm_failure:
85880801
AV		 3834 ha->flags.pci_channel_io_perm_failure = 1;
3835 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
14e660e6
SJ		 3836 return PCI_ERS_RESULT_DISCONNECT;
3837 }
3838 return PCI_ERS_RESULT_NEED_RESET;
3839}
3840
3841static pci_ers_result_t
3842qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
3843{
3844 int risc_paused = 0;
3845 uint32_t stat;
3846 unsigned long flags;
e315cd28
AC		 3847 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3848 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 3849 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3850 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
3851
bcc5b6d3
SK		 3852 if (IS_QLA82XX(ha))
3853 return PCI_ERS_RESULT_RECOVERED;
3854
14e660e6
SJ		 3855 spin_lock_irqsave(&ha->hardware_lock, flags);
3856 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
3857 stat = RD_REG_DWORD(&reg->hccr);
3858 if (stat & HCCR_RISC_PAUSE)
3859 risc_paused = 1;
3860 } else if (IS_QLA23XX(ha)) {
3861 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
3862 if (stat & HSR_RISC_PAUSED)
3863 risc_paused = 1;
3864 } else if (IS_FWI2_CAPABLE(ha)) {
3865 stat = RD_REG_DWORD(&reg24->host_status);
3866 if (stat & HSRX_RISC_PAUSED)
3867 risc_paused = 1;
3868 }
3869 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3870
3871 if (risc_paused) {
3872 qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
3873 "Dumping firmware!\n");
e315cd28 3874 ha->isp_ops->fw_dump(base_vha, 0);
14e660e6
SJ		 3875
3876 return PCI_ERS_RESULT_NEED_RESET;
3877 } else
3878 return PCI_ERS_RESULT_RECOVERED;
3879}
3880
a5b36321
LC		 3881uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
3882{
3883 uint32_t rval = QLA_FUNCTION_FAILED;
3884 uint32_t drv_active = 0;
3885 struct qla_hw_data *ha = base_vha->hw;
3886 int fn;
3887 struct pci_dev *other_pdev = NULL;
3888
3889 DEBUG17(qla_printk(KERN_INFO, ha,
3890 "scsi(%ld): In qla82xx_error_recovery\n", base_vha->host_no));
3891
3892 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3893
3894 if (base_vha->flags.online) {
3895 /* Abort all outstanding commands,
3896 * so as to be requeued later */
3897 qla2x00_abort_isp_cleanup(base_vha);
3898 }
3899
3900
3901 fn = PCI_FUNC(ha->pdev->devfn);
3902 while (fn > 0) {
3903 fn--;
3904 DEBUG17(qla_printk(KERN_INFO, ha,
3905 "Finding pci device at function = 0x%x\n", fn));
3906 other_pdev =
3907 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
3908 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
3909 fn));
3910
3911 if (!other_pdev)
3912 continue;
3913 if (atomic_read(&other_pdev->enable_cnt)) {
3914 DEBUG17(qla_printk(KERN_INFO, ha,
25985edc 3915 "Found PCI func available and enabled at 0x%x\n",
a5b36321
LC		 3916 fn));
3917 pci_dev_put(other_pdev);
3918 break;
3919 }
3920 pci_dev_put(other_pdev);
3921 }
3922
3923 if (!fn) {
3924 /* Reset owner */
3925 DEBUG17(qla_printk(KERN_INFO, ha,
3926 "This devfn is reset owner = 0x%x\n", ha->pdev->devfn));
3927 qla82xx_idc_lock(ha);
3928
3929 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3930 QLA82XX_DEV_INITIALIZING);
3931
3932 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
3933 QLA82XX_IDC_VERSION);
3934
3935 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
3936 DEBUG17(qla_printk(KERN_INFO, ha,
3937 "drv_active = 0x%x\n", drv_active));
3938
3939 qla82xx_idc_unlock(ha);
3940 /* Reset if device is not already reset
3941 * drv_active would be 0 if a reset has already been done
3942 */
3943 if (drv_active)
3944 rval = qla82xx_start_firmware(base_vha);
3945 else
3946 rval = QLA_SUCCESS;
3947 qla82xx_idc_lock(ha);
3948
3949 if (rval != QLA_SUCCESS) {
3950 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
3951 qla82xx_clear_drv_active(ha);
3952 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3953 QLA82XX_DEV_FAILED);
3954 } else {
3955 qla_printk(KERN_INFO, ha, "HW State: READY\n");
3956 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3957 QLA82XX_DEV_READY);
3958 qla82xx_idc_unlock(ha);
7190575f 3959 ha->flags.isp82xx_fw_hung = 0;
a5b36321
LC		 3960 rval = qla82xx_restart_isp(base_vha);
3961 qla82xx_idc_lock(ha);
3962 /* Clear driver state register */
3963 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
3964 qla82xx_set_drv_active(base_vha);
3965 }
3966 qla82xx_idc_unlock(ha);
3967 } else {
3968 DEBUG17(qla_printk(KERN_INFO, ha,
3969 "This devfn is not reset owner = 0x%x\n", ha->pdev->devfn));
3970 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
3971 QLA82XX_DEV_READY)) {
7190575f 3972 ha->flags.isp82xx_fw_hung = 0;
a5b36321
LC		 3973 rval = qla82xx_restart_isp(base_vha);
3974 qla82xx_idc_lock(ha);
3975 qla82xx_set_drv_active(base_vha);
3976 qla82xx_idc_unlock(ha);
3977 }
3978 }
3979 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3980
3981 return rval;
3982}
3983
14e660e6
SJ		 3984static pci_ers_result_t
3985qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3986{
3987 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
e315cd28
AC		 3988 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3989 struct qla_hw_data *ha = base_vha->hw;
90a86fc0
JC		 3990 struct rsp_que *rsp;
3991 int rc, retries = 10;
09483916 3992
85880801
AV		 3993 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
3994
90a86fc0
JC		 3995 /* Workaround: qla2xxx driver which access hardware earlier
3996 * needs error state to be pci_channel_io_online.
3997 * Otherwise mailbox command timesout.
3998 */
3999 pdev->error_state = pci_channel_io_normal;
4000
4001 pci_restore_state(pdev);
4002
8c1496bd
RL		 4003 /* pci_restore_state() clears the saved_state flag of the device
4004 * save restored state which resets saved_state flag
4005 */
4006 pci_save_state(pdev);
4007
09483916
BH		 4008 if (ha->mem_only)
4009 rc = pci_enable_device_mem(pdev);
4010 else
4011 rc = pci_enable_device(pdev);
14e660e6 4012
09483916 4013 if (rc) {
14e660e6
SJ		 4014 qla_printk(KERN_WARNING, ha,
4015 "Can't re-enable PCI device after reset.\n");
a5b36321 4016 goto exit_slot_reset;
14e660e6 4017 }
14e660e6 4018
90a86fc0
JC		 4019 rsp = ha->rsp_q_map[0];
4020 if (qla2x00_request_irqs(ha, rsp))
a5b36321 4021 goto exit_slot_reset;
90a86fc0 4022
e315cd28 4023 if (ha->isp_ops->pci_config(base_vha))
a5b36321
LC		 4024 goto exit_slot_reset;
4025
4026 if (IS_QLA82XX(ha)) {
4027 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
4028 ret = PCI_ERS_RESULT_RECOVERED;
4029 goto exit_slot_reset;
4030 } else
4031 goto exit_slot_reset;
4032 }
14e660e6 4033
90a86fc0
JC		 4034 while (ha->flags.mbox_busy && retries--)
4035 msleep(1000);
85880801 4036
e315cd28 4037 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 4038 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
14e660e6 4039 ret = PCI_ERS_RESULT_RECOVERED;
e315cd28 4040 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
14e660e6 4041
90a86fc0 4042
a5b36321 4043exit_slot_reset:
85880801
AV		 4044 DEBUG17(qla_printk(KERN_WARNING, ha,
4045 "slot_reset-return:ret=%x\n", ret));
4046
14e660e6
SJ		 4047 return ret;
4048}
4049
4050static void
4051qla2xxx_pci_resume(struct pci_dev *pdev)
4052{
e315cd28
AC		 4053 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4054 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 4055 int ret;
4056
85880801
AV		 4057 DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
4058
e315cd28 4059 ret = qla2x00_wait_for_hba_online(base_vha);
14e660e6
SJ		 4060 if (ret != QLA_SUCCESS) {
4061 qla_printk(KERN_ERR, ha,
4062 "the device failed to resume I/O "
4063 "from slot/link_reset");
4064 }
85880801 4065
3e46f031
LC		 4066 pci_cleanup_aer_uncorrect_error_status(pdev);
4067
85880801 4068 ha->flags.eeh_busy = 0;
14e660e6
SJ		 4069}
4070
4071static struct pci_error_handlers qla2xxx_err_handler = {
4072 .error_detected = qla2xxx_pci_error_detected,
4073 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4074 .slot_reset = qla2xxx_pci_slot_reset,
4075 .resume = qla2xxx_pci_resume,
4076};
4077
5433383e 4078static struct pci_device_id qla2xxx_pci_tbl[] = {
47f5e069
AV		 4079 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4080 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4081 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4082 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4083 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4084 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4085 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4086 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4087 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4d4df193 4088 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
47f5e069
AV		 4089 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4090 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
c3a2f0df 4091 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
3a03eb79 4092 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
a9083016 4093 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5433383e
AV		 4094 { 0 },
4095};
4096MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4097
fca29703 4098static struct pci_driver qla2xxx_pci_driver = {
cb63067a 4099 .name = QLA2XXX_DRIVER_NAME,
0a21ef1e
JB		 4100 .driver = {
4101 .owner = THIS_MODULE,
4102 },
fca29703 4103 .id_table = qla2xxx_pci_tbl,
7ee61397 4104 .probe = qla2x00_probe_one,
4c993f76 4105 .remove = qla2x00_remove_one,
e30d1756 4106 .shutdown = qla2x00_shutdown,
14e660e6 4107 .err_handler = &qla2xxx_err_handler,
fca29703
AV		 4108};
4109
6a03b4cd
HZ		 4110static struct file_operations apidev_fops = {
4111 .owner = THIS_MODULE,
6038f373 4112 .llseek = noop_llseek,
6a03b4cd
HZ		 4113};
4114
1da177e4
LT		 4115/**
4116 * qla2x00_module_init - Module initialization.
4117 **/
4118static int __init
4119qla2x00_module_init(void)
4120{
fca29703
AV		 4121 int ret = 0;
4122
1da177e4 4123 /* Allocate cache for SRBs. */
354d6b21 4124 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
20c2df83 4125 SLAB_HWCACHE_ALIGN, NULL);
1da177e4
LT		 4126 if (srb_cachep == NULL) {
4127 printk(KERN_ERR
4128 "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
4129 return -ENOMEM;
4130 }
4131
4132 /* Derive version string. */
4133 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
11010fec 4134 if (ql2xextended_error_logging)
0181944f
AV		 4135 strcat(qla2x00_version_str, "-debug");
4136
1c97a12a
AV		 4137 qla2xxx_transport_template =
4138 fc_attach_transport(&qla2xxx_transport_functions);
2c3dfe3f
SJ		 4139 if (!qla2xxx_transport_template) {
4140 kmem_cache_destroy(srb_cachep);
1da177e4 4141 return -ENODEV;
2c3dfe3f 4142 }
6a03b4cd
HZ		 4143
4144 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4145 if (apidev_major < 0) {
4146 printk(KERN_WARNING "qla2xxx: Unable to register char device "
4147 "%s\n", QLA2XXX_APIDEV);
4148 }
4149
2c3dfe3f
SJ		 4150 qla2xxx_transport_vport_template =
4151 fc_attach_transport(&qla2xxx_transport_vport_functions);
4152 if (!qla2xxx_transport_vport_template) {
4153 kmem_cache_destroy(srb_cachep);
4154 fc_release_transport(qla2xxx_transport_template);
1da177e4 4155 return -ENODEV;
2c3dfe3f 4156 }
1da177e4 4157
fd9a29f0
AV		 4158 printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
4159 qla2x00_version_str);
7ee61397 4160 ret = pci_register_driver(&qla2xxx_pci_driver);
fca29703
AV		 4161 if (ret) {
4162 kmem_cache_destroy(srb_cachep);
4163 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4164 fc_release_transport(qla2xxx_transport_vport_template);
fca29703
AV		 4165 }
4166 return ret;
1da177e4
LT		 4167}
4168
4169/**
4170 * qla2x00_module_exit - Module cleanup.
4171 **/
4172static void __exit
4173qla2x00_module_exit(void)
4174{
6a03b4cd 4175 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7ee61397 4176 pci_unregister_driver(&qla2xxx_pci_driver);
5433383e 4177 qla2x00_release_firmware();
354d6b21 4178 kmem_cache_destroy(srb_cachep);
a9083016
GM		 4179 if (ctx_cachep)
4180 kmem_cache_destroy(ctx_cachep);
1da177e4 4181 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4182 fc_release_transport(qla2xxx_transport_vport_template);
1da177e4
LT		 4183}
4184
4185module_init(qla2x00_module_init);
4186module_exit(qla2x00_module_exit);
4187
4188MODULE_AUTHOR("QLogic Corporation");
4189MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4190MODULE_LICENSE("GPL");
4191MODULE_VERSION(QLA2XXX_VERSION);
bb8ee499
AV		 4192MODULE_FIRMWARE(FW_FILE_ISP21XX);
4193MODULE_FIRMWARE(FW_FILE_ISP22XX);
4194MODULE_FIRMWARE(FW_FILE_ISP2300);
4195MODULE_FIRMWARE(FW_FILE_ISP2322);
4196MODULE_FIRMWARE(FW_FILE_ISP24XX);
61623fc3 4197MODULE_FIRMWARE(FW_FILE_ISP25XX);
kernel source for telekom puls (alcatel/mediatek)