[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / rtc / rtc-sa1100.c

/*
 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
 *
 * Copyright (c) 2000 Nils Faerber
 *
 * Based on rtc.c by Paul Gortmaker
 *
 * Original Driver by Nils Faerber <nils@kernelconcepts.de>
 *
 * Modifications from:
 *   CIH <cih@coventive.com>
 *   Nicolas Pitre <nico@fluxnic.net>
 *   Andrew Christian <andrew.christian@hp.com>
 *
 * Converted to the RTC subsystem and Driver Model
 *   by Richard Purdie <rpurdie@rpsys.net>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/rtc.h>
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/interrupt.h>
#include <linux/string.h>
#include <linux/pm.h>
#include <linux/bitops.h>

#include <mach/hardware.h>
#include <asm/irq.h>

#ifdef CONFIG_ARCH_PXA
#include <mach/regs-rtc.h>
#include <mach/regs-ost.h>
#endif

#define RTC_DEF_DIVIDER		32768 - 1
#define RTC_DEF_TRIM		0

static unsigned long rtc_freq = 1024;
static unsigned long timer_freq;
static struct rtc_time rtc_alarm;
static DEFINE_SPINLOCK(sa1100_rtc_lock);

static inline int rtc_periodic_alarm(struct rtc_time *tm)
{
	return  (tm->tm_year == -1) ||
		((unsigned)tm->tm_mon >= 12) ||
		((unsigned)(tm->tm_mday - 1) >= 31) ||
		((unsigned)tm->tm_hour > 23) ||
		((unsigned)tm->tm_min > 59) ||
		((unsigned)tm->tm_sec > 59);
}

/*
 * Calculate the next alarm time given the requested alarm time mask
 * and the current time.
 */
static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, struct rtc_time *alrm)
{
	unsigned long next_time;
	unsigned long now_time;

	next->tm_year = now->tm_year;
	next->tm_mon = now->tm_mon;
	next->tm_mday = now->tm_mday;
	next->tm_hour = alrm->tm_hour;
	next->tm_min = alrm->tm_min;
	next->tm_sec = alrm->tm_sec;

	rtc_tm_to_time(now, &now_time);
	rtc_tm_to_time(next, &next_time);

	if (next_time < now_time) {
		/* Advance one day */
		next_time += 60 * 60 * 24;
		rtc_time_to_tm(next_time, next);
	}
}

static int rtc_update_alarm(struct rtc_time *alrm)
{
	struct rtc_time alarm_tm, now_tm;
	unsigned long now, time;
	int ret;

	do {
		now = RCNR;
		rtc_time_to_tm(now, &now_tm);
		rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
		ret = rtc_tm_to_time(&alarm_tm, &time);
		if (ret != 0)
			break;

		RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
		RTAR = time;
	} while (now != RCNR);

	return ret;
}

static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
{
	struct platform_device *pdev = to_platform_device(dev_id);
	struct rtc_device *rtc = platform_get_drvdata(pdev);
	unsigned int rtsr;
	unsigned long events = 0;

	spin_lock(&sa1100_rtc_lock);

	rtsr = RTSR;
	/* clear interrupt sources */
	RTSR = 0;
	RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);

	/* clear alarm interrupt if it has occurred */
	if (rtsr & RTSR_AL)
		rtsr &= ~RTSR_ALE;
	RTSR = rtsr & (RTSR_ALE | RTSR_HZE);

	/* update irq data & counter */
	if (rtsr & RTSR_AL)
		events |= RTC_AF | RTC_IRQF;
	if (rtsr & RTSR_HZ)
		events |= RTC_UF | RTC_IRQF;

	rtc_update_irq(rtc, 1, events);

	if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
		rtc_update_alarm(&rtc_alarm);

	spin_unlock(&sa1100_rtc_lock);

	return IRQ_HANDLED;
}

static int rtc_timer1_count;

static irqreturn_t timer1_interrupt(int irq, void *dev_id)
{
	struct platform_device *pdev = to_platform_device(dev_id);
	struct rtc_device *rtc = platform_get_drvdata(pdev);

	/*
	 * If we match for the first time, rtc_timer1_count will be 1.
	 * Otherwise, we wrapped around (very unlikely but
	 * still possible) so compute the amount of missed periods.
	 * The match reg is updated only when the data is actually retrieved
	 * to avoid unnecessary interrupts.
	 */
	OSSR = OSSR_M1;	/* clear match on timer1 */

	rtc_update_irq(rtc, rtc_timer1_count, RTC_PF | RTC_IRQF);

	if (rtc_timer1_count == 1)
		rtc_timer1_count = (rtc_freq * ((1 << 30) / (timer_freq >> 2)));

	return IRQ_HANDLED;
}

static int sa1100_rtc_read_callback(struct device *dev, int data)
{
	if (data & RTC_PF) {
		/* interpolate missed periods and set match for the next */
		unsigned long period = timer_freq / rtc_freq;
		unsigned long oscr = OSCR;
		unsigned long osmr1 = OSMR1;
		unsigned long missed = (oscr - osmr1)/period;
		data += missed << 8;
		OSSR = OSSR_M1;	/* clear match on timer 1 */
		OSMR1 = osmr1 + (missed + 1)*period;
		/* Ensure we didn't miss another match in the mean time.
		 * Here we compare (match - OSCR) 8 instead of 0 --
		 * see comment in pxa_timer_interrupt() for explanation.
		 */
		while( (signed long)((osmr1 = OSMR1) - OSCR) <= 8 ) {
			data += 0x100;
			OSSR = OSSR_M1;	/* clear match on timer 1 */
			OSMR1 = osmr1 + period;
		}
	}
	return data;
}

static int sa1100_rtc_open(struct device *dev)
{
	int ret;

	ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
				"rtc 1Hz", dev);
	if (ret) {
		dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
		goto fail_ui;
	}
	ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
				"rtc Alrm", dev);
	if (ret) {
		dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
		goto fail_ai;
	}
	ret = request_irq(IRQ_OST1, timer1_interrupt, IRQF_DISABLED,
				"rtc timer", dev);
	if (ret) {
		dev_err(dev, "IRQ %d already in use.\n", IRQ_OST1);
		goto fail_pi;
	}
	return 0;

 fail_pi:
	free_irq(IRQ_RTCAlrm, dev);
 fail_ai:
	free_irq(IRQ_RTC1Hz, dev);
 fail_ui:
	return ret;
}

static void sa1100_rtc_release(struct device *dev)
{
	spin_lock_irq(&sa1100_rtc_lock);
	RTSR = 0;
	OIER &= ~OIER_E1;
	OSSR = OSSR_M1;
	spin_unlock_irq(&sa1100_rtc_lock);

	free_irq(IRQ_OST1, dev);
	free_irq(IRQ_RTCAlrm, dev);
	free_irq(IRQ_RTC1Hz, dev);
}


static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd,
		unsigned long arg)
{
	switch(cmd) {
	case RTC_AIE_OFF:
		spin_lock_irq(&sa1100_rtc_lock);
		RTSR &= ~RTSR_ALE;
		spin_unlock_irq(&sa1100_rtc_lock);
		return 0;
	case RTC_AIE_ON:
		spin_lock_irq(&sa1100_rtc_lock);
		RTSR |= RTSR_ALE;
		spin_unlock_irq(&sa1100_rtc_lock);
		return 0;
	case RTC_UIE_OFF:
		spin_lock_irq(&sa1100_rtc_lock);
		RTSR &= ~RTSR_HZE;
		spin_unlock_irq(&sa1100_rtc_lock);
		return 0;
	case RTC_UIE_ON:
		spin_lock_irq(&sa1100_rtc_lock);
		RTSR |= RTSR_HZE;
		spin_unlock_irq(&sa1100_rtc_lock);
		return 0;
	case RTC_PIE_OFF:
		spin_lock_irq(&sa1100_rtc_lock);
		OIER &= ~OIER_E1;
		spin_unlock_irq(&sa1100_rtc_lock);
		return 0;
	case RTC_PIE_ON:
		spin_lock_irq(&sa1100_rtc_lock);
		OSMR1 = timer_freq / rtc_freq + OSCR;
		OIER |= OIER_E1;
		rtc_timer1_count = 1;
		spin_unlock_irq(&sa1100_rtc_lock);
		return 0;
	case RTC_IRQP_READ:
		return put_user(rtc_freq, (unsigned long *)arg);
	case RTC_IRQP_SET:
		if (arg < 1 || arg > timer_freq)
			return -EINVAL;
		rtc_freq = arg;
		return 0;
	}
	return -ENOIOCTLCMD;
}

static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	rtc_time_to_tm(RCNR, tm);
	return 0;
}

static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	unsigned long time;
	int ret;

	ret = rtc_tm_to_time(tm, &time);
	if (ret == 0)
		RCNR = time;
	return ret;
}

static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	u32	rtsr;

	memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
	rtsr = RTSR;
	alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
	alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
	return 0;
}

static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	int ret;

	spin_lock_irq(&sa1100_rtc_lock);
	ret = rtc_update_alarm(&alrm->time);
	if (ret == 0) {
		if (alrm->enabled)
			RTSR |= RTSR_ALE;
		else
			RTSR &= ~RTSR_ALE;
	}
	spin_unlock_irq(&sa1100_rtc_lock);

	return ret;
}

static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
{
	seq_printf(seq, "trim/divider\t: 0x%08x\n", (u32) RTTR);
	seq_printf(seq, "update_IRQ\t: %s\n",
			(RTSR & RTSR_HZE) ? "yes" : "no");
	seq_printf(seq, "periodic_IRQ\t: %s\n",
			(OIER & OIER_E1) ? "yes" : "no");
	seq_printf(seq, "periodic_freq\t: %ld\n", rtc_freq);

	return 0;
}

static const struct rtc_class_ops sa1100_rtc_ops = {
	.open = sa1100_rtc_open,
	.read_callback = sa1100_rtc_read_callback,
	.release = sa1100_rtc_release,
	.ioctl = sa1100_rtc_ioctl,
	.read_time = sa1100_rtc_read_time,
	.set_time = sa1100_rtc_set_time,
	.read_alarm = sa1100_rtc_read_alarm,
	.set_alarm = sa1100_rtc_set_alarm,
	.proc = sa1100_rtc_proc,
};

static int sa1100_rtc_probe(struct platform_device *pdev)
{
	struct rtc_device *rtc;

	timer_freq = get_clock_tick_rate();

	/*
	 * According to the manual we should be able to let RTTR be zero
	 * and then a default diviser for a 32.768KHz clock is used.
	 * Apparently this doesn't work, at least for my SA1110 rev 5.
	 * If the clock divider is uninitialized then reset it to the
	 * default value to get the 1Hz clock.
	 */
	if (RTTR == 0) {
		RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
		dev_warn(&pdev->dev, "warning: initializing default clock divider/trim value\n");
		/* The current RTC value probably doesn't make sense either */
		RCNR = 0;
	}

	device_init_wakeup(&pdev->dev, 1);

	rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
				THIS_MODULE);

	if (IS_ERR(rtc))
		return PTR_ERR(rtc);

	platform_set_drvdata(pdev, rtc);

	return 0;
}

static int sa1100_rtc_remove(struct platform_device *pdev)
{
	struct rtc_device *rtc = platform_get_drvdata(pdev);

 	if (rtc)
		rtc_device_unregister(rtc);

	return 0;
}

#ifdef CONFIG_PM
static int sa1100_rtc_suspend(struct platform_device *pdev, pm_message_t state)
{
	if (device_may_wakeup(&pdev->dev))
		enable_irq_wake(IRQ_RTCAlrm);
	return 0;
}

static int sa1100_rtc_resume(struct platform_device *pdev)
{
	if (device_may_wakeup(&pdev->dev))
		disable_irq_wake(IRQ_RTCAlrm);
	return 0;
}
#else
#define sa1100_rtc_suspend	NULL
#define sa1100_rtc_resume	NULL
#endif

static struct platform_driver sa1100_rtc_driver = {
	.probe		= sa1100_rtc_probe,
	.remove		= sa1100_rtc_remove,
	.suspend	= sa1100_rtc_suspend,
	.resume		= sa1100_rtc_resume,
	.driver		= {
		.name		= "sa1100-rtc",
	},
};

static int __init sa1100_rtc_init(void)
{
	return platform_driver_register(&sa1100_rtc_driver);
}

static void __exit sa1100_rtc_exit(void)
{
	platform_driver_unregister(&sa1100_rtc_driver);
}

module_init(sa1100_rtc_init);
module_exit(sa1100_rtc_exit);

MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:sa1100-rtc");
Commit	Line	Data
e842f1c8 RP	1	/*
	2	* Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
	3	*
	4	* Copyright (c) 2000 Nils Faerber
	5	*
	6	* Based on rtc.c by Paul Gortmaker
	7	*
	8	* Original Driver by Nils Faerber <nils@kernelconcepts.de>
	9	*
	10	* Modifications from:
	11	* CIH <cih@coventive.com>
2f82af08	12	* Nicolas Pitre <nico@fluxnic.net>
e842f1c8 RP	13	* Andrew Christian <andrew.christian@hp.com>
	14	*
	15	* Converted to the RTC subsystem and Driver Model
	16	* by Richard Purdie <rpurdie@rpsys.net>
	17	*
	18	* This program is free software; you can redistribute it and/or
	19	* modify it under the terms of the GNU General Public License
	20	* as published by the Free Software Foundation; either version
	21	* 2 of the License, or (at your option) any later version.
	22	*/
	23
	24	#include <linux/platform_device.h>
	25	#include <linux/module.h>
	26	#include <linux/rtc.h>
	27	#include <linux/init.h>
	28	#include <linux/fs.h>
	29	#include <linux/interrupt.h>
	30	#include <linux/string.h>
	31	#include <linux/pm.h>
1977f032	32	#include <linux/bitops.h>
e842f1c8	33
a09e64fb	34	#include <mach/hardware.h>
e842f1c8	35	#include <asm/irq.h>
e842f1c8 RP	36
e842f1c8 RP	37	#ifdef CONFIG_ARCH_PXA
5bf3df3f EM	38	#include <mach/regs-rtc.h>
5bf3df3f EM	39	#include <mach/regs-ost.h>
e842f1c8 RP	40	#endif
e842f1c8 RP	41
e842f1c8 RP	42	#define RTC_DEF_DIVIDER 32768 - 1
	43	#define RTC_DEF_TRIM 0
	44
	45	static unsigned long rtc_freq = 1024;
6769717d	46	static unsigned long timer_freq;
e842f1c8	47	static struct rtc_time rtc_alarm;
34af946a	48	static DEFINE_SPINLOCK(sa1100_rtc_lock);
e842f1c8	49
797276ec RK	50	static inline int rtc_periodic_alarm(struct rtc_time *tm)
	51	{
	52	return (tm->tm_year == -1) \|\|
	53	((unsigned)tm->tm_mon >= 12) \|\|
	54	((unsigned)(tm->tm_mday - 1) >= 31) \|\|
	55	((unsigned)tm->tm_hour > 23) \|\|
	56	((unsigned)tm->tm_min > 59) \|\|
	57	((unsigned)tm->tm_sec > 59);
	58	}
	59
	60	/*
	61	* Calculate the next alarm time given the requested alarm time mask
	62	* and the current time.
	63	*/
	64	static void rtc_next_alarm_time(struct rtc_time next, struct rtc_time now, struct rtc_time *alrm)
	65	{
	66	unsigned long next_time;
	67	unsigned long now_time;
	68
	69	next->tm_year = now->tm_year;
	70	next->tm_mon = now->tm_mon;
	71	next->tm_mday = now->tm_mday;
	72	next->tm_hour = alrm->tm_hour;
	73	next->tm_min = alrm->tm_min;
	74	next->tm_sec = alrm->tm_sec;
	75
	76	rtc_tm_to_time(now, &now_time);
	77	rtc_tm_to_time(next, &next_time);
	78
	79	if (next_time < now_time) {
	80	/* Advance one day */
	81	next_time += 60 * 60 * 24;
	82	rtc_time_to_tm(next_time, next);
	83	}
	84	}
	85
e842f1c8 RP	86	static int rtc_update_alarm(struct rtc_time *alrm)
	87	{
	88	struct rtc_time alarm_tm, now_tm;
	89	unsigned long now, time;
	90	int ret;
	91
	92	do {
	93	now = RCNR;
	94	rtc_time_to_tm(now, &now_tm);
	95	rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
	96	ret = rtc_tm_to_time(&alarm_tm, &time);
	97	if (ret != 0)
	98	break;
	99
	100	RTSR = RTSR & (RTSR_HZE\|RTSR_ALE\|RTSR_AL);
	101	RTAR = time;
	102	} while (now != RCNR);
	103
	104	return ret;
	105	}
	106
7d12e780	107	static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
e842f1c8 RP	108	{
	109	struct platform_device *pdev = to_platform_device(dev_id);
	110	struct rtc_device *rtc = platform_get_drvdata(pdev);
	111	unsigned int rtsr;
	112	unsigned long events = 0;
	113
	114	spin_lock(&sa1100_rtc_lock);
	115
	116	rtsr = RTSR;
	117	/* clear interrupt sources */
	118	RTSR = 0;
	119	RTSR = (RTSR_AL \| RTSR_HZ) & (rtsr >> 2);
	120
	121	/* clear alarm interrupt if it has occurred */
	122	if (rtsr & RTSR_AL)
	123	rtsr &= ~RTSR_ALE;
	124	RTSR = rtsr & (RTSR_ALE \| RTSR_HZE);
	125
	126	/* update irq data & counter */
	127	if (rtsr & RTSR_AL)
	128	events \|= RTC_AF \| RTC_IRQF;
	129	if (rtsr & RTSR_HZ)
	130	events \|= RTC_UF \| RTC_IRQF;
	131
ab6a2d70	132	rtc_update_irq(rtc, 1, events);
e842f1c8 RP	133
	134	if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
	135	rtc_update_alarm(&rtc_alarm);
	136
	137	spin_unlock(&sa1100_rtc_lock);
	138
	139	return IRQ_HANDLED;
	140	}
	141
	142	static int rtc_timer1_count;
	143
7d12e780	144	static irqreturn_t timer1_interrupt(int irq, void *dev_id)
e842f1c8 RP	145	{
	146	struct platform_device *pdev = to_platform_device(dev_id);
	147	struct rtc_device *rtc = platform_get_drvdata(pdev);
	148
	149	/*
	150	* If we match for the first time, rtc_timer1_count will be 1.
	151	* Otherwise, we wrapped around (very unlikely but
	152	* still possible) so compute the amount of missed periods.
	153	* The match reg is updated only when the data is actually retrieved
	154	* to avoid unnecessary interrupts.
	155	*/
	156	OSSR = OSSR_M1; /* clear match on timer1 */
	157
ab6a2d70	158	rtc_update_irq(rtc, rtc_timer1_count, RTC_PF \| RTC_IRQF);
e842f1c8 RP	159
e842f1c8 RP	160	if (rtc_timer1_count == 1)
6769717d	161	rtc_timer1_count = (rtc_freq * ((1 << 30) / (timer_freq >> 2)));
e842f1c8 RP	162
	163	return IRQ_HANDLED;
	164	}
	165
	166	static int sa1100_rtc_read_callback(struct device *dev, int data)
	167	{
	168	if (data & RTC_PF) {
	169	/* interpolate missed periods and set match for the next */
6769717d	170	unsigned long period = timer_freq / rtc_freq;
e842f1c8 RP	171	unsigned long oscr = OSCR;
	172	unsigned long osmr1 = OSMR1;
	173	unsigned long missed = (oscr - osmr1)/period;
	174	data += missed << 8;
	175	OSSR = OSSR_M1; /* clear match on timer 1 */
	176	OSMR1 = osmr1 + (missed + 1)*period;
	177	/* Ensure we didn't miss another match in the mean time.
	178	* Here we compare (match - OSCR) 8 instead of 0 --
	179	* see comment in pxa_timer_interrupt() for explanation.
	180	*/
	181	while( (signed long)((osmr1 = OSMR1) - OSCR) <= 8 ) {
	182	data += 0x100;
	183	OSSR = OSSR_M1; /* clear match on timer 1 */
	184	OSMR1 = osmr1 + period;
	185	}
	186	}
	187	return data;
	188	}
	189
	190	static int sa1100_rtc_open(struct device *dev)
	191	{
	192	int ret;
	193
dace1453	194	ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
e842f1c8 RP	195	"rtc 1Hz", dev);
e842f1c8 RP	196	if (ret) {
2260a25c	197	dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
e842f1c8 RP	198	goto fail_ui;
e842f1c8 RP	199	}
dace1453	200	ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
e842f1c8 RP	201	"rtc Alrm", dev);
e842f1c8 RP	202	if (ret) {
2260a25c	203	dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
e842f1c8 RP	204	goto fail_ai;
e842f1c8 RP	205	}
dace1453	206	ret = request_irq(IRQ_OST1, timer1_interrupt, IRQF_DISABLED,
e842f1c8 RP	207	"rtc timer", dev);
e842f1c8 RP	208	if (ret) {
2260a25c	209	dev_err(dev, "IRQ %d already in use.\n", IRQ_OST1);
e842f1c8 RP	210	goto fail_pi;
	211	}
	212	return 0;
	213
	214	fail_pi:
f1226701	215	free_irq(IRQ_RTCAlrm, dev);
e842f1c8	216	fail_ai:
f1226701	217	free_irq(IRQ_RTC1Hz, dev);
e842f1c8 RP	218	fail_ui:
	219	return ret;
	220	}
	221
	222	static void sa1100_rtc_release(struct device *dev)
	223	{
	224	spin_lock_irq(&sa1100_rtc_lock);
	225	RTSR = 0;
	226	OIER &= ~OIER_E1;
	227	OSSR = OSSR_M1;
	228	spin_unlock_irq(&sa1100_rtc_lock);
	229
	230	free_irq(IRQ_OST1, dev);
	231	free_irq(IRQ_RTCAlrm, dev);
	232	free_irq(IRQ_RTC1Hz, dev);
	233	}
	234
	235
	236	static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd,
	237	unsigned long arg)
	238	{
	239	switch(cmd) {
	240	case RTC_AIE_OFF:
	241	spin_lock_irq(&sa1100_rtc_lock);
	242	RTSR &= ~RTSR_ALE;
	243	spin_unlock_irq(&sa1100_rtc_lock);
	244	return 0;
	245	case RTC_AIE_ON:
	246	spin_lock_irq(&sa1100_rtc_lock);
	247	RTSR \|= RTSR_ALE;
	248	spin_unlock_irq(&sa1100_rtc_lock);
	249	return 0;
	250	case RTC_UIE_OFF:
	251	spin_lock_irq(&sa1100_rtc_lock);
	252	RTSR &= ~RTSR_HZE;
	253	spin_unlock_irq(&sa1100_rtc_lock);
	254	return 0;
	255	case RTC_UIE_ON:
	256	spin_lock_irq(&sa1100_rtc_lock);
	257	RTSR \|= RTSR_HZE;
	258	spin_unlock_irq(&sa1100_rtc_lock);
	259	return 0;
	260	case RTC_PIE_OFF:
	261	spin_lock_irq(&sa1100_rtc_lock);
	262	OIER &= ~OIER_E1;
	263	spin_unlock_irq(&sa1100_rtc_lock);
	264	return 0;
	265	case RTC_PIE_ON:
e842f1c8	266	spin_lock_irq(&sa1100_rtc_lock);
6769717d	267	OSMR1 = timer_freq / rtc_freq + OSCR;
e842f1c8 RP	268	OIER \|= OIER_E1;
	269	rtc_timer1_count = 1;
	270	spin_unlock_irq(&sa1100_rtc_lock);
	271	return 0;
	272	case RTC_IRQP_READ:
	273	return put_user(rtc_freq, (unsigned long *)arg);
	274	case RTC_IRQP_SET:
6769717d	275	if (arg < 1 \|\| arg > timer_freq)
e842f1c8	276	return -EINVAL;
e842f1c8 RP	277	rtc_freq = arg;
	278	return 0;
	279	}
b3969e58	280	return -ENOIOCTLCMD;
e842f1c8 RP	281	}
	282
	283	static int sa1100_rtc_read_time(struct device dev, struct rtc_time tm)
	284	{
	285	rtc_time_to_tm(RCNR, tm);
	286	return 0;
	287	}
	288
	289	static int sa1100_rtc_set_time(struct device dev, struct rtc_time tm)
	290	{
	291	unsigned long time;
	292	int ret;
	293
	294	ret = rtc_tm_to_time(tm, &time);
	295	if (ret == 0)
	296	RCNR = time;
	297	return ret;
	298	}
	299
	300	static int sa1100_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
	301	{
32b49da4 DB	302	u32 rtsr;
32b49da4 DB	303
e842f1c8	304	memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
32b49da4 DB	305	rtsr = RTSR;
	306	alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
	307	alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
e842f1c8 RP	308	return 0;
	309	}
	310
	311	static int sa1100_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)
	312	{
	313	int ret;
	314
	315	spin_lock_irq(&sa1100_rtc_lock);
	316	ret = rtc_update_alarm(&alrm->time);
	317	if (ret == 0) {
e842f1c8	318	if (alrm->enabled)
32b49da4	319	RTSR \|= RTSR_ALE;
e842f1c8	320	else
32b49da4	321	RTSR &= ~RTSR_ALE;
e842f1c8 RP	322	}
	323	spin_unlock_irq(&sa1100_rtc_lock);
	324
	325	return ret;
	326	}
	327
	328	static int sa1100_rtc_proc(struct device dev, struct seq_file seq)
	329	{
a2db8dfc	330	seq_printf(seq, "trim/divider\t: 0x%08x\n", (u32) RTTR);
e842f1c8 RP	331	seq_printf(seq, "update_IRQ\t: %s\n",
	332	(RTSR & RTSR_HZE) ? "yes" : "no");
	333	seq_printf(seq, "periodic_IRQ\t: %s\n",
	334	(OIER & OIER_E1) ? "yes" : "no");
	335	seq_printf(seq, "periodic_freq\t: %ld\n", rtc_freq);
	336
	337	return 0;
	338	}
	339
ff8371ac	340	static const struct rtc_class_ops sa1100_rtc_ops = {
e842f1c8 RP	341	.open = sa1100_rtc_open,
	342	.read_callback = sa1100_rtc_read_callback,
	343	.release = sa1100_rtc_release,
	344	.ioctl = sa1100_rtc_ioctl,
	345	.read_time = sa1100_rtc_read_time,
	346	.set_time = sa1100_rtc_set_time,
	347	.read_alarm = sa1100_rtc_read_alarm,
	348	.set_alarm = sa1100_rtc_set_alarm,
	349	.proc = sa1100_rtc_proc,
	350	};
	351
	352	static int sa1100_rtc_probe(struct platform_device *pdev)
	353	{
	354	struct rtc_device *rtc;
	355
6769717d EM	356	timer_freq = get_clock_tick_rate();
6769717d EM	357
e842f1c8 RP	358	/*
	359	* According to the manual we should be able to let RTTR be zero
	360	* and then a default diviser for a 32.768KHz clock is used.
	361	* Apparently this doesn't work, at least for my SA1110 rev 5.
	362	* If the clock divider is uninitialized then reset it to the
	363	* default value to get the 1Hz clock.
	364	*/
	365	if (RTTR == 0) {
	366	RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
2260a25c	367	dev_warn(&pdev->dev, "warning: initializing default clock divider/trim value\n");
e842f1c8 RP	368	/* The current RTC value probably doesn't make sense either */
	369	RCNR = 0;
	370	}
	371
e5a2c9cc UL	372	device_init_wakeup(&pdev->dev, 1);
e5a2c9cc UL	373
e842f1c8 RP	374	rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
	375	THIS_MODULE);
	376
2260a25c	377	if (IS_ERR(rtc))
e842f1c8	378	return PTR_ERR(rtc);
e842f1c8 RP	379
	380	platform_set_drvdata(pdev, rtc);
	381
e842f1c8 RP	382	return 0;
	383	}
	384
	385	static int sa1100_rtc_remove(struct platform_device *pdev)
	386	{
	387	struct rtc_device *rtc = platform_get_drvdata(pdev);
	388
	389	if (rtc)
	390	rtc_device_unregister(rtc);
	391
	392	return 0;
	393	}
	394
6bc54e69 RK	395	#ifdef CONFIG_PM
	396	static int sa1100_rtc_suspend(struct platform_device *pdev, pm_message_t state)
	397	{
f618258a DB	398	if (device_may_wakeup(&pdev->dev))
f618258a DB	399	enable_irq_wake(IRQ_RTCAlrm);
6bc54e69 RK	400	return 0;
	401	}
	402
	403	static int sa1100_rtc_resume(struct platform_device *pdev)
	404	{
f618258a DB	405	if (device_may_wakeup(&pdev->dev))
f618258a DB	406	disable_irq_wake(IRQ_RTCAlrm);
6bc54e69 RK	407	return 0;
	408	}
	409	#else
	410	#define sa1100_rtc_suspend NULL
	411	#define sa1100_rtc_resume NULL
	412	#endif
	413
e842f1c8 RP	414	static struct platform_driver sa1100_rtc_driver = {
	415	.probe = sa1100_rtc_probe,
	416	.remove = sa1100_rtc_remove,
6bc54e69 RK	417	.suspend = sa1100_rtc_suspend,
6bc54e69 RK	418	.resume = sa1100_rtc_resume,
e842f1c8 RP	419	.driver = {
	420	.name = "sa1100-rtc",
	421	},
	422	};
	423
	424	static int __init sa1100_rtc_init(void)
	425	{
	426	return platform_driver_register(&sa1100_rtc_driver);
	427	}
	428
	429	static void __exit sa1100_rtc_exit(void)
	430	{
	431	platform_driver_unregister(&sa1100_rtc_driver);
	432	}
	433
	434	module_init(sa1100_rtc_init);
	435	module_exit(sa1100_rtc_exit);
	436
	437	MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
	438	MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
	439	MODULE_LICENSE("GPL");
ad28a07b	440	MODULE_ALIAS("platform:sa1100-rtc");