projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
tpm: Fix cancellation of TPM commands (interrupt mode)
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / char / tpm / tpm_tis.c
CommitLineData
27084efe
LD		 1/*
2 * Copyright (C) 2005, 2006 IBM Corporation
3 *
4 * Authors:
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Kylene Hall <kjhall@us.ibm.com>
7 *
8e81cc13
KY		 8 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
9 *
27084efe
LD		 10 * Device driver for TCG/TCPA TPM (trusted platform module).
11 * Specifications at www.trustedcomputinggroup.org
12 *
13 * This device driver implements the TPM interface as defined in
14 * the TCG TPM Interface Spec version 1.2, revision 1.0.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation, version 2 of the
19 * License.
20 */
57135568
KJH		 21#include <linux/init.h>
22#include <linux/module.h>
23#include <linux/moduleparam.h>
27084efe 24#include <linux/pnp.h>
5a0e3ad6 25#include <linux/slab.h>
27084efe
LD		 26#include <linux/interrupt.h>
27#include <linux/wait.h>
3f0d3d01 28#include <linux/acpi.h>
20b87bbf 29#include <linux/freezer.h>
27084efe
LD		 30#include "tpm.h"
31
27084efe
LD		 32enum tis_access {
33 TPM_ACCESS_VALID = 0x80,
34 TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
35 TPM_ACCESS_REQUEST_PENDING = 0x04,
36 TPM_ACCESS_REQUEST_USE = 0x02,
37};
38
39enum tis_status {
40 TPM_STS_VALID = 0x80,
41 TPM_STS_COMMAND_READY = 0x40,
42 TPM_STS_GO = 0x20,
43 TPM_STS_DATA_AVAIL = 0x10,
44 TPM_STS_DATA_EXPECT = 0x08,
45};
46
47enum tis_int_flags {
48 TPM_GLOBAL_INT_ENABLE = 0x80000000,
49 TPM_INTF_BURST_COUNT_STATIC = 0x100,
50 TPM_INTF_CMD_READY_INT = 0x080,
51 TPM_INTF_INT_EDGE_FALLING = 0x040,
52 TPM_INTF_INT_EDGE_RISING = 0x020,
53 TPM_INTF_INT_LEVEL_LOW = 0x010,
54 TPM_INTF_INT_LEVEL_HIGH = 0x008,
55 TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
56 TPM_INTF_STS_VALID_INT = 0x002,
57 TPM_INTF_DATA_AVAIL_INT = 0x001,
58};
59
36b20020 60enum tis_defaults {
2a7362f5 61 TIS_MEM_BASE = 0xFED40000,
b09d5300 62 TIS_MEM_LEN = 0x5000,
cb535425
KJH		 63 TIS_SHORT_TIMEOUT = 750, /* ms */
64 TIS_LONG_TIMEOUT = 2000, /* 2 sec */
36b20020
KJH		 65};
66
27084efe
LD		 67#define TPM_ACCESS(l) (0x0000 | ((l) << 12))
68#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
69#define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
70#define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
71#define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
72#define TPM_STS(l) (0x0018 | ((l) << 12))
73#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
74
75#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
76#define TPM_RID(l) (0x0F04 | ((l) << 12))
77
78static LIST_HEAD(tis_chips);
4e70daaf 79static DEFINE_MUTEX(tis_lock);
27084efe 80
1560ffe6 81#if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
3f0d3d01
MG		 82static int is_itpm(struct pnp_dev *dev)
83{
84 struct acpi_device *acpi = pnp_acpi_device(dev);
85 struct acpi_hardware_id *id;
86
87 list_for_each_entry(id, &acpi->pnp.ids, list) {
88 if (!strcmp("INTC0102", id->id))
89 return 1;
90 }
91
92 return 0;
93}
1560ffe6
RD		 94#else
95static inline int is_itpm(struct pnp_dev *dev)
96{
97 return 0;
98}
3f0d3d01
MG		 99#endif
100
27084efe
LD		 101static int check_locality(struct tpm_chip *chip, int l)
102{
103 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
104 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
105 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
106 return chip->vendor.locality = l;
107
108 return -1;
109}
110
111static void release_locality(struct tpm_chip *chip, int l, int force)
112{
113 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
114 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
115 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
116 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
117 chip->vendor.iobase + TPM_ACCESS(l));
118}
119
120static int request_locality(struct tpm_chip *chip, int l)
121{
20b87bbf 122 unsigned long stop, timeout;
27084efe
LD		 123 long rc;
124
125 if (check_locality(chip, l) >= 0)
126 return l;
127
128 iowrite8(TPM_ACCESS_REQUEST_USE,
129 chip->vendor.iobase + TPM_ACCESS(l));
130
20b87bbf
SB		 131 stop = jiffies + chip->vendor.timeout_a;
132
27084efe 133 if (chip->vendor.irq) {
20b87bbf
SB		 134again:
135 timeout = stop - jiffies;
136 if ((long)timeout <= 0)
137 return -1;
36b20020 138 rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
27084efe
LD		 139 (check_locality
140 (chip, l) >= 0),
20b87bbf 141 timeout);
27084efe
LD		 142 if (rc > 0)
143 return l;
20b87bbf
SB		 144 if (rc == -ERESTARTSYS && freezing(current)) {
145 clear_thread_flag(TIF_SIGPENDING);
146 goto again;
147 }
27084efe
LD		 148 } else {
149 /* wait for burstcount */
27084efe
LD		 150 do {
151 if (check_locality(chip, l) >= 0)
152 return l;
153 msleep(TPM_TIMEOUT);
154 }
155 while (time_before(jiffies, stop));
156 }
157 return -1;
158}
159
160static u8 tpm_tis_status(struct tpm_chip *chip)
161{
162 return ioread8(chip->vendor.iobase +
163 TPM_STS(chip->vendor.locality));
164}
165
166static void tpm_tis_ready(struct tpm_chip *chip)
167{
168 /* this causes the current command to be aborted */
169 iowrite8(TPM_STS_COMMAND_READY,
170 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
171}
172
173static int get_burstcount(struct tpm_chip *chip)
174{
175 unsigned long stop;
176 int burstcnt;
177
178 /* wait for burstcount */
179 /* which timeout value, spec has 2 answers (c & d) */
36b20020 180 stop = jiffies + chip->vendor.timeout_d;
27084efe
LD		 181 do {
182 burstcnt = ioread8(chip->vendor.iobase +
183 TPM_STS(chip->vendor.locality) + 1);
184 burstcnt += ioread8(chip->vendor.iobase +
185 TPM_STS(chip->vendor.locality) +
186 2) << 8;
187 if (burstcnt)
188 return burstcnt;
189 msleep(TPM_TIMEOUT);
190 } while (time_before(jiffies, stop));
191 return -EBUSY;
192}
193
cb535425 194static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
27084efe
LD		 195{
196 int size = 0, burstcnt;
197 while (size < count &&
fd048866
RA		 198 wait_for_tpm_stat(chip,
199 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
200 chip->vendor.timeout_c,
78f09cc2 201 &chip->vendor.read_queue, true)
27084efe
LD		 202 == 0) {
203 burstcnt = get_burstcount(chip);
204 for (; burstcnt > 0 && size < count; burstcnt--)
205 buf[size++] = ioread8(chip->vendor.iobase +
206 TPM_DATA_FIFO(chip->vendor.
207 locality));
208 }
209 return size;
210}
211
cb535425 212static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
27084efe
LD		 213{
214 int size = 0;
215 int expected, status;
216
217 if (count < TPM_HEADER_SIZE) {
218 size = -EIO;
219 goto out;
220 }
221
222 /* read first 10 bytes, including tag, paramsize, and result */
223 if ((size =
224 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
225 dev_err(chip->dev, "Unable to read header\n");
226 goto out;
227 }
228
229 expected = be32_to_cpu(*(__be32 *) (buf + 2));
230 if (expected > count) {
231 size = -EIO;
232 goto out;
233 }
234
235 if ((size +=
236 recv_data(chip, &buf[TPM_HEADER_SIZE],
237 expected - TPM_HEADER_SIZE)) < expected) {
238 dev_err(chip->dev, "Unable to read remainder of result\n");
239 size = -ETIME;
240 goto out;
241 }
242
fd048866 243 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
78f09cc2 244 &chip->vendor.int_queue, false);
27084efe
LD		 245 status = tpm_tis_status(chip);
246 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
247 dev_err(chip->dev, "Error left over data\n");
248 size = -EIO;
249 goto out;
250 }
251
252out:
253 tpm_tis_ready(chip);
254 release_locality(chip, chip->vendor.locality, 0);
255 return size;
256}
257
90ab5ee9 258static bool itpm;
3507d612
RA		 259module_param(itpm, bool, 0444);
260MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
261
27084efe
LD		 262/*
263 * If interrupts are used (signaled by an irq set in the vendor structure)
264 * tpm.c can skip polling for the data to be available as the interrupt is
265 * waited for here
266 */
9519de3f 267static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
27084efe
LD		 268{
269 int rc, status, burstcnt;
270 size_t count = 0;
27084efe
LD		 271
272 if (request_locality(chip, 0) < 0)
273 return -EBUSY;
274
275 status = tpm_tis_status(chip);
276 if ((status & TPM_STS_COMMAND_READY) == 0) {
277 tpm_tis_ready(chip);
fd048866 278 if (wait_for_tpm_stat
27084efe 279 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
78f09cc2 280 &chip->vendor.int_queue, false) < 0) {
27084efe
LD		 281 rc = -ETIME;
282 goto out_err;
283 }
284 }
285
286 while (count < len - 1) {
287 burstcnt = get_burstcount(chip);
288 for (; burstcnt > 0 && count < len - 1; burstcnt--) {
289 iowrite8(buf[count], chip->vendor.iobase +
290 TPM_DATA_FIFO(chip->vendor.locality));
291 count++;
292 }
293
fd048866 294 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
78f09cc2 295 &chip->vendor.int_queue, false);
27084efe 296 status = tpm_tis_status(chip);
3507d612 297 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
27084efe
LD		 298 rc = -EIO;
299 goto out_err;
300 }
301 }
302
303 /* write last byte */
304 iowrite8(buf[count],
9519de3f 305 chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
fd048866 306 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
78f09cc2 307 &chip->vendor.int_queue, false);
27084efe
LD		 308 status = tpm_tis_status(chip);
309 if ((status & TPM_STS_DATA_EXPECT) != 0) {
310 rc = -EIO;
311 goto out_err;
312 }
313
9519de3f
SB		 314 return 0;
315
316out_err:
317 tpm_tis_ready(chip);
318 release_locality(chip, chip->vendor.locality, 0);
319 return rc;
320}
321
322/*
323 * If interrupts are used (signaled by an irq set in the vendor structure)
324 * tpm.c can skip polling for the data to be available as the interrupt is
325 * waited for here
326 */
327static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
328{
329 int rc;
330 u32 ordinal;
331
332 rc = tpm_tis_send_data(chip, buf, len);
333 if (rc < 0)
334 return rc;
335
27084efe
LD		 336 /* go and do it */
337 iowrite8(TPM_STS_GO,
338 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
339
340 if (chip->vendor.irq) {
341 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
fd048866 342 if (wait_for_tpm_stat
27084efe
LD		 343 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
344 tpm_calc_ordinal_duration(chip, ordinal),
78f09cc2 345 &chip->vendor.read_queue, false) < 0) {
27084efe
LD		 346 rc = -ETIME;
347 goto out_err;
348 }
349 }
350 return len;
351out_err:
352 tpm_tis_ready(chip);
353 release_locality(chip, chip->vendor.locality, 0);
354 return rc;
355}
356
9519de3f
SB		 357/*
358 * Early probing for iTPM with STS_DATA_EXPECT flaw.
359 * Try sending command without itpm flag set and if that
360 * fails, repeat with itpm flag set.
361 */
362static int probe_itpm(struct tpm_chip *chip)
363{
364 int rc = 0;
365 u8 cmd_getticks[] = {
366 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
367 0x00, 0x00, 0x00, 0xf1
368 };
369 size_t len = sizeof(cmd_getticks);
968de8e2 370 bool rem_itpm = itpm;
4e401fb0
SB		 371 u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0));
372
373 /* probe only iTPMS */
374 if (vendor != TPM_VID_INTEL)
375 return 0;
9519de3f 376
73249695 377 itpm = false;
9519de3f
SB		 378
379 rc = tpm_tis_send_data(chip, cmd_getticks, len);
380 if (rc == 0)
381 goto out;
382
383 tpm_tis_ready(chip);
384 release_locality(chip, chip->vendor.locality, 0);
385
73249695 386 itpm = true;
9519de3f
SB		 387
388 rc = tpm_tis_send_data(chip, cmd_getticks, len);
389 if (rc == 0) {
390 dev_info(chip->dev, "Detected an iTPM.\n");
391 rc = 1;
392 } else
393 rc = -EFAULT;
394
395out:
396 itpm = rem_itpm;
397 tpm_tis_ready(chip);
398 release_locality(chip, chip->vendor.locality, 0);
399
400 return rc;
401}
402
1f866057
SB		 403static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
404{
405 switch (chip->vendor.manufacturer_id) {
406 case TPM_VID_WINBOND:
407 return ((status == TPM_STS_VALID) ||
408 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
409 case TPM_VID_STM:
410 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
411 default:
412 return (status == TPM_STS_COMMAND_READY);
413 }
414}
415
62322d25 416static const struct file_operations tis_ops = {
27084efe
LD		 417 .owner = THIS_MODULE,
418 .llseek = no_llseek,
419 .open = tpm_open,
420 .read = tpm_read,
421 .write = tpm_write,
422 .release = tpm_release,
423};
424
425static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
426static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
427static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL);
428static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL);
429static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL);
430static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated,
431 NULL);
432static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL);
433static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel);
04ab2293 434static DEVICE_ATTR(durations, S_IRUGO, tpm_show_durations, NULL);
62592101 435static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL);
27084efe
LD		 436
437static struct attribute *tis_attrs[] = {
438 &dev_attr_pubek.attr,
439 &dev_attr_pcrs.attr,
440 &dev_attr_enabled.attr,
441 &dev_attr_active.attr,
442 &dev_attr_owned.attr,
443 &dev_attr_temp_deactivated.attr,
444 &dev_attr_caps.attr,
04ab2293 445 &dev_attr_cancel.attr,
62592101
SB		 446 &dev_attr_durations.attr,
447 &dev_attr_timeouts.attr, NULL,
27084efe
LD		 448};
449
450static struct attribute_group tis_attr_grp = {
451 .attrs = tis_attrs
452};
453
454static struct tpm_vendor_specific tpm_tis = {
455 .status = tpm_tis_status,
456 .recv = tpm_tis_recv,
457 .send = tpm_tis_send,
458 .cancel = tpm_tis_ready,
459 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
460 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
1f866057 461 .req_canceled = tpm_tis_req_canceled,
27084efe
LD		 462 .attr_group = &tis_attr_grp,
463 .miscdev = {
464 .fops = &tis_ops,},
465};
466
7d12e780 467static irqreturn_t tis_int_probe(int irq, void *dev_id)
27084efe 468{
06efcad0 469 struct tpm_chip *chip = dev_id;
27084efe
LD		 470 u32 interrupt;
471
472 interrupt = ioread32(chip->vendor.iobase +
473 TPM_INT_STATUS(chip->vendor.locality));
474
475 if (interrupt == 0)
476 return IRQ_NONE;
477
a7b66822 478 chip->vendor.probed_irq = irq;
27084efe
LD		 479
480 /* Clear interrupts handled with TPM_EOI */
481 iowrite32(interrupt,
482 chip->vendor.iobase +
483 TPM_INT_STATUS(chip->vendor.locality));
484 return IRQ_HANDLED;
485}
486
a6f97b29 487static irqreturn_t tis_int_handler(int dummy, void *dev_id)
27084efe 488{
06efcad0 489 struct tpm_chip *chip = dev_id;
27084efe
LD		 490 u32 interrupt;
491 int i;
492
493 interrupt = ioread32(chip->vendor.iobase +
494 TPM_INT_STATUS(chip->vendor.locality));
495
496 if (interrupt == 0)
497 return IRQ_NONE;
498
499 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
500 wake_up_interruptible(&chip->vendor.read_queue);
501 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
502 for (i = 0; i < 5; i++)
503 if (check_locality(chip, i) >= 0)
504 break;
505 if (interrupt &
506 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
507 TPM_INTF_CMD_READY_INT))
508 wake_up_interruptible(&chip->vendor.int_queue);
509
510 /* Clear interrupts handled with TPM_EOI */
511 iowrite32(interrupt,
512 chip->vendor.iobase +
513 TPM_INT_STATUS(chip->vendor.locality));
cab091ea 514 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
27084efe
LD		 515 return IRQ_HANDLED;
516}
517
73249695 518static bool interrupts = true;
57135568
KJH		 519module_param(interrupts, bool, 0444);
520MODULE_PARM_DESC(interrupts, "Enable interrupts");
521
c3c36aa9 522static int tpm_tis_init(struct device *dev, resource_size_t start,
7917ff9a 523 resource_size_t len, unsigned int irq)
27084efe
LD		 524{
525 u32 vendor, intfcaps, intmask;
968de8e2 526 int rc, i, irq_s, irq_e, probe;
27084efe
LD		 527 struct tpm_chip *chip;
528
9e323d3e 529 if (!(chip = tpm_register_hardware(dev, &tpm_tis)))
27084efe
LD		 530 return -ENODEV;
531
532 chip->vendor.iobase = ioremap(start, len);
533 if (!chip->vendor.iobase) {
534 rc = -EIO;
535 goto out_err;
536 }
537
ec579358
JG		 538 /* Default timeouts */
539 chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
540 chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
541 chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
542 chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
543
05a462af
MS		 544 if (request_locality(chip, 0) != 0) {
545 rc = -ENODEV;
546 goto out_err;
547 }
548
27084efe 549 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
3e3a5e90 550 chip->vendor.manufacturer_id = vendor;
27084efe 551
9e323d3e 552 dev_info(dev,
27084efe
LD		 553 "1.2 TPM (device-id 0x%X, rev-id %d)\n",
554 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
555
9519de3f 556 if (!itpm) {
968de8e2
SB		 557 probe = probe_itpm(chip);
558 if (probe < 0) {
9519de3f
SB		 559 rc = -ENODEV;
560 goto out_err;
561 }
73249695 562 itpm = !!probe;
9519de3f
SB		 563 }
564
3507d612
RA		 565 if (itpm)
566 dev_info(dev, "Intel iTPM workaround enabled\n");
567
568
27084efe
LD		 569 /* Figure out the capabilities */
570 intfcaps =
571 ioread32(chip->vendor.iobase +
572 TPM_INTF_CAPS(chip->vendor.locality));
9e323d3e 573 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
27084efe
LD		 574 intfcaps);
575 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
9e323d3e 576 dev_dbg(dev, "\tBurst Count Static\n");
27084efe 577 if (intfcaps & TPM_INTF_CMD_READY_INT)
9e323d3e 578 dev_dbg(dev, "\tCommand Ready Int Support\n");
27084efe 579 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
9e323d3e 580 dev_dbg(dev, "\tInterrupt Edge Falling\n");
27084efe 581 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
9e323d3e 582 dev_dbg(dev, "\tInterrupt Edge Rising\n");
27084efe 583 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
9e323d3e 584 dev_dbg(dev, "\tInterrupt Level Low\n");
27084efe 585 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
9e323d3e 586 dev_dbg(dev, "\tInterrupt Level High\n");
27084efe 587 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
9e323d3e 588 dev_dbg(dev, "\tLocality Change Int Support\n");
27084efe 589 if (intfcaps & TPM_INTF_STS_VALID_INT)
9e323d3e 590 dev_dbg(dev, "\tSts Valid Int Support\n");
27084efe 591 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
9e323d3e 592 dev_dbg(dev, "\tData Avail Int Support\n");
27084efe 593
a7b66822 594 /* get the timeouts before testing for irqs */
7f326ed7
SB		 595 if (tpm_get_timeouts(chip)) {
596 dev_err(dev, "Could not get TPM timeouts and durations\n");
597 rc = -ENODEV;
598 goto out_err;
599 }
a7b66822 600
68d6e671
SB		 601 if (tpm_do_selftest(chip)) {
602 dev_err(dev, "TPM self test failed\n");
603 rc = -ENODEV;
604 goto out_err;
605 }
606
27084efe
LD		 607 /* INTERRUPT Setup */
608 init_waitqueue_head(&chip->vendor.read_queue);
609 init_waitqueue_head(&chip->vendor.int_queue);
610
611 intmask =
612 ioread32(chip->vendor.iobase +
613 TPM_INT_ENABLE(chip->vendor.locality));
614
615 intmask |= TPM_INTF_CMD_READY_INT
616 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
617 | TPM_INTF_STS_VALID_INT;
618
619 iowrite32(intmask,
620 chip->vendor.iobase +
621 TPM_INT_ENABLE(chip->vendor.locality));
7917ff9a
BH		 622 if (interrupts)
623 chip->vendor.irq = irq;
624 if (interrupts && !chip->vendor.irq) {
a7b66822 625 irq_s =
57135568
KJH		 626 ioread8(chip->vendor.iobase +
627 TPM_INT_VECTOR(chip->vendor.locality));
a7b66822
SB		 628 if (irq_s) {
629 irq_e = irq_s;
630 } else {
631 irq_s = 3;
632 irq_e = 15;
633 }
57135568 634
a7b66822 635 for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) {
57135568 636 iowrite8(i, chip->vendor.iobase +
a7b66822 637 TPM_INT_VECTOR(chip->vendor.locality));
57135568 638 if (request_irq
0f2ed4c6 639 (i, tis_int_probe, IRQF_SHARED,
57135568
KJH		 640 chip->vendor.miscdev.name, chip) != 0) {
641 dev_info(chip->dev,
642 "Unable to request irq: %d for probe\n",
643 i);
644 continue;
645 }
27084efe 646
57135568
KJH		 647 /* Clear all existing */
648 iowrite32(ioread32
649 (chip->vendor.iobase +
650 TPM_INT_STATUS(chip->vendor.locality)),
651 chip->vendor.iobase +
652 TPM_INT_STATUS(chip->vendor.locality));
653
654 /* Turn on */
655 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
656 chip->vendor.iobase +
657 TPM_INT_ENABLE(chip->vendor.locality));
658
a7b66822
SB		 659 chip->vendor.probed_irq = 0;
660
57135568
KJH		 661 /* Generate Interrupts */
662 tpm_gen_interrupt(chip);
663
a7b66822
SB		 664 chip->vendor.irq = chip->vendor.probed_irq;
665
666 /* free_irq will call into tis_int_probe;
667 clear all irqs we haven't seen while doing
668 tpm_gen_interrupt */
669 iowrite32(ioread32
670 (chip->vendor.iobase +
671 TPM_INT_STATUS(chip->vendor.locality)),
672 chip->vendor.iobase +
673 TPM_INT_STATUS(chip->vendor.locality));
674
57135568
KJH		 675 /* Turn off */
676 iowrite32(intmask,
677 chip->vendor.iobase +
678 TPM_INT_ENABLE(chip->vendor.locality));
679 free_irq(i, chip);
27084efe 680 }
27084efe
LD		 681 }
682 if (chip->vendor.irq) {
683 iowrite8(chip->vendor.irq,
684 chip->vendor.iobase +
685 TPM_INT_VECTOR(chip->vendor.locality));
686 if (request_irq
0f2ed4c6 687 (chip->vendor.irq, tis_int_handler, IRQF_SHARED,
27084efe
LD		 688 chip->vendor.miscdev.name, chip) != 0) {
689 dev_info(chip->dev,
57135568
KJH		 690 "Unable to request irq: %d for use\n",
691 chip->vendor.irq);
27084efe
LD		 692 chip->vendor.irq = 0;
693 } else {
694 /* Clear all existing */
695 iowrite32(ioread32
696 (chip->vendor.iobase +
697 TPM_INT_STATUS(chip->vendor.locality)),
698 chip->vendor.iobase +
699 TPM_INT_STATUS(chip->vendor.locality));
700
701 /* Turn on */
702 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
703 chip->vendor.iobase +
704 TPM_INT_ENABLE(chip->vendor.locality));
705 }
706 }
707
708 INIT_LIST_HEAD(&chip->vendor.list);
4e70daaf 709 mutex_lock(&tis_lock);
27084efe 710 list_add(&chip->vendor.list, &tis_chips);
4e70daaf 711 mutex_unlock(&tis_lock);
27084efe 712
27084efe
LD		 713
714 return 0;
715out_err:
716 if (chip->vendor.iobase)
717 iounmap(chip->vendor.iobase);
718 tpm_remove_hardware(chip->dev);
719 return rc;
720}
96854310 721
7e72fe73 722#if defined(CONFIG_PNP) || defined(CONFIG_PM_SLEEP)
96854310
SB		 723static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
724{
725 u32 intmask;
726
727 /* reenable interrupts that device may have lost or
728 BIOS/firmware may have disabled */
729 iowrite8(chip->vendor.irq, chip->vendor.iobase +
730 TPM_INT_VECTOR(chip->vendor.locality));
731
732 intmask =
733 ioread32(chip->vendor.iobase +
734 TPM_INT_ENABLE(chip->vendor.locality));
735
736 intmask |= TPM_INTF_CMD_READY_INT
737 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
738 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
739
740 iowrite32(intmask,
741 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
742}
7e72fe73 743#endif
96854310 744
7f2ab000 745#ifdef CONFIG_PNP
afc6d369 746static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
9e323d3e
KJH		 747 const struct pnp_device_id *pnp_id)
748{
c3c36aa9 749 resource_size_t start, len;
7917ff9a
BH		 750 unsigned int irq = 0;
751
9e323d3e
KJH		 752 start = pnp_mem_start(pnp_dev, 0);
753 len = pnp_mem_len(pnp_dev, 0);
754
7917ff9a
BH		 755 if (pnp_irq_valid(pnp_dev, 0))
756 irq = pnp_irq(pnp_dev, 0);
757 else
73249695 758 interrupts = false;
7917ff9a 759
e5cce6c1 760 if (is_itpm(pnp_dev))
73249695 761 itpm = true;
e5cce6c1 762
7917ff9a 763 return tpm_tis_init(&pnp_dev->dev, start, len, irq);
9e323d3e
KJH		 764}
765
27084efe
LD		 766static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg)
767{
035e2ce8 768 return tpm_pm_suspend(&dev->dev);
27084efe
LD		 769}
770
771static int tpm_tis_pnp_resume(struct pnp_dev *dev)
772{
59f6fbe4
RA		 773 struct tpm_chip *chip = pnp_get_drvdata(dev);
774 int ret;
775
45baa1d1
SB		 776 if (chip->vendor.irq)
777 tpm_tis_reenable_interrupts(chip);
778
59f6fbe4
RA		 779 ret = tpm_pm_resume(&dev->dev);
780 if (!ret)
68d6e671 781 tpm_do_selftest(chip);
59f6fbe4
RA		 782
783 return ret;
27084efe
LD		 784}
785
0bbed20e 786static struct pnp_device_id tpm_pnp_tbl[] = {
27084efe 787 {"PNP0C31", 0}, /* TPM */
93e1b7d4
KJH		 788 {"ATM1200", 0}, /* Atmel */
789 {"IFX0102", 0}, /* Infineon */
790 {"BCM0101", 0}, /* Broadcom */
061991ec 791 {"BCM0102", 0}, /* Broadcom */
93e1b7d4 792 {"NSC1200", 0}, /* National */
fb0e7e11 793 {"ICO0102", 0}, /* Intel */
93e1b7d4
KJH		 794 /* Add new here */
795 {"", 0}, /* User Specified */
796 {"", 0} /* Terminator */
27084efe 797};
31bde71c 798MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
27084efe 799
39af33fc 800static void tpm_tis_pnp_remove(struct pnp_dev *dev)
253115b7
RA		 801{
802 struct tpm_chip *chip = pnp_get_drvdata(dev);
803
804 tpm_dev_vendor_release(chip);
805
806 kfree(chip);
807}
808
809
27084efe
LD		 810static struct pnp_driver tis_pnp_driver = {
811 .name = "tpm_tis",
812 .id_table = tpm_pnp_tbl,
813 .probe = tpm_tis_pnp_init,
814 .suspend = tpm_tis_pnp_suspend,
815 .resume = tpm_tis_pnp_resume,
253115b7 816 .remove = tpm_tis_pnp_remove,
27084efe
LD		 817};
818
93e1b7d4
KJH		 819#define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
820module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
821 sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
822MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
7f2ab000 823#endif
7a192ec3 824
07368d32 825#ifdef CONFIG_PM_SLEEP
b633f050 826static int tpm_tis_resume(struct device *dev)
7a192ec3 827{
b633f050 828 struct tpm_chip *chip = dev_get_drvdata(dev);
45baa1d1
SB		 829
830 if (chip->vendor.irq)
831 tpm_tis_reenable_interrupts(chip);
832
b633f050 833 return tpm_pm_resume(dev);
7a192ec3 834}
07368d32 835#endif
b633f050
RW		 836
837static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
838
7a192ec3
ML		 839static struct platform_driver tis_drv = {
840 .driver = {
841 .name = "tpm_tis",
842 .owner = THIS_MODULE,
b633f050 843 .pm = &tpm_tis_pm,
7a192ec3 844 },
9e323d3e
KJH		 845};
846
847static struct platform_device *pdev;
848
90ab5ee9 849static bool force;
9e323d3e
KJH		 850module_param(force, bool, 0444);
851MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
27084efe
LD		 852static int __init init_tis(void)
853{
9e323d3e 854 int rc;
7f2ab000
RA		 855#ifdef CONFIG_PNP
856 if (!force)
857 return pnp_register_driver(&tis_pnp_driver);
858#endif
9e323d3e 859
7f2ab000
RA		 860 rc = platform_driver_register(&tis_drv);
861 if (rc < 0)
9e323d3e 862 return rc;
7f2ab000
RA		 863 if (IS_ERR(pdev=platform_device_register_simple("tpm_tis", -1, NULL, 0)))
864 return PTR_ERR(pdev);
865 if((rc=tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0)) != 0) {
866 platform_device_unregister(pdev);
867 platform_driver_unregister(&tis_drv);
9e323d3e 868 }
7f2ab000 869 return rc;
27084efe
LD		 870}
871
872static void __exit cleanup_tis(void)
873{
874 struct tpm_vendor_specific *i, *j;
875 struct tpm_chip *chip;
4e70daaf 876 mutex_lock(&tis_lock);
27084efe
LD		 877 list_for_each_entry_safe(i, j, &tis_chips, list) {
878 chip = to_tpm_chip(i);
253115b7 879 tpm_remove_hardware(chip->dev);
27084efe
LD		 880 iowrite32(~TPM_GLOBAL_INT_ENABLE &
881 ioread32(chip->vendor.iobase +
882 TPM_INT_ENABLE(chip->vendor.
883 locality)),
884 chip->vendor.iobase +
885 TPM_INT_ENABLE(chip->vendor.locality));
886 release_locality(chip, chip->vendor.locality, 1);
887 if (chip->vendor.irq)
888 free_irq(chip->vendor.irq, chip);
889 iounmap(i->iobase);
890 list_del(&i->list);
27084efe 891 }
4e70daaf 892 mutex_unlock(&tis_lock);
7f2ab000
RA		 893#ifdef CONFIG_PNP
894 if (!force) {
9e323d3e 895 pnp_unregister_driver(&tis_pnp_driver);
7f2ab000
RA		 896 return;
897 }
898#endif
899 platform_device_unregister(pdev);
900 platform_driver_unregister(&tis_drv);
27084efe
LD		 901}
902
903module_init(init_tis);
904module_exit(cleanup_tis);
905MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
906MODULE_DESCRIPTION("TPM Driver");
907MODULE_VERSION("2.0");
908MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)