[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / s390 / include / asm / processor.h

/*
 *  include/asm-s390/processor.h
 *
 *  S390 version
 *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
 *    Author(s): Hartmut Penner (hp@de.ibm.com),
 *               Martin Schwidefsky (schwidefsky@de.ibm.com)
 *
 *  Derived from "include/asm-i386/processor.h"
 *    Copyright (C) 1994, Linus Torvalds
 */

#ifndef __ASM_S390_PROCESSOR_H
#define __ASM_S390_PROCESSOR_H

#include <linux/linkage.h>
#include <asm/ptrace.h>

#ifdef __KERNEL__
/*
 * Default implementation of macro that returns current
 * instruction pointer ("program counter").
 */
#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })

/*
 *  CPU type and hardware bug flags. Kept separately for each CPU.
 *  Members of this structure are referenced in head.S, so think twice
 *  before touching them. [mj]
 */

typedef struct
{
        unsigned int version :  8;
        unsigned int ident   : 24;
        unsigned int machine : 16;
        unsigned int unused  : 16;
} __attribute__ ((packed)) cpuid_t;

static inline void get_cpu_id(cpuid_t *ptr)
{
	asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr));
}

struct cpuinfo_S390
{
        cpuid_t  cpu_id;
        __u16    cpu_addr;
        __u16    cpu_nr;
        unsigned long loops_per_jiffy;
        unsigned long *pgd_quick;
#ifdef __s390x__
        unsigned long *pmd_quick;
#endif /* __s390x__ */
        unsigned long *pte_quick;
        unsigned long pgtable_cache_sz;
};

extern void s390_adjust_jiffies(void);
extern void print_cpu_info(struct cpuinfo_S390 *);
extern int get_cpu_capability(unsigned int *);

/*
 * User space process size: 2GB for 31 bit, 4TB for 64 bit.
 */
#ifndef __s390x__

#define TASK_SIZE		(1UL << 31)
#define TASK_UNMAPPED_BASE	(1UL << 30)

#else /* __s390x__ */

#define TASK_SIZE_OF(tsk)	(test_tsk_thread_flag(tsk,TIF_31BIT) ? \
					(1UL << 31) : (1UL << 53))
#define TASK_UNMAPPED_BASE	(test_thread_flag(TIF_31BIT) ? \
					(1UL << 30) : (1UL << 41))
#define TASK_SIZE		TASK_SIZE_OF(current)

#endif /* __s390x__ */

#ifdef __KERNEL__

#ifndef __s390x__
#define STACK_TOP		(1UL << 31)
#define STACK_TOP_MAX		(1UL << 31)
#else /* __s390x__ */
#define STACK_TOP		(1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
#define STACK_TOP_MAX		(1UL << 42)
#endif /* __s390x__ */


#endif

#define HAVE_ARCH_PICK_MMAP_LAYOUT

typedef struct {
        __u32 ar4;
} mm_segment_t;

/*
 * Thread structure
 */
struct thread_struct {
	s390_fp_regs fp_regs;
	unsigned int  acrs[NUM_ACRS];
        unsigned long ksp;              /* kernel stack pointer             */
	mm_segment_t mm_segment;
        unsigned long prot_addr;        /* address of protection-excep.     */
        unsigned int trap_no;
        per_struct per_info;
	/* Used to give failing instruction back to user for ieee exceptions */
	unsigned long ieee_instruction_pointer; 
        /* pfault_wait is used to block the process on a pfault event */
	unsigned long pfault_wait;
};

typedef struct thread_struct thread_struct;

/*
 * Stack layout of a C stack frame.
 */
#ifndef __PACK_STACK
struct stack_frame {
	unsigned long back_chain;
	unsigned long empty1[5];
	unsigned long gprs[10];
	unsigned int  empty2[8];
};
#else
struct stack_frame {
	unsigned long empty1[5];
	unsigned int  empty2[8];
	unsigned long gprs[10];
	unsigned long back_chain;
};
#endif

#define ARCH_MIN_TASKALIGN	8

#define INIT_THREAD {							\
	.ksp = sizeof(init_stack) + (unsigned long) &init_stack,	\
}

/*
 * Do necessary setup to start up a new thread.
 */
#define start_thread(regs, new_psw, new_stackp) do {		\
	set_fs(USER_DS);					\
	regs->psw.mask	= psw_user_bits;			\
	regs->psw.addr	= new_psw | PSW_ADDR_AMODE;		\
	regs->gprs[15]	= new_stackp;				\
} while (0)

#define start_thread31(regs, new_psw, new_stackp) do {		\
	set_fs(USER_DS);					\
	regs->psw.mask	= psw_user32_bits;			\
	regs->psw.addr	= new_psw | PSW_ADDR_AMODE;		\
	regs->gprs[15]	= new_stackp;				\
	crst_table_downgrade(current->mm, 1UL << 31);		\
} while (0)

/* Forward declaration, a strange C thing */
struct task_struct;
struct mm_struct;
struct seq_file;

/* Free all resources held by a thread. */
extern void release_thread(struct task_struct *);
extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);

/* Prepare to copy thread state - unlazy all lazy status */
#define prepare_to_copy(tsk)	do { } while (0)

/*
 * Return saved PC of a blocked thread.
 */
extern unsigned long thread_saved_pc(struct task_struct *t);

/*
 * Print register of task into buffer. Used in fs/proc/array.c.
 */
extern void task_show_regs(struct seq_file *m, struct task_struct *task);

extern void show_code(struct pt_regs *regs);

unsigned long get_wchan(struct task_struct *p);
#define task_pt_regs(tsk) ((struct pt_regs *) \
        (task_stack_page(tsk) + THREAD_SIZE) - 1)
#define KSTK_EIP(tsk)	(task_pt_regs(tsk)->psw.addr)
#define KSTK_ESP(tsk)	(task_pt_regs(tsk)->gprs[15])

/*
 * Give up the time slice of the virtual PU.
 */
static inline void cpu_relax(void)
{
	if (MACHINE_HAS_DIAG44)
		asm volatile("diag 0,0,68");
	barrier();
}

static inline void psw_set_key(unsigned int key)
{
	asm volatile("spka 0(%0)" : : "d" (key));
}

/*
 * Set PSW to specified value.
 */
static inline void __load_psw(psw_t psw)
{
#ifndef __s390x__
	asm volatile("lpsw  0(%0)" : : "a" (&psw), "m" (psw) : "cc");
#else
	asm volatile("lpswe 0(%0)" : : "a" (&psw), "m" (psw) : "cc");
#endif
}

/*
 * Set PSW mask to specified value, while leaving the
 * PSW addr pointing to the next instruction.
 */

static inline void __load_psw_mask (unsigned long mask)
{
	unsigned long addr;
	psw_t psw;

	psw.mask = mask;

#ifndef __s390x__
	asm volatile(
		"	basr	%0,0\n"
		"0:	ahi	%0,1f-0b\n"
		"	st	%0,4(%1)\n"
		"	lpsw	0(%1)\n"
		"1:"
		: "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc");
#else /* __s390x__ */
	asm volatile(
		"	larl	%0,1f\n"
		"	stg	%0,8(%1)\n"
		"	lpswe	0(%1)\n"
		"1:"
		: "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc");
#endif /* __s390x__ */
}
 
/*
 * Function to stop a processor until an interruption occurred
 */
static inline void enabled_wait(void)
{
	__load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT |
			PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY);
}

/*
 * Function to drop a processor into disabled wait state
 */

static inline void ATTRIB_NORET disabled_wait(unsigned long code)
{
        unsigned long ctl_buf;
        psw_t dw_psw;

        dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT;
        dw_psw.addr = code;
        /* 
         * Store status and then load disabled wait psw,
         * the processor is dead afterwards
         */
#ifndef __s390x__
	asm volatile(
		"	stctl	0,0,0(%2)\n"
		"	ni	0(%2),0xef\n"	/* switch off protection */
		"	lctl	0,0,0(%2)\n"
		"	stpt	0xd8\n"		/* store timer */
		"	stckc	0xe0\n"		/* store clock comparator */
		"	stpx	0x108\n"	/* store prefix register */
		"	stam	0,15,0x120\n"	/* store access registers */
		"	std	0,0x160\n"	/* store f0 */
		"	std	2,0x168\n"	/* store f2 */
		"	std	4,0x170\n"	/* store f4 */
		"	std	6,0x178\n"	/* store f6 */
		"	stm	0,15,0x180\n"	/* store general registers */
		"	stctl	0,15,0x1c0\n"	/* store control registers */
		"	oi	0x1c0,0x10\n"	/* fake protection bit */
		"	lpsw	0(%1)"
		: "=m" (ctl_buf)
		: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
#else /* __s390x__ */
	asm volatile(
		"	stctg	0,0,0(%2)\n"
		"	ni	4(%2),0xef\n"	/* switch off protection */
		"	lctlg	0,0,0(%2)\n"
		"	lghi	1,0x1000\n"
		"	stpt	0x328(1)\n"	/* store timer */
		"	stckc	0x330(1)\n"	/* store clock comparator */
		"	stpx	0x318(1)\n"	/* store prefix register */
		"	stam	0,15,0x340(1)\n"/* store access registers */
		"	stfpc	0x31c(1)\n"	/* store fpu control */
		"	std	0,0x200(1)\n"	/* store f0 */
		"	std	1,0x208(1)\n"	/* store f1 */
		"	std	2,0x210(1)\n"	/* store f2 */
		"	std	3,0x218(1)\n"	/* store f3 */
		"	std	4,0x220(1)\n"	/* store f4 */
		"	std	5,0x228(1)\n"	/* store f5 */
		"	std	6,0x230(1)\n"	/* store f6 */
		"	std	7,0x238(1)\n"	/* store f7 */
		"	std	8,0x240(1)\n"	/* store f8 */
		"	std	9,0x248(1)\n"	/* store f9 */
		"	std	10,0x250(1)\n"	/* store f10 */
		"	std	11,0x258(1)\n"	/* store f11 */
		"	std	12,0x260(1)\n"	/* store f12 */
		"	std	13,0x268(1)\n"	/* store f13 */
		"	std	14,0x270(1)\n"	/* store f14 */
		"	std	15,0x278(1)\n"	/* store f15 */
		"	stmg	0,15,0x280(1)\n"/* store general registers */
		"	stctg	0,15,0x380(1)\n"/* store control registers */
		"	oi	0x384(1),0x10\n"/* fake protection bit */
		"	lpswe	0(%1)"
		: "=m" (ctl_buf)
		: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0");
#endif /* __s390x__ */
	while (1);
}

/*
 * Basic Machine Check/Program Check Handler.
 */

extern void s390_base_mcck_handler(void);
extern void s390_base_pgm_handler(void);
extern void s390_base_ext_handler(void);

extern void (*s390_base_mcck_handler_fn)(void);
extern void (*s390_base_pgm_handler_fn)(void);
extern void (*s390_base_ext_handler_fn)(void);

#define ARCH_LOW_ADDRESS_LIMIT	0x7fffffffUL

#endif

/*
 * Helper macro for exception table entries
 */
#ifndef __s390x__
#define EX_TABLE(_fault,_target)			\
	".section __ex_table,\"a\"\n"			\
	"	.align 4\n"				\
	"	.long  " #_fault "," #_target "\n"	\
	".previous\n"
#else
#define EX_TABLE(_fault,_target)			\
	".section __ex_table,\"a\"\n"			\
	"	.align 8\n"				\
	"	.quad  " #_fault "," #_target "\n"	\
	".previous\n"
#endif

#endif                                 /* __ASM_S390_PROCESSOR_H           */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* include/asm-s390/processor.h
	3	*
	4	* S390 version
	5	* Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
	6	* Author(s): Hartmut Penner (hp@de.ibm.com),
	7	* Martin Schwidefsky (schwidefsky@de.ibm.com)
	8	*
	9	* Derived from "include/asm-i386/processor.h"
	10	* Copyright (C) 1994, Linus Torvalds
	11	*/
	12
	13	#ifndef __ASM_S390_PROCESSOR_H
	14	#define __ASM_S390_PROCESSOR_H
	15
edd53787	16	#include <linux/linkage.h>
1da177e4 LT	17	#include <asm/ptrace.h>
	18
	19	#ifdef __KERNEL__
	20	/*
	21	* Default implementation of macro that returns current
	22	* instruction pointer ("program counter").
	23	*/
94c12cc7	24	#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
1da177e4 LT	25
	26	/*
	27	* CPU type and hardware bug flags. Kept separately for each CPU.
	28	* Members of this structure are referenced in head.S, so think twice
	29	* before touching them. [mj]
	30	*/
	31
	32	typedef struct
	33	{
	34	unsigned int version : 8;
	35	unsigned int ident : 24;
	36	unsigned int machine : 16;
	37	unsigned int unused : 16;
	38	} __attribute__ ((packed)) cpuid_t;
	39
72960a02 MH	40	static inline void get_cpu_id(cpuid_t *ptr)
	41	{
	42	asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr));
	43	}
	44
1da177e4 LT	45	struct cpuinfo_S390
	46	{
	47	cpuid_t cpu_id;
	48	__u16 cpu_addr;
	49	__u16 cpu_nr;
	50	unsigned long loops_per_jiffy;
	51	unsigned long *pgd_quick;
	52	#ifdef __s390x__
	53	unsigned long *pmd_quick;
	54	#endif /* __s390x__ */
	55	unsigned long *pte_quick;
	56	unsigned long pgtable_cache_sz;
	57	};
	58
31ee4b2f	59	extern void s390_adjust_jiffies(void);
1da177e4	60	extern void print_cpu_info(struct cpuinfo_S390 *);
2fc2d1e9	61	extern int get_cpu_capability(unsigned int *);
1da177e4	62
1da177e4 LT	63	/*
	64	* User space process size: 2GB for 31 bit, 4TB for 64 bit.
	65	*/
	66	#ifndef __s390x__
	67
5a216a20 MS	68	#define TASK_SIZE (1UL << 31)
5a216a20 MS	69	#define TASK_UNMAPPED_BASE (1UL << 30)
1da177e4 LT	70
	71	#else /* __s390x__ */
	72
5a216a20 MS	73	#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk,TIF_31BIT) ? \
	74	(1UL << 31) : (1UL << 53))
	75	#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
	76	(1UL << 30) : (1UL << 41))
	77	#define TASK_SIZE TASK_SIZE_OF(current)
1da177e4 LT	78
	79	#endif /* __s390x__ */
	80
922a70d3 DH	81	#ifdef __KERNEL__
922a70d3 DH	82
5a216a20 MS	83	#ifndef __s390x__
5a216a20 MS	84	#define STACK_TOP (1UL << 31)
6252d702	85	#define STACK_TOP_MAX (1UL << 31)
5a216a20	86	#else /* __s390x__ */
6252d702 MS	87	#define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
6252d702 MS	88	#define STACK_TOP_MAX (1UL << 42)
5a216a20 MS	89	#endif /* __s390x__ */
5a216a20 MS	90
922a70d3 DH	91
	92	#endif
	93
1da177e4 LT	94	#define HAVE_ARCH_PICK_MMAP_LAYOUT
	95
	96	typedef struct {
	97	__u32 ar4;
	98	} mm_segment_t;
	99
	100	/*
	101	* Thread structure
	102	*/
	103	struct thread_struct {
	104	s390_fp_regs fp_regs;
	105	unsigned int acrs[NUM_ACRS];
	106	unsigned long ksp; /* kernel stack pointer */
1da177e4 LT	107	mm_segment_t mm_segment;
1da177e4 LT	108	unsigned long prot_addr; /* address of protection-excep. */
1da177e4 LT	109	unsigned int trap_no;
	110	per_struct per_info;
	111	/* Used to give failing instruction back to user for ieee exceptions */
	112	unsigned long ieee_instruction_pointer;
	113	/* pfault_wait is used to block the process on a pfault event */
	114	unsigned long pfault_wait;
	115	};
	116
	117	typedef struct thread_struct thread_struct;
	118
	119	/*
	120	* Stack layout of a C stack frame.
	121	*/
	122	#ifndef __PACK_STACK
	123	struct stack_frame {
	124	unsigned long back_chain;
	125	unsigned long empty1[5];
	126	unsigned long gprs[10];
	127	unsigned int empty2[8];
	128	};
	129	#else
	130	struct stack_frame {
	131	unsigned long empty1[5];
	132	unsigned int empty2[8];
	133	unsigned long gprs[10];
	134	unsigned long back_chain;
	135	};
	136	#endif
	137
	138	#define ARCH_MIN_TASKALIGN 8
	139
6f3fa3f0 MS	140	#define INIT_THREAD { \
	141	.ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
	142	}
1da177e4 LT	143
	144	/*
	145	* Do necessary setup to start up a new thread.
	146	*/
63506c41	147	#define start_thread(regs, new_psw, new_stackp) do { \
9b241cc8	148	set_fs(USER_DS); \
c1821c2e	149	regs->psw.mask = psw_user_bits; \
63506c41 MS	150	regs->psw.addr = new_psw \| PSW_ADDR_AMODE; \
	151	regs->gprs[15] = new_stackp; \
	152	} while (0)
	153
	154	#define start_thread31(regs, new_psw, new_stackp) do { \
	155	set_fs(USER_DS); \
	156	regs->psw.mask = psw_user32_bits; \
	157	regs->psw.addr = new_psw \| PSW_ADDR_AMODE; \
	158	regs->gprs[15] = new_stackp; \
	159	crst_table_downgrade(current->mm, 1UL << 31); \
1da177e4 LT	160	} while (0)
1da177e4 LT	161
1da177e4 LT	162	/* Forward declaration, a strange C thing */
	163	struct task_struct;
	164	struct mm_struct;
df5f8314	165	struct seq_file;
1da177e4 LT	166
	167	/* Free all resources held by a thread. */
	168	extern void release_thread(struct task_struct *);
	169	extern int kernel_thread(int (fn)(void ), void * arg, unsigned long flags);
	170
	171	/* Prepare to copy thread state - unlazy all lazy status */
	172	#define prepare_to_copy(tsk) do { } while (0)
	173
	174	/*
	175	* Return saved PC of a blocked thread.
	176	*/
	177	extern unsigned long thread_saved_pc(struct task_struct *t);
	178
	179	/*
	180	* Print register of task into buffer. Used in fs/proc/array.c.
	181	*/
df5f8314	182	extern void task_show_regs(struct seq_file m, struct task_struct task);
1da177e4	183
bb11e3bd	184	extern void show_code(struct pt_regs *regs);
1da177e4 LT	185
1da177e4 LT	186	unsigned long get_wchan(struct task_struct *p);
c7584fb6	187	#define task_pt_regs(tsk) ((struct pt_regs *) \
30af7120	188	(task_stack_page(tsk) + THREAD_SIZE) - 1)
c7584fb6 AV	189	#define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
c7584fb6 AV	190	#define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
1da177e4 LT	191
	192	/*
	193	* Give up the time slice of the virtual PU.
	194	*/
abdba61a HC	195	static inline void cpu_relax(void)
	196	{
	197	if (MACHINE_HAS_DIAG44)
c48e0913 HC	198	asm volatile("diag 0,0,68");
c48e0913 HC	199	barrier();
abdba61a	200	}
1da177e4	201
dc74d7f9 HC	202	static inline void psw_set_key(unsigned int key)
	203	{
	204	asm volatile("spka 0(%0)" : : "d" (key));
	205	}
	206
77fa2245 HC	207	/*
	208	* Set PSW to specified value.
	209	*/
	210	static inline void __load_psw(psw_t psw)
	211	{
	212	#ifndef __s390x__
94c12cc7	213	asm volatile("lpsw 0(%0)" : : "a" (&psw), "m" (psw) : "cc");
77fa2245	214	#else
94c12cc7	215	asm volatile("lpswe 0(%0)" : : "a" (&psw), "m" (psw) : "cc");
77fa2245 HC	216	#endif
	217	}
	218
1da177e4 LT	219	/*
	220	* Set PSW mask to specified value, while leaving the
	221	* PSW addr pointing to the next instruction.
	222	*/
	223
	224	static inline void __load_psw_mask (unsigned long mask)
	225	{
	226	unsigned long addr;
1da177e4	227	psw_t psw;
77fa2245	228
1da177e4 LT	229	psw.mask = mask;
	230
	231	#ifndef __s390x__
94c12cc7 MS	232	asm volatile(
	233	" basr %0,0\n"
	234	"0: ahi %0,1f-0b\n"
	235	" st %0,4(%1)\n"
	236	" lpsw 0(%1)\n"
1da177e4	237	"1:"
94c12cc7	238	: "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc");
1da177e4	239	#else /* __s390x__ */
94c12cc7 MS	240	asm volatile(
	241	" larl %0,1f\n"
	242	" stg %0,8(%1)\n"
	243	" lpswe 0(%1)\n"
1da177e4	244	"1:"
94c12cc7	245	: "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc");
1da177e4 LT	246	#endif /* __s390x__ */
	247	}
	248
	249	/*
	250	* Function to stop a processor until an interruption occurred
	251	*/
	252	static inline void enabled_wait(void)
	253	{
77fa2245 HC	254	__load_psw_mask(PSW_BASE_BITS \| PSW_MASK_IO \| PSW_MASK_EXT \|
77fa2245 HC	255	PSW_MASK_MCHECK \| PSW_MASK_WAIT \| PSW_DEFAULT_KEY);
1da177e4 LT	256	}
	257
	258	/*
	259	* Function to drop a processor into disabled wait state
	260	*/
	261
edd53787	262	static inline void ATTRIB_NORET disabled_wait(unsigned long code)
1da177e4	263	{
1da177e4	264	unsigned long ctl_buf;
77fa2245	265	psw_t dw_psw;
1da177e4	266
77fa2245 HC	267	dw_psw.mask = PSW_BASE_BITS \| PSW_MASK_WAIT;
77fa2245 HC	268	dw_psw.addr = code;
1da177e4 LT	269	/*
	270	* Store status and then load disabled wait psw,
	271	* the processor is dead afterwards
	272	*/
	273	#ifndef __s390x__
94c12cc7 MS	274	asm volatile(
	275	" stctl 0,0,0(%2)\n"
	276	" ni 0(%2),0xef\n" /* switch off protection */
	277	" lctl 0,0,0(%2)\n"
	278	" stpt 0xd8\n" /* store timer */
	279	" stckc 0xe0\n" /* store clock comparator */
	280	" stpx 0x108\n" /* store prefix register */
	281	" stam 0,15,0x120\n" /* store access registers */
	282	" std 0,0x160\n" /* store f0 */
	283	" std 2,0x168\n" /* store f2 */
	284	" std 4,0x170\n" /* store f4 */
	285	" std 6,0x178\n" /* store f6 */
	286	" stm 0,15,0x180\n" /* store general registers */
	287	" stctl 0,15,0x1c0\n" /* store control registers */
	288	" oi 0x1c0,0x10\n" /* fake protection bit */
	289	" lpsw 0(%1)"
	290	: "=m" (ctl_buf)
	291	: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
1da177e4	292	#else /* __s390x__ */
94c12cc7 MS	293	asm volatile(
	294	" stctg 0,0,0(%2)\n"
	295	" ni 4(%2),0xef\n" /* switch off protection */
	296	" lctlg 0,0,0(%2)\n"
	297	" lghi 1,0x1000\n"
	298	" stpt 0x328(1)\n" /* store timer */
	299	" stckc 0x330(1)\n" /* store clock comparator */
	300	" stpx 0x318(1)\n" /* store prefix register */
	301	" stam 0,15,0x340(1)\n"/* store access registers */
	302	" stfpc 0x31c(1)\n" /* store fpu control */
	303	" std 0,0x200(1)\n" /* store f0 */
	304	" std 1,0x208(1)\n" /* store f1 */
	305	" std 2,0x210(1)\n" /* store f2 */
	306	" std 3,0x218(1)\n" /* store f3 */
	307	" std 4,0x220(1)\n" /* store f4 */
	308	" std 5,0x228(1)\n" /* store f5 */
	309	" std 6,0x230(1)\n" /* store f6 */
	310	" std 7,0x238(1)\n" /* store f7 */
	311	" std 8,0x240(1)\n" /* store f8 */
	312	" std 9,0x248(1)\n" /* store f9 */
	313	" std 10,0x250(1)\n" /* store f10 */
	314	" std 11,0x258(1)\n" /* store f11 */
	315	" std 12,0x260(1)\n" /* store f12 */
	316	" std 13,0x268(1)\n" /* store f13 */
	317	" std 14,0x270(1)\n" /* store f14 */
	318	" std 15,0x278(1)\n" /* store f15 */
	319	" stmg 0,15,0x280(1)\n"/* store general registers */
	320	" stctg 0,15,0x380(1)\n"/* store control registers */
	321	" oi 0x384(1),0x10\n"/* fake protection bit */
	322	" lpswe 0(%1)"
	323	: "=m" (ctl_buf)
	324	: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0");
1da177e4	325	#endif /* __s390x__ */
edd53787	326	while (1);
1da177e4 LT	327	}
1da177e4 LT	328
ab14de6c HC	329	/*
	330	* Basic Machine Check/Program Check Handler.
	331	*/
	332
	333	extern void s390_base_mcck_handler(void);
	334	extern void s390_base_pgm_handler(void);
	335	extern void s390_base_ext_handler(void);
	336
	337	extern void (*s390_base_mcck_handler_fn)(void);
	338	extern void (*s390_base_pgm_handler_fn)(void);
	339	extern void (*s390_base_ext_handler_fn)(void);
	340
dfd54cbc HC	341	#define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
dfd54cbc HC	342
1da177e4 LT	343	#endif
1da177e4 LT	344
de1a3f1c MS	345	/*
	346	* Helper macro for exception table entries
	347	*/
	348	#ifndef __s390x__
	349	#define EX_TABLE(_fault,_target) \
	350	".section __ex_table,\"a\"\n" \
	351	" .align 4\n" \
	352	" .long " #_fault "," #_target "\n" \
	353	".previous\n"
	354	#else
	355	#define EX_TABLE(_fault,_target) \
	356	".section __ex_table,\"a\"\n" \
	357	" .align 8\n" \
	358	" .quad " #_fault "," #_target "\n" \
	359	".previous\n"
	360	#endif
	361
1da177e4	362	#endif /* __ASM_S390_PROCESSOR_H */