[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-s390 / processor.h

/*
 *  include/asm-s390/processor.h
 *
 *  S390 version
 *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
 *    Author(s): Hartmut Penner (hp@de.ibm.com),
 *               Martin Schwidefsky (schwidefsky@de.ibm.com)
 *
 *  Derived from "include/asm-i386/processor.h"
 *    Copyright (C) 1994, Linus Torvalds
 */

#ifndef __ASM_S390_PROCESSOR_H
#define __ASM_S390_PROCESSOR_H

#include <asm/page.h>
#include <asm/ptrace.h>

#ifdef __KERNEL__
/*
 * Default implementation of macro that returns current
 * instruction pointer ("program counter").
 */
#define current_text_addr() ({ void *pc; __asm__("basr %0,0":"=a"(pc)); pc; })

/*
 *  CPU type and hardware bug flags. Kept separately for each CPU.
 *  Members of this structure are referenced in head.S, so think twice
 *  before touching them. [mj]
 */

typedef struct
{
        unsigned int version :  8;
        unsigned int ident   : 24;
        unsigned int machine : 16;
        unsigned int unused  : 16;
} __attribute__ ((packed)) cpuid_t;

struct cpuinfo_S390
{
        cpuid_t  cpu_id;
        __u16    cpu_addr;
        __u16    cpu_nr;
        unsigned long loops_per_jiffy;
        unsigned long *pgd_quick;
#ifdef __s390x__
        unsigned long *pmd_quick;
#endif /* __s390x__ */
        unsigned long *pte_quick;
        unsigned long pgtable_cache_sz;
};

extern void print_cpu_info(struct cpuinfo_S390 *);

/* Lazy FPU handling on uni-processor */
extern struct task_struct *last_task_used_math;

/*
 * User space process size: 2GB for 31 bit, 4TB for 64 bit.
 */
#ifndef __s390x__

# define TASK_SIZE		(0x80000000UL)
# define TASK_UNMAPPED_BASE	(TASK_SIZE / 2)
# define DEFAULT_TASK_SIZE	(0x80000000UL)

#else /* __s390x__ */

# define TASK_SIZE		(test_thread_flag(TIF_31BIT) ? \
					(0x80000000UL) : (0x40000000000UL))
# define TASK_UNMAPPED_BASE	(TASK_SIZE / 2)
# define DEFAULT_TASK_SIZE	(0x40000000000UL)

#endif /* __s390x__ */

#define HAVE_ARCH_PICK_MMAP_LAYOUT

typedef struct {
        __u32 ar4;
} mm_segment_t;

/*
 * Thread structure
 */
struct thread_struct {
	s390_fp_regs fp_regs;
	unsigned int  acrs[NUM_ACRS];
        unsigned long ksp;              /* kernel stack pointer             */
        unsigned long user_seg;         /* HSTD                             */
	mm_segment_t mm_segment;
        unsigned long prot_addr;        /* address of protection-excep.     */
        unsigned int error_code;        /* error-code of last prog-excep.   */
        unsigned int trap_no;
        per_struct per_info;
	/* Used to give failing instruction back to user for ieee exceptions */
	unsigned long ieee_instruction_pointer; 
        /* pfault_wait is used to block the process on a pfault event */
	unsigned long pfault_wait;
};

typedef struct thread_struct thread_struct;

/*
 * Stack layout of a C stack frame.
 */
#ifndef __PACK_STACK
struct stack_frame {
	unsigned long back_chain;
	unsigned long empty1[5];
	unsigned long gprs[10];
	unsigned int  empty2[8];
};
#else
struct stack_frame {
	unsigned long empty1[5];
	unsigned int  empty2[8];
	unsigned long gprs[10];
	unsigned long back_chain;
};
#endif

#define ARCH_MIN_TASKALIGN	8

#ifndef __s390x__
# define __SWAPPER_PG_DIR __pa(&swapper_pg_dir[0]) + _SEGMENT_TABLE
#else /* __s390x__ */
# define __SWAPPER_PG_DIR __pa(&swapper_pg_dir[0]) + _REGION_TABLE
#endif /* __s390x__ */

#define INIT_THREAD {{0,{{0},{0},{0},{0},{0},{0},{0},{0},{0},{0},	       \
			    {0},{0},{0},{0},{0},{0}}},			       \
		     {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},	       \
		     sizeof(init_stack) + (unsigned long) &init_stack,	       \
		     __SWAPPER_PG_DIR,					       \
		     {0},						       \
		     0,0,0,						       \
		     (per_struct) {{{{0,}}},0,0,0,0,{{0,}}},		       \
		     0, 0						       \
} 

/*
 * Do necessary setup to start up a new thread.
 */
#ifndef __s390x__

#define start_thread(regs, new_psw, new_stackp) do {            \
        regs->psw.mask  = PSW_USER_BITS;                        \
        regs->psw.addr  = new_psw | PSW_ADDR_AMODE;             \
        regs->gprs[15]  = new_stackp ;                          \
} while (0)

#else /* __s390x__ */

#define start_thread(regs, new_psw, new_stackp) do {            \
        regs->psw.mask  = PSW_USER_BITS;                        \
        regs->psw.addr  = new_psw;                              \
        regs->gprs[15]  = new_stackp;                           \
} while (0)

#define start_thread31(regs, new_psw, new_stackp) do {          \
	regs->psw.mask  = PSW_USER32_BITS;			\
        regs->psw.addr  = new_psw;                              \
        regs->gprs[15]  = new_stackp;                           \
} while (0)

#endif /* __s390x__ */

/* Forward declaration, a strange C thing */
struct task_struct;
struct mm_struct;

/* Free all resources held by a thread. */
extern void release_thread(struct task_struct *);
extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);

/* Prepare to copy thread state - unlazy all lazy status */
#define prepare_to_copy(tsk)	do { } while (0)

/*
 * Return saved PC of a blocked thread.
 */
extern unsigned long thread_saved_pc(struct task_struct *t);

/*
 * Print register of task into buffer. Used in fs/proc/array.c.
 */
extern char *task_show_regs(struct task_struct *task, char *buffer);

extern void show_registers(struct pt_regs *regs);
extern void show_trace(struct task_struct *task, unsigned long *sp);

unsigned long get_wchan(struct task_struct *p);
#define task_pt_regs(tsk) ((struct pt_regs *) \
        (task_stack_page(tsk) + THREAD_SIZE) - 1)
#define KSTK_EIP(tsk)	(task_pt_regs(tsk)->psw.addr)
#define KSTK_ESP(tsk)	(task_pt_regs(tsk)->gprs[15])

/*
 * Give up the time slice of the virtual PU.
 */
static inline void cpu_relax(void)
{
	if (MACHINE_HAS_DIAG44)
		asm volatile ("diag 0,0,68" : : : "memory");
	else
		barrier();
}

/*
 * Set PSW to specified value.
 */
static inline void __load_psw(psw_t psw)
{
#ifndef __s390x__
	asm volatile ("lpsw  0(%0)" : : "a" (&psw), "m" (psw) : "cc" );
#else
	asm volatile ("lpswe 0(%0)" : : "a" (&psw), "m" (psw) : "cc" );
#endif
}

/*
 * Set PSW mask to specified value, while leaving the
 * PSW addr pointing to the next instruction.
 */

static inline void __load_psw_mask (unsigned long mask)
{
	unsigned long addr;
	psw_t psw;

	psw.mask = mask;

#ifndef __s390x__
	asm volatile (
		"    basr %0,0\n"
		"0:  ahi  %0,1f-0b\n"
		"    st	  %0,4(%1)\n"
		"    lpsw 0(%1)\n"
		"1:"
		: "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc" );
#else /* __s390x__ */
	asm volatile (
		"    larl  %0,1f\n"
		"    stg   %0,8(%1)\n"
		"    lpswe 0(%1)\n"
		"1:"
		: "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc" );
#endif /* __s390x__ */
}
 
/*
 * Function to stop a processor until an interruption occurred
 */
static inline void enabled_wait(void)
{
	__load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT |
			PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY);
}

/*
 * Function to drop a processor into disabled wait state
 */

static inline void disabled_wait(unsigned long code)
{
        unsigned long ctl_buf;
        psw_t dw_psw;

        dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT;
        dw_psw.addr = code;
        /* 
         * Store status and then load disabled wait psw,
         * the processor is dead afterwards
         */
#ifndef __s390x__
        asm volatile ("    stctl 0,0,0(%2)\n"
                      "    ni    0(%2),0xef\n" /* switch off protection */
                      "    lctl  0,0,0(%2)\n"
                      "    stpt  0xd8\n"       /* store timer */
                      "    stckc 0xe0\n"       /* store clock comparator */
                      "    stpx  0x108\n"      /* store prefix register */
                      "    stam  0,15,0x120\n" /* store access registers */
                      "    std   0,0x160\n"    /* store f0 */
                      "    std   2,0x168\n"    /* store f2 */
                      "    std   4,0x170\n"    /* store f4 */
                      "    std   6,0x178\n"    /* store f6 */
                      "    stm   0,15,0x180\n" /* store general registers */
                      "    stctl 0,15,0x1c0\n" /* store control registers */
                      "    oi    0x1c0,0x10\n" /* fake protection bit */
                      "    lpsw 0(%1)"
                      : "=m" (ctl_buf)
		      : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc" );
#else /* __s390x__ */
        asm volatile ("    stctg 0,0,0(%2)\n"
                      "    ni    4(%2),0xef\n" /* switch off protection */
                      "    lctlg 0,0,0(%2)\n"
                      "    lghi  1,0x1000\n"
                      "    stpt  0x328(1)\n"      /* store timer */
                      "    stckc 0x330(1)\n"      /* store clock comparator */
                      "    stpx  0x318(1)\n"      /* store prefix register */
                      "    stam  0,15,0x340(1)\n" /* store access registers */
                      "    stfpc 0x31c(1)\n"      /* store fpu control */
                      "    std   0,0x200(1)\n"    /* store f0 */
                      "    std   1,0x208(1)\n"    /* store f1 */
                      "    std   2,0x210(1)\n"    /* store f2 */
                      "    std   3,0x218(1)\n"    /* store f3 */
                      "    std   4,0x220(1)\n"    /* store f4 */
                      "    std   5,0x228(1)\n"    /* store f5 */
                      "    std   6,0x230(1)\n"    /* store f6 */
                      "    std   7,0x238(1)\n"    /* store f7 */
                      "    std   8,0x240(1)\n"    /* store f8 */
                      "    std   9,0x248(1)\n"    /* store f9 */
                      "    std   10,0x250(1)\n"   /* store f10 */
                      "    std   11,0x258(1)\n"   /* store f11 */
                      "    std   12,0x260(1)\n"   /* store f12 */
                      "    std   13,0x268(1)\n"   /* store f13 */
                      "    std   14,0x270(1)\n"   /* store f14 */
                      "    std   15,0x278(1)\n"   /* store f15 */
                      "    stmg  0,15,0x280(1)\n" /* store general registers */
                      "    stctg 0,15,0x380(1)\n" /* store control registers */
                      "    oi    0x384(1),0x10\n" /* fake protection bit */
                      "    lpswe 0(%1)"
                      : "=m" (ctl_buf)
		      : "a" (&dw_psw), "a" (&ctl_buf),
		        "m" (dw_psw) : "cc", "0", "1");
#endif /* __s390x__ */
}

/*
 * CPU idle notifier chain.
 */
#define CPU_IDLE	0
#define CPU_NOT_IDLE	1

struct notifier_block;
int register_idle_notifier(struct notifier_block *nb);
int unregister_idle_notifier(struct notifier_block *nb);

#define ARCH_LOW_ADDRESS_LIMIT	0x7fffffffUL

#endif

/*
 * Helper macro for exception table entries
 */
#ifndef __s390x__
#define EX_TABLE(_fault,_target)			\
	".section __ex_table,\"a\"\n"			\
	"	.align 4\n"				\
	"	.long  " #_fault "," #_target "\n"	\
	".previous\n"
#else
#define EX_TABLE(_fault,_target)			\
	".section __ex_table,\"a\"\n"			\
	"	.align 8\n"				\
	"	.quad  " #_fault "," #_target "\n"	\
	".previous\n"
#endif

#endif                                 /* __ASM_S390_PROCESSOR_H           */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* include/asm-s390/processor.h
	3	*
	4	* S390 version
	5	* Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
	6	* Author(s): Hartmut Penner (hp@de.ibm.com),
	7	* Martin Schwidefsky (schwidefsky@de.ibm.com)
	8	*
	9	* Derived from "include/asm-i386/processor.h"
	10	* Copyright (C) 1994, Linus Torvalds
	11	*/
	12
	13	#ifndef __ASM_S390_PROCESSOR_H
	14	#define __ASM_S390_PROCESSOR_H
	15
	16	#include <asm/page.h>
	17	#include <asm/ptrace.h>
	18
	19	#ifdef __KERNEL__
	20	/*
	21	* Default implementation of macro that returns current
	22	* instruction pointer ("program counter").
	23	*/
	24	#define current_text_addr() ({ void *pc; __asm__("basr %0,0":"=a"(pc)); pc; })
	25
	26	/*
	27	* CPU type and hardware bug flags. Kept separately for each CPU.
	28	* Members of this structure are referenced in head.S, so think twice
	29	* before touching them. [mj]
	30	*/
	31
	32	typedef struct
	33	{
	34	unsigned int version : 8;
	35	unsigned int ident : 24;
	36	unsigned int machine : 16;
	37	unsigned int unused : 16;
	38	} __attribute__ ((packed)) cpuid_t;
	39
	40	struct cpuinfo_S390
	41	{
	42	cpuid_t cpu_id;
	43	__u16 cpu_addr;
	44	__u16 cpu_nr;
	45	unsigned long loops_per_jiffy;
	46	unsigned long *pgd_quick;
	47	#ifdef __s390x__
	48	unsigned long *pmd_quick;
	49	#endif /* __s390x__ */
	50	unsigned long *pte_quick;
	51	unsigned long pgtable_cache_sz;
	52	};
	53
	54	extern void print_cpu_info(struct cpuinfo_S390 *);
	55
	56	/* Lazy FPU handling on uni-processor */
	57	extern struct task_struct *last_task_used_math;
	58
	59	/*
	60	* User space process size: 2GB for 31 bit, 4TB for 64 bit.
	61	*/
	62	#ifndef __s390x__
	63
	64	# define TASK_SIZE (0x80000000UL)
65	# define TASK_UNMAPPED_BASE (TASK_SIZE / 2)
66	# define DEFAULT_TASK_SIZE (0x80000000UL)
67
68	#else /* __s390x__ */
69
70	# define TASK_SIZE (test_thread_flag(TIF_31BIT) ? \
71	(0x80000000UL) : (0x40000000000UL))
72	# define TASK_UNMAPPED_BASE (TASK_SIZE / 2)
73	# define DEFAULT_TASK_SIZE (0x40000000000UL)
74
75	#endif /* __s390x__ */
76
1da177e4 LT	77	#define HAVE_ARCH_PICK_MMAP_LAYOUT
	78
	79	typedef struct {
	80	__u32 ar4;
	81	} mm_segment_t;
	82
	83	/*
	84	* Thread structure
	85	*/
	86	struct thread_struct {
	87	s390_fp_regs fp_regs;
	88	unsigned int acrs[NUM_ACRS];
	89	unsigned long ksp; /* kernel stack pointer */
	90	unsigned long user_seg; /* HSTD */
	91	mm_segment_t mm_segment;
	92	unsigned long prot_addr; /* address of protection-excep. */
	93	unsigned int error_code; /* error-code of last prog-excep. */
	94	unsigned int trap_no;
	95	per_struct per_info;
	96	/* Used to give failing instruction back to user for ieee exceptions */
	97	unsigned long ieee_instruction_pointer;
	98	/* pfault_wait is used to block the process on a pfault event */
	99	unsigned long pfault_wait;
	100	};
	101
	102	typedef struct thread_struct thread_struct;
	103
	104	/*
	105	* Stack layout of a C stack frame.
	106	*/
	107	#ifndef __PACK_STACK
	108	struct stack_frame {
	109	unsigned long back_chain;
	110	unsigned long empty1[5];
	111	unsigned long gprs[10];
	112	unsigned int empty2[8];
	113	};
	114	#else
	115	struct stack_frame {
	116	unsigned long empty1[5];
	117	unsigned int empty2[8];
	118	unsigned long gprs[10];
	119	unsigned long back_chain;
	120	};
	121	#endif
	122
	123	#define ARCH_MIN_TASKALIGN 8
	124
	125	#ifndef __s390x__
	126	# define __SWAPPER_PG_DIR __pa(&swapper_pg_dir[0]) + _SEGMENT_TABLE
	127	#else /* __s390x__ */
	128	# define __SWAPPER_PG_DIR __pa(&swapper_pg_dir[0]) + _REGION_TABLE
	129	#endif /* __s390x__ */
	130
	131	#define INIT_THREAD {{0,{{0},{0},{0},{0},{0},{0},{0},{0},{0},{0}, \
	132	{0},{0},{0},{0},{0},{0}}}, \
	133	{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \
	134	sizeof(init_stack) + (unsigned long) &init_stack, \
	135	__SWAPPER_PG_DIR, \
	136	{0}, \
	137	0,0,0, \
	138	(per_struct) {{{{0,}}},0,0,0,0,{{0,}}}, \
	139	0, 0 \
	140	}
141
142	/*
143	* Do necessary setup to start up a new thread.
144	*/
145	#ifndef __s390x__
146
147	#define start_thread(regs, new_psw, new_stackp) do { \
148	regs->psw.mask = PSW_USER_BITS; \
149	regs->psw.addr = new_psw \| PSW_ADDR_AMODE; \
150	regs->gprs[15] = new_stackp ; \
151	} while (0)
152
153	#else /* __s390x__ */
154
155	#define start_thread(regs, new_psw, new_stackp) do { \
156	regs->psw.mask = PSW_USER_BITS; \
157	regs->psw.addr = new_psw; \
158	regs->gprs[15] = new_stackp; \
159	} while (0)
160
161	#define start_thread31(regs, new_psw, new_stackp) do { \
162	regs->psw.mask = PSW_USER32_BITS; \
163	regs->psw.addr = new_psw; \
164	regs->gprs[15] = new_stackp; \
165	} while (0)
166
167	#endif /* __s390x__ */
168
169	/* Forward declaration, a strange C thing */
170	struct task_struct;
171	struct mm_struct;
172
173	/* Free all resources held by a thread. */
174	extern void release_thread(struct task_struct *);
175	extern int kernel_thread(int (fn)(void ), void * arg, unsigned long flags);
176
177	/* Prepare to copy thread state - unlazy all lazy status */
178	#define prepare_to_copy(tsk) do { } while (0)
179
180	/*
181	* Return saved PC of a blocked thread.
182	*/
183	extern unsigned long thread_saved_pc(struct task_struct *t);
184
185	/*
186	* Print register of task into buffer. Used in fs/proc/array.c.
187	*/
188	extern char task_show_regs(struct task_struct task, char *buffer);
189
190	extern void show_registers(struct pt_regs *regs);
191	extern void show_trace(struct task_struct task, unsigned long sp);
192
193	unsigned long get_wchan(struct task_struct *p);
c7584fb6	194	#define task_pt_regs(tsk) ((struct pt_regs *) \
30af7120	195	(task_stack_page(tsk) + THREAD_SIZE) - 1)
c7584fb6 AV	196	#define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
c7584fb6 AV	197	#define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
1da177e4 LT	198
	199	/*
	200	* Give up the time slice of the virtual PU.
	201	*/
abdba61a HC	202	static inline void cpu_relax(void)
	203	{
	204	if (MACHINE_HAS_DIAG44)
	205	asm volatile ("diag 0,0,68" : : : "memory");
	206	else
	207	barrier();
	208	}
1da177e4	209
77fa2245 HC	210	/*
	211	* Set PSW to specified value.
	212	*/
	213	static inline void __load_psw(psw_t psw)
	214	{
	215	#ifndef __s390x__
	216	asm volatile ("lpsw 0(%0)" : : "a" (&psw), "m" (psw) : "cc" );
	217	#else
	218	asm volatile ("lpswe 0(%0)" : : "a" (&psw), "m" (psw) : "cc" );
	219	#endif
	220	}
	221
1da177e4 LT	222	/*
	223	* Set PSW mask to specified value, while leaving the
	224	* PSW addr pointing to the next instruction.
	225	*/
	226
	227	static inline void __load_psw_mask (unsigned long mask)
	228	{
	229	unsigned long addr;
1da177e4	230	psw_t psw;
77fa2245	231
1da177e4 LT	232	psw.mask = mask;
	233
	234	#ifndef __s390x__
	235	asm volatile (
	236	" basr %0,0\n"
	237	"0: ahi %0,1f-0b\n"
	238	" st %0,4(%1)\n"
	239	" lpsw 0(%1)\n"
	240	"1:"
	241	: "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc" );
	242	#else /* __s390x__ */
	243	asm volatile (
	244	" larl %0,1f\n"
	245	" stg %0,8(%1)\n"
	246	" lpswe 0(%1)\n"
	247	"1:"
	248	: "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc" );
	249	#endif /* __s390x__ */
	250	}
	251
	252	/*
	253	* Function to stop a processor until an interruption occurred
	254	*/
	255	static inline void enabled_wait(void)
	256	{
77fa2245 HC	257	__load_psw_mask(PSW_BASE_BITS \| PSW_MASK_IO \| PSW_MASK_EXT \|
77fa2245 HC	258	PSW_MASK_MCHECK \| PSW_MASK_WAIT \| PSW_DEFAULT_KEY);
1da177e4 LT	259	}
	260
	261	/*
	262	* Function to drop a processor into disabled wait state
	263	*/
	264
	265	static inline void disabled_wait(unsigned long code)
	266	{
1da177e4	267	unsigned long ctl_buf;
77fa2245	268	psw_t dw_psw;
1da177e4	269
77fa2245 HC	270	dw_psw.mask = PSW_BASE_BITS \| PSW_MASK_WAIT;
77fa2245 HC	271	dw_psw.addr = code;
1da177e4 LT	272	/*
	273	* Store status and then load disabled wait psw,
	274	* the processor is dead afterwards
	275	*/
	276	#ifndef __s390x__
	277	asm volatile (" stctl 0,0,0(%2)\n"
	278	" ni 0(%2),0xef\n" /* switch off protection */
	279	" lctl 0,0,0(%2)\n"
	280	" stpt 0xd8\n" /* store timer */
	281	" stckc 0xe0\n" /* store clock comparator */
	282	" stpx 0x108\n" /* store prefix register */
	283	" stam 0,15,0x120\n" /* store access registers */
	284	" std 0,0x160\n" /* store f0 */
	285	" std 2,0x168\n" /* store f2 */
	286	" std 4,0x170\n" /* store f4 */
	287	" std 6,0x178\n" /* store f6 */
	288	" stm 0,15,0x180\n" /* store general registers */
	289	" stctl 0,15,0x1c0\n" /* store control registers */
	290	" oi 0x1c0,0x10\n" /* fake protection bit */
	291	" lpsw 0(%1)"
	292	: "=m" (ctl_buf)
77fa2245	293	: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc" );
1da177e4 LT	294	#else /* __s390x__ */
	295	asm volatile (" stctg 0,0,0(%2)\n"
	296	" ni 4(%2),0xef\n" /* switch off protection */
	297	" lctlg 0,0,0(%2)\n"
	298	" lghi 1,0x1000\n"
	299	" stpt 0x328(1)\n" /* store timer */
	300	" stckc 0x330(1)\n" /* store clock comparator */
	301	" stpx 0x318(1)\n" /* store prefix register */
	302	" stam 0,15,0x340(1)\n" /* store access registers */
	303	" stfpc 0x31c(1)\n" /* store fpu control */
	304	" std 0,0x200(1)\n" /* store f0 */
	305	" std 1,0x208(1)\n" /* store f1 */
	306	" std 2,0x210(1)\n" /* store f2 */
	307	" std 3,0x218(1)\n" /* store f3 */
	308	" std 4,0x220(1)\n" /* store f4 */
	309	" std 5,0x228(1)\n" /* store f5 */
	310	" std 6,0x230(1)\n" /* store f6 */
	311	" std 7,0x238(1)\n" /* store f7 */
	312	" std 8,0x240(1)\n" /* store f8 */
	313	" std 9,0x248(1)\n" /* store f9 */
	314	" std 10,0x250(1)\n" /* store f10 */
	315	" std 11,0x258(1)\n" /* store f11 */
	316	" std 12,0x260(1)\n" /* store f12 */
	317	" std 13,0x268(1)\n" /* store f13 */
	318	" std 14,0x270(1)\n" /* store f14 */
	319	" std 15,0x278(1)\n" /* store f15 */
	320	" stmg 0,15,0x280(1)\n" /* store general registers */
	321	" stctg 0,15,0x380(1)\n" /* store control registers */
	322	" oi 0x384(1),0x10\n" /* fake protection bit */
	323	" lpswe 0(%1)"
	324	: "=m" (ctl_buf)
77fa2245	325	: "a" (&dw_psw), "a" (&ctl_buf),
1da177e4 LT	326	"m" (dw_psw) : "cc", "0", "1");
	327	#endif /* __s390x__ */
	328	}
	329
	330	/*
	331	* CPU idle notifier chain.
	332	*/
	333	#define CPU_IDLE 0
	334	#define CPU_NOT_IDLE 1
	335
	336	struct notifier_block;
	337	int register_idle_notifier(struct notifier_block *nb);
	338	int unregister_idle_notifier(struct notifier_block *nb);
	339
dfd54cbc HC	340	#define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
dfd54cbc HC	341
1da177e4 LT	342	#endif
1da177e4 LT	343
de1a3f1c MS	344	/*
	345	* Helper macro for exception table entries
	346	*/
	347	#ifndef __s390x__
	348	#define EX_TABLE(_fault,_target) \
	349	".section __ex_table,\"a\"\n" \
	350	" .align 4\n" \
	351	" .long " #_fault "," #_target "\n" \
	352	".previous\n"
	353	#else
	354	#define EX_TABLE(_fault,_target) \
	355	".section __ex_table,\"a\"\n" \
	356	" .align 8\n" \
	357	" .quad " #_fault "," #_target "\n" \
	358	".previous\n"
	359	#endif
	360
1da177e4	361	#endif /* __ASM_S390_PROCESSOR_H */