USB: EHCI: improve handling of the ehci->iaa_in_progress flag
[GitHub/moto-9609/android_kernel_motorola_exynos9610.git] / drivers / usb / host / ehci-hcd.c
1 /*
2 * Enhanced Host Controller Interface (EHCI) driver for USB.
3 *
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5 *
6 * Copyright (c) 2000-2004 by David Brownell
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/vmalloc.h>
31 #include <linux/errno.h>
32 #include <linux/init.h>
33 #include <linux/hrtimer.h>
34 #include <linux/list.h>
35 #include <linux/interrupt.h>
36 #include <linux/usb.h>
37 #include <linux/usb/hcd.h>
38 #include <linux/moduleparam.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/debugfs.h>
41 #include <linux/slab.h>
42
43 #include <asm/byteorder.h>
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/unaligned.h>
47
48 #if defined(CONFIG_PPC_PS3)
49 #include <asm/firmware.h>
50 #endif
51
52 /*-------------------------------------------------------------------------*/
53
54 /*
55 * EHCI hc_driver implementation ... experimental, incomplete.
56 * Based on the final 1.0 register interface specification.
57 *
58 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
59 * First was PCMCIA, like ISA; then CardBus, which is PCI.
60 * Next comes "CardBay", using USB 2.0 signals.
61 *
62 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
63 * Special thanks to Intel and VIA for providing host controllers to
64 * test this driver on, and Cypress (including In-System Design) for
65 * providing early devices for those host controllers to talk to!
66 */
67
68 #define DRIVER_AUTHOR "David Brownell"
69 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
70
71 static const char hcd_name [] = "ehci_hcd";
72
73
74 #undef EHCI_URB_TRACE
75
76 /* magic numbers that can affect system performance */
77 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
78 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
79 #define EHCI_TUNE_RL_TT 0
80 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
81 #define EHCI_TUNE_MULT_TT 1
82 /*
83 * Some drivers think it's safe to schedule isochronous transfers more than
84 * 256 ms into the future (partly as a result of an old bug in the scheduling
85 * code). In an attempt to avoid trouble, we will use a minimum scheduling
86 * length of 512 frames instead of 256.
87 */
88 #define EHCI_TUNE_FLS 1 /* (medium) 512-frame schedule */
89
90 /* Initial IRQ latency: faster than hw default */
91 static int log2_irq_thresh = 0; // 0 to 6
92 module_param (log2_irq_thresh, int, S_IRUGO);
93 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
94
95 /* initial park setting: slower than hw default */
96 static unsigned park = 0;
97 module_param (park, uint, S_IRUGO);
98 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
99
100 /* for flakey hardware, ignore overcurrent indicators */
101 static bool ignore_oc;
102 module_param (ignore_oc, bool, S_IRUGO);
103 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
104
105 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
106
107 /*-------------------------------------------------------------------------*/
108
109 #include "ehci.h"
110 #include "pci-quirks.h"
111
112 static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
113 struct ehci_tt *tt);
114
115 /*
116 * The MosChip MCS9990 controller updates its microframe counter
117 * a little before the frame counter, and occasionally we will read
118 * the invalid intermediate value. Avoid problems by checking the
119 * microframe number (the low-order 3 bits); if they are 0 then
120 * re-read the register to get the correct value.
121 */
122 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
123 {
124 unsigned uf;
125
126 uf = ehci_readl(ehci, &ehci->regs->frame_index);
127 if (unlikely((uf & 7) == 0))
128 uf = ehci_readl(ehci, &ehci->regs->frame_index);
129 return uf;
130 }
131
132 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
133 {
134 if (ehci->frame_index_bug)
135 return ehci_moschip_read_frame_index(ehci);
136 return ehci_readl(ehci, &ehci->regs->frame_index);
137 }
138
139 #include "ehci-dbg.c"
140
141 /*-------------------------------------------------------------------------*/
142
143 /*
144 * ehci_handshake - spin reading hc until handshake completes or fails
145 * @ptr: address of hc register to be read
146 * @mask: bits to look at in result of read
147 * @done: value of those bits when handshake succeeds
148 * @usec: timeout in microseconds
149 *
150 * Returns negative errno, or zero on success
151 *
152 * Success happens when the "mask" bits have the specified value (hardware
153 * handshake done). There are two failure modes: "usec" have passed (major
154 * hardware flakeout), or the register reads as all-ones (hardware removed).
155 *
156 * That last failure should_only happen in cases like physical cardbus eject
157 * before driver shutdown. But it also seems to be caused by bugs in cardbus
158 * bridge shutdown: shutting down the bridge before the devices using it.
159 */
160 int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
161 u32 mask, u32 done, int usec)
162 {
163 u32 result;
164
165 do {
166 result = ehci_readl(ehci, ptr);
167 if (result == ~(u32)0) /* card removed */
168 return -ENODEV;
169 result &= mask;
170 if (result == done)
171 return 0;
172 udelay (1);
173 usec--;
174 } while (usec > 0);
175 return -ETIMEDOUT;
176 }
177 EXPORT_SYMBOL_GPL(ehci_handshake);
178
179 /* check TDI/ARC silicon is in host mode */
180 static int tdi_in_host_mode (struct ehci_hcd *ehci)
181 {
182 u32 tmp;
183
184 tmp = ehci_readl(ehci, &ehci->regs->usbmode);
185 return (tmp & 3) == USBMODE_CM_HC;
186 }
187
188 /*
189 * Force HC to halt state from unknown (EHCI spec section 2.3).
190 * Must be called with interrupts enabled and the lock not held.
191 */
192 static int ehci_halt (struct ehci_hcd *ehci)
193 {
194 u32 temp;
195
196 spin_lock_irq(&ehci->lock);
197
198 /* disable any irqs left enabled by previous code */
199 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
200
201 if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
202 spin_unlock_irq(&ehci->lock);
203 return 0;
204 }
205
206 /*
207 * This routine gets called during probe before ehci->command
208 * has been initialized, so we can't rely on its value.
209 */
210 ehci->command &= ~CMD_RUN;
211 temp = ehci_readl(ehci, &ehci->regs->command);
212 temp &= ~(CMD_RUN | CMD_IAAD);
213 ehci_writel(ehci, temp, &ehci->regs->command);
214
215 spin_unlock_irq(&ehci->lock);
216 synchronize_irq(ehci_to_hcd(ehci)->irq);
217
218 return ehci_handshake(ehci, &ehci->regs->status,
219 STS_HALT, STS_HALT, 16 * 125);
220 }
221
222 /* put TDI/ARC silicon into EHCI mode */
223 static void tdi_reset (struct ehci_hcd *ehci)
224 {
225 u32 tmp;
226
227 tmp = ehci_readl(ehci, &ehci->regs->usbmode);
228 tmp |= USBMODE_CM_HC;
229 /* The default byte access to MMR space is LE after
230 * controller reset. Set the required endian mode
231 * for transfer buffers to match the host microprocessor
232 */
233 if (ehci_big_endian_mmio(ehci))
234 tmp |= USBMODE_BE;
235 ehci_writel(ehci, tmp, &ehci->regs->usbmode);
236 }
237
238 /*
239 * Reset a non-running (STS_HALT == 1) controller.
240 * Must be called with interrupts enabled and the lock not held.
241 */
242 int ehci_reset(struct ehci_hcd *ehci)
243 {
244 int retval;
245 u32 command = ehci_readl(ehci, &ehci->regs->command);
246
247 /* If the EHCI debug controller is active, special care must be
248 * taken before and after a host controller reset */
249 if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
250 ehci->debug = NULL;
251
252 command |= CMD_RESET;
253 dbg_cmd (ehci, "reset", command);
254 ehci_writel(ehci, command, &ehci->regs->command);
255 ehci->rh_state = EHCI_RH_HALTED;
256 ehci->next_statechange = jiffies;
257 retval = ehci_handshake(ehci, &ehci->regs->command,
258 CMD_RESET, 0, 250 * 1000);
259
260 if (ehci->has_hostpc) {
261 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
262 &ehci->regs->usbmode_ex);
263 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
264 }
265 if (retval)
266 return retval;
267
268 if (ehci_is_TDI(ehci))
269 tdi_reset (ehci);
270
271 if (ehci->debug)
272 dbgp_external_startup(ehci_to_hcd(ehci));
273
274 ehci->port_c_suspend = ehci->suspended_ports =
275 ehci->resuming_ports = 0;
276 return retval;
277 }
278 EXPORT_SYMBOL_GPL(ehci_reset);
279
280 /*
281 * Idle the controller (turn off the schedules).
282 * Must be called with interrupts enabled and the lock not held.
283 */
284 static void ehci_quiesce (struct ehci_hcd *ehci)
285 {
286 u32 temp;
287
288 if (ehci->rh_state != EHCI_RH_RUNNING)
289 return;
290
291 /* wait for any schedule enables/disables to take effect */
292 temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
293 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
294 16 * 125);
295
296 /* then disable anything that's still active */
297 spin_lock_irq(&ehci->lock);
298 ehci->command &= ~(CMD_ASE | CMD_PSE);
299 ehci_writel(ehci, ehci->command, &ehci->regs->command);
300 spin_unlock_irq(&ehci->lock);
301
302 /* hardware can take 16 microframes to turn off ... */
303 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
304 16 * 125);
305 }
306
307 /*-------------------------------------------------------------------------*/
308
309 static void end_iaa_cycle(struct ehci_hcd *ehci);
310 static void end_unlink_async(struct ehci_hcd *ehci);
311 static void unlink_empty_async(struct ehci_hcd *ehci);
312 static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
313 static void ehci_work(struct ehci_hcd *ehci);
314 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
315 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
316 static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable);
317
318 #include "ehci-timer.c"
319 #include "ehci-hub.c"
320 #include "ehci-mem.c"
321 #include "ehci-q.c"
322 #include "ehci-sched.c"
323 #include "ehci-sysfs.c"
324
325 /*-------------------------------------------------------------------------*/
326
327 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
328 * The firmware seems to think that powering off is a wakeup event!
329 * This routine turns off remote wakeup and everything else, on all ports.
330 */
331 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
332 {
333 int port = HCS_N_PORTS(ehci->hcs_params);
334
335 while (port--) {
336 ehci_writel(ehci, PORT_RWC_BITS,
337 &ehci->regs->port_status[port]);
338 spin_unlock_irq(&ehci->lock);
339 ehci_port_power(ehci, port, false);
340 spin_lock_irq(&ehci->lock);
341 }
342 }
343
344 /*
345 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
346 * Must be called with interrupts enabled and the lock not held.
347 */
348 static void ehci_silence_controller(struct ehci_hcd *ehci)
349 {
350 ehci_halt(ehci);
351
352 spin_lock_irq(&ehci->lock);
353 ehci->rh_state = EHCI_RH_HALTED;
354 ehci_turn_off_all_ports(ehci);
355
356 /* make BIOS/etc use companion controller during reboot */
357 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
358
359 /* unblock posted writes */
360 ehci_readl(ehci, &ehci->regs->configured_flag);
361 spin_unlock_irq(&ehci->lock);
362 }
363
364 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
365 * This forcibly disables dma and IRQs, helping kexec and other cases
366 * where the next system software may expect clean state.
367 */
368 static void ehci_shutdown(struct usb_hcd *hcd)
369 {
370 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
371
372 spin_lock_irq(&ehci->lock);
373 ehci->shutdown = true;
374 ehci->rh_state = EHCI_RH_STOPPING;
375 ehci->enabled_hrtimer_events = 0;
376 spin_unlock_irq(&ehci->lock);
377
378 ehci_silence_controller(ehci);
379
380 hrtimer_cancel(&ehci->hrtimer);
381 }
382
383 /*-------------------------------------------------------------------------*/
384
385 /*
386 * ehci_work is called from some interrupts, timers, and so on.
387 * it calls driver completion functions, after dropping ehci->lock.
388 */
389 static void ehci_work (struct ehci_hcd *ehci)
390 {
391 /* another CPU may drop ehci->lock during a schedule scan while
392 * it reports urb completions. this flag guards against bogus
393 * attempts at re-entrant schedule scanning.
394 */
395 if (ehci->scanning) {
396 ehci->need_rescan = true;
397 return;
398 }
399 ehci->scanning = true;
400
401 rescan:
402 ehci->need_rescan = false;
403 if (ehci->async_count)
404 scan_async(ehci);
405 if (ehci->intr_count > 0)
406 scan_intr(ehci);
407 if (ehci->isoc_count > 0)
408 scan_isoc(ehci);
409 if (ehci->need_rescan)
410 goto rescan;
411 ehci->scanning = false;
412
413 /* the IO watchdog guards against hardware or driver bugs that
414 * misplace IRQs, and should let us run completely without IRQs.
415 * such lossage has been observed on both VT6202 and VT8235.
416 */
417 turn_on_io_watchdog(ehci);
418 }
419
420 /*
421 * Called when the ehci_hcd module is removed.
422 */
423 static void ehci_stop (struct usb_hcd *hcd)
424 {
425 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
426
427 ehci_dbg (ehci, "stop\n");
428
429 /* no more interrupts ... */
430
431 spin_lock_irq(&ehci->lock);
432 ehci->enabled_hrtimer_events = 0;
433 spin_unlock_irq(&ehci->lock);
434
435 ehci_quiesce(ehci);
436 ehci_silence_controller(ehci);
437 ehci_reset (ehci);
438
439 hrtimer_cancel(&ehci->hrtimer);
440 remove_sysfs_files(ehci);
441 remove_debug_files (ehci);
442
443 /* root hub is shut down separately (first, when possible) */
444 spin_lock_irq (&ehci->lock);
445 end_free_itds(ehci);
446 spin_unlock_irq (&ehci->lock);
447 ehci_mem_cleanup (ehci);
448
449 if (ehci->amd_pll_fix == 1)
450 usb_amd_dev_put();
451
452 dbg_status (ehci, "ehci_stop completed",
453 ehci_readl(ehci, &ehci->regs->status));
454 }
455
456 /* one-time init, only for memory state */
457 static int ehci_init(struct usb_hcd *hcd)
458 {
459 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
460 u32 temp;
461 int retval;
462 u32 hcc_params;
463 struct ehci_qh_hw *hw;
464
465 spin_lock_init(&ehci->lock);
466
467 /*
468 * keep io watchdog by default, those good HCDs could turn off it later
469 */
470 ehci->need_io_watchdog = 1;
471
472 hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
473 ehci->hrtimer.function = ehci_hrtimer_func;
474 ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
475
476 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
477
478 /*
479 * by default set standard 80% (== 100 usec/uframe) max periodic
480 * bandwidth as required by USB 2.0
481 */
482 ehci->uframe_periodic_max = 100;
483
484 /*
485 * hw default: 1K periodic list heads, one per frame.
486 * periodic_size can shrink by USBCMD update if hcc_params allows.
487 */
488 ehci->periodic_size = DEFAULT_I_TDPS;
489 INIT_LIST_HEAD(&ehci->async_unlink);
490 INIT_LIST_HEAD(&ehci->async_idle);
491 INIT_LIST_HEAD(&ehci->intr_unlink_wait);
492 INIT_LIST_HEAD(&ehci->intr_unlink);
493 INIT_LIST_HEAD(&ehci->intr_qh_list);
494 INIT_LIST_HEAD(&ehci->cached_itd_list);
495 INIT_LIST_HEAD(&ehci->cached_sitd_list);
496 INIT_LIST_HEAD(&ehci->tt_list);
497
498 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
499 /* periodic schedule size can be smaller than default */
500 switch (EHCI_TUNE_FLS) {
501 case 0: ehci->periodic_size = 1024; break;
502 case 1: ehci->periodic_size = 512; break;
503 case 2: ehci->periodic_size = 256; break;
504 default: BUG();
505 }
506 }
507 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
508 return retval;
509
510 /* controllers may cache some of the periodic schedule ... */
511 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
512 ehci->i_thresh = 0;
513 else // N microframes cached
514 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
515
516 /*
517 * dedicate a qh for the async ring head, since we couldn't unlink
518 * a 'real' qh without stopping the async schedule [4.8]. use it
519 * as the 'reclamation list head' too.
520 * its dummy is used in hw_alt_next of many tds, to prevent the qh
521 * from automatically advancing to the next td after short reads.
522 */
523 ehci->async->qh_next.qh = NULL;
524 hw = ehci->async->hw;
525 hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
526 hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
527 #if defined(CONFIG_PPC_PS3)
528 hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
529 #endif
530 hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
531 hw->hw_qtd_next = EHCI_LIST_END(ehci);
532 ehci->async->qh_state = QH_STATE_LINKED;
533 hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
534
535 /* clear interrupt enables, set irq latency */
536 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
537 log2_irq_thresh = 0;
538 temp = 1 << (16 + log2_irq_thresh);
539 if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
540 ehci->has_ppcd = 1;
541 ehci_dbg(ehci, "enable per-port change event\n");
542 temp |= CMD_PPCEE;
543 }
544 if (HCC_CANPARK(hcc_params)) {
545 /* HW default park == 3, on hardware that supports it (like
546 * NVidia and ALI silicon), maximizes throughput on the async
547 * schedule by avoiding QH fetches between transfers.
548 *
549 * With fast usb storage devices and NForce2, "park" seems to
550 * make problems: throughput reduction (!), data errors...
551 */
552 if (park) {
553 park = min(park, (unsigned) 3);
554 temp |= CMD_PARK;
555 temp |= park << 8;
556 }
557 ehci_dbg(ehci, "park %d\n", park);
558 }
559 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
560 /* periodic schedule size can be smaller than default */
561 temp &= ~(3 << 2);
562 temp |= (EHCI_TUNE_FLS << 2);
563 }
564 ehci->command = temp;
565
566 /* Accept arbitrarily long scatter-gather lists */
567 if (!(hcd->driver->flags & HCD_LOCAL_MEM))
568 hcd->self.sg_tablesize = ~0;
569 return 0;
570 }
571
572 /* start HC running; it's halted, ehci_init() has been run (once) */
573 static int ehci_run (struct usb_hcd *hcd)
574 {
575 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
576 u32 temp;
577 u32 hcc_params;
578
579 hcd->uses_new_polling = 1;
580
581 /* EHCI spec section 4.1 */
582
583 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
584 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
585
586 /*
587 * hcc_params controls whether ehci->regs->segment must (!!!)
588 * be used; it constrains QH/ITD/SITD and QTD locations.
589 * pci_pool consistent memory always uses segment zero.
590 * streaming mappings for I/O buffers, like pci_map_single(),
591 * can return segments above 4GB, if the device allows.
592 *
593 * NOTE: the dma mask is visible through dev->dma_mask, so
594 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
595 * Scsi_Host.highmem_io, and so forth. It's readonly to all
596 * host side drivers though.
597 */
598 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
599 if (HCC_64BIT_ADDR(hcc_params)) {
600 ehci_writel(ehci, 0, &ehci->regs->segment);
601 #if 0
602 // this is deeply broken on almost all architectures
603 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
604 ehci_info(ehci, "enabled 64bit DMA\n");
605 #endif
606 }
607
608
609 // Philips, Intel, and maybe others need CMD_RUN before the
610 // root hub will detect new devices (why?); NEC doesn't
611 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
612 ehci->command |= CMD_RUN;
613 ehci_writel(ehci, ehci->command, &ehci->regs->command);
614 dbg_cmd (ehci, "init", ehci->command);
615
616 /*
617 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
618 * are explicitly handed to companion controller(s), so no TT is
619 * involved with the root hub. (Except where one is integrated,
620 * and there's no companion controller unless maybe for USB OTG.)
621 *
622 * Turning on the CF flag will transfer ownership of all ports
623 * from the companions to the EHCI controller. If any of the
624 * companions are in the middle of a port reset at the time, it
625 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
626 * guarantees that no resets are in progress. After we set CF,
627 * a short delay lets the hardware catch up; new resets shouldn't
628 * be started before the port switching actions could complete.
629 */
630 down_write(&ehci_cf_port_reset_rwsem);
631 ehci->rh_state = EHCI_RH_RUNNING;
632 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
633 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
634 msleep(5);
635 up_write(&ehci_cf_port_reset_rwsem);
636 ehci->last_periodic_enable = ktime_get_real();
637
638 temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
639 ehci_info (ehci,
640 "USB %x.%x started, EHCI %x.%02x%s\n",
641 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
642 temp >> 8, temp & 0xff,
643 ignore_oc ? ", overcurrent ignored" : "");
644
645 ehci_writel(ehci, INTR_MASK,
646 &ehci->regs->intr_enable); /* Turn On Interrupts */
647
648 /* GRR this is run-once init(), being done every time the HC starts.
649 * So long as they're part of class devices, we can't do it init()
650 * since the class device isn't created that early.
651 */
652 create_debug_files(ehci);
653 create_sysfs_files(ehci);
654
655 return 0;
656 }
657
658 int ehci_setup(struct usb_hcd *hcd)
659 {
660 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
661 int retval;
662
663 ehci->regs = (void __iomem *)ehci->caps +
664 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
665 dbg_hcs_params(ehci, "reset");
666 dbg_hcc_params(ehci, "reset");
667
668 /* cache this readonly data; minimize chip reads */
669 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
670
671 ehci->sbrn = HCD_USB2;
672
673 /* data structure init */
674 retval = ehci_init(hcd);
675 if (retval)
676 return retval;
677
678 retval = ehci_halt(ehci);
679 if (retval) {
680 ehci_mem_cleanup(ehci);
681 return retval;
682 }
683
684 ehci_reset(ehci);
685
686 return 0;
687 }
688 EXPORT_SYMBOL_GPL(ehci_setup);
689
690 /*-------------------------------------------------------------------------*/
691
692 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
693 {
694 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
695 u32 status, masked_status, pcd_status = 0, cmd;
696 int bh;
697 unsigned long flags;
698
699 /*
700 * For threadirqs option we use spin_lock_irqsave() variant to prevent
701 * deadlock with ehci hrtimer callback, because hrtimer callbacks run
702 * in interrupt context even when threadirqs is specified. We can go
703 * back to spin_lock() variant when hrtimer callbacks become threaded.
704 */
705 spin_lock_irqsave(&ehci->lock, flags);
706
707 status = ehci_readl(ehci, &ehci->regs->status);
708
709 /* e.g. cardbus physical eject */
710 if (status == ~(u32) 0) {
711 ehci_dbg (ehci, "device removed\n");
712 goto dead;
713 }
714
715 /*
716 * We don't use STS_FLR, but some controllers don't like it to
717 * remain on, so mask it out along with the other status bits.
718 */
719 masked_status = status & (INTR_MASK | STS_FLR);
720
721 /* Shared IRQ? */
722 if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
723 spin_unlock_irqrestore(&ehci->lock, flags);
724 return IRQ_NONE;
725 }
726
727 /* clear (just) interrupts */
728 ehci_writel(ehci, masked_status, &ehci->regs->status);
729 cmd = ehci_readl(ehci, &ehci->regs->command);
730 bh = 0;
731
732 /* normal [4.15.1.2] or error [4.15.1.1] completion */
733 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
734 if (likely ((status & STS_ERR) == 0))
735 COUNT (ehci->stats.normal);
736 else
737 COUNT (ehci->stats.error);
738 bh = 1;
739 }
740
741 /* complete the unlinking of some qh [4.15.2.3] */
742 if (status & STS_IAA) {
743
744 /* Turn off the IAA watchdog */
745 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
746
747 /*
748 * Mild optimization: Allow another IAAD to reset the
749 * hrtimer, if one occurs before the next expiration.
750 * In theory we could always cancel the hrtimer, but
751 * tests show that about half the time it will be reset
752 * for some other event anyway.
753 */
754 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
755 ++ehci->next_hrtimer_event;
756
757 /* guard against (alleged) silicon errata */
758 if (cmd & CMD_IAAD)
759 ehci_dbg(ehci, "IAA with IAAD still set?\n");
760 if (ehci->iaa_in_progress)
761 COUNT(ehci->stats.iaa);
762 end_iaa_cycle(ehci);
763 }
764
765 /* remote wakeup [4.3.1] */
766 if (status & STS_PCD) {
767 unsigned i = HCS_N_PORTS (ehci->hcs_params);
768 u32 ppcd = ~0;
769
770 /* kick root hub later */
771 pcd_status = status;
772
773 /* resume root hub? */
774 if (ehci->rh_state == EHCI_RH_SUSPENDED)
775 usb_hcd_resume_root_hub(hcd);
776
777 /* get per-port change detect bits */
778 if (ehci->has_ppcd)
779 ppcd = status >> 16;
780
781 while (i--) {
782 int pstatus;
783
784 /* leverage per-port change bits feature */
785 if (!(ppcd & (1 << i)))
786 continue;
787 pstatus = ehci_readl(ehci,
788 &ehci->regs->port_status[i]);
789
790 if (pstatus & PORT_OWNER)
791 continue;
792 if (!(test_bit(i, &ehci->suspended_ports) &&
793 ((pstatus & PORT_RESUME) ||
794 !(pstatus & PORT_SUSPEND)) &&
795 (pstatus & PORT_PE) &&
796 ehci->reset_done[i] == 0))
797 continue;
798
799 /* start USB_RESUME_TIMEOUT msec resume signaling from
800 * this port, and make hub_wq collect
801 * PORT_STAT_C_SUSPEND to stop that signaling.
802 */
803 ehci->reset_done[i] = jiffies +
804 msecs_to_jiffies(USB_RESUME_TIMEOUT);
805 set_bit(i, &ehci->resuming_ports);
806 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
807 usb_hcd_start_port_resume(&hcd->self, i);
808 mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
809 }
810 }
811
812 /* PCI errors [4.15.2.4] */
813 if (unlikely ((status & STS_FATAL) != 0)) {
814 ehci_err(ehci, "fatal error\n");
815 dbg_cmd(ehci, "fatal", cmd);
816 dbg_status(ehci, "fatal", status);
817 dead:
818 usb_hc_died(hcd);
819
820 /* Don't let the controller do anything more */
821 ehci->shutdown = true;
822 ehci->rh_state = EHCI_RH_STOPPING;
823 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
824 ehci_writel(ehci, ehci->command, &ehci->regs->command);
825 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
826 ehci_handle_controller_death(ehci);
827
828 /* Handle completions when the controller stops */
829 bh = 0;
830 }
831
832 if (bh)
833 ehci_work (ehci);
834 spin_unlock_irqrestore(&ehci->lock, flags);
835 if (pcd_status)
836 usb_hcd_poll_rh_status(hcd);
837 return IRQ_HANDLED;
838 }
839
840 /*-------------------------------------------------------------------------*/
841
842 /*
843 * non-error returns are a promise to giveback() the urb later
844 * we drop ownership so next owner (or urb unlink) can get it
845 *
846 * urb + dev is in hcd.self.controller.urb_list
847 * we're queueing TDs onto software and hardware lists
848 *
849 * hcd-specific init for hcpriv hasn't been done yet
850 *
851 * NOTE: control, bulk, and interrupt share the same code to append TDs
852 * to a (possibly active) QH, and the same QH scanning code.
853 */
854 static int ehci_urb_enqueue (
855 struct usb_hcd *hcd,
856 struct urb *urb,
857 gfp_t mem_flags
858 ) {
859 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
860 struct list_head qtd_list;
861
862 INIT_LIST_HEAD (&qtd_list);
863
864 switch (usb_pipetype (urb->pipe)) {
865 case PIPE_CONTROL:
866 /* qh_completions() code doesn't handle all the fault cases
867 * in multi-TD control transfers. Even 1KB is rare anyway.
868 */
869 if (urb->transfer_buffer_length > (16 * 1024))
870 return -EMSGSIZE;
871 /* FALLTHROUGH */
872 /* case PIPE_BULK: */
873 default:
874 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
875 return -ENOMEM;
876 return submit_async(ehci, urb, &qtd_list, mem_flags);
877
878 case PIPE_INTERRUPT:
879 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
880 return -ENOMEM;
881 return intr_submit(ehci, urb, &qtd_list, mem_flags);
882
883 case PIPE_ISOCHRONOUS:
884 if (urb->dev->speed == USB_SPEED_HIGH)
885 return itd_submit (ehci, urb, mem_flags);
886 else
887 return sitd_submit (ehci, urb, mem_flags);
888 }
889 }
890
891 /* remove from hardware lists
892 * completions normally happen asynchronously
893 */
894
895 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
896 {
897 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
898 struct ehci_qh *qh;
899 unsigned long flags;
900 int rc;
901
902 spin_lock_irqsave (&ehci->lock, flags);
903 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
904 if (rc)
905 goto done;
906
907 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
908 /*
909 * We don't expedite dequeue for isochronous URBs.
910 * Just wait until they complete normally or their
911 * time slot expires.
912 */
913 } else {
914 qh = (struct ehci_qh *) urb->hcpriv;
915 qh->unlink_reason |= QH_UNLINK_REQUESTED;
916 switch (qh->qh_state) {
917 case QH_STATE_LINKED:
918 if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
919 start_unlink_intr(ehci, qh);
920 else
921 start_unlink_async(ehci, qh);
922 break;
923 case QH_STATE_COMPLETING:
924 qh->dequeue_during_giveback = 1;
925 break;
926 case QH_STATE_UNLINK:
927 case QH_STATE_UNLINK_WAIT:
928 /* already started */
929 break;
930 case QH_STATE_IDLE:
931 /* QH might be waiting for a Clear-TT-Buffer */
932 qh_completions(ehci, qh);
933 break;
934 }
935 }
936 done:
937 spin_unlock_irqrestore (&ehci->lock, flags);
938 return rc;
939 }
940
941 /*-------------------------------------------------------------------------*/
942
943 // bulk qh holds the data toggle
944
945 static void
946 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
947 {
948 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
949 unsigned long flags;
950 struct ehci_qh *qh;
951
952 /* ASSERT: any requests/urbs are being unlinked */
953 /* ASSERT: nobody can be submitting urbs for this any more */
954
955 rescan:
956 spin_lock_irqsave (&ehci->lock, flags);
957 qh = ep->hcpriv;
958 if (!qh)
959 goto done;
960
961 /* endpoints can be iso streams. for now, we don't
962 * accelerate iso completions ... so spin a while.
963 */
964 if (qh->hw == NULL) {
965 struct ehci_iso_stream *stream = ep->hcpriv;
966
967 if (!list_empty(&stream->td_list))
968 goto idle_timeout;
969
970 /* BUG_ON(!list_empty(&stream->free_list)); */
971 reserve_release_iso_bandwidth(ehci, stream, -1);
972 kfree(stream);
973 goto done;
974 }
975
976 qh->unlink_reason |= QH_UNLINK_REQUESTED;
977 switch (qh->qh_state) {
978 case QH_STATE_LINKED:
979 if (list_empty(&qh->qtd_list))
980 qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
981 else
982 WARN_ON(1);
983 if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
984 start_unlink_async(ehci, qh);
985 else
986 start_unlink_intr(ehci, qh);
987 /* FALL THROUGH */
988 case QH_STATE_COMPLETING: /* already in unlinking */
989 case QH_STATE_UNLINK: /* wait for hw to finish? */
990 case QH_STATE_UNLINK_WAIT:
991 idle_timeout:
992 spin_unlock_irqrestore (&ehci->lock, flags);
993 schedule_timeout_uninterruptible(1);
994 goto rescan;
995 case QH_STATE_IDLE: /* fully unlinked */
996 if (qh->clearing_tt)
997 goto idle_timeout;
998 if (list_empty (&qh->qtd_list)) {
999 if (qh->ps.bw_uperiod)
1000 reserve_release_intr_bandwidth(ehci, qh, -1);
1001 qh_destroy(ehci, qh);
1002 break;
1003 }
1004 /* else FALL THROUGH */
1005 default:
1006 /* caller was supposed to have unlinked any requests;
1007 * that's not our job. just leak this memory.
1008 */
1009 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1010 qh, ep->desc.bEndpointAddress, qh->qh_state,
1011 list_empty (&qh->qtd_list) ? "" : "(has tds)");
1012 break;
1013 }
1014 done:
1015 ep->hcpriv = NULL;
1016 spin_unlock_irqrestore (&ehci->lock, flags);
1017 }
1018
1019 static void
1020 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1021 {
1022 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1023 struct ehci_qh *qh;
1024 int eptype = usb_endpoint_type(&ep->desc);
1025 int epnum = usb_endpoint_num(&ep->desc);
1026 int is_out = usb_endpoint_dir_out(&ep->desc);
1027 unsigned long flags;
1028
1029 if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1030 return;
1031
1032 spin_lock_irqsave(&ehci->lock, flags);
1033 qh = ep->hcpriv;
1034
1035 /* For Bulk and Interrupt endpoints we maintain the toggle state
1036 * in the hardware; the toggle bits in udev aren't used at all.
1037 * When an endpoint is reset by usb_clear_halt() we must reset
1038 * the toggle bit in the QH.
1039 */
1040 if (qh) {
1041 if (!list_empty(&qh->qtd_list)) {
1042 WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1043 } else {
1044 /* The toggle value in the QH can't be updated
1045 * while the QH is active. Unlink it now;
1046 * re-linking will call qh_refresh().
1047 */
1048 usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1049 qh->unlink_reason |= QH_UNLINK_REQUESTED;
1050 if (eptype == USB_ENDPOINT_XFER_BULK)
1051 start_unlink_async(ehci, qh);
1052 else
1053 start_unlink_intr(ehci, qh);
1054 }
1055 }
1056 spin_unlock_irqrestore(&ehci->lock, flags);
1057 }
1058
1059 static int ehci_get_frame (struct usb_hcd *hcd)
1060 {
1061 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
1062 return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1063 }
1064
1065 /*-------------------------------------------------------------------------*/
1066
1067 /* Device addition and removal */
1068
1069 static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev)
1070 {
1071 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1072
1073 spin_lock_irq(&ehci->lock);
1074 drop_tt(udev);
1075 spin_unlock_irq(&ehci->lock);
1076 }
1077
1078 /*-------------------------------------------------------------------------*/
1079
1080 #ifdef CONFIG_PM
1081
1082 /* suspend/resume, section 4.3 */
1083
1084 /* These routines handle the generic parts of controller suspend/resume */
1085
1086 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1087 {
1088 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1089
1090 if (time_before(jiffies, ehci->next_statechange))
1091 msleep(10);
1092
1093 /*
1094 * Root hub was already suspended. Disable IRQ emission and
1095 * mark HW unaccessible. The PM and USB cores make sure that
1096 * the root hub is either suspended or stopped.
1097 */
1098 ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1099
1100 spin_lock_irq(&ehci->lock);
1101 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1102 (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1103
1104 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1105 spin_unlock_irq(&ehci->lock);
1106
1107 synchronize_irq(hcd->irq);
1108
1109 /* Check for race with a wakeup request */
1110 if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1111 ehci_resume(hcd, false);
1112 return -EBUSY;
1113 }
1114
1115 return 0;
1116 }
1117 EXPORT_SYMBOL_GPL(ehci_suspend);
1118
1119 /* Returns 0 if power was preserved, 1 if power was lost */
1120 int ehci_resume(struct usb_hcd *hcd, bool force_reset)
1121 {
1122 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1123
1124 if (time_before(jiffies, ehci->next_statechange))
1125 msleep(100);
1126
1127 /* Mark hardware accessible again as we are back to full power by now */
1128 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1129
1130 if (ehci->shutdown)
1131 return 0; /* Controller is dead */
1132
1133 /*
1134 * If CF is still set and reset isn't forced
1135 * then we maintained suspend power.
1136 * Just undo the effect of ehci_suspend().
1137 */
1138 if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1139 !force_reset) {
1140 int mask = INTR_MASK;
1141
1142 ehci_prepare_ports_for_controller_resume(ehci);
1143
1144 spin_lock_irq(&ehci->lock);
1145 if (ehci->shutdown)
1146 goto skip;
1147
1148 if (!hcd->self.root_hub->do_remote_wakeup)
1149 mask &= ~STS_PCD;
1150 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1151 ehci_readl(ehci, &ehci->regs->intr_enable);
1152 skip:
1153 spin_unlock_irq(&ehci->lock);
1154 return 0;
1155 }
1156
1157 /*
1158 * Else reset, to cope with power loss or resume from hibernation
1159 * having let the firmware kick in during reboot.
1160 */
1161 usb_root_hub_lost_power(hcd->self.root_hub);
1162 (void) ehci_halt(ehci);
1163 (void) ehci_reset(ehci);
1164
1165 spin_lock_irq(&ehci->lock);
1166 if (ehci->shutdown)
1167 goto skip;
1168
1169 ehci_writel(ehci, ehci->command, &ehci->regs->command);
1170 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1171 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1172
1173 ehci->rh_state = EHCI_RH_SUSPENDED;
1174 spin_unlock_irq(&ehci->lock);
1175
1176 return 1;
1177 }
1178 EXPORT_SYMBOL_GPL(ehci_resume);
1179
1180 #endif
1181
1182 /*-------------------------------------------------------------------------*/
1183
1184 /*
1185 * Generic structure: This gets copied for platform drivers so that
1186 * individual entries can be overridden as needed.
1187 */
1188
1189 static const struct hc_driver ehci_hc_driver = {
1190 .description = hcd_name,
1191 .product_desc = "EHCI Host Controller",
1192 .hcd_priv_size = sizeof(struct ehci_hcd),
1193
1194 /*
1195 * generic hardware linkage
1196 */
1197 .irq = ehci_irq,
1198 .flags = HCD_MEMORY | HCD_USB2 | HCD_BH,
1199
1200 /*
1201 * basic lifecycle operations
1202 */
1203 .reset = ehci_setup,
1204 .start = ehci_run,
1205 .stop = ehci_stop,
1206 .shutdown = ehci_shutdown,
1207
1208 /*
1209 * managing i/o requests and associated device resources
1210 */
1211 .urb_enqueue = ehci_urb_enqueue,
1212 .urb_dequeue = ehci_urb_dequeue,
1213 .endpoint_disable = ehci_endpoint_disable,
1214 .endpoint_reset = ehci_endpoint_reset,
1215 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
1216
1217 /*
1218 * scheduling support
1219 */
1220 .get_frame_number = ehci_get_frame,
1221
1222 /*
1223 * root hub support
1224 */
1225 .hub_status_data = ehci_hub_status_data,
1226 .hub_control = ehci_hub_control,
1227 .bus_suspend = ehci_bus_suspend,
1228 .bus_resume = ehci_bus_resume,
1229 .relinquish_port = ehci_relinquish_port,
1230 .port_handed_over = ehci_port_handed_over,
1231
1232 /*
1233 * device support
1234 */
1235 .free_dev = ehci_remove_device,
1236 };
1237
1238 void ehci_init_driver(struct hc_driver *drv,
1239 const struct ehci_driver_overrides *over)
1240 {
1241 /* Copy the generic table to drv and then apply the overrides */
1242 *drv = ehci_hc_driver;
1243
1244 if (over) {
1245 drv->hcd_priv_size += over->extra_priv_size;
1246 if (over->reset)
1247 drv->reset = over->reset;
1248 if (over->port_power)
1249 drv->port_power = over->port_power;
1250 }
1251 }
1252 EXPORT_SYMBOL_GPL(ehci_init_driver);
1253
1254 /*-------------------------------------------------------------------------*/
1255
1256 MODULE_DESCRIPTION(DRIVER_DESC);
1257 MODULE_AUTHOR (DRIVER_AUTHOR);
1258 MODULE_LICENSE ("GPL");
1259
1260 #ifdef CONFIG_USB_EHCI_SH
1261 #include "ehci-sh.c"
1262 #define PLATFORM_DRIVER ehci_hcd_sh_driver
1263 #endif
1264
1265 #ifdef CONFIG_PPC_PS3
1266 #include "ehci-ps3.c"
1267 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
1268 #endif
1269
1270 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1271 #include "ehci-ppc-of.c"
1272 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1273 #endif
1274
1275 #ifdef CONFIG_XPS_USB_HCD_XILINX
1276 #include "ehci-xilinx-of.c"
1277 #define XILINX_OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver
1278 #endif
1279
1280 #ifdef CONFIG_TILE_USB
1281 #include "ehci-tilegx.c"
1282 #define PLATFORM_DRIVER ehci_hcd_tilegx_driver
1283 #endif
1284
1285 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1286 #include "ehci-pmcmsp.c"
1287 #define PLATFORM_DRIVER ehci_hcd_msp_driver
1288 #endif
1289
1290 #ifdef CONFIG_SPARC_LEON
1291 #include "ehci-grlib.c"
1292 #define PLATFORM_DRIVER ehci_grlib_driver
1293 #endif
1294
1295 #ifdef CONFIG_USB_EHCI_MV
1296 #include "ehci-mv.c"
1297 #define PLATFORM_DRIVER ehci_mv_driver
1298 #endif
1299
1300 #ifdef CONFIG_MIPS_SEAD3
1301 #include "ehci-sead3.c"
1302 #define PLATFORM_DRIVER ehci_hcd_sead3_driver
1303 #endif
1304
1305 static int __init ehci_hcd_init(void)
1306 {
1307 int retval = 0;
1308
1309 if (usb_disabled())
1310 return -ENODEV;
1311
1312 printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1313 set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1314 if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1315 test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1316 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1317 " before uhci_hcd and ohci_hcd, not after\n");
1318
1319 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1320 hcd_name,
1321 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1322 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1323
1324 #ifdef CONFIG_DYNAMIC_DEBUG
1325 ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1326 if (!ehci_debug_root) {
1327 retval = -ENOENT;
1328 goto err_debug;
1329 }
1330 #endif
1331
1332 #ifdef PLATFORM_DRIVER
1333 retval = platform_driver_register(&PLATFORM_DRIVER);
1334 if (retval < 0)
1335 goto clean0;
1336 #endif
1337
1338 #ifdef PS3_SYSTEM_BUS_DRIVER
1339 retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1340 if (retval < 0)
1341 goto clean2;
1342 #endif
1343
1344 #ifdef OF_PLATFORM_DRIVER
1345 retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1346 if (retval < 0)
1347 goto clean3;
1348 #endif
1349
1350 #ifdef XILINX_OF_PLATFORM_DRIVER
1351 retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1352 if (retval < 0)
1353 goto clean4;
1354 #endif
1355 return retval;
1356
1357 #ifdef XILINX_OF_PLATFORM_DRIVER
1358 /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1359 clean4:
1360 #endif
1361 #ifdef OF_PLATFORM_DRIVER
1362 platform_driver_unregister(&OF_PLATFORM_DRIVER);
1363 clean3:
1364 #endif
1365 #ifdef PS3_SYSTEM_BUS_DRIVER
1366 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1367 clean2:
1368 #endif
1369 #ifdef PLATFORM_DRIVER
1370 platform_driver_unregister(&PLATFORM_DRIVER);
1371 clean0:
1372 #endif
1373 #ifdef CONFIG_DYNAMIC_DEBUG
1374 debugfs_remove(ehci_debug_root);
1375 ehci_debug_root = NULL;
1376 err_debug:
1377 #endif
1378 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1379 return retval;
1380 }
1381 module_init(ehci_hcd_init);
1382
1383 static void __exit ehci_hcd_cleanup(void)
1384 {
1385 #ifdef XILINX_OF_PLATFORM_DRIVER
1386 platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1387 #endif
1388 #ifdef OF_PLATFORM_DRIVER
1389 platform_driver_unregister(&OF_PLATFORM_DRIVER);
1390 #endif
1391 #ifdef PLATFORM_DRIVER
1392 platform_driver_unregister(&PLATFORM_DRIVER);
1393 #endif
1394 #ifdef PS3_SYSTEM_BUS_DRIVER
1395 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1396 #endif
1397 #ifdef CONFIG_DYNAMIC_DEBUG
1398 debugfs_remove(ehci_debug_root);
1399 #endif
1400 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1401 }
1402 module_exit(ehci_hcd_cleanup);