1 # BCM4361A1 SWB-E30A nvram_160812_FW:13.10.219.1
2 NVRAMRev=$Rev: 506283 $
11 macaddr=00:90:4c:12:d0:01
31 rxgains2gtrelnabypa0=1
34 rxgains5gtrelnabypa0=1
35 rxgains5gmelnagaina0=3
37 rxgains5gmtrelnabypa0=1
38 rxgains5ghelnagaina0=3
40 rxgains5ghtrelnabypa0=1
43 rxgains2gtrelnabypa1=1
46 rxgains5gtrelnabypa1=1
47 rxgains5gmelnagaina1=3
49 rxgains5gmtrelnabypa1=1
50 rxgains5ghelnagaina1=3
52 rxgains5ghtrelnabypa1=1
71 slice/1/fdss_level_2g=5,5
72 slice/1/fdss_interp_en=1
76 AvVmid_c0=4,137,6,71,6,71,5,95,5,93
77 AvVmid_c1=4,136,6,72,6,74,5,94,4,119
78 slice/1/AvVmid_c0=4,137,4,125,4,125,4,125,4,125
79 slice/1/AvVmid_c1=4,136,4,125,4,125,4,125,4,125
80 pa2gccka0=-200,7392,-897
81 pa2gccka1=-198,7522,-907
84 slice/1/pa2ga0=0xff31,0x15b3,0xfd39
85 slice/1/pa2ga1=0xff26,0x15cc,0xfd39
86 slice/1/pa2ga2=-207,4069,-553
87 slice/1/pa2ga3=-194,4307,-589
89 pa5ga0=0xff28,0x1827,0xfcee,0xff2a,0x1857,0xfce7,0xff26,0x17f0,0xfcf4,0xff2a,0x1836,0xfce8
90 pa5ga1=0xff29,0x1800,0xfcf3,0xff2a,0x1803,0xfcf3,0xff26,0x17bb,0xfcfa,0xff23,0x1811,0xfcf1
91 pa5gbw4080a0=0xff22,0x179f,0xfd00,0xff24,0x17a2,0xfcff,0xff21,0x17a8,0xfcfc,0xff24,0x17ce,0xfcf7
92 pa5gbw4080a1=0xff25,0x17d8,0xfcf9,0xff25,0x17d9,0xfcf7,0xff21,0x1793,0xfcff,0xff1f,0x17a6,0xfcfe
108 mcsbw202gpo=0xAA886664
109 mcsbw402gpo=0xCCAA8886
110 dot11agofdmhrbw202gpo=0x6666
111 ofdmlrbw202gpo=0x0022
112 mcsbw205glpo=0x88866662
113 mcsbw405glpo=0xAAB88884
114 mcsbw805glpo=0xDCCAAAA6
116 mcsbw205gmpo=0x88866662
117 mcsbw405gmpo=0xAAA88884
118 mcsbw805gmpo=0xDCCAAAA6
120 mcsbw205ghpo=0x88866662
121 mcsbw405ghpo=0xAAB88884
122 mcsbw805ghpo=0xDCCAAAA6
128 sb20in80and160hr5glpo=0x0
130 sb20in80and160hr5gmpo=0x0
132 sb20in80and160hr5ghpo=0x0
135 sb20in80and160lr5glpo=0x0
137 sb20in80and160lr5gmpo=0x0
139 sb20in80and160lr5ghpo=0x0
153 #SEMCO Type3 iPA module : need to clarify BT and WL_MASK
157 # Main core RF SW Map
158 swctrlmap_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000
159 swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000
160 swctrlmap_5g=0xa0182018,0xa0080000,0x20080000,0x000000,0x0000
161 swctrlmapext_5g=0x01010100,0x00010000,0x00000000,0x000000,0x0000
164 slice/1/swctrlmap_2g=0x08020802,0x48020000,0x40000000,0x000000,0x000
165 slice/1/swctrlmapext_2g=0x00000000,0x00020000,0x00020000,0x000000,0x000
166 slice/1/swctrlmap_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000
167 slice/1/swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000
169 # Main & Aux priority set
170 clb2gslice0core0=0x000
171 clb2gslice1core0=0x202
172 clb5gslice0core0=0x118
173 clb5gslice1core0=0x000
174 clb2gslice0core1=0x000
175 clb2gslice1core1=0x048
176 clb5gslice0core1=0x1a0
177 clb5gslice1core1=0x000
181 clb_swctrl_smask_ant0=0x3ff
182 clb_swctrl_smask_ant1=0x1ff
184 btc_prisel_ant_mask=0x1
185 # ########### BTC Dynctl profile params ############
186 # flags:bit0 - dynctl enabled, bit1 dynamic desense, bit2 dynamic mode
188 btcdyn_dflt_dsns_level=0
189 btcdyn_low_dsns_level=0
190 btcdyn_mid_dsns_level=7
191 btcdyn_high_dsns_level=2
192 btcdyn_default_btc_mode=1
193 btcdyn_btrssi_hyster=2
194 # --- number of rows in the array vars below ---
197 # --- mode switch data rows (max is 4) ---
198 btcdyn_msw_row0=1,8,0,-50,-100
199 btcdyn_msw_row1=1,4,0,-55,-100
200 btcdyn_msw_row2=1,0,0,-70,-100
201 #btcdyn_msw_row3=1,-4,0,-70,-100
202 # --- desense switching data rows (max is 4) ---
203 #btcdyn_dsns_row0=5,8,0,-40,-40
204 btcdyn_dsns_row0=5,4,0,-60,-60
205 btcdyn_dsns_row1=5,0,0,0,-75
206 powoffs2gtna0=1,1,1,1,0,-1,-2,-2,-1,0,1,2,1,0
207 powoffs2gtna1=2,2,3,3,2,0,-1,-1,-1,0,2,3,2,0
208 slice/1/powoffs2gtna0=0,0,1,2,1,0,-1,-2,-2,-1,-1,0,0,0
209 slice/1/powoffs2gtna1=-1,0,0,1,1,0,-1,-1,-1,-1,0,-1,0,0
210 slice/1/pdoffsetcckma0=1
211 slice/1/pdoffsetcckma1=1
212 mcs1024qam2gpo=0xCCCC
213 mcs1024qam5glpo=0xEECCCC
214 mcs1024qam5gmpo=0xEECCCC
215 mcs1024qam5ghpo=0xEECCCC
216 mcs1024qam5gx1po=0xEECCCC
217 mcs1024qam5gx2po=0xEECCCC
223 # --- WB PAPD Cal related params ----
227 #slice/1/wb_rxattn=0x0101
228 #slice/1/wb_txattn=0x0404
229 #slice/1/wb_papdcalidx=0x1405
230 #slice/1/wb_papdcalidx_core1=0x1404
231 #slice/1/wb_bbmult=0x4040
232 #slice/1/wb_bbmult_core1=0x4040
233 slice/1/wb_calref_db=0x2828
234 #slice/1/wb_calref_db_core1=0x1a1a
235 #slice/1/wb_tia_gain_mode=0x0006
236 #slice/1/wb_tia_gain_mode_core1=0x0006
237 #slice/1/wb_txbuf_offset=0x1820
238 #slice/1/wb_txbuf_offset_core1=0x1823
239 slice/1/wb_frac_del=0x4B0F
240 #slice/1/wb_frac_del_core1=0x4B2D
241 slice/1/wb_eps_offset=432
242 slice/1/wb_eps_offset_core1=430
245 wb_txbuf_offset=0x2021
248 wb_eps_offset=0x1c201c3
251 wb_eps_offset_core1=438
253 # ---- TWO range TSSI ----
254 slice/1/tworangetssi2g=1
255 slice/1/lowpowerrange2g=0
256 # energy detect threshold
259 # energy detect threshold for EU