drivers/staging/iio/impedance-analyzer/ad5933.c

   1 /*
   2  * AD5933 AD5934 Impedance Converter, Network Analyzer
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/device.h>
  11 #include <linux/kernel.h>
  12 #include <linux/sysfs.h>
  13 #include <linux/i2c.h>
  14 #include <linux/regulator/consumer.h>
  15 #include <linux/slab.h>
  16 #include <linux/types.h>
  17 #include <linux/err.h>
  18 #include <linux/delay.h>
  19 #include <linux/module.h>
  20 #include <asm/div64.h>
  21
  22 #include <linux/iio/iio.h>
  23 #include <linux/iio/sysfs.h>
  24 #include <linux/iio/buffer.h>
  25 #include <linux/iio/kfifo_buf.h>
  26
  27 #include "ad5933.h"
  28
  29 /* AD5933/AD5934 Registers */
  30 #define AD5933_REG_CONTROL_HB           0x80    /* R/W, 2 bytes */
  31 #define AD5933_REG_CONTROL_LB           0x81    /* R/W, 2 bytes */
  32 #define AD5933_REG_FREQ_START           0x82    /* R/W, 3 bytes */
  33 #define AD5933_REG_FREQ_INC             0x85    /* R/W, 3 bytes */
  34 #define AD5933_REG_INC_NUM              0x88    /* R/W, 2 bytes, 9 bit */
  35 #define AD5933_REG_SETTLING_CYCLES      0x8A    /* R/W, 2 bytes */
  36 #define AD5933_REG_STATUS               0x8F    /* R, 1 byte */
  37 #define AD5933_REG_TEMP_DATA            0x92    /* R, 2 bytes*/
  38 #define AD5933_REG_REAL_DATA            0x94    /* R, 2 bytes*/
  39 #define AD5933_REG_IMAG_DATA            0x96    /* R, 2 bytes*/
  40
  41 /* AD5933_REG_CONTROL_HB Bits */
  42 #define AD5933_CTRL_INIT_START_FREQ     (0x1 << 4)
  43 #define AD5933_CTRL_START_SWEEP         (0x2 << 4)
  44 #define AD5933_CTRL_INC_FREQ            (0x3 << 4)
  45 #define AD5933_CTRL_REPEAT_FREQ         (0x4 << 4)
  46 #define AD5933_CTRL_MEASURE_TEMP        (0x9 << 4)
  47 #define AD5933_CTRL_POWER_DOWN          (0xA << 4)
  48 #define AD5933_CTRL_STANDBY             (0xB << 4)
  49
  50 #define AD5933_CTRL_RANGE_2000mVpp      (0x0 << 1)
  51 #define AD5933_CTRL_RANGE_200mVpp       (0x1 << 1)
  52 #define AD5933_CTRL_RANGE_400mVpp       (0x2 << 1)
  53 #define AD5933_CTRL_RANGE_1000mVpp      (0x3 << 1)
  54 #define AD5933_CTRL_RANGE(x)            ((x) << 1)
  55
  56 #define AD5933_CTRL_PGA_GAIN_1          (0x1 << 0)
  57 #define AD5933_CTRL_PGA_GAIN_5          (0x0 << 0)
  58
  59 /* AD5933_REG_CONTROL_LB Bits */
  60 #define AD5933_CTRL_RESET               (0x1 << 4)
  61 #define AD5933_CTRL_INT_SYSCLK          (0x0 << 3)
  62 #define AD5933_CTRL_EXT_SYSCLK          (0x1 << 3)
  63
  64 /* AD5933_REG_STATUS Bits */
  65 #define AD5933_STAT_TEMP_VALID          (0x1 << 0)
  66 #define AD5933_STAT_DATA_VALID          (0x1 << 1)
  67 #define AD5933_STAT_SWEEP_DONE          (0x1 << 2)
  68
  69 /* I2C Block Commands */
  70 #define AD5933_I2C_BLOCK_WRITE          0xA0
  71 #define AD5933_I2C_BLOCK_READ           0xA1
  72 #define AD5933_I2C_ADDR_POINTER         0xB0
  73
  74 /* Device Specs */
  75 #define AD5933_INT_OSC_FREQ_Hz          16776000
  76 #define AD5933_MAX_OUTPUT_FREQ_Hz       100000
  77 #define AD5933_MAX_RETRIES              100
  78
  79 #define AD5933_OUT_RANGE                1
  80 #define AD5933_OUT_RANGE_AVAIL          2
  81 #define AD5933_OUT_SETTLING_CYCLES      3
  82 #define AD5933_IN_PGA_GAIN              4
  83 #define AD5933_IN_PGA_GAIN_AVAIL        5
  84 #define AD5933_FREQ_POINTS              6
  85
  86 #define AD5933_POLL_TIME_ms             10
  87 #define AD5933_INIT_EXCITATION_TIME_ms  100
  88
  89 struct ad5933_state {
  90         struct i2c_client               *client;
  91         struct regulator                *reg;
  92         struct delayed_work             work;
  93         unsigned long                   mclk_hz;
  94         unsigned char                   ctrl_hb;
  95         unsigned char                   ctrl_lb;
  96         unsigned                        range_avail[4];
  97         unsigned short                  vref_mv;
  98         unsigned short                  settling_cycles;
  99         unsigned short                  freq_points;
 100         unsigned                        freq_start;
 101         unsigned                        freq_inc;
 102         unsigned                        state;
 103         unsigned                        poll_time_jiffies;
 104 };
 105
 106 static struct ad5933_platform_data ad5933_default_pdata  = {
 107         .vref_mv = 3300,
 108 };
 109
 110 static const struct iio_chan_spec ad5933_channels[] = {
 111         {
 112                 .type = IIO_TEMP,
 113                 .indexed = 1,
 114                 .channel = 0,
 115                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 116                         BIT(IIO_CHAN_INFO_SCALE),
 117                 .address = AD5933_REG_TEMP_DATA,
 118                 .scan_index = -1,
 119                 .scan_type = {
 120                         .sign = 's',
 121                         .realbits = 14,
 122                         .storagebits = 16,
 123                 },
 124         }, { /* Ring Channels */
 125                 .type = IIO_VOLTAGE,
 126                 .indexed = 1,
 127                 .channel = 0,
 128                 .extend_name = "real",
 129                 .address = AD5933_REG_REAL_DATA,
 130                 .scan_index = 0,
 131                 .scan_type = {
 132                         .sign = 's',
 133                         .realbits = 16,
 134                         .storagebits = 16,
 135                 },
 136         }, {
 137                 .type = IIO_VOLTAGE,
 138                 .indexed = 1,
 139                 .channel = 0,
 140                 .extend_name = "imag",
 141                 .address = AD5933_REG_IMAG_DATA,
 142                 .scan_index = 1,
 143                 .scan_type = {
 144                         .sign = 's',
 145                         .realbits = 16,
 146                         .storagebits = 16,
 147                 },
 148         },
 149 };
 150
 151 static int ad5933_i2c_write(struct i2c_client *client,
 152                               u8 reg, u8 len, u8 *data)
 153 {
 154         int ret;
 155
 156         while (len--) {
 157                 ret = i2c_smbus_write_byte_data(client, reg++, *data++);
 158                 if (ret < 0) {
 159                         dev_err(&client->dev, "I2C write error\n");
 160                         return ret;
 161                 }
 162         }
 163         return 0;
 164 }
 165
 166 static int ad5933_i2c_read(struct i2c_client *client,
 167                               u8 reg, u8 len, u8 *data)
 168 {
 169         int ret;
 170
 171         while (len--) {
 172                 ret = i2c_smbus_read_byte_data(client, reg++);
 173                 if (ret < 0) {
 174                         dev_err(&client->dev, "I2C read error\n");
 175                         return ret;
 176                 }
 177                 *data++ = ret;
 178         }
 179         return 0;
 180 }
 181
 182 static int ad5933_cmd(struct ad5933_state *st, unsigned char cmd)
 183 {
 184         unsigned char dat = st->ctrl_hb | cmd;
 185
 186         return ad5933_i2c_write(st->client,
 187                         AD5933_REG_CONTROL_HB, 1, &dat);
 188 }
 189
 190 static int ad5933_reset(struct ad5933_state *st)
 191 {
 192         unsigned char dat = st->ctrl_lb | AD5933_CTRL_RESET;
 193
 194         return ad5933_i2c_write(st->client,
 195                         AD5933_REG_CONTROL_LB, 1, &dat);
 196 }
 197
 198 static int ad5933_wait_busy(struct ad5933_state *st, unsigned char event)
 199 {
 200         unsigned char val, timeout = AD5933_MAX_RETRIES;
 201         int ret;
 202
 203         while (timeout--) {
 204                 ret =  ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &val);
 205                 if (ret < 0)
 206                         return ret;
 207                 if (val & event)
 208                         return val;
 209                 cpu_relax();
 210                 mdelay(1);
 211         }
 212
 213         return -EAGAIN;
 214 }
 215
 216 static int ad5933_set_freq(struct ad5933_state *st,
 217                            unsigned reg, unsigned long freq)
 218 {
 219         unsigned long long freqreg;
 220         union {
 221                 __be32 d32;
 222                 u8 d8[4];
 223         } dat;
 224
 225         freqreg = (u64) freq * (u64) (1 << 27);
 226         do_div(freqreg, st->mclk_hz / 4);
 227
 228         switch (reg) {
 229         case AD5933_REG_FREQ_START:
 230                 st->freq_start = freq;
 231                 break;
 232         case AD5933_REG_FREQ_INC:
 233                 st->freq_inc = freq;
 234                 break;
 235         default:
 236                 return -EINVAL;
 237         }
 238
 239         dat.d32 = cpu_to_be32(freqreg);
 240         return ad5933_i2c_write(st->client, reg, 3, &dat.d8[1]);
 241 }
 242
 243 static int ad5933_setup(struct ad5933_state *st)
 244 {
 245         __be16 dat;
 246         int ret;
 247
 248         ret = ad5933_reset(st);
 249         if (ret < 0)
 250                 return ret;
 251
 252         ret = ad5933_set_freq(st, AD5933_REG_FREQ_START, 10000);
 253         if (ret < 0)
 254                 return ret;
 255
 256         ret = ad5933_set_freq(st, AD5933_REG_FREQ_INC, 200);
 257         if (ret < 0)
 258                 return ret;
 259
 260         st->settling_cycles = 10;
 261         dat = cpu_to_be16(st->settling_cycles);
 262
 263         ret = ad5933_i2c_write(st->client,
 264                         AD5933_REG_SETTLING_CYCLES, 2, (u8 *)&dat);
 265         if (ret < 0)
 266                 return ret;
 267
 268         st->freq_points = 100;
 269         dat = cpu_to_be16(st->freq_points);
 270
 271         return ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2, (u8 *)&dat);
 272 }
 273
 274 static void ad5933_calc_out_ranges(struct ad5933_state *st)
 275 {
 276         int i;
 277         unsigned normalized_3v3[4] = {1980, 198, 383, 970};
 278
 279         for (i = 0; i < 4; i++)
 280                 st->range_avail[i] = normalized_3v3[i] * st->vref_mv / 3300;
 281
 282 }
 283
 284 /*
 285  * handles: AD5933_REG_FREQ_START and AD5933_REG_FREQ_INC
 286  */
 287
 288 static ssize_t ad5933_show_frequency(struct device *dev,
 289                                         struct device_attribute *attr,
 290                                         char *buf)
 291 {
 292         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 293         struct ad5933_state *st = iio_priv(indio_dev);
 294         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 295         int ret;
 296         unsigned long long freqreg;
 297         union {
 298                 __be32 d32;
 299                 u8 d8[4];
 300         } dat;
 301
 302         mutex_lock(&indio_dev->mlock);
 303         ret = ad5933_i2c_read(st->client, this_attr->address, 3, &dat.d8[1]);
 304         mutex_unlock(&indio_dev->mlock);
 305         if (ret < 0)
 306                 return ret;
 307
 308         freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
 309
 310         freqreg = (u64) freqreg * (u64) (st->mclk_hz / 4);
 311         do_div(freqreg, 1 << 27);
 312
 313         return sprintf(buf, "%d\n", (int) freqreg);
 314 }
 315
 316 static ssize_t ad5933_store_frequency(struct device *dev,
 317                                          struct device_attribute *attr,
 318                                          const char *buf,
 319                                          size_t len)
 320 {
 321         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 322         struct ad5933_state *st = iio_priv(indio_dev);
 323         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 324         unsigned long val;
 325         int ret;
 326
 327         ret = kstrtoul(buf, 10, &val);
 328         if (ret)
 329                 return ret;
 330
 331         if (val > AD5933_MAX_OUTPUT_FREQ_Hz)
 332                 return -EINVAL;
 333
 334         mutex_lock(&indio_dev->mlock);
 335         ret = ad5933_set_freq(st, this_attr->address, val);
 336         mutex_unlock(&indio_dev->mlock);
 337
 338         return ret ? ret : len;
 339 }
 340
 341 static IIO_DEVICE_ATTR(out_voltage0_freq_start, S_IRUGO | S_IWUSR,
 342                         ad5933_show_frequency,
 343                         ad5933_store_frequency,
 344                         AD5933_REG_FREQ_START);
 345
 346 static IIO_DEVICE_ATTR(out_voltage0_freq_increment, S_IRUGO | S_IWUSR,
 347                         ad5933_show_frequency,
 348                         ad5933_store_frequency,
 349                         AD5933_REG_FREQ_INC);
 350
 351 static ssize_t ad5933_show(struct device *dev,
 352                                         struct device_attribute *attr,
 353                                         char *buf)
 354 {
 355         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 356         struct ad5933_state *st = iio_priv(indio_dev);
 357         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 358         int ret = 0, len = 0;
 359
 360         mutex_lock(&indio_dev->mlock);
 361         switch ((u32) this_attr->address) {
 362         case AD5933_OUT_RANGE:
 363                 len = sprintf(buf, "%u\n",
 364                               st->range_avail[(st->ctrl_hb >> 1) & 0x3]);
 365                 break;
 366         case AD5933_OUT_RANGE_AVAIL:
 367                 len = sprintf(buf, "%u %u %u %u\n", st->range_avail[0],
 368                               st->range_avail[3], st->range_avail[2],
 369                               st->range_avail[1]);
 370                 break;
 371         case AD5933_OUT_SETTLING_CYCLES:
 372                 len = sprintf(buf, "%d\n", st->settling_cycles);
 373                 break;
 374         case AD5933_IN_PGA_GAIN:
 375                 len = sprintf(buf, "%s\n",
 376                               (st->ctrl_hb & AD5933_CTRL_PGA_GAIN_1) ?
 377                               "1" : "0.2");
 378                 break;
 379         case AD5933_IN_PGA_GAIN_AVAIL:
 380                 len = sprintf(buf, "1 0.2\n");
 381                 break;
 382         case AD5933_FREQ_POINTS:
 383                 len = sprintf(buf, "%d\n", st->freq_points);
 384                 break;
 385         default:
 386                 ret = -EINVAL;
 387         }
 388
 389         mutex_unlock(&indio_dev->mlock);
 390         return ret ? ret : len;
 391 }
 392
 393 static ssize_t ad5933_store(struct device *dev,
 394                                          struct device_attribute *attr,
 395                                          const char *buf,
 396                                          size_t len)
 397 {
 398         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 399         struct ad5933_state *st = iio_priv(indio_dev);
 400         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 401         u16 val;
 402         int i, ret = 0;
 403         __be16 dat;
 404
 405         if (this_attr->address != AD5933_IN_PGA_GAIN) {
 406                 ret = kstrtou16(buf, 10, &val);
 407                 if (ret)
 408                         return ret;
 409         }
 410
 411         mutex_lock(&indio_dev->mlock);
 412         switch ((u32) this_attr->address) {
 413         case AD5933_OUT_RANGE:
 414                 for (i = 0; i < 4; i++)
 415                         if (val == st->range_avail[i]) {
 416                                 st->ctrl_hb &= ~AD5933_CTRL_RANGE(0x3);
 417                                 st->ctrl_hb |= AD5933_CTRL_RANGE(i);
 418                                 ret = ad5933_cmd(st, 0);
 419                                 break;
 420                         }
 421                 ret = -EINVAL;
 422                 break;
 423         case AD5933_IN_PGA_GAIN:
 424                 if (sysfs_streq(buf, "1")) {
 425                         st->ctrl_hb |= AD5933_CTRL_PGA_GAIN_1;
 426                 } else if (sysfs_streq(buf, "0.2")) {
 427                         st->ctrl_hb &= ~AD5933_CTRL_PGA_GAIN_1;
 428                 } else {
 429                         ret = -EINVAL;
 430                         break;
 431                 }
 432                 ret = ad5933_cmd(st, 0);
 433                 break;
 434         case AD5933_OUT_SETTLING_CYCLES:
 435                 val = clamp(val, (u16)0, (u16)0x7FF);
 436                 st->settling_cycles = val;
 437
 438                 /* 2x, 4x handling, see datasheet */
 439                 if (val > 511)
 440                         val = (val >> 1) | (1 << 9);
 441                 else if (val > 1022)
 442                         val = (val >> 2) | (3 << 9);
 443
 444                 dat = cpu_to_be16(val);
 445                 ret = ad5933_i2c_write(st->client,
 446                                 AD5933_REG_SETTLING_CYCLES, 2, (u8 *)&dat);
 447                 break;
 448         case AD5933_FREQ_POINTS:
 449                 val = clamp(val, (u16)0, (u16)511);
 450                 st->freq_points = val;
 451
 452                 dat = cpu_to_be16(val);
 453                 ret = ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2,
 454                                        (u8 *)&dat);
 455                 break;
 456         default:
 457                 ret = -EINVAL;
 458         }
 459
 460         mutex_unlock(&indio_dev->mlock);
 461         return ret ? ret : len;
 462 }
 463
 464 static IIO_DEVICE_ATTR(out_voltage0_scale, S_IRUGO | S_IWUSR,
 465                         ad5933_show,
 466                         ad5933_store,
 467                         AD5933_OUT_RANGE);
 468
 469 static IIO_DEVICE_ATTR(out_voltage0_scale_available, S_IRUGO,
 470                         ad5933_show,
 471                         NULL,
 472                         AD5933_OUT_RANGE_AVAIL);
 473
 474 static IIO_DEVICE_ATTR(in_voltage0_scale, S_IRUGO | S_IWUSR,
 475                         ad5933_show,
 476                         ad5933_store,
 477                         AD5933_IN_PGA_GAIN);
 478
 479 static IIO_DEVICE_ATTR(in_voltage0_scale_available, S_IRUGO,
 480                         ad5933_show,
 481                         NULL,
 482                         AD5933_IN_PGA_GAIN_AVAIL);
 483
 484 static IIO_DEVICE_ATTR(out_voltage0_freq_points, S_IRUGO | S_IWUSR,
 485                         ad5933_show,
 486                         ad5933_store,
 487                         AD5933_FREQ_POINTS);
 488
 489 static IIO_DEVICE_ATTR(out_voltage0_settling_cycles, S_IRUGO | S_IWUSR,
 490                         ad5933_show,
 491                         ad5933_store,
 492                         AD5933_OUT_SETTLING_CYCLES);
 493
 494 /* note:
 495  * ideally we would handle the scale attributes via the iio_info
 496  * (read|write)_raw methods, however this part is a untypical since we
 497  * don't create dedicated sysfs channel attributes for out0 and in0.
 498  */
 499 static struct attribute *ad5933_attributes[] = {
 500         &iio_dev_attr_out_voltage0_scale.dev_attr.attr,
 501         &iio_dev_attr_out_voltage0_scale_available.dev_attr.attr,
 502         &iio_dev_attr_out_voltage0_freq_start.dev_attr.attr,
 503         &iio_dev_attr_out_voltage0_freq_increment.dev_attr.attr,
 504         &iio_dev_attr_out_voltage0_freq_points.dev_attr.attr,
 505         &iio_dev_attr_out_voltage0_settling_cycles.dev_attr.attr,
 506         &iio_dev_attr_in_voltage0_scale.dev_attr.attr,
 507         &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
 508         NULL
 509 };
 510
 511 static const struct attribute_group ad5933_attribute_group = {
 512         .attrs = ad5933_attributes,
 513 };
 514
 515 static int ad5933_read_raw(struct iio_dev *indio_dev,
 516                            struct iio_chan_spec const *chan,
 517                            int *val,
 518                            int *val2,
 519                            long m)
 520 {
 521         struct ad5933_state *st = iio_priv(indio_dev);
 522         __be16 dat;
 523         int ret;
 524
 525         switch (m) {
 526         case IIO_CHAN_INFO_RAW:
 527                 mutex_lock(&indio_dev->mlock);
 528                 if (iio_buffer_enabled(indio_dev)) {
 529                         ret = -EBUSY;
 530                         goto out;
 531                 }
 532                 ret = ad5933_cmd(st, AD5933_CTRL_MEASURE_TEMP);
 533                 if (ret < 0)
 534                         goto out;
 535                 ret = ad5933_wait_busy(st, AD5933_STAT_TEMP_VALID);
 536                 if (ret < 0)
 537                         goto out;
 538
 539                 ret = ad5933_i2c_read(st->client,
 540                                 AD5933_REG_TEMP_DATA, 2,
 541                                 (u8 *)&dat);
 542                 if (ret < 0)
 543                         goto out;
 544                 mutex_unlock(&indio_dev->mlock);
 545                 *val = sign_extend32(be16_to_cpu(dat), 13);
 546
 547                 return IIO_VAL_INT;
 548         case IIO_CHAN_INFO_SCALE:
 549                 *val = 1000;
 550                 *val2 = 5;
 551                 return IIO_VAL_FRACTIONAL_LOG2;
 552         }
 553
 554         return -EINVAL;
 555 out:
 556         mutex_unlock(&indio_dev->mlock);
 557         return ret;
 558 }
 559
 560 static const struct iio_info ad5933_info = {
 561         .read_raw = &ad5933_read_raw,
 562         .attrs = &ad5933_attribute_group,
 563         .driver_module = THIS_MODULE,
 564 };
 565
 566 static int ad5933_ring_preenable(struct iio_dev *indio_dev)
 567 {
 568         struct ad5933_state *st = iio_priv(indio_dev);
 569         int ret;
 570
 571         if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
 572                 return -EINVAL;
 573
 574         ret = ad5933_reset(st);
 575         if (ret < 0)
 576                 return ret;
 577
 578         ret = ad5933_cmd(st, AD5933_CTRL_STANDBY);
 579         if (ret < 0)
 580                 return ret;
 581
 582         ret = ad5933_cmd(st, AD5933_CTRL_INIT_START_FREQ);
 583         if (ret < 0)
 584                 return ret;
 585
 586         st->state = AD5933_CTRL_INIT_START_FREQ;
 587
 588         return 0;
 589 }
 590
 591 static int ad5933_ring_postenable(struct iio_dev *indio_dev)
 592 {
 593         struct ad5933_state *st = iio_priv(indio_dev);
 594
 595         /* AD5933_CTRL_INIT_START_FREQ:
 596          * High Q complex circuits require a long time to reach steady state.
 597          * To facilitate the measurement of such impedances, this mode allows
 598          * the user full control of the settling time requirement before
 599          * entering start frequency sweep mode where the impedance measurement
 600          * takes place. In this mode the impedance is excited with the
 601          * programmed start frequency (ad5933_ring_preenable),
 602          * but no measurement takes place.
 603          */
 604
 605         schedule_delayed_work(&st->work,
 606                               msecs_to_jiffies(AD5933_INIT_EXCITATION_TIME_ms));
 607         return 0;
 608 }
 609
 610 static int ad5933_ring_postdisable(struct iio_dev *indio_dev)
 611 {
 612         struct ad5933_state *st = iio_priv(indio_dev);
 613
 614         cancel_delayed_work_sync(&st->work);
 615         return ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
 616 }
 617
 618 static const struct iio_buffer_setup_ops ad5933_ring_setup_ops = {
 619         .preenable = &ad5933_ring_preenable,
 620         .postenable = &ad5933_ring_postenable,
 621         .postdisable = &ad5933_ring_postdisable,
 622 };
 623
 624 static int ad5933_register_ring_funcs_and_init(struct iio_dev *indio_dev)
 625 {
 626         struct iio_buffer *buffer;
 627
 628         buffer = iio_kfifo_allocate();
 629         if (!buffer)
 630                 return -ENOMEM;
 631
 632         iio_device_attach_buffer(indio_dev, buffer);
 633
 634         /* Ring buffer functions - here trigger setup related */
 635         indio_dev->setup_ops = &ad5933_ring_setup_ops;
 636
 637         indio_dev->modes |= INDIO_BUFFER_HARDWARE;
 638
 639         return 0;
 640 }
 641
 642 static void ad5933_work(struct work_struct *work)
 643 {
 644         struct ad5933_state *st = container_of(work,
 645                 struct ad5933_state, work.work);
 646         struct iio_dev *indio_dev = i2c_get_clientdata(st->client);
 647         __be16 buf[2];
 648         int val[2];
 649         unsigned char status;
 650         int ret;
 651
 652         mutex_lock(&indio_dev->mlock);
 653         if (st->state == AD5933_CTRL_INIT_START_FREQ) {
 654                 /* start sweep */
 655                 ad5933_cmd(st, AD5933_CTRL_START_SWEEP);
 656                 st->state = AD5933_CTRL_START_SWEEP;
 657                 schedule_delayed_work(&st->work, st->poll_time_jiffies);
 658                 goto out;
 659         }
 660
 661         ret = ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &status);
 662         if (ret)
 663                 goto out;
 664
 665         if (status & AD5933_STAT_DATA_VALID) {
 666                 int scan_count = bitmap_weight(indio_dev->active_scan_mask,
 667                                                indio_dev->masklength);
 668                 ret = ad5933_i2c_read(st->client,
 669                                 test_bit(1, indio_dev->active_scan_mask) ?
 670                                 AD5933_REG_REAL_DATA : AD5933_REG_IMAG_DATA,
 671                                 scan_count * 2, (u8 *)buf);
 672                 if (ret)
 673                         goto out;
 674
 675                 if (scan_count == 2) {
 676                         val[0] = be16_to_cpu(buf[0]);
 677                         val[1] = be16_to_cpu(buf[1]);
 678                 } else {
 679                         val[0] = be16_to_cpu(buf[0]);
 680                 }
 681                 iio_push_to_buffers(indio_dev, val);
 682         } else {
 683                 /* no data available - try again later */
 684                 schedule_delayed_work(&st->work, st->poll_time_jiffies);
 685                 goto out;
 686         }
 687
 688         if (status & AD5933_STAT_SWEEP_DONE) {
 689                 /* last sample received - power down do nothing until
 690                  * the ring enable is toggled */
 691                 ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
 692         } else {
 693                 /* we just received a valid datum, move on to the next */
 694                 ad5933_cmd(st, AD5933_CTRL_INC_FREQ);
 695                 schedule_delayed_work(&st->work, st->poll_time_jiffies);
 696         }
 697 out:
 698         mutex_unlock(&indio_dev->mlock);
 699 }
 700
 701 static int ad5933_probe(struct i2c_client *client,
 702                                    const struct i2c_device_id *id)
 703 {
 704         int ret, voltage_uv = 0;
 705         struct ad5933_platform_data *pdata = client->dev.platform_data;
 706         struct ad5933_state *st;
 707         struct iio_dev *indio_dev;
 708
 709         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
 710         if (!indio_dev)
 711                 return -ENOMEM;
 712
 713         st = iio_priv(indio_dev);
 714         i2c_set_clientdata(client, indio_dev);
 715         st->client = client;
 716
 717         if (!pdata)
 718                 pdata = &ad5933_default_pdata;
 719
 720         st->reg = devm_regulator_get(&client->dev, "vcc");
 721         if (!IS_ERR(st->reg)) {
 722                 ret = regulator_enable(st->reg);
 723                 if (ret)
 724                         return ret;
 725                 voltage_uv = regulator_get_voltage(st->reg);
 726         }
 727
 728         if (voltage_uv)
 729                 st->vref_mv = voltage_uv / 1000;
 730         else
 731                 st->vref_mv = pdata->vref_mv;
 732
 733         if (pdata->ext_clk_Hz) {
 734                 st->mclk_hz = pdata->ext_clk_Hz;
 735                 st->ctrl_lb = AD5933_CTRL_EXT_SYSCLK;
 736         } else {
 737                 st->mclk_hz = AD5933_INT_OSC_FREQ_Hz;
 738                 st->ctrl_lb = AD5933_CTRL_INT_SYSCLK;
 739         }
 740
 741         ad5933_calc_out_ranges(st);
 742         INIT_DELAYED_WORK(&st->work, ad5933_work);
 743         st->poll_time_jiffies = msecs_to_jiffies(AD5933_POLL_TIME_ms);
 744
 745         indio_dev->dev.parent = &client->dev;
 746         indio_dev->info = &ad5933_info;
 747         indio_dev->name = id->name;
 748         indio_dev->modes = INDIO_DIRECT_MODE;
 749         indio_dev->channels = ad5933_channels;
 750         indio_dev->num_channels = ARRAY_SIZE(ad5933_channels);
 751
 752         ret = ad5933_register_ring_funcs_and_init(indio_dev);
 753         if (ret)
 754                 goto error_disable_reg;
 755
 756         ret = ad5933_setup(st);
 757         if (ret)
 758                 goto error_unreg_ring;
 759
 760         ret = iio_device_register(indio_dev);
 761         if (ret)
 762                 goto error_unreg_ring;
 763
 764         return 0;
 765
 766 error_unreg_ring:
 767         iio_kfifo_free(indio_dev->buffer);
 768 error_disable_reg:
 769         if (!IS_ERR(st->reg))
 770                 regulator_disable(st->reg);
 771
 772         return ret;
 773 }
 774
 775 static int ad5933_remove(struct i2c_client *client)
 776 {
 777         struct iio_dev *indio_dev = i2c_get_clientdata(client);
 778         struct ad5933_state *st = iio_priv(indio_dev);
 779
 780         iio_device_unregister(indio_dev);
 781         iio_kfifo_free(indio_dev->buffer);
 782         if (!IS_ERR(st->reg))
 783                 regulator_disable(st->reg);
 784
 785         return 0;
 786 }
 787
 788 static const struct i2c_device_id ad5933_id[] = {
 789         { "ad5933", 0 },
 790         { "ad5934", 0 },
 791         {}
 792 };
 793
 794 MODULE_DEVICE_TABLE(i2c, ad5933_id);
 795
 796 static struct i2c_driver ad5933_driver = {
 797         .driver = {
 798                 .name = "ad5933",
 799         },
 800         .probe = ad5933_probe,
 801         .remove = ad5933_remove,
 802         .id_table = ad5933_id,
 803 };
 804 module_i2c_driver(ad5933_driver);
 805
 806 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
 807 MODULE_DESCRIPTION("Analog Devices AD5933 Impedance Conv. Network Analyzer");
 808 MODULE_LICENSE("GPL v2");