f2d0391d387624e8a4e3a5af88ae26e0f2a0b45f
2 * Based on arch/arm/kernel/asm-offsets.c
4 * Copyright (C) 1995-2003 Russell King
5 * 2001-2002 Keith Owens
6 * Copyright (C) 2012 ARM Ltd.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <linux/sched.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/kvm_host.h>
25 #include <asm/fixmap.h>
26 #include <asm/thread_info.h>
27 #include <asm/memory.h>
28 #include <asm/smp_plat.h>
29 #include <asm/suspend.h>
30 #include <asm/vdso_datapage.h>
31 #include <linux/kbuild.h>
32 #include <linux/arm-smccc.h>
36 DEFINE(TSK_ACTIVE_MM
, offsetof(struct task_struct
, active_mm
));
38 #ifdef CONFIG_THREAD_INFO_IN_TASK
39 DEFINE(TSK_TI_FLAGS
, offsetof(struct task_struct
, thread_info
.flags
));
40 DEFINE(TSK_TI_PREEMPT
, offsetof(struct task_struct
, thread_info
.preempt_count
));
41 DEFINE(TSK_TI_ADDR_LIMIT
, offsetof(struct task_struct
, thread_info
.addr_limit
));
42 DEFINE(TSK_STACK
, offsetof(struct task_struct
, stack
));
44 DEFINE(TI_FLAGS
, offsetof(struct thread_info
, flags
));
45 DEFINE(TI_PREEMPT
, offsetof(struct thread_info
, preempt_count
));
46 DEFINE(TI_ADDR_LIMIT
, offsetof(struct thread_info
, addr_limit
));
48 #ifdef CONFIG_ARM64_SW_TTBR0_PAN
49 DEFINE(TSK_TI_TTBR0
, offsetof(struct thread_info
, ttbr0
));
52 DEFINE(THREAD_CPU_CONTEXT
, offsetof(struct task_struct
, thread
.cpu_context
));
54 DEFINE(S_X0
, offsetof(struct pt_regs
, regs
[0]));
55 DEFINE(S_X1
, offsetof(struct pt_regs
, regs
[1]));
56 DEFINE(S_X2
, offsetof(struct pt_regs
, regs
[2]));
57 DEFINE(S_X3
, offsetof(struct pt_regs
, regs
[3]));
58 DEFINE(S_X4
, offsetof(struct pt_regs
, regs
[4]));
59 DEFINE(S_X5
, offsetof(struct pt_regs
, regs
[5]));
60 DEFINE(S_X6
, offsetof(struct pt_regs
, regs
[6]));
61 DEFINE(S_X7
, offsetof(struct pt_regs
, regs
[7]));
62 DEFINE(S_LR
, offsetof(struct pt_regs
, regs
[30]));
63 DEFINE(S_SP
, offsetof(struct pt_regs
, sp
));
65 DEFINE(S_COMPAT_SP
, offsetof(struct pt_regs
, compat_sp
));
67 DEFINE(S_PSTATE
, offsetof(struct pt_regs
, pstate
));
68 DEFINE(S_PC
, offsetof(struct pt_regs
, pc
));
69 DEFINE(S_ORIG_X0
, offsetof(struct pt_regs
, orig_x0
));
70 DEFINE(S_SYSCALLNO
, offsetof(struct pt_regs
, syscallno
));
71 DEFINE(S_ORIG_ADDR_LIMIT
, offsetof(struct pt_regs
, orig_addr_limit
));
72 DEFINE(S_FRAME_SIZE
, sizeof(struct pt_regs
));
74 DEFINE(MM_CONTEXT_ID
, offsetof(struct mm_struct
, context
.id
.counter
));
76 DEFINE(VMA_VM_MM
, offsetof(struct vm_area_struct
, vm_mm
));
77 DEFINE(VMA_VM_FLAGS
, offsetof(struct vm_area_struct
, vm_flags
));
79 DEFINE(VM_EXEC
, VM_EXEC
);
81 DEFINE(PAGE_SZ
, PAGE_SIZE
);
83 DEFINE(DMA_BIDIRECTIONAL
, DMA_BIDIRECTIONAL
);
84 DEFINE(DMA_TO_DEVICE
, DMA_TO_DEVICE
);
85 DEFINE(DMA_FROM_DEVICE
, DMA_FROM_DEVICE
);
87 #ifdef CONFIG_THREAD_INFO_IN_TASK
88 DEFINE(CPU_BOOT_STACK
, offsetof(struct secondary_data
, stack
));
89 DEFINE(CPU_BOOT_TASK
, offsetof(struct secondary_data
, task
));
92 #ifdef CONFIG_KVM_ARM_HOST
93 DEFINE(VCPU_CONTEXT
, offsetof(struct kvm_vcpu
, arch
.ctxt
));
94 DEFINE(CPU_GP_REGS
, offsetof(struct kvm_cpu_context
, gp_regs
));
95 DEFINE(CPU_USER_PT_REGS
, offsetof(struct kvm_regs
, regs
));
96 DEFINE(CPU_FP_REGS
, offsetof(struct kvm_regs
, fp_regs
));
97 DEFINE(CPU_SP_EL1
, offsetof(struct kvm_regs
, sp_el1
));
98 DEFINE(CPU_ELR_EL1
, offsetof(struct kvm_regs
, elr_el1
));
99 DEFINE(CPU_SPSR
, offsetof(struct kvm_regs
, spsr
));
100 DEFINE(CPU_SYSREGS
, offsetof(struct kvm_cpu_context
, sys_regs
));
101 DEFINE(VCPU_ESR_EL2
, offsetof(struct kvm_vcpu
, arch
.fault
.esr_el2
));
102 DEFINE(VCPU_FAR_EL2
, offsetof(struct kvm_vcpu
, arch
.fault
.far_el2
));
103 DEFINE(VCPU_HPFAR_EL2
, offsetof(struct kvm_vcpu
, arch
.fault
.hpfar_el2
));
104 DEFINE(VCPU_DEBUG_FLAGS
, offsetof(struct kvm_vcpu
, arch
.debug_flags
));
105 DEFINE(VCPU_DEBUG_PTR
, offsetof(struct kvm_vcpu
, arch
.debug_ptr
));
106 DEFINE(DEBUG_BCR
, offsetof(struct kvm_guest_debug_arch
, dbg_bcr
));
107 DEFINE(DEBUG_BVR
, offsetof(struct kvm_guest_debug_arch
, dbg_bvr
));
108 DEFINE(DEBUG_WCR
, offsetof(struct kvm_guest_debug_arch
, dbg_wcr
));
109 DEFINE(DEBUG_WVR
, offsetof(struct kvm_guest_debug_arch
, dbg_wvr
));
110 DEFINE(VCPU_HCR_EL2
, offsetof(struct kvm_vcpu
, arch
.hcr_el2
));
111 DEFINE(VCPU_MDCR_EL2
, offsetof(struct kvm_vcpu
, arch
.mdcr_el2
));
112 DEFINE(VCPU_IRQ_LINES
, offsetof(struct kvm_vcpu
, arch
.irq_lines
));
113 DEFINE(VCPU_HOST_CONTEXT
, offsetof(struct kvm_vcpu
, arch
.host_cpu_context
));
114 DEFINE(VCPU_HOST_DEBUG_STATE
, offsetof(struct kvm_vcpu
, arch
.host_debug_state
));
115 DEFINE(VCPU_TIMER_CNTV_CTL
, offsetof(struct kvm_vcpu
, arch
.timer_cpu
.cntv_ctl
));
116 DEFINE(VCPU_TIMER_CNTV_CVAL
, offsetof(struct kvm_vcpu
, arch
.timer_cpu
.cntv_cval
));
117 DEFINE(KVM_TIMER_CNTVOFF
, offsetof(struct kvm
, arch
.timer
.cntvoff
));
118 DEFINE(KVM_TIMER_ENABLED
, offsetof(struct kvm
, arch
.timer
.enabled
));
119 DEFINE(VCPU_KVM
, offsetof(struct kvm_vcpu
, kvm
));
120 DEFINE(VCPU_VGIC_CPU
, offsetof(struct kvm_vcpu
, arch
.vgic_cpu
));
121 DEFINE(VGIC_V2_CPU_HCR
, offsetof(struct vgic_cpu
, vgic_v2
.vgic_hcr
));
122 DEFINE(VGIC_V2_CPU_VMCR
, offsetof(struct vgic_cpu
, vgic_v2
.vgic_vmcr
));
123 DEFINE(VGIC_V2_CPU_MISR
, offsetof(struct vgic_cpu
, vgic_v2
.vgic_misr
));
124 DEFINE(VGIC_V2_CPU_EISR
, offsetof(struct vgic_cpu
, vgic_v2
.vgic_eisr
));
125 DEFINE(VGIC_V2_CPU_ELRSR
, offsetof(struct vgic_cpu
, vgic_v2
.vgic_elrsr
));
126 DEFINE(VGIC_V2_CPU_APR
, offsetof(struct vgic_cpu
, vgic_v2
.vgic_apr
));
127 DEFINE(VGIC_V2_CPU_LR
, offsetof(struct vgic_cpu
, vgic_v2
.vgic_lr
));
128 DEFINE(VGIC_V3_CPU_SRE
, offsetof(struct vgic_cpu
, vgic_v3
.vgic_sre
));
129 DEFINE(VGIC_V3_CPU_HCR
, offsetof(struct vgic_cpu
, vgic_v3
.vgic_hcr
));
130 DEFINE(VGIC_V3_CPU_VMCR
, offsetof(struct vgic_cpu
, vgic_v3
.vgic_vmcr
));
131 DEFINE(VGIC_V3_CPU_MISR
, offsetof(struct vgic_cpu
, vgic_v3
.vgic_misr
));
132 DEFINE(VGIC_V3_CPU_EISR
, offsetof(struct vgic_cpu
, vgic_v3
.vgic_eisr
));
133 DEFINE(VGIC_V3_CPU_ELRSR
, offsetof(struct vgic_cpu
, vgic_v3
.vgic_elrsr
));
134 DEFINE(VGIC_V3_CPU_AP0R
, offsetof(struct vgic_cpu
, vgic_v3
.vgic_ap0r
));
135 DEFINE(VGIC_V3_CPU_AP1R
, offsetof(struct vgic_cpu
, vgic_v3
.vgic_ap1r
));
136 DEFINE(VGIC_V3_CPU_LR
, offsetof(struct vgic_cpu
, vgic_v3
.vgic_lr
));
137 DEFINE(VGIC_CPU_NR_LR
, offsetof(struct vgic_cpu
, nr_lr
));
138 DEFINE(KVM_VTTBR
, offsetof(struct kvm
, arch
.vttbr
));
139 DEFINE(KVM_VGIC_VCTRL
, offsetof(struct kvm
, arch
.vgic
.vctrl_base
));
142 DEFINE(CPU_SUSPEND_SZ
, sizeof(struct cpu_suspend_ctx
));
143 DEFINE(CPU_CTX_SP
, offsetof(struct cpu_suspend_ctx
, sp
));
144 DEFINE(MPIDR_HASH_MASK
, offsetof(struct mpidr_hash
, mask
));
145 DEFINE(MPIDR_HASH_SHIFTS
, offsetof(struct mpidr_hash
, shift_aff
));
146 DEFINE(SLEEP_SAVE_SP_SZ
, sizeof(struct sleep_save_sp
));
147 DEFINE(SLEEP_SAVE_SP_PHYS
, offsetof(struct sleep_save_sp
, save_ptr_stash_phys
));
148 DEFINE(SLEEP_SAVE_SP_VIRT
, offsetof(struct sleep_save_sp
, save_ptr_stash
));
150 DEFINE(ARM_SMCCC_RES_X0_OFFS
, offsetof(struct arm_smccc_res
, a0
));
151 DEFINE(ARM_SMCCC_RES_X2_OFFS
, offsetof(struct arm_smccc_res
, a2
));
153 #ifdef CONFIG_UNMAP_KERNEL_AT_EL0
154 DEFINE(TRAMP_VALIAS
, TRAMP_VALIAS
);