Revert "sync: fix dEQP-EGL*get_frame_timestamps* "
[GitHub/LineageOS/G12/android_hardware_amlogic_kernel-modules_mali-driver.git] / t83x / kernel / drivers / gpu / drm / pl111 / pl111_clcd_ext.h
1 /*
2 *
3 * (C) COPYRIGHT 2011-2013 ARM Limited. All rights reserved.
4 *
5 * This program is free software and is provided to you under the terms of the
6 * GNU General Public License version 2 as published by the Free Software
7 * Foundation, and any use by you of this program is subject to the terms
8 * of such GNU licence.
9 *
10 * A copy of the licence is included with the program, and can also be obtained
11 * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
12 * Boston, MA 02110-1301, USA.
13 *
14 */
15
16
17 /**
18 * pl111_clcd_ext.h
19 * Extended CLCD register definitions
20 */
21
22 #ifndef PL111_CLCD_EXT_H_
23 #define PL111_CLCD_EXT_H_
24
25 /*
26 * PL111 cursor register definitions not defined in the kernel's clcd header.
27 *
28 * TODO MIDEGL-1718: move to include/linux/amba/clcd.h
29 */
30
31 #define CLCD_CRSR_IMAGE 0x00000800
32 #define CLCD_CRSR_IMAGE_MAX_WORDS 256
33 #define CLCD_CRSR_IMAGE_WORDS_PER_LINE 4
34 #define CLCD_CRSR_IMAGE_PIXELS_PER_WORD 16
35
36 #define CLCD_CRSR_LBBP_COLOR_MASK 0x00000003
37 #define CLCD_CRSR_LBBP_BACKGROUND 0x0
38 #define CLCD_CRSR_LBBP_FOREGROUND 0x1
39 #define CLCD_CRSR_LBBP_TRANSPARENT 0x2
40 #define CLCD_CRSR_LBBP_INVERSE 0x3
41
42
43 #define CLCD_CRSR_CTRL 0x00000c00
44 #define CLCD_CRSR_CONFIG 0x00000c04
45 #define CLCD_CRSR_PALETTE_0 0x00000c08
46 #define CLCD_CRSR_PALETTE_1 0x00000c0c
47 #define CLCD_CRSR_XY 0x00000c10
48 #define CLCD_CRSR_CLIP 0x00000c14
49 #define CLCD_CRSR_IMSC 0x00000c20
50 #define CLCD_CRSR_ICR 0x00000c24
51 #define CLCD_CRSR_RIS 0x00000c28
52 #define CLCD_MIS 0x00000c2c
53
54 #define CRSR_CTRL_CRSR_ON (1 << 0)
55 #define CRSR_CTRL_CRSR_MAX 3
56 #define CRSR_CTRL_CRSR_NUM_SHIFT 4
57 #define CRSR_CTRL_CRSR_NUM_MASK \
58 (CRSR_CTRL_CRSR_MAX << CRSR_CTRL_CRSR_NUM_SHIFT)
59 #define CRSR_CTRL_CURSOR_0 0
60 #define CRSR_CTRL_CURSOR_1 1
61 #define CRSR_CTRL_CURSOR_2 2
62 #define CRSR_CTRL_CURSOR_3 3
63
64 #define CRSR_CONFIG_CRSR_SIZE (1 << 0)
65 #define CRSR_CONFIG_CRSR_FRAME_SYNC (1 << 1)
66
67 #define CRSR_PALETTE_RED_SHIFT 0
68 #define CRSR_PALETTE_GREEN_SHIFT 8
69 #define CRSR_PALETTE_BLUE_SHIFT 16
70
71 #define CRSR_PALETTE_RED_MASK 0x000000ff
72 #define CRSR_PALETTE_GREEN_MASK 0x0000ff00
73 #define CRSR_PALETTE_BLUE_MASK 0x00ff0000
74 #define CRSR_PALETTE_MASK (~0xff000000)
75
76 #define CRSR_XY_MASK 0x000003ff
77 #define CRSR_XY_X_SHIFT 0
78 #define CRSR_XY_Y_SHIFT 16
79
80 #define CRSR_XY_X_MASK CRSR_XY_MASK
81 #define CRSR_XY_Y_MASK (CRSR_XY_MASK << CRSR_XY_Y_SHIFT)
82
83 #define CRSR_CLIP_MASK 0x3f
84 #define CRSR_CLIP_X_SHIFT 0
85 #define CRSR_CLIP_Y_SHIFT 8
86
87 #define CRSR_CLIP_X_MASK CRSR_CLIP_MASK
88 #define CRSR_CLIP_Y_MASK (CRSR_CLIP_MASK << CRSR_CLIP_Y_SHIFT)
89
90 #define CRSR_IMSC_CRSR_IM (1<<0)
91 #define CRSR_ICR_CRSR_IC (1<<0)
92 #define CRSR_RIS_CRSR_RIS (1<<0)
93 #define CRSR_MIS_CRSR_MIS (1<<0)
94
95 #endif /* PL111_CLCD_EXT_H_ */