genirq: Provide compat handling for chip->ack()
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / kernel / irq / chip.c
CommitLineData
dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
7fe3730d 14#include <linux/msi.h>
dd87eb3a
TG
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
ced5b697 21static void dynamic_irq_init_x(unsigned int irq, bool keep_chip_data)
3a16d713 22{
0b8f1efa 23 struct irq_desc *desc;
3a16d713
EB
24 unsigned long flags;
25
0b8f1efa 26 desc = irq_to_desc(irq);
7d94f7ca 27 if (!desc) {
261c40c1 28 WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
3a16d713
EB
29 return;
30 }
31
32 /* Ensure we don't have left over values from a previous use of this irq */
239007b8 33 raw_spin_lock_irqsave(&desc->lock, flags);
3a16d713 34 desc->status = IRQ_DISABLED;
6b8ff312 35 desc->irq_data.chip = &no_irq_chip;
3a16d713
EB
36 desc->handle_irq = handle_bad_irq;
37 desc->depth = 1;
6b8ff312
TG
38 desc->irq_data.msi_desc = NULL;
39 desc->irq_data.handler_data = NULL;
ced5b697 40 if (!keep_chip_data)
6b8ff312 41 desc->irq_data.chip_data = NULL;
3a16d713
EB
42 desc->action = NULL;
43 desc->irq_count = 0;
44 desc->irqs_unhandled = 0;
45#ifdef CONFIG_SMP
6b8ff312 46 cpumask_setall(desc->irq_data.affinity);
7f7ace0c
MT
47#ifdef CONFIG_GENERIC_PENDING_IRQ
48 cpumask_clear(desc->pending_mask);
49#endif
3a16d713 50#endif
239007b8 51 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a16d713
EB
52}
53
54/**
ced5b697 55 * dynamic_irq_init - initialize a dynamically allocated irq
3a16d713
EB
56 * @irq: irq number to initialize
57 */
ced5b697
BP
58void dynamic_irq_init(unsigned int irq)
59{
60 dynamic_irq_init_x(irq, false);
61}
62
63/**
64 * dynamic_irq_init_keep_chip_data - initialize a dynamically allocated irq
65 * @irq: irq number to initialize
66 *
6b8ff312 67 * does not set irq_to_desc(irq)->irq_data.chip_data to NULL
ced5b697
BP
68 */
69void dynamic_irq_init_keep_chip_data(unsigned int irq)
70{
71 dynamic_irq_init_x(irq, true);
72}
73
74static void dynamic_irq_cleanup_x(unsigned int irq, bool keep_chip_data)
3a16d713 75{
d3c60047 76 struct irq_desc *desc = irq_to_desc(irq);
3a16d713
EB
77 unsigned long flags;
78
7d94f7ca 79 if (!desc) {
261c40c1 80 WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
3a16d713
EB
81 return;
82 }
83
239007b8 84 raw_spin_lock_irqsave(&desc->lock, flags);
1f80025e 85 if (desc->action) {
239007b8 86 raw_spin_unlock_irqrestore(&desc->lock, flags);
261c40c1 87 WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n",
1f80025e 88 irq);
1f80025e
EB
89 return;
90 }
6b8ff312
TG
91 desc->irq_data.msi_desc = NULL;
92 desc->irq_data.handler_data = NULL;
ced5b697 93 if (!keep_chip_data)
6b8ff312 94 desc->irq_data.chip_data = NULL;
3a16d713 95 desc->handle_irq = handle_bad_irq;
6b8ff312 96 desc->irq_data.chip = &no_irq_chip;
b6f3b780 97 desc->name = NULL;
0f3c2a89 98 clear_kstat_irqs(desc);
239007b8 99 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a16d713
EB
100}
101
ced5b697
BP
102/**
103 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
104 * @irq: irq number to initialize
105 */
106void dynamic_irq_cleanup(unsigned int irq)
107{
108 dynamic_irq_cleanup_x(irq, false);
109}
110
111/**
112 * dynamic_irq_cleanup_keep_chip_data - cleanup a dynamically allocated irq
113 * @irq: irq number to initialize
114 *
6b8ff312 115 * does not set irq_to_desc(irq)->irq_data.chip_data to NULL
ced5b697
BP
116 */
117void dynamic_irq_cleanup_keep_chip_data(unsigned int irq)
118{
119 dynamic_irq_cleanup_x(irq, true);
120}
121
3a16d713 122
dd87eb3a
TG
123/**
124 * set_irq_chip - set the irq chip for an irq
125 * @irq: irq number
126 * @chip: pointer to irq chip description structure
127 */
128int set_irq_chip(unsigned int irq, struct irq_chip *chip)
129{
d3c60047 130 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
131 unsigned long flags;
132
7d94f7ca 133 if (!desc) {
261c40c1 134 WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
dd87eb3a
TG
135 return -EINVAL;
136 }
137
138 if (!chip)
139 chip = &no_irq_chip;
140
239007b8 141 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a 142 irq_chip_set_defaults(chip);
6b8ff312 143 desc->irq_data.chip = chip;
239007b8 144 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
145
146 return 0;
147}
148EXPORT_SYMBOL(set_irq_chip);
149
150/**
0c5d1eb7 151 * set_irq_type - set the irq trigger type for an irq
dd87eb3a 152 * @irq: irq number
0c5d1eb7 153 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
dd87eb3a
TG
154 */
155int set_irq_type(unsigned int irq, unsigned int type)
156{
d3c60047 157 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
158 unsigned long flags;
159 int ret = -ENXIO;
160
7d94f7ca 161 if (!desc) {
dd87eb3a
TG
162 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
163 return -ENODEV;
164 }
165
f2b662da 166 type &= IRQ_TYPE_SENSE_MASK;
0c5d1eb7
DB
167 if (type == IRQ_TYPE_NONE)
168 return 0;
169
239007b8 170 raw_spin_lock_irqsave(&desc->lock, flags);
0b3682ba 171 ret = __irq_set_trigger(desc, irq, type);
239007b8 172 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
173 return ret;
174}
175EXPORT_SYMBOL(set_irq_type);
176
177/**
178 * set_irq_data - set irq type data for an irq
179 * @irq: Interrupt number
180 * @data: Pointer to interrupt specific data
181 *
182 * Set the hardware irq controller data for an irq
183 */
184int set_irq_data(unsigned int irq, void *data)
185{
d3c60047 186 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
187 unsigned long flags;
188
7d94f7ca 189 if (!desc) {
dd87eb3a
TG
190 printk(KERN_ERR
191 "Trying to install controller data for IRQ%d\n", irq);
192 return -EINVAL;
193 }
194
239007b8 195 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 196 desc->irq_data.handler_data = data;
239007b8 197 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
198 return 0;
199}
200EXPORT_SYMBOL(set_irq_data);
201
5b912c10 202/**
24b26d42 203 * set_irq_msi - set MSI descriptor data for an irq
5b912c10 204 * @irq: Interrupt number
472900b8 205 * @entry: Pointer to MSI descriptor data
5b912c10 206 *
24b26d42 207 * Set the MSI descriptor entry for an irq
5b912c10
EB
208 */
209int set_irq_msi(unsigned int irq, struct msi_desc *entry)
210{
d3c60047 211 struct irq_desc *desc = irq_to_desc(irq);
5b912c10
EB
212 unsigned long flags;
213
7d94f7ca 214 if (!desc) {
5b912c10
EB
215 printk(KERN_ERR
216 "Trying to install msi data for IRQ%d\n", irq);
217 return -EINVAL;
218 }
7d94f7ca 219
239007b8 220 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 221 desc->irq_data.msi_desc = entry;
7fe3730d
ME
222 if (entry)
223 entry->irq = irq;
239007b8 224 raw_spin_unlock_irqrestore(&desc->lock, flags);
5b912c10
EB
225 return 0;
226}
227
dd87eb3a
TG
228/**
229 * set_irq_chip_data - set irq chip data for an irq
230 * @irq: Interrupt number
231 * @data: Pointer to chip specific data
232 *
233 * Set the hardware irq chip data for an irq
234 */
235int set_irq_chip_data(unsigned int irq, void *data)
236{
d3c60047 237 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
238 unsigned long flags;
239
7d94f7ca
YL
240 if (!desc) {
241 printk(KERN_ERR
242 "Trying to install chip data for IRQ%d\n", irq);
243 return -EINVAL;
244 }
245
6b8ff312 246 if (!desc->irq_data.chip) {
dd87eb3a
TG
247 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
248 return -EINVAL;
249 }
250
239007b8 251 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 252 desc->irq_data.chip_data = data;
239007b8 253 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
254
255 return 0;
256}
257EXPORT_SYMBOL(set_irq_chip_data);
258
399b5da2
TG
259/**
260 * set_irq_nested_thread - Set/Reset the IRQ_NESTED_THREAD flag of an irq
261 *
262 * @irq: Interrupt number
263 * @nest: 0 to clear / 1 to set the IRQ_NESTED_THREAD flag
264 *
265 * The IRQ_NESTED_THREAD flag indicates that on
266 * request_threaded_irq() no separate interrupt thread should be
267 * created for the irq as the handler are called nested in the
268 * context of a demultiplexing interrupt handler thread.
269 */
270void set_irq_nested_thread(unsigned int irq, int nest)
271{
272 struct irq_desc *desc = irq_to_desc(irq);
273 unsigned long flags;
274
275 if (!desc)
276 return;
277
239007b8 278 raw_spin_lock_irqsave(&desc->lock, flags);
399b5da2
TG
279 if (nest)
280 desc->status |= IRQ_NESTED_THREAD;
281 else
282 desc->status &= ~IRQ_NESTED_THREAD;
239007b8 283 raw_spin_unlock_irqrestore(&desc->lock, flags);
399b5da2
TG
284}
285EXPORT_SYMBOL_GPL(set_irq_nested_thread);
286
dd87eb3a
TG
287/*
288 * default enable function
289 */
290static void default_enable(unsigned int irq)
291{
d3c60047 292 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a 293
0eda58b7 294 desc->irq_data.chip->irq_unmask(&desc->irq_data);
dd87eb3a
TG
295 desc->status &= ~IRQ_MASKED;
296}
297
298/*
299 * default disable function
300 */
301static void default_disable(unsigned int irq)
302{
dd87eb3a
TG
303}
304
305/*
306 * default startup function
307 */
308static unsigned int default_startup(unsigned int irq)
309{
d3c60047 310 struct irq_desc *desc = irq_to_desc(irq);
08678b08 311
6b8ff312 312 desc->irq_data.chip->enable(irq);
dd87eb3a
TG
313 return 0;
314}
315
89d694b9
TG
316/*
317 * default shutdown function
318 */
319static void default_shutdown(unsigned int irq)
320{
d3c60047 321 struct irq_desc *desc = irq_to_desc(irq);
89d694b9 322
e2c0f8ff 323 desc->irq_data.chip->irq_mask(&desc->irq_data);
89d694b9
TG
324 desc->status |= IRQ_MASKED;
325}
326
3876ec9e 327/* Temporary migration helpers */
e2c0f8ff
TG
328static void compat_irq_mask(struct irq_data *data)
329{
330 data->chip->mask(data->irq);
331}
332
0eda58b7
TG
333static void compat_irq_unmask(struct irq_data *data)
334{
335 data->chip->unmask(data->irq);
336}
337
22a49163
TG
338static void compat_irq_ack(struct irq_data *data)
339{
340 data->chip->ack(data->irq);
341}
342
3876ec9e
TG
343static void compat_bus_lock(struct irq_data *data)
344{
345 data->chip->bus_lock(data->irq);
346}
347
348static void compat_bus_sync_unlock(struct irq_data *data)
349{
350 data->chip->bus_sync_unlock(data->irq);
351}
352
dd87eb3a
TG
353/*
354 * Fixup enable/disable function pointers
355 */
356void irq_chip_set_defaults(struct irq_chip *chip)
357{
358 if (!chip->enable)
359 chip->enable = default_enable;
360 if (!chip->disable)
361 chip->disable = default_disable;
362 if (!chip->startup)
363 chip->startup = default_startup;
89d694b9
TG
364 /*
365 * We use chip->disable, when the user provided its own. When
366 * we have default_disable set for chip->disable, then we need
367 * to use default_shutdown, otherwise the irq line is not
368 * disabled on free_irq():
369 */
dd87eb3a 370 if (!chip->shutdown)
89d694b9
TG
371 chip->shutdown = chip->disable != default_disable ?
372 chip->disable : default_shutdown;
b86432b4
ZY
373 if (!chip->end)
374 chip->end = dummy_irq_chip.end;
3876ec9e
TG
375
376 if (chip->bus_lock)
377 chip->irq_bus_lock = compat_bus_lock;
378 if (chip->bus_sync_unlock)
379 chip->irq_bus_sync_unlock = compat_bus_sync_unlock;
e2c0f8ff
TG
380 if (chip->mask)
381 chip->irq_mask = compat_irq_mask;
0eda58b7
TG
382 if (chip->unmask)
383 chip->irq_unmask = compat_irq_unmask;
22a49163
TG
384 if (chip->ack)
385 chip->irq_ack = compat_irq_ack;
dd87eb3a
TG
386}
387
388static inline void mask_ack_irq(struct irq_desc *desc, int irq)
389{
6b8ff312
TG
390 if (desc->irq_data.chip->mask_ack)
391 desc->irq_data.chip->mask_ack(irq);
dd87eb3a 392 else {
e2c0f8ff 393 desc->irq_data.chip->irq_mask(&desc->irq_data);
22a49163
TG
394 if (desc->irq_data.chip->irq_ack)
395 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a 396 }
0b1adaa0
TG
397 desc->status |= IRQ_MASKED;
398}
399
e2c0f8ff 400static inline void mask_irq(struct irq_desc *desc)
0b1adaa0 401{
e2c0f8ff
TG
402 if (desc->irq_data.chip->irq_mask) {
403 desc->irq_data.chip->irq_mask(&desc->irq_data);
0b1adaa0
TG
404 desc->status |= IRQ_MASKED;
405 }
406}
407
0eda58b7 408static inline void unmask_irq(struct irq_desc *desc)
0b1adaa0 409{
0eda58b7
TG
410 if (desc->irq_data.chip->irq_unmask) {
411 desc->irq_data.chip->irq_unmask(&desc->irq_data);
0b1adaa0
TG
412 desc->status &= ~IRQ_MASKED;
413 }
dd87eb3a
TG
414}
415
399b5da2
TG
416/*
417 * handle_nested_irq - Handle a nested irq from a irq thread
418 * @irq: the interrupt number
419 *
420 * Handle interrupts which are nested into a threaded interrupt
421 * handler. The handler function is called inside the calling
422 * threads context.
423 */
424void handle_nested_irq(unsigned int irq)
425{
426 struct irq_desc *desc = irq_to_desc(irq);
427 struct irqaction *action;
428 irqreturn_t action_ret;
429
430 might_sleep();
431
239007b8 432 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
433
434 kstat_incr_irqs_this_cpu(irq, desc);
435
436 action = desc->action;
437 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
438 goto out_unlock;
439
440 desc->status |= IRQ_INPROGRESS;
239007b8 441 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
442
443 action_ret = action->thread_fn(action->irq, action->dev_id);
444 if (!noirqdebug)
445 note_interrupt(irq, desc, action_ret);
446
239007b8 447 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
448 desc->status &= ~IRQ_INPROGRESS;
449
450out_unlock:
239007b8 451 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
452}
453EXPORT_SYMBOL_GPL(handle_nested_irq);
454
dd87eb3a
TG
455/**
456 * handle_simple_irq - Simple and software-decoded IRQs.
457 * @irq: the interrupt number
458 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
459 *
460 * Simple interrupts are either sent from a demultiplexing interrupt
461 * handler or come from hardware, where no interrupt hardware control
462 * is necessary.
463 *
464 * Note: The caller is expected to handle the ack, clear, mask and
465 * unmask issues if necessary.
466 */
7ad5b3a5 467void
7d12e780 468handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
469{
470 struct irqaction *action;
471 irqreturn_t action_ret;
dd87eb3a 472
239007b8 473 raw_spin_lock(&desc->lock);
dd87eb3a
TG
474
475 if (unlikely(desc->status & IRQ_INPROGRESS))
476 goto out_unlock;
971e5b35 477 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 478 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
479
480 action = desc->action;
971e5b35 481 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
dd87eb3a
TG
482 goto out_unlock;
483
484 desc->status |= IRQ_INPROGRESS;
239007b8 485 raw_spin_unlock(&desc->lock);
dd87eb3a 486
7d12e780 487 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 488 if (!noirqdebug)
7d12e780 489 note_interrupt(irq, desc, action_ret);
dd87eb3a 490
239007b8 491 raw_spin_lock(&desc->lock);
dd87eb3a
TG
492 desc->status &= ~IRQ_INPROGRESS;
493out_unlock:
239007b8 494 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
495}
496
497/**
498 * handle_level_irq - Level type irq handler
499 * @irq: the interrupt number
500 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
501 *
502 * Level type interrupts are active as long as the hardware line has
503 * the active level. This may require to mask the interrupt and unmask
504 * it after the associated handler has acknowledged the device, so the
505 * interrupt line is back to inactive.
506 */
7ad5b3a5 507void
7d12e780 508handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 509{
dd87eb3a
TG
510 struct irqaction *action;
511 irqreturn_t action_ret;
512
239007b8 513 raw_spin_lock(&desc->lock);
dd87eb3a
TG
514 mask_ack_irq(desc, irq);
515
516 if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6 517 goto out_unlock;
dd87eb3a 518 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 519 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
520
521 /*
522 * If its disabled or no action available
523 * keep it masked and get out of here
524 */
525 action = desc->action;
49663421 526 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
86998aa6 527 goto out_unlock;
dd87eb3a
TG
528
529 desc->status |= IRQ_INPROGRESS;
239007b8 530 raw_spin_unlock(&desc->lock);
dd87eb3a 531
7d12e780 532 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 533 if (!noirqdebug)
7d12e780 534 note_interrupt(irq, desc, action_ret);
dd87eb3a 535
239007b8 536 raw_spin_lock(&desc->lock);
dd87eb3a 537 desc->status &= ~IRQ_INPROGRESS;
b25c340c 538
0b1adaa0 539 if (!(desc->status & (IRQ_DISABLED | IRQ_ONESHOT)))
0eda58b7 540 unmask_irq(desc);
86998aa6 541out_unlock:
239007b8 542 raw_spin_unlock(&desc->lock);
dd87eb3a 543}
14819ea1 544EXPORT_SYMBOL_GPL(handle_level_irq);
dd87eb3a
TG
545
546/**
47c2a3aa 547 * handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a
TG
548 * @irq: the interrupt number
549 * @desc: the interrupt description structure for this irq
dd87eb3a 550 *
47c2a3aa 551 * Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a
TG
552 * call when the interrupt has been serviced. This enables support
553 * for modern forms of interrupt handlers, which handle the flow
554 * details in hardware, transparently.
555 */
7ad5b3a5 556void
7d12e780 557handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 558{
dd87eb3a
TG
559 struct irqaction *action;
560 irqreturn_t action_ret;
561
239007b8 562 raw_spin_lock(&desc->lock);
dd87eb3a
TG
563
564 if (unlikely(desc->status & IRQ_INPROGRESS))
565 goto out;
566
567 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 568 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
569
570 /*
571 * If its disabled or no action available
76d21601 572 * then mask it and get out of here:
dd87eb3a
TG
573 */
574 action = desc->action;
98bb244b
BH
575 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
576 desc->status |= IRQ_PENDING;
e2c0f8ff 577 mask_irq(desc);
dd87eb3a 578 goto out;
98bb244b 579 }
dd87eb3a
TG
580
581 desc->status |= IRQ_INPROGRESS;
98bb244b 582 desc->status &= ~IRQ_PENDING;
239007b8 583 raw_spin_unlock(&desc->lock);
dd87eb3a 584
7d12e780 585 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 586 if (!noirqdebug)
7d12e780 587 note_interrupt(irq, desc, action_ret);
dd87eb3a 588
239007b8 589 raw_spin_lock(&desc->lock);
dd87eb3a
TG
590 desc->status &= ~IRQ_INPROGRESS;
591out:
6b8ff312 592 desc->irq_data.chip->eoi(irq);
dd87eb3a 593
239007b8 594 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
595}
596
597/**
598 * handle_edge_irq - edge type IRQ handler
599 * @irq: the interrupt number
600 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
601 *
602 * Interrupt occures on the falling and/or rising edge of a hardware
603 * signal. The occurence is latched into the irq controller hardware
604 * and must be acked in order to be reenabled. After the ack another
605 * interrupt can happen on the same source even before the first one
dfff0615 606 * is handled by the associated event handler. If this happens it
dd87eb3a
TG
607 * might be necessary to disable (mask) the interrupt depending on the
608 * controller hardware. This requires to reenable the interrupt inside
609 * of the loop which handles the interrupts which have arrived while
610 * the handler was running. If all pending interrupts are handled, the
611 * loop is left.
612 */
7ad5b3a5 613void
7d12e780 614handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 615{
239007b8 616 raw_spin_lock(&desc->lock);
dd87eb3a
TG
617
618 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
619
620 /*
621 * If we're currently running this IRQ, or its disabled,
622 * we shouldn't process the IRQ. Mark it pending, handle
623 * the necessary masking and go out
624 */
625 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
626 !desc->action)) {
627 desc->status |= (IRQ_PENDING | IRQ_MASKED);
628 mask_ack_irq(desc, irq);
629 goto out_unlock;
630 }
d6c88a50 631 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
632
633 /* Start handling the irq */
22a49163 634 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a
TG
635
636 /* Mark the IRQ currently in progress.*/
637 desc->status |= IRQ_INPROGRESS;
638
639 do {
640 struct irqaction *action = desc->action;
641 irqreturn_t action_ret;
642
643 if (unlikely(!action)) {
e2c0f8ff 644 mask_irq(desc);
dd87eb3a
TG
645 goto out_unlock;
646 }
647
648 /*
649 * When another irq arrived while we were handling
650 * one, we could have masked the irq.
651 * Renable it, if it was not disabled in meantime.
652 */
653 if (unlikely((desc->status &
654 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
655 (IRQ_PENDING | IRQ_MASKED))) {
0eda58b7 656 unmask_irq(desc);
dd87eb3a
TG
657 }
658
659 desc->status &= ~IRQ_PENDING;
239007b8 660 raw_spin_unlock(&desc->lock);
7d12e780 661 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 662 if (!noirqdebug)
7d12e780 663 note_interrupt(irq, desc, action_ret);
239007b8 664 raw_spin_lock(&desc->lock);
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665
666 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
667
668 desc->status &= ~IRQ_INPROGRESS;
669out_unlock:
239007b8 670 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
671}
672
dd87eb3a 673/**
24b26d42 674 * handle_percpu_irq - Per CPU local irq handler
dd87eb3a
TG
675 * @irq: the interrupt number
676 * @desc: the interrupt description structure for this irq
dd87eb3a
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677 *
678 * Per CPU interrupts on SMP machines without locking requirements
679 */
7ad5b3a5 680void
7d12e780 681handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
682{
683 irqreturn_t action_ret;
684
d6c88a50 685 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a 686
22a49163
TG
687 if (desc->irq_data.chip->irq_ack)
688 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a 689
7d12e780 690 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 691 if (!noirqdebug)
7d12e780 692 note_interrupt(irq, desc, action_ret);
dd87eb3a 693
6b8ff312
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694 if (desc->irq_data.chip->eoi)
695 desc->irq_data.chip->eoi(irq);
dd87eb3a
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696}
697
dd87eb3a 698void
a460e745
IM
699__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
700 const char *name)
dd87eb3a 701{
d3c60047 702 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
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703 unsigned long flags;
704
7d94f7ca 705 if (!desc) {
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706 printk(KERN_ERR
707 "Trying to install type control for IRQ%d\n", irq);
708 return;
709 }
710
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711 if (!handle)
712 handle = handle_bad_irq;
6b8ff312 713 else if (desc->irq_data.chip == &no_irq_chip) {
f8b5473f 714 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 715 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
716 /*
717 * Some ARM implementations install a handler for really dumb
718 * interrupt hardware without setting an irq_chip. This worked
719 * with the ARM no_irq_chip but the check in setup_irq would
720 * prevent us to setup the interrupt at all. Switch it to
721 * dummy_irq_chip for easy transition.
722 */
6b8ff312 723 desc->irq_data.chip = &dummy_irq_chip;
f8b5473f 724 }
dd87eb3a 725
3876ec9e 726 chip_bus_lock(desc);
239007b8 727 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a
TG
728
729 /* Uninstall? */
730 if (handle == handle_bad_irq) {
6b8ff312 731 if (desc->irq_data.chip != &no_irq_chip)
5575ddf7 732 mask_ack_irq(desc, irq);
dd87eb3a
TG
733 desc->status |= IRQ_DISABLED;
734 desc->depth = 1;
735 }
736 desc->handle_irq = handle;
a460e745 737 desc->name = name;
dd87eb3a
TG
738
739 if (handle != handle_bad_irq && is_chained) {
740 desc->status &= ~IRQ_DISABLED;
741 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
742 desc->depth = 0;
6b8ff312 743 desc->irq_data.chip->startup(irq);
dd87eb3a 744 }
239007b8 745 raw_spin_unlock_irqrestore(&desc->lock, flags);
3876ec9e 746 chip_bus_sync_unlock(desc);
dd87eb3a 747}
14819ea1 748EXPORT_SYMBOL_GPL(__set_irq_handler);
dd87eb3a
TG
749
750void
751set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 752 irq_flow_handler_t handle)
dd87eb3a
TG
753{
754 set_irq_chip(irq, chip);
a460e745 755 __set_irq_handler(irq, handle, 0, NULL);
dd87eb3a
TG
756}
757
a460e745
IM
758void
759set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
760 irq_flow_handler_t handle, const char *name)
dd87eb3a 761{
a460e745
IM
762 set_irq_chip(irq, chip);
763 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 764}
46f4f8f6 765
860652bf 766void set_irq_noprobe(unsigned int irq)
46f4f8f6 767{
d3c60047 768 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
769 unsigned long flags;
770
7d94f7ca 771 if (!desc) {
46f4f8f6 772 printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq);
46f4f8f6
RB
773 return;
774 }
775
239007b8 776 raw_spin_lock_irqsave(&desc->lock, flags);
46f4f8f6 777 desc->status |= IRQ_NOPROBE;
239007b8 778 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6
RB
779}
780
860652bf 781void set_irq_probe(unsigned int irq)
46f4f8f6 782{
d3c60047 783 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
784 unsigned long flags;
785
7d94f7ca 786 if (!desc) {
46f4f8f6 787 printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq);
46f4f8f6
RB
788 return;
789 }
790
239007b8 791 raw_spin_lock_irqsave(&desc->lock, flags);
46f4f8f6 792 desc->status &= ~IRQ_NOPROBE;
239007b8 793 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6 794}