genirq: Provide compat handling for chip->mask()
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / kernel / irq / chip.c
CommitLineData
dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
7fe3730d 14#include <linux/msi.h>
dd87eb3a
TG
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
ced5b697 21static void dynamic_irq_init_x(unsigned int irq, bool keep_chip_data)
3a16d713 22{
0b8f1efa 23 struct irq_desc *desc;
3a16d713
EB
24 unsigned long flags;
25
0b8f1efa 26 desc = irq_to_desc(irq);
7d94f7ca 27 if (!desc) {
261c40c1 28 WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
3a16d713
EB
29 return;
30 }
31
32 /* Ensure we don't have left over values from a previous use of this irq */
239007b8 33 raw_spin_lock_irqsave(&desc->lock, flags);
3a16d713 34 desc->status = IRQ_DISABLED;
6b8ff312 35 desc->irq_data.chip = &no_irq_chip;
3a16d713
EB
36 desc->handle_irq = handle_bad_irq;
37 desc->depth = 1;
6b8ff312
TG
38 desc->irq_data.msi_desc = NULL;
39 desc->irq_data.handler_data = NULL;
ced5b697 40 if (!keep_chip_data)
6b8ff312 41 desc->irq_data.chip_data = NULL;
3a16d713
EB
42 desc->action = NULL;
43 desc->irq_count = 0;
44 desc->irqs_unhandled = 0;
45#ifdef CONFIG_SMP
6b8ff312 46 cpumask_setall(desc->irq_data.affinity);
7f7ace0c
MT
47#ifdef CONFIG_GENERIC_PENDING_IRQ
48 cpumask_clear(desc->pending_mask);
49#endif
3a16d713 50#endif
239007b8 51 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a16d713
EB
52}
53
54/**
ced5b697 55 * dynamic_irq_init - initialize a dynamically allocated irq
3a16d713
EB
56 * @irq: irq number to initialize
57 */
ced5b697
BP
58void dynamic_irq_init(unsigned int irq)
59{
60 dynamic_irq_init_x(irq, false);
61}
62
63/**
64 * dynamic_irq_init_keep_chip_data - initialize a dynamically allocated irq
65 * @irq: irq number to initialize
66 *
6b8ff312 67 * does not set irq_to_desc(irq)->irq_data.chip_data to NULL
ced5b697
BP
68 */
69void dynamic_irq_init_keep_chip_data(unsigned int irq)
70{
71 dynamic_irq_init_x(irq, true);
72}
73
74static void dynamic_irq_cleanup_x(unsigned int irq, bool keep_chip_data)
3a16d713 75{
d3c60047 76 struct irq_desc *desc = irq_to_desc(irq);
3a16d713
EB
77 unsigned long flags;
78
7d94f7ca 79 if (!desc) {
261c40c1 80 WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
3a16d713
EB
81 return;
82 }
83
239007b8 84 raw_spin_lock_irqsave(&desc->lock, flags);
1f80025e 85 if (desc->action) {
239007b8 86 raw_spin_unlock_irqrestore(&desc->lock, flags);
261c40c1 87 WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n",
1f80025e 88 irq);
1f80025e
EB
89 return;
90 }
6b8ff312
TG
91 desc->irq_data.msi_desc = NULL;
92 desc->irq_data.handler_data = NULL;
ced5b697 93 if (!keep_chip_data)
6b8ff312 94 desc->irq_data.chip_data = NULL;
3a16d713 95 desc->handle_irq = handle_bad_irq;
6b8ff312 96 desc->irq_data.chip = &no_irq_chip;
b6f3b780 97 desc->name = NULL;
0f3c2a89 98 clear_kstat_irqs(desc);
239007b8 99 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a16d713
EB
100}
101
ced5b697
BP
102/**
103 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
104 * @irq: irq number to initialize
105 */
106void dynamic_irq_cleanup(unsigned int irq)
107{
108 dynamic_irq_cleanup_x(irq, false);
109}
110
111/**
112 * dynamic_irq_cleanup_keep_chip_data - cleanup a dynamically allocated irq
113 * @irq: irq number to initialize
114 *
6b8ff312 115 * does not set irq_to_desc(irq)->irq_data.chip_data to NULL
ced5b697
BP
116 */
117void dynamic_irq_cleanup_keep_chip_data(unsigned int irq)
118{
119 dynamic_irq_cleanup_x(irq, true);
120}
121
3a16d713 122
dd87eb3a
TG
123/**
124 * set_irq_chip - set the irq chip for an irq
125 * @irq: irq number
126 * @chip: pointer to irq chip description structure
127 */
128int set_irq_chip(unsigned int irq, struct irq_chip *chip)
129{
d3c60047 130 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
131 unsigned long flags;
132
7d94f7ca 133 if (!desc) {
261c40c1 134 WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
dd87eb3a
TG
135 return -EINVAL;
136 }
137
138 if (!chip)
139 chip = &no_irq_chip;
140
239007b8 141 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a 142 irq_chip_set_defaults(chip);
6b8ff312 143 desc->irq_data.chip = chip;
239007b8 144 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
145
146 return 0;
147}
148EXPORT_SYMBOL(set_irq_chip);
149
150/**
0c5d1eb7 151 * set_irq_type - set the irq trigger type for an irq
dd87eb3a 152 * @irq: irq number
0c5d1eb7 153 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
dd87eb3a
TG
154 */
155int set_irq_type(unsigned int irq, unsigned int type)
156{
d3c60047 157 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
158 unsigned long flags;
159 int ret = -ENXIO;
160
7d94f7ca 161 if (!desc) {
dd87eb3a
TG
162 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
163 return -ENODEV;
164 }
165
f2b662da 166 type &= IRQ_TYPE_SENSE_MASK;
0c5d1eb7
DB
167 if (type == IRQ_TYPE_NONE)
168 return 0;
169
239007b8 170 raw_spin_lock_irqsave(&desc->lock, flags);
0b3682ba 171 ret = __irq_set_trigger(desc, irq, type);
239007b8 172 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
173 return ret;
174}
175EXPORT_SYMBOL(set_irq_type);
176
177/**
178 * set_irq_data - set irq type data for an irq
179 * @irq: Interrupt number
180 * @data: Pointer to interrupt specific data
181 *
182 * Set the hardware irq controller data for an irq
183 */
184int set_irq_data(unsigned int irq, void *data)
185{
d3c60047 186 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
187 unsigned long flags;
188
7d94f7ca 189 if (!desc) {
dd87eb3a
TG
190 printk(KERN_ERR
191 "Trying to install controller data for IRQ%d\n", irq);
192 return -EINVAL;
193 }
194
239007b8 195 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 196 desc->irq_data.handler_data = data;
239007b8 197 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
198 return 0;
199}
200EXPORT_SYMBOL(set_irq_data);
201
5b912c10 202/**
24b26d42 203 * set_irq_msi - set MSI descriptor data for an irq
5b912c10 204 * @irq: Interrupt number
472900b8 205 * @entry: Pointer to MSI descriptor data
5b912c10 206 *
24b26d42 207 * Set the MSI descriptor entry for an irq
5b912c10
EB
208 */
209int set_irq_msi(unsigned int irq, struct msi_desc *entry)
210{
d3c60047 211 struct irq_desc *desc = irq_to_desc(irq);
5b912c10
EB
212 unsigned long flags;
213
7d94f7ca 214 if (!desc) {
5b912c10
EB
215 printk(KERN_ERR
216 "Trying to install msi data for IRQ%d\n", irq);
217 return -EINVAL;
218 }
7d94f7ca 219
239007b8 220 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 221 desc->irq_data.msi_desc = entry;
7fe3730d
ME
222 if (entry)
223 entry->irq = irq;
239007b8 224 raw_spin_unlock_irqrestore(&desc->lock, flags);
5b912c10
EB
225 return 0;
226}
227
dd87eb3a
TG
228/**
229 * set_irq_chip_data - set irq chip data for an irq
230 * @irq: Interrupt number
231 * @data: Pointer to chip specific data
232 *
233 * Set the hardware irq chip data for an irq
234 */
235int set_irq_chip_data(unsigned int irq, void *data)
236{
d3c60047 237 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
238 unsigned long flags;
239
7d94f7ca
YL
240 if (!desc) {
241 printk(KERN_ERR
242 "Trying to install chip data for IRQ%d\n", irq);
243 return -EINVAL;
244 }
245
6b8ff312 246 if (!desc->irq_data.chip) {
dd87eb3a
TG
247 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
248 return -EINVAL;
249 }
250
239007b8 251 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 252 desc->irq_data.chip_data = data;
239007b8 253 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
254
255 return 0;
256}
257EXPORT_SYMBOL(set_irq_chip_data);
258
399b5da2
TG
259/**
260 * set_irq_nested_thread - Set/Reset the IRQ_NESTED_THREAD flag of an irq
261 *
262 * @irq: Interrupt number
263 * @nest: 0 to clear / 1 to set the IRQ_NESTED_THREAD flag
264 *
265 * The IRQ_NESTED_THREAD flag indicates that on
266 * request_threaded_irq() no separate interrupt thread should be
267 * created for the irq as the handler are called nested in the
268 * context of a demultiplexing interrupt handler thread.
269 */
270void set_irq_nested_thread(unsigned int irq, int nest)
271{
272 struct irq_desc *desc = irq_to_desc(irq);
273 unsigned long flags;
274
275 if (!desc)
276 return;
277
239007b8 278 raw_spin_lock_irqsave(&desc->lock, flags);
399b5da2
TG
279 if (nest)
280 desc->status |= IRQ_NESTED_THREAD;
281 else
282 desc->status &= ~IRQ_NESTED_THREAD;
239007b8 283 raw_spin_unlock_irqrestore(&desc->lock, flags);
399b5da2
TG
284}
285EXPORT_SYMBOL_GPL(set_irq_nested_thread);
286
dd87eb3a
TG
287/*
288 * default enable function
289 */
290static void default_enable(unsigned int irq)
291{
d3c60047 292 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a 293
6b8ff312 294 desc->irq_data.chip->unmask(irq);
dd87eb3a
TG
295 desc->status &= ~IRQ_MASKED;
296}
297
298/*
299 * default disable function
300 */
301static void default_disable(unsigned int irq)
302{
dd87eb3a
TG
303}
304
305/*
306 * default startup function
307 */
308static unsigned int default_startup(unsigned int irq)
309{
d3c60047 310 struct irq_desc *desc = irq_to_desc(irq);
08678b08 311
6b8ff312 312 desc->irq_data.chip->enable(irq);
dd87eb3a
TG
313 return 0;
314}
315
89d694b9
TG
316/*
317 * default shutdown function
318 */
319static void default_shutdown(unsigned int irq)
320{
d3c60047 321 struct irq_desc *desc = irq_to_desc(irq);
89d694b9 322
e2c0f8ff 323 desc->irq_data.chip->irq_mask(&desc->irq_data);
89d694b9
TG
324 desc->status |= IRQ_MASKED;
325}
326
3876ec9e 327/* Temporary migration helpers */
e2c0f8ff
TG
328static void compat_irq_mask(struct irq_data *data)
329{
330 data->chip->mask(data->irq);
331}
332
3876ec9e
TG
333static void compat_bus_lock(struct irq_data *data)
334{
335 data->chip->bus_lock(data->irq);
336}
337
338static void compat_bus_sync_unlock(struct irq_data *data)
339{
340 data->chip->bus_sync_unlock(data->irq);
341}
342
dd87eb3a
TG
343/*
344 * Fixup enable/disable function pointers
345 */
346void irq_chip_set_defaults(struct irq_chip *chip)
347{
348 if (!chip->enable)
349 chip->enable = default_enable;
350 if (!chip->disable)
351 chip->disable = default_disable;
352 if (!chip->startup)
353 chip->startup = default_startup;
89d694b9
TG
354 /*
355 * We use chip->disable, when the user provided its own. When
356 * we have default_disable set for chip->disable, then we need
357 * to use default_shutdown, otherwise the irq line is not
358 * disabled on free_irq():
359 */
dd87eb3a 360 if (!chip->shutdown)
89d694b9
TG
361 chip->shutdown = chip->disable != default_disable ?
362 chip->disable : default_shutdown;
b86432b4
ZY
363 if (!chip->end)
364 chip->end = dummy_irq_chip.end;
3876ec9e
TG
365
366 if (chip->bus_lock)
367 chip->irq_bus_lock = compat_bus_lock;
368 if (chip->bus_sync_unlock)
369 chip->irq_bus_sync_unlock = compat_bus_sync_unlock;
e2c0f8ff
TG
370
371 if (chip->mask)
372 chip->irq_mask = compat_irq_mask;
dd87eb3a
TG
373}
374
375static inline void mask_ack_irq(struct irq_desc *desc, int irq)
376{
6b8ff312
TG
377 if (desc->irq_data.chip->mask_ack)
378 desc->irq_data.chip->mask_ack(irq);
dd87eb3a 379 else {
e2c0f8ff 380 desc->irq_data.chip->irq_mask(&desc->irq_data);
6b8ff312
TG
381 if (desc->irq_data.chip->ack)
382 desc->irq_data.chip->ack(irq);
dd87eb3a 383 }
0b1adaa0
TG
384 desc->status |= IRQ_MASKED;
385}
386
e2c0f8ff 387static inline void mask_irq(struct irq_desc *desc)
0b1adaa0 388{
e2c0f8ff
TG
389 if (desc->irq_data.chip->irq_mask) {
390 desc->irq_data.chip->irq_mask(&desc->irq_data);
0b1adaa0
TG
391 desc->status |= IRQ_MASKED;
392 }
393}
394
395static inline void unmask_irq(struct irq_desc *desc, int irq)
396{
6b8ff312
TG
397 if (desc->irq_data.chip->unmask) {
398 desc->irq_data.chip->unmask(irq);
0b1adaa0
TG
399 desc->status &= ~IRQ_MASKED;
400 }
dd87eb3a
TG
401}
402
399b5da2
TG
403/*
404 * handle_nested_irq - Handle a nested irq from a irq thread
405 * @irq: the interrupt number
406 *
407 * Handle interrupts which are nested into a threaded interrupt
408 * handler. The handler function is called inside the calling
409 * threads context.
410 */
411void handle_nested_irq(unsigned int irq)
412{
413 struct irq_desc *desc = irq_to_desc(irq);
414 struct irqaction *action;
415 irqreturn_t action_ret;
416
417 might_sleep();
418
239007b8 419 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
420
421 kstat_incr_irqs_this_cpu(irq, desc);
422
423 action = desc->action;
424 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
425 goto out_unlock;
426
427 desc->status |= IRQ_INPROGRESS;
239007b8 428 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
429
430 action_ret = action->thread_fn(action->irq, action->dev_id);
431 if (!noirqdebug)
432 note_interrupt(irq, desc, action_ret);
433
239007b8 434 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
435 desc->status &= ~IRQ_INPROGRESS;
436
437out_unlock:
239007b8 438 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
439}
440EXPORT_SYMBOL_GPL(handle_nested_irq);
441
dd87eb3a
TG
442/**
443 * handle_simple_irq - Simple and software-decoded IRQs.
444 * @irq: the interrupt number
445 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
446 *
447 * Simple interrupts are either sent from a demultiplexing interrupt
448 * handler or come from hardware, where no interrupt hardware control
449 * is necessary.
450 *
451 * Note: The caller is expected to handle the ack, clear, mask and
452 * unmask issues if necessary.
453 */
7ad5b3a5 454void
7d12e780 455handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
456{
457 struct irqaction *action;
458 irqreturn_t action_ret;
dd87eb3a 459
239007b8 460 raw_spin_lock(&desc->lock);
dd87eb3a
TG
461
462 if (unlikely(desc->status & IRQ_INPROGRESS))
463 goto out_unlock;
971e5b35 464 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 465 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
466
467 action = desc->action;
971e5b35 468 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
dd87eb3a
TG
469 goto out_unlock;
470
471 desc->status |= IRQ_INPROGRESS;
239007b8 472 raw_spin_unlock(&desc->lock);
dd87eb3a 473
7d12e780 474 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 475 if (!noirqdebug)
7d12e780 476 note_interrupt(irq, desc, action_ret);
dd87eb3a 477
239007b8 478 raw_spin_lock(&desc->lock);
dd87eb3a
TG
479 desc->status &= ~IRQ_INPROGRESS;
480out_unlock:
239007b8 481 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
482}
483
484/**
485 * handle_level_irq - Level type irq handler
486 * @irq: the interrupt number
487 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
488 *
489 * Level type interrupts are active as long as the hardware line has
490 * the active level. This may require to mask the interrupt and unmask
491 * it after the associated handler has acknowledged the device, so the
492 * interrupt line is back to inactive.
493 */
7ad5b3a5 494void
7d12e780 495handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 496{
dd87eb3a
TG
497 struct irqaction *action;
498 irqreturn_t action_ret;
499
239007b8 500 raw_spin_lock(&desc->lock);
dd87eb3a
TG
501 mask_ack_irq(desc, irq);
502
503 if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6 504 goto out_unlock;
dd87eb3a 505 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 506 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
507
508 /*
509 * If its disabled or no action available
510 * keep it masked and get out of here
511 */
512 action = desc->action;
49663421 513 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
86998aa6 514 goto out_unlock;
dd87eb3a
TG
515
516 desc->status |= IRQ_INPROGRESS;
239007b8 517 raw_spin_unlock(&desc->lock);
dd87eb3a 518
7d12e780 519 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 520 if (!noirqdebug)
7d12e780 521 note_interrupt(irq, desc, action_ret);
dd87eb3a 522
239007b8 523 raw_spin_lock(&desc->lock);
dd87eb3a 524 desc->status &= ~IRQ_INPROGRESS;
b25c340c 525
0b1adaa0
TG
526 if (!(desc->status & (IRQ_DISABLED | IRQ_ONESHOT)))
527 unmask_irq(desc, irq);
86998aa6 528out_unlock:
239007b8 529 raw_spin_unlock(&desc->lock);
dd87eb3a 530}
14819ea1 531EXPORT_SYMBOL_GPL(handle_level_irq);
dd87eb3a
TG
532
533/**
47c2a3aa 534 * handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a
TG
535 * @irq: the interrupt number
536 * @desc: the interrupt description structure for this irq
dd87eb3a 537 *
47c2a3aa 538 * Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a
TG
539 * call when the interrupt has been serviced. This enables support
540 * for modern forms of interrupt handlers, which handle the flow
541 * details in hardware, transparently.
542 */
7ad5b3a5 543void
7d12e780 544handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 545{
dd87eb3a
TG
546 struct irqaction *action;
547 irqreturn_t action_ret;
548
239007b8 549 raw_spin_lock(&desc->lock);
dd87eb3a
TG
550
551 if (unlikely(desc->status & IRQ_INPROGRESS))
552 goto out;
553
554 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 555 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
556
557 /*
558 * If its disabled or no action available
76d21601 559 * then mask it and get out of here:
dd87eb3a
TG
560 */
561 action = desc->action;
98bb244b
BH
562 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
563 desc->status |= IRQ_PENDING;
e2c0f8ff 564 mask_irq(desc);
dd87eb3a 565 goto out;
98bb244b 566 }
dd87eb3a
TG
567
568 desc->status |= IRQ_INPROGRESS;
98bb244b 569 desc->status &= ~IRQ_PENDING;
239007b8 570 raw_spin_unlock(&desc->lock);
dd87eb3a 571
7d12e780 572 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 573 if (!noirqdebug)
7d12e780 574 note_interrupt(irq, desc, action_ret);
dd87eb3a 575
239007b8 576 raw_spin_lock(&desc->lock);
dd87eb3a
TG
577 desc->status &= ~IRQ_INPROGRESS;
578out:
6b8ff312 579 desc->irq_data.chip->eoi(irq);
dd87eb3a 580
239007b8 581 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
582}
583
584/**
585 * handle_edge_irq - edge type IRQ handler
586 * @irq: the interrupt number
587 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
588 *
589 * Interrupt occures on the falling and/or rising edge of a hardware
590 * signal. The occurence is latched into the irq controller hardware
591 * and must be acked in order to be reenabled. After the ack another
592 * interrupt can happen on the same source even before the first one
dfff0615 593 * is handled by the associated event handler. If this happens it
dd87eb3a
TG
594 * might be necessary to disable (mask) the interrupt depending on the
595 * controller hardware. This requires to reenable the interrupt inside
596 * of the loop which handles the interrupts which have arrived while
597 * the handler was running. If all pending interrupts are handled, the
598 * loop is left.
599 */
7ad5b3a5 600void
7d12e780 601handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 602{
239007b8 603 raw_spin_lock(&desc->lock);
dd87eb3a
TG
604
605 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
606
607 /*
608 * If we're currently running this IRQ, or its disabled,
609 * we shouldn't process the IRQ. Mark it pending, handle
610 * the necessary masking and go out
611 */
612 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
613 !desc->action)) {
614 desc->status |= (IRQ_PENDING | IRQ_MASKED);
615 mask_ack_irq(desc, irq);
616 goto out_unlock;
617 }
d6c88a50 618 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
619
620 /* Start handling the irq */
6b8ff312
TG
621 if (desc->irq_data.chip->ack)
622 desc->irq_data.chip->ack(irq);
dd87eb3a
TG
623
624 /* Mark the IRQ currently in progress.*/
625 desc->status |= IRQ_INPROGRESS;
626
627 do {
628 struct irqaction *action = desc->action;
629 irqreturn_t action_ret;
630
631 if (unlikely(!action)) {
e2c0f8ff 632 mask_irq(desc);
dd87eb3a
TG
633 goto out_unlock;
634 }
635
636 /*
637 * When another irq arrived while we were handling
638 * one, we could have masked the irq.
639 * Renable it, if it was not disabled in meantime.
640 */
641 if (unlikely((desc->status &
642 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
643 (IRQ_PENDING | IRQ_MASKED))) {
0b1adaa0 644 unmask_irq(desc, irq);
dd87eb3a
TG
645 }
646
647 desc->status &= ~IRQ_PENDING;
239007b8 648 raw_spin_unlock(&desc->lock);
7d12e780 649 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 650 if (!noirqdebug)
7d12e780 651 note_interrupt(irq, desc, action_ret);
239007b8 652 raw_spin_lock(&desc->lock);
dd87eb3a
TG
653
654 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
655
656 desc->status &= ~IRQ_INPROGRESS;
657out_unlock:
239007b8 658 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
659}
660
dd87eb3a 661/**
24b26d42 662 * handle_percpu_irq - Per CPU local irq handler
dd87eb3a
TG
663 * @irq: the interrupt number
664 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
665 *
666 * Per CPU interrupts on SMP machines without locking requirements
667 */
7ad5b3a5 668void
7d12e780 669handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
670{
671 irqreturn_t action_ret;
672
d6c88a50 673 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a 674
6b8ff312
TG
675 if (desc->irq_data.chip->ack)
676 desc->irq_data.chip->ack(irq);
dd87eb3a 677
7d12e780 678 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 679 if (!noirqdebug)
7d12e780 680 note_interrupt(irq, desc, action_ret);
dd87eb3a 681
6b8ff312
TG
682 if (desc->irq_data.chip->eoi)
683 desc->irq_data.chip->eoi(irq);
dd87eb3a
TG
684}
685
dd87eb3a 686void
a460e745
IM
687__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
688 const char *name)
dd87eb3a 689{
d3c60047 690 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
691 unsigned long flags;
692
7d94f7ca 693 if (!desc) {
dd87eb3a
TG
694 printk(KERN_ERR
695 "Trying to install type control for IRQ%d\n", irq);
696 return;
697 }
698
dd87eb3a
TG
699 if (!handle)
700 handle = handle_bad_irq;
6b8ff312 701 else if (desc->irq_data.chip == &no_irq_chip) {
f8b5473f 702 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 703 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
704 /*
705 * Some ARM implementations install a handler for really dumb
706 * interrupt hardware without setting an irq_chip. This worked
707 * with the ARM no_irq_chip but the check in setup_irq would
708 * prevent us to setup the interrupt at all. Switch it to
709 * dummy_irq_chip for easy transition.
710 */
6b8ff312 711 desc->irq_data.chip = &dummy_irq_chip;
f8b5473f 712 }
dd87eb3a 713
3876ec9e 714 chip_bus_lock(desc);
239007b8 715 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a
TG
716
717 /* Uninstall? */
718 if (handle == handle_bad_irq) {
6b8ff312 719 if (desc->irq_data.chip != &no_irq_chip)
5575ddf7 720 mask_ack_irq(desc, irq);
dd87eb3a
TG
721 desc->status |= IRQ_DISABLED;
722 desc->depth = 1;
723 }
724 desc->handle_irq = handle;
a460e745 725 desc->name = name;
dd87eb3a
TG
726
727 if (handle != handle_bad_irq && is_chained) {
728 desc->status &= ~IRQ_DISABLED;
729 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
730 desc->depth = 0;
6b8ff312 731 desc->irq_data.chip->startup(irq);
dd87eb3a 732 }
239007b8 733 raw_spin_unlock_irqrestore(&desc->lock, flags);
3876ec9e 734 chip_bus_sync_unlock(desc);
dd87eb3a 735}
14819ea1 736EXPORT_SYMBOL_GPL(__set_irq_handler);
dd87eb3a
TG
737
738void
739set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 740 irq_flow_handler_t handle)
dd87eb3a
TG
741{
742 set_irq_chip(irq, chip);
a460e745 743 __set_irq_handler(irq, handle, 0, NULL);
dd87eb3a
TG
744}
745
a460e745
IM
746void
747set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
748 irq_flow_handler_t handle, const char *name)
dd87eb3a 749{
a460e745
IM
750 set_irq_chip(irq, chip);
751 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 752}
46f4f8f6 753
860652bf 754void set_irq_noprobe(unsigned int irq)
46f4f8f6 755{
d3c60047 756 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
757 unsigned long flags;
758
7d94f7ca 759 if (!desc) {
46f4f8f6 760 printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq);
46f4f8f6
RB
761 return;
762 }
763
239007b8 764 raw_spin_lock_irqsave(&desc->lock, flags);
46f4f8f6 765 desc->status |= IRQ_NOPROBE;
239007b8 766 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6
RB
767}
768
860652bf 769void set_irq_probe(unsigned int irq)
46f4f8f6 770{
d3c60047 771 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
772 unsigned long flags;
773
7d94f7ca 774 if (!desc) {
46f4f8f6 775 printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq);
46f4f8f6
RB
776 return;
777 }
778
239007b8 779 raw_spin_lock_irqsave(&desc->lock, flags);
46f4f8f6 780 desc->status &= ~IRQ_NOPROBE;
239007b8 781 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6 782}