genirq: Provide compat handling for chip->eoi()
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / kernel / irq / chip.c
CommitLineData
dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
7fe3730d 14#include <linux/msi.h>
dd87eb3a
TG
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
ced5b697 21static void dynamic_irq_init_x(unsigned int irq, bool keep_chip_data)
3a16d713 22{
0b8f1efa 23 struct irq_desc *desc;
3a16d713
EB
24 unsigned long flags;
25
0b8f1efa 26 desc = irq_to_desc(irq);
7d94f7ca 27 if (!desc) {
261c40c1 28 WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
3a16d713
EB
29 return;
30 }
31
32 /* Ensure we don't have left over values from a previous use of this irq */
239007b8 33 raw_spin_lock_irqsave(&desc->lock, flags);
3a16d713 34 desc->status = IRQ_DISABLED;
6b8ff312 35 desc->irq_data.chip = &no_irq_chip;
3a16d713
EB
36 desc->handle_irq = handle_bad_irq;
37 desc->depth = 1;
6b8ff312
TG
38 desc->irq_data.msi_desc = NULL;
39 desc->irq_data.handler_data = NULL;
ced5b697 40 if (!keep_chip_data)
6b8ff312 41 desc->irq_data.chip_data = NULL;
3a16d713
EB
42 desc->action = NULL;
43 desc->irq_count = 0;
44 desc->irqs_unhandled = 0;
45#ifdef CONFIG_SMP
6b8ff312 46 cpumask_setall(desc->irq_data.affinity);
7f7ace0c
MT
47#ifdef CONFIG_GENERIC_PENDING_IRQ
48 cpumask_clear(desc->pending_mask);
49#endif
3a16d713 50#endif
239007b8 51 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a16d713
EB
52}
53
54/**
ced5b697 55 * dynamic_irq_init - initialize a dynamically allocated irq
3a16d713
EB
56 * @irq: irq number to initialize
57 */
ced5b697
BP
58void dynamic_irq_init(unsigned int irq)
59{
60 dynamic_irq_init_x(irq, false);
61}
62
63/**
64 * dynamic_irq_init_keep_chip_data - initialize a dynamically allocated irq
65 * @irq: irq number to initialize
66 *
6b8ff312 67 * does not set irq_to_desc(irq)->irq_data.chip_data to NULL
ced5b697
BP
68 */
69void dynamic_irq_init_keep_chip_data(unsigned int irq)
70{
71 dynamic_irq_init_x(irq, true);
72}
73
74static void dynamic_irq_cleanup_x(unsigned int irq, bool keep_chip_data)
3a16d713 75{
d3c60047 76 struct irq_desc *desc = irq_to_desc(irq);
3a16d713
EB
77 unsigned long flags;
78
7d94f7ca 79 if (!desc) {
261c40c1 80 WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
3a16d713
EB
81 return;
82 }
83
239007b8 84 raw_spin_lock_irqsave(&desc->lock, flags);
1f80025e 85 if (desc->action) {
239007b8 86 raw_spin_unlock_irqrestore(&desc->lock, flags);
261c40c1 87 WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n",
1f80025e 88 irq);
1f80025e
EB
89 return;
90 }
6b8ff312
TG
91 desc->irq_data.msi_desc = NULL;
92 desc->irq_data.handler_data = NULL;
ced5b697 93 if (!keep_chip_data)
6b8ff312 94 desc->irq_data.chip_data = NULL;
3a16d713 95 desc->handle_irq = handle_bad_irq;
6b8ff312 96 desc->irq_data.chip = &no_irq_chip;
b6f3b780 97 desc->name = NULL;
0f3c2a89 98 clear_kstat_irqs(desc);
239007b8 99 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a16d713
EB
100}
101
ced5b697
BP
102/**
103 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
104 * @irq: irq number to initialize
105 */
106void dynamic_irq_cleanup(unsigned int irq)
107{
108 dynamic_irq_cleanup_x(irq, false);
109}
110
111/**
112 * dynamic_irq_cleanup_keep_chip_data - cleanup a dynamically allocated irq
113 * @irq: irq number to initialize
114 *
6b8ff312 115 * does not set irq_to_desc(irq)->irq_data.chip_data to NULL
ced5b697
BP
116 */
117void dynamic_irq_cleanup_keep_chip_data(unsigned int irq)
118{
119 dynamic_irq_cleanup_x(irq, true);
120}
121
3a16d713 122
dd87eb3a
TG
123/**
124 * set_irq_chip - set the irq chip for an irq
125 * @irq: irq number
126 * @chip: pointer to irq chip description structure
127 */
128int set_irq_chip(unsigned int irq, struct irq_chip *chip)
129{
d3c60047 130 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
131 unsigned long flags;
132
7d94f7ca 133 if (!desc) {
261c40c1 134 WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
dd87eb3a
TG
135 return -EINVAL;
136 }
137
138 if (!chip)
139 chip = &no_irq_chip;
140
239007b8 141 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a 142 irq_chip_set_defaults(chip);
6b8ff312 143 desc->irq_data.chip = chip;
239007b8 144 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
145
146 return 0;
147}
148EXPORT_SYMBOL(set_irq_chip);
149
150/**
0c5d1eb7 151 * set_irq_type - set the irq trigger type for an irq
dd87eb3a 152 * @irq: irq number
0c5d1eb7 153 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
dd87eb3a
TG
154 */
155int set_irq_type(unsigned int irq, unsigned int type)
156{
d3c60047 157 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
158 unsigned long flags;
159 int ret = -ENXIO;
160
7d94f7ca 161 if (!desc) {
dd87eb3a
TG
162 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
163 return -ENODEV;
164 }
165
f2b662da 166 type &= IRQ_TYPE_SENSE_MASK;
0c5d1eb7
DB
167 if (type == IRQ_TYPE_NONE)
168 return 0;
169
239007b8 170 raw_spin_lock_irqsave(&desc->lock, flags);
0b3682ba 171 ret = __irq_set_trigger(desc, irq, type);
239007b8 172 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
173 return ret;
174}
175EXPORT_SYMBOL(set_irq_type);
176
177/**
178 * set_irq_data - set irq type data for an irq
179 * @irq: Interrupt number
180 * @data: Pointer to interrupt specific data
181 *
182 * Set the hardware irq controller data for an irq
183 */
184int set_irq_data(unsigned int irq, void *data)
185{
d3c60047 186 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
187 unsigned long flags;
188
7d94f7ca 189 if (!desc) {
dd87eb3a
TG
190 printk(KERN_ERR
191 "Trying to install controller data for IRQ%d\n", irq);
192 return -EINVAL;
193 }
194
239007b8 195 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 196 desc->irq_data.handler_data = data;
239007b8 197 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
198 return 0;
199}
200EXPORT_SYMBOL(set_irq_data);
201
5b912c10 202/**
24b26d42 203 * set_irq_msi - set MSI descriptor data for an irq
5b912c10 204 * @irq: Interrupt number
472900b8 205 * @entry: Pointer to MSI descriptor data
5b912c10 206 *
24b26d42 207 * Set the MSI descriptor entry for an irq
5b912c10
EB
208 */
209int set_irq_msi(unsigned int irq, struct msi_desc *entry)
210{
d3c60047 211 struct irq_desc *desc = irq_to_desc(irq);
5b912c10
EB
212 unsigned long flags;
213
7d94f7ca 214 if (!desc) {
5b912c10
EB
215 printk(KERN_ERR
216 "Trying to install msi data for IRQ%d\n", irq);
217 return -EINVAL;
218 }
7d94f7ca 219
239007b8 220 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 221 desc->irq_data.msi_desc = entry;
7fe3730d
ME
222 if (entry)
223 entry->irq = irq;
239007b8 224 raw_spin_unlock_irqrestore(&desc->lock, flags);
5b912c10
EB
225 return 0;
226}
227
dd87eb3a
TG
228/**
229 * set_irq_chip_data - set irq chip data for an irq
230 * @irq: Interrupt number
231 * @data: Pointer to chip specific data
232 *
233 * Set the hardware irq chip data for an irq
234 */
235int set_irq_chip_data(unsigned int irq, void *data)
236{
d3c60047 237 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
238 unsigned long flags;
239
7d94f7ca
YL
240 if (!desc) {
241 printk(KERN_ERR
242 "Trying to install chip data for IRQ%d\n", irq);
243 return -EINVAL;
244 }
245
6b8ff312 246 if (!desc->irq_data.chip) {
dd87eb3a
TG
247 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
248 return -EINVAL;
249 }
250
239007b8 251 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 252 desc->irq_data.chip_data = data;
239007b8 253 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
254
255 return 0;
256}
257EXPORT_SYMBOL(set_irq_chip_data);
258
399b5da2
TG
259/**
260 * set_irq_nested_thread - Set/Reset the IRQ_NESTED_THREAD flag of an irq
261 *
262 * @irq: Interrupt number
263 * @nest: 0 to clear / 1 to set the IRQ_NESTED_THREAD flag
264 *
265 * The IRQ_NESTED_THREAD flag indicates that on
266 * request_threaded_irq() no separate interrupt thread should be
267 * created for the irq as the handler are called nested in the
268 * context of a demultiplexing interrupt handler thread.
269 */
270void set_irq_nested_thread(unsigned int irq, int nest)
271{
272 struct irq_desc *desc = irq_to_desc(irq);
273 unsigned long flags;
274
275 if (!desc)
276 return;
277
239007b8 278 raw_spin_lock_irqsave(&desc->lock, flags);
399b5da2
TG
279 if (nest)
280 desc->status |= IRQ_NESTED_THREAD;
281 else
282 desc->status &= ~IRQ_NESTED_THREAD;
239007b8 283 raw_spin_unlock_irqrestore(&desc->lock, flags);
399b5da2
TG
284}
285EXPORT_SYMBOL_GPL(set_irq_nested_thread);
286
dd87eb3a
TG
287/*
288 * default enable function
289 */
290static void default_enable(unsigned int irq)
291{
d3c60047 292 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a 293
0eda58b7 294 desc->irq_data.chip->irq_unmask(&desc->irq_data);
dd87eb3a
TG
295 desc->status &= ~IRQ_MASKED;
296}
297
298/*
299 * default disable function
300 */
301static void default_disable(unsigned int irq)
302{
dd87eb3a
TG
303}
304
305/*
306 * default startup function
307 */
308static unsigned int default_startup(unsigned int irq)
309{
d3c60047 310 struct irq_desc *desc = irq_to_desc(irq);
08678b08 311
6b8ff312 312 desc->irq_data.chip->enable(irq);
dd87eb3a
TG
313 return 0;
314}
315
89d694b9
TG
316/*
317 * default shutdown function
318 */
319static void default_shutdown(unsigned int irq)
320{
d3c60047 321 struct irq_desc *desc = irq_to_desc(irq);
89d694b9 322
e2c0f8ff 323 desc->irq_data.chip->irq_mask(&desc->irq_data);
89d694b9
TG
324 desc->status |= IRQ_MASKED;
325}
326
3876ec9e 327/* Temporary migration helpers */
e2c0f8ff
TG
328static void compat_irq_mask(struct irq_data *data)
329{
330 data->chip->mask(data->irq);
331}
332
0eda58b7
TG
333static void compat_irq_unmask(struct irq_data *data)
334{
335 data->chip->unmask(data->irq);
336}
337
22a49163
TG
338static void compat_irq_ack(struct irq_data *data)
339{
340 data->chip->ack(data->irq);
341}
342
9205e31d
TG
343static void compat_irq_mask_ack(struct irq_data *data)
344{
345 data->chip->mask_ack(data->irq);
346}
347
0c5c1557
TG
348static void compat_irq_eoi(struct irq_data *data)
349{
350 data->chip->eoi(data->irq);
351}
352
3876ec9e
TG
353static void compat_bus_lock(struct irq_data *data)
354{
355 data->chip->bus_lock(data->irq);
356}
357
358static void compat_bus_sync_unlock(struct irq_data *data)
359{
360 data->chip->bus_sync_unlock(data->irq);
361}
362
dd87eb3a
TG
363/*
364 * Fixup enable/disable function pointers
365 */
366void irq_chip_set_defaults(struct irq_chip *chip)
367{
368 if (!chip->enable)
369 chip->enable = default_enable;
370 if (!chip->disable)
371 chip->disable = default_disable;
372 if (!chip->startup)
373 chip->startup = default_startup;
89d694b9
TG
374 /*
375 * We use chip->disable, when the user provided its own. When
376 * we have default_disable set for chip->disable, then we need
377 * to use default_shutdown, otherwise the irq line is not
378 * disabled on free_irq():
379 */
dd87eb3a 380 if (!chip->shutdown)
89d694b9
TG
381 chip->shutdown = chip->disable != default_disable ?
382 chip->disable : default_shutdown;
b86432b4
ZY
383 if (!chip->end)
384 chip->end = dummy_irq_chip.end;
3876ec9e
TG
385
386 if (chip->bus_lock)
387 chip->irq_bus_lock = compat_bus_lock;
388 if (chip->bus_sync_unlock)
389 chip->irq_bus_sync_unlock = compat_bus_sync_unlock;
e2c0f8ff
TG
390 if (chip->mask)
391 chip->irq_mask = compat_irq_mask;
0eda58b7
TG
392 if (chip->unmask)
393 chip->irq_unmask = compat_irq_unmask;
22a49163
TG
394 if (chip->ack)
395 chip->irq_ack = compat_irq_ack;
9205e31d
TG
396 if (chip->mask_ack)
397 chip->irq_mask_ack = compat_irq_mask_ack;
0c5c1557
TG
398 if (chip->eoi)
399 chip->irq_eoi = compat_irq_eoi;
dd87eb3a
TG
400}
401
9205e31d 402static inline void mask_ack_irq(struct irq_desc *desc)
dd87eb3a 403{
9205e31d
TG
404 if (desc->irq_data.chip->irq_mask_ack)
405 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
dd87eb3a 406 else {
e2c0f8ff 407 desc->irq_data.chip->irq_mask(&desc->irq_data);
22a49163
TG
408 if (desc->irq_data.chip->irq_ack)
409 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a 410 }
0b1adaa0
TG
411 desc->status |= IRQ_MASKED;
412}
413
e2c0f8ff 414static inline void mask_irq(struct irq_desc *desc)
0b1adaa0 415{
e2c0f8ff
TG
416 if (desc->irq_data.chip->irq_mask) {
417 desc->irq_data.chip->irq_mask(&desc->irq_data);
0b1adaa0
TG
418 desc->status |= IRQ_MASKED;
419 }
420}
421
0eda58b7 422static inline void unmask_irq(struct irq_desc *desc)
0b1adaa0 423{
0eda58b7
TG
424 if (desc->irq_data.chip->irq_unmask) {
425 desc->irq_data.chip->irq_unmask(&desc->irq_data);
0b1adaa0
TG
426 desc->status &= ~IRQ_MASKED;
427 }
dd87eb3a
TG
428}
429
399b5da2
TG
430/*
431 * handle_nested_irq - Handle a nested irq from a irq thread
432 * @irq: the interrupt number
433 *
434 * Handle interrupts which are nested into a threaded interrupt
435 * handler. The handler function is called inside the calling
436 * threads context.
437 */
438void handle_nested_irq(unsigned int irq)
439{
440 struct irq_desc *desc = irq_to_desc(irq);
441 struct irqaction *action;
442 irqreturn_t action_ret;
443
444 might_sleep();
445
239007b8 446 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
447
448 kstat_incr_irqs_this_cpu(irq, desc);
449
450 action = desc->action;
451 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
452 goto out_unlock;
453
454 desc->status |= IRQ_INPROGRESS;
239007b8 455 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
456
457 action_ret = action->thread_fn(action->irq, action->dev_id);
458 if (!noirqdebug)
459 note_interrupt(irq, desc, action_ret);
460
239007b8 461 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
462 desc->status &= ~IRQ_INPROGRESS;
463
464out_unlock:
239007b8 465 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
466}
467EXPORT_SYMBOL_GPL(handle_nested_irq);
468
dd87eb3a
TG
469/**
470 * handle_simple_irq - Simple and software-decoded IRQs.
471 * @irq: the interrupt number
472 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
473 *
474 * Simple interrupts are either sent from a demultiplexing interrupt
475 * handler or come from hardware, where no interrupt hardware control
476 * is necessary.
477 *
478 * Note: The caller is expected to handle the ack, clear, mask and
479 * unmask issues if necessary.
480 */
7ad5b3a5 481void
7d12e780 482handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
483{
484 struct irqaction *action;
485 irqreturn_t action_ret;
dd87eb3a 486
239007b8 487 raw_spin_lock(&desc->lock);
dd87eb3a
TG
488
489 if (unlikely(desc->status & IRQ_INPROGRESS))
490 goto out_unlock;
971e5b35 491 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 492 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
493
494 action = desc->action;
971e5b35 495 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
dd87eb3a
TG
496 goto out_unlock;
497
498 desc->status |= IRQ_INPROGRESS;
239007b8 499 raw_spin_unlock(&desc->lock);
dd87eb3a 500
7d12e780 501 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 502 if (!noirqdebug)
7d12e780 503 note_interrupt(irq, desc, action_ret);
dd87eb3a 504
239007b8 505 raw_spin_lock(&desc->lock);
dd87eb3a
TG
506 desc->status &= ~IRQ_INPROGRESS;
507out_unlock:
239007b8 508 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
509}
510
511/**
512 * handle_level_irq - Level type irq handler
513 * @irq: the interrupt number
514 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
515 *
516 * Level type interrupts are active as long as the hardware line has
517 * the active level. This may require to mask the interrupt and unmask
518 * it after the associated handler has acknowledged the device, so the
519 * interrupt line is back to inactive.
520 */
7ad5b3a5 521void
7d12e780 522handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 523{
dd87eb3a
TG
524 struct irqaction *action;
525 irqreturn_t action_ret;
526
239007b8 527 raw_spin_lock(&desc->lock);
9205e31d 528 mask_ack_irq(desc);
dd87eb3a
TG
529
530 if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6 531 goto out_unlock;
dd87eb3a 532 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 533 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
534
535 /*
536 * If its disabled or no action available
537 * keep it masked and get out of here
538 */
539 action = desc->action;
49663421 540 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
86998aa6 541 goto out_unlock;
dd87eb3a
TG
542
543 desc->status |= IRQ_INPROGRESS;
239007b8 544 raw_spin_unlock(&desc->lock);
dd87eb3a 545
7d12e780 546 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 547 if (!noirqdebug)
7d12e780 548 note_interrupt(irq, desc, action_ret);
dd87eb3a 549
239007b8 550 raw_spin_lock(&desc->lock);
dd87eb3a 551 desc->status &= ~IRQ_INPROGRESS;
b25c340c 552
0b1adaa0 553 if (!(desc->status & (IRQ_DISABLED | IRQ_ONESHOT)))
0eda58b7 554 unmask_irq(desc);
86998aa6 555out_unlock:
239007b8 556 raw_spin_unlock(&desc->lock);
dd87eb3a 557}
14819ea1 558EXPORT_SYMBOL_GPL(handle_level_irq);
dd87eb3a
TG
559
560/**
47c2a3aa 561 * handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a
TG
562 * @irq: the interrupt number
563 * @desc: the interrupt description structure for this irq
dd87eb3a 564 *
47c2a3aa 565 * Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a
TG
566 * call when the interrupt has been serviced. This enables support
567 * for modern forms of interrupt handlers, which handle the flow
568 * details in hardware, transparently.
569 */
7ad5b3a5 570void
7d12e780 571handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 572{
dd87eb3a
TG
573 struct irqaction *action;
574 irqreturn_t action_ret;
575
239007b8 576 raw_spin_lock(&desc->lock);
dd87eb3a
TG
577
578 if (unlikely(desc->status & IRQ_INPROGRESS))
579 goto out;
580
581 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 582 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
583
584 /*
585 * If its disabled or no action available
76d21601 586 * then mask it and get out of here:
dd87eb3a
TG
587 */
588 action = desc->action;
98bb244b
BH
589 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
590 desc->status |= IRQ_PENDING;
e2c0f8ff 591 mask_irq(desc);
dd87eb3a 592 goto out;
98bb244b 593 }
dd87eb3a
TG
594
595 desc->status |= IRQ_INPROGRESS;
98bb244b 596 desc->status &= ~IRQ_PENDING;
239007b8 597 raw_spin_unlock(&desc->lock);
dd87eb3a 598
7d12e780 599 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 600 if (!noirqdebug)
7d12e780 601 note_interrupt(irq, desc, action_ret);
dd87eb3a 602
239007b8 603 raw_spin_lock(&desc->lock);
dd87eb3a
TG
604 desc->status &= ~IRQ_INPROGRESS;
605out:
0c5c1557 606 desc->irq_data.chip->irq_eoi(&desc->irq_data);
dd87eb3a 607
239007b8 608 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
609}
610
611/**
612 * handle_edge_irq - edge type IRQ handler
613 * @irq: the interrupt number
614 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
615 *
616 * Interrupt occures on the falling and/or rising edge of a hardware
617 * signal. The occurence is latched into the irq controller hardware
618 * and must be acked in order to be reenabled. After the ack another
619 * interrupt can happen on the same source even before the first one
dfff0615 620 * is handled by the associated event handler. If this happens it
dd87eb3a
TG
621 * might be necessary to disable (mask) the interrupt depending on the
622 * controller hardware. This requires to reenable the interrupt inside
623 * of the loop which handles the interrupts which have arrived while
624 * the handler was running. If all pending interrupts are handled, the
625 * loop is left.
626 */
7ad5b3a5 627void
7d12e780 628handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 629{
239007b8 630 raw_spin_lock(&desc->lock);
dd87eb3a
TG
631
632 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
633
634 /*
635 * If we're currently running this IRQ, or its disabled,
636 * we shouldn't process the IRQ. Mark it pending, handle
637 * the necessary masking and go out
638 */
639 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
640 !desc->action)) {
641 desc->status |= (IRQ_PENDING | IRQ_MASKED);
9205e31d 642 mask_ack_irq(desc);
dd87eb3a
TG
643 goto out_unlock;
644 }
d6c88a50 645 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
646
647 /* Start handling the irq */
22a49163 648 desc->irq_data.chip->irq_ack(&desc->irq_data);
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649
650 /* Mark the IRQ currently in progress.*/
651 desc->status |= IRQ_INPROGRESS;
652
653 do {
654 struct irqaction *action = desc->action;
655 irqreturn_t action_ret;
656
657 if (unlikely(!action)) {
e2c0f8ff 658 mask_irq(desc);
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659 goto out_unlock;
660 }
661
662 /*
663 * When another irq arrived while we were handling
664 * one, we could have masked the irq.
665 * Renable it, if it was not disabled in meantime.
666 */
667 if (unlikely((desc->status &
668 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
669 (IRQ_PENDING | IRQ_MASKED))) {
0eda58b7 670 unmask_irq(desc);
dd87eb3a
TG
671 }
672
673 desc->status &= ~IRQ_PENDING;
239007b8 674 raw_spin_unlock(&desc->lock);
7d12e780 675 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 676 if (!noirqdebug)
7d12e780 677 note_interrupt(irq, desc, action_ret);
239007b8 678 raw_spin_lock(&desc->lock);
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679
680 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
681
682 desc->status &= ~IRQ_INPROGRESS;
683out_unlock:
239007b8 684 raw_spin_unlock(&desc->lock);
dd87eb3a
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685}
686
dd87eb3a 687/**
24b26d42 688 * handle_percpu_irq - Per CPU local irq handler
dd87eb3a
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689 * @irq: the interrupt number
690 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
691 *
692 * Per CPU interrupts on SMP machines without locking requirements
693 */
7ad5b3a5 694void
7d12e780 695handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
696{
697 irqreturn_t action_ret;
698
d6c88a50 699 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a 700
22a49163
TG
701 if (desc->irq_data.chip->irq_ack)
702 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a 703
7d12e780 704 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 705 if (!noirqdebug)
7d12e780 706 note_interrupt(irq, desc, action_ret);
dd87eb3a 707
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708 if (desc->irq_data.chip->irq_eoi)
709 desc->irq_data.chip->irq_eoi(&desc->irq_data);
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710}
711
dd87eb3a 712void
a460e745
IM
713__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
714 const char *name)
dd87eb3a 715{
d3c60047 716 struct irq_desc *desc = irq_to_desc(irq);
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717 unsigned long flags;
718
7d94f7ca 719 if (!desc) {
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720 printk(KERN_ERR
721 "Trying to install type control for IRQ%d\n", irq);
722 return;
723 }
724
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725 if (!handle)
726 handle = handle_bad_irq;
6b8ff312 727 else if (desc->irq_data.chip == &no_irq_chip) {
f8b5473f 728 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 729 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
730 /*
731 * Some ARM implementations install a handler for really dumb
732 * interrupt hardware without setting an irq_chip. This worked
733 * with the ARM no_irq_chip but the check in setup_irq would
734 * prevent us to setup the interrupt at all. Switch it to
735 * dummy_irq_chip for easy transition.
736 */
6b8ff312 737 desc->irq_data.chip = &dummy_irq_chip;
f8b5473f 738 }
dd87eb3a 739
3876ec9e 740 chip_bus_lock(desc);
239007b8 741 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a
TG
742
743 /* Uninstall? */
744 if (handle == handle_bad_irq) {
6b8ff312 745 if (desc->irq_data.chip != &no_irq_chip)
9205e31d 746 mask_ack_irq(desc);
dd87eb3a
TG
747 desc->status |= IRQ_DISABLED;
748 desc->depth = 1;
749 }
750 desc->handle_irq = handle;
a460e745 751 desc->name = name;
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752
753 if (handle != handle_bad_irq && is_chained) {
754 desc->status &= ~IRQ_DISABLED;
755 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
756 desc->depth = 0;
6b8ff312 757 desc->irq_data.chip->startup(irq);
dd87eb3a 758 }
239007b8 759 raw_spin_unlock_irqrestore(&desc->lock, flags);
3876ec9e 760 chip_bus_sync_unlock(desc);
dd87eb3a 761}
14819ea1 762EXPORT_SYMBOL_GPL(__set_irq_handler);
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763
764void
765set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 766 irq_flow_handler_t handle)
dd87eb3a
TG
767{
768 set_irq_chip(irq, chip);
a460e745 769 __set_irq_handler(irq, handle, 0, NULL);
dd87eb3a
TG
770}
771
a460e745
IM
772void
773set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
774 irq_flow_handler_t handle, const char *name)
dd87eb3a 775{
a460e745
IM
776 set_irq_chip(irq, chip);
777 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 778}
46f4f8f6 779
860652bf 780void set_irq_noprobe(unsigned int irq)
46f4f8f6 781{
d3c60047 782 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
783 unsigned long flags;
784
7d94f7ca 785 if (!desc) {
46f4f8f6 786 printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq);
46f4f8f6
RB
787 return;
788 }
789
239007b8 790 raw_spin_lock_irqsave(&desc->lock, flags);
46f4f8f6 791 desc->status |= IRQ_NOPROBE;
239007b8 792 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6
RB
793}
794
860652bf 795void set_irq_probe(unsigned int irq)
46f4f8f6 796{
d3c60047 797 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
798 unsigned long flags;
799
7d94f7ca 800 if (!desc) {
46f4f8f6 801 printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq);
46f4f8f6
RB
802 return;
803 }
804
239007b8 805 raw_spin_lock_irqsave(&desc->lock, flags);
46f4f8f6 806 desc->status &= ~IRQ_NOPROBE;
239007b8 807 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6 808}