UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
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1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH
26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon.h"
923f6848 32#include "atom.h"
771fe6b9
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33
34extern void
35radeon_combios_connected_scratch_regs(struct drm_connector *connector,
36 struct drm_encoder *encoder,
37 bool connected);
38extern void
39radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
40 struct drm_encoder *encoder,
41 bool connected);
42
63ec0119
MD
43extern void
44radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder,
45 struct drm_connector *drm_connector);
46
d4877cf2
AD
47void radeon_connector_hotplug(struct drm_connector *connector)
48{
49 struct drm_device *dev = connector->dev;
50 struct radeon_device *rdev = dev->dev_private;
51 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
52
cbac9543
AD
53 /* bail if the connector does not have hpd pin, e.g.,
54 * VGA, TV, etc.
55 */
56 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
57 return;
58
1e85e1d0 59 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 60
73104b5c
AD
61 /* if the connector is already off, don't turn it back on */
62 if (connector->dpms != DRM_MODE_DPMS_ON)
63 return;
64
d5811e87
AD
65 /* just deal with DP (not eDP) here. */
66 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG
67 struct radeon_connector_atom_dig *dig_connector =
68 radeon_connector->con_priv;
7c3ed0fd 69
266dcba5
JG
70 /* if existing sink type was not DP no need to retrain */
71 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
72 return;
73
74 /* first get sink type as it may be reset after (un)plug */
75 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
76 /* don't do anything if sink is not display port, i.e.,
77 * passive dp->(dvi|hdmi) adaptor
78 */
79 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
80 int saved_dpms = connector->dpms;
81 /* Only turn off the display if it's physically disconnected */
ca2ccde5 82 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
266dcba5 83 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
ca2ccde5
JG
84 } else if (radeon_dp_needs_link_train(radeon_connector)) {
85 /* set it to OFF so that drm_helper_connector_dpms()
86 * won't return immediately since the current state
87 * is ON at this point.
88 */
89 connector->dpms = DRM_MODE_DPMS_OFF;
266dcba5 90 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
ca2ccde5 91 }
266dcba5
JG
92 connector->dpms = saved_dpms;
93 }
d4877cf2 94 }
d4877cf2
AD
95}
96
445282db
DA
97static void radeon_property_change_mode(struct drm_encoder *encoder)
98{
99 struct drm_crtc *crtc = encoder->crtc;
100
101 if (crtc && crtc->enabled) {
102 drm_crtc_helper_set_mode(crtc, &crtc->mode,
103 crtc->x, crtc->y, crtc->fb);
104 }
105}
eccea792
AD
106
107int radeon_get_monitor_bpc(struct drm_connector *connector)
108{
109 struct drm_device *dev = connector->dev;
110 struct radeon_device *rdev = dev->dev_private;
111 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
112 struct radeon_connector_atom_dig *dig_connector;
113 int bpc = 8;
114
115 switch (connector->connector_type) {
116 case DRM_MODE_CONNECTOR_DVII:
117 case DRM_MODE_CONNECTOR_HDMIB:
118 if (radeon_connector->use_digital) {
119 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
120 if (connector->display_info.bpc)
121 bpc = connector->display_info.bpc;
122 }
123 }
124 break;
125 case DRM_MODE_CONNECTOR_DVID:
126 case DRM_MODE_CONNECTOR_HDMIA:
127 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
128 if (connector->display_info.bpc)
129 bpc = connector->display_info.bpc;
130 }
131 break;
132 case DRM_MODE_CONNECTOR_DisplayPort:
133 dig_connector = radeon_connector->con_priv;
134 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
135 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
136 drm_detect_hdmi_monitor(radeon_connector->edid)) {
137 if (connector->display_info.bpc)
138 bpc = connector->display_info.bpc;
139 }
140 break;
141 case DRM_MODE_CONNECTOR_eDP:
142 case DRM_MODE_CONNECTOR_LVDS:
143 if (connector->display_info.bpc)
144 bpc = connector->display_info.bpc;
145 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
146 struct drm_connector_helper_funcs *connector_funcs =
147 connector->helper_private;
148 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
149 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
150 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
151
152 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
153 bpc = 6;
154 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
155 bpc = 8;
156 }
157 break;
158 }
159 return bpc;
160}
161
771fe6b9
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162static void
163radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
164{
165 struct drm_device *dev = connector->dev;
166 struct radeon_device *rdev = dev->dev_private;
167 struct drm_encoder *best_encoder = NULL;
168 struct drm_encoder *encoder = NULL;
169 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
170 struct drm_mode_object *obj;
171 bool connected;
172 int i;
173
174 best_encoder = connector_funcs->best_encoder(connector);
175
176 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
177 if (connector->encoder_ids[i] == 0)
178 break;
179
180 obj = drm_mode_object_find(connector->dev,
181 connector->encoder_ids[i],
182 DRM_MODE_OBJECT_ENCODER);
183 if (!obj)
184 continue;
185
186 encoder = obj_to_encoder(obj);
187
188 if ((encoder == best_encoder) && (status == connector_status_connected))
189 connected = true;
190 else
191 connected = false;
192
193 if (rdev->is_atom_bios)
194 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
195 else
196 radeon_combios_connected_scratch_regs(connector, encoder, connected);
197
198 }
199}
200
445282db
DA
201struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
202{
203 struct drm_mode_object *obj;
204 struct drm_encoder *encoder;
205 int i;
206
207 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
208 if (connector->encoder_ids[i] == 0)
209 break;
210
211 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
212 if (!obj)
213 continue;
214
215 encoder = obj_to_encoder(obj);
216 if (encoder->encoder_type == encoder_type)
217 return encoder;
218 }
219 return NULL;
220}
221
771fe6b9
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222struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
223{
224 int enc_id = connector->encoder_ids[0];
225 struct drm_mode_object *obj;
226 struct drm_encoder *encoder;
227
228 /* pick the encoder ids */
229 if (enc_id) {
230 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
231 if (!obj)
232 return NULL;
233 encoder = obj_to_encoder(obj);
234 return encoder;
235 }
236 return NULL;
237}
238
4ce001ab
DA
239/*
240 * radeon_connector_analog_encoder_conflict_solve
241 * - search for other connectors sharing this encoder
242 * if priority is true, then set them disconnected if this is connected
243 * if priority is false, set us disconnected if they are connected
244 */
245static enum drm_connector_status
246radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
247 struct drm_encoder *encoder,
248 enum drm_connector_status current_status,
249 bool priority)
250{
251 struct drm_device *dev = connector->dev;
252 struct drm_connector *conflict;
08d07511 253 struct radeon_connector *radeon_conflict;
4ce001ab
DA
254 int i;
255
256 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
257 if (conflict == connector)
258 continue;
259
08d07511 260 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA
261 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
262 if (conflict->encoder_ids[i] == 0)
263 break;
264
265 /* if the IDs match */
266 if (conflict->encoder_ids[i] == encoder->base.id) {
267 if (conflict->status != connector_status_connected)
268 continue;
08d07511
AD
269
270 if (radeon_conflict->use_digital)
271 continue;
4ce001ab
DA
272
273 if (priority == true) {
c5d46b4e
AD
274 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict));
275 DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector));
4ce001ab
DA
276 conflict->status = connector_status_disconnected;
277 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
278 } else {
c5d46b4e
AD
279 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector));
280 DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict));
4ce001ab
DA
281 current_status = connector_status_disconnected;
282 }
283 break;
284 }
285 }
286 }
287 return current_status;
288
289}
290
771fe6b9
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291static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
292{
293 struct drm_device *dev = encoder->dev;
294 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
295 struct drm_display_mode *mode = NULL;
de2103e4 296 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 297
de2103e4
AD
298 if (native_mode->hdisplay != 0 &&
299 native_mode->vdisplay != 0 &&
300 native_mode->clock != 0) {
fb06ca8f 301 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG
302 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
303 drm_mode_set_name(mode);
304
d9fdaafb 305 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD
306 } else if (native_mode->hdisplay != 0 &&
307 native_mode->vdisplay != 0) {
308 /* mac laptops without an edid */
309 /* Note that this is not necessarily the exact panel mode,
310 * but an approximation based on the cvt formula. For these
311 * systems we should ideally read the mode info out of the
312 * registers or add a mode table, but this works and is much
313 * simpler.
314 */
315 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
316 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 317 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG
318 }
319 return mode;
320}
321
923f6848
AD
322static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
323{
324 struct drm_device *dev = encoder->dev;
325 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
326 struct drm_display_mode *mode = NULL;
de2103e4 327 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD
328 int i;
329 struct mode_size {
330 int w;
331 int h;
332 } common_modes[17] = {
333 { 640, 480},
334 { 720, 480},
335 { 800, 600},
336 { 848, 480},
337 {1024, 768},
338 {1152, 768},
339 {1280, 720},
340 {1280, 800},
341 {1280, 854},
342 {1280, 960},
343 {1280, 1024},
344 {1440, 900},
345 {1400, 1050},
346 {1680, 1050},
347 {1600, 1200},
348 {1920, 1080},
349 {1920, 1200}
350 };
351
352 for (i = 0; i < 17; i++) {
dfdd6467
AD
353 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
354 if (common_modes[i].w > 1024 ||
355 common_modes[i].h > 768)
356 continue;
357 }
923f6848 358 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD
359 if (common_modes[i].w > native_mode->hdisplay ||
360 common_modes[i].h > native_mode->vdisplay ||
361 (common_modes[i].w == native_mode->hdisplay &&
362 common_modes[i].h == native_mode->vdisplay))
923f6848
AD
363 continue;
364 }
365 if (common_modes[i].w < 320 || common_modes[i].h < 200)
366 continue;
367
d50ba256 368 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD
369 drm_mode_probed_add(connector, mode);
370 }
371}
372
771fe6b9
JG
373int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
374 uint64_t val)
375{
445282db
DA
376 struct drm_device *dev = connector->dev;
377 struct radeon_device *rdev = dev->dev_private;
378 struct drm_encoder *encoder;
379 struct radeon_encoder *radeon_encoder;
380
381 if (property == rdev->mode_info.coherent_mode_property) {
382 struct radeon_encoder_atom_dig *dig;
ce227c41 383 bool new_coherent_mode;
445282db
DA
384
385 /* need to find digital encoder on connector */
386 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
387 if (!encoder)
388 return 0;
389
390 radeon_encoder = to_radeon_encoder(encoder);
391
392 if (!radeon_encoder->enc_priv)
393 return 0;
394
395 dig = radeon_encoder->enc_priv;
ce227c41
DA
396 new_coherent_mode = val ? true : false;
397 if (dig->coherent_mode != new_coherent_mode) {
398 dig->coherent_mode = new_coherent_mode;
399 radeon_property_change_mode(&radeon_encoder->base);
400 }
445282db
DA
401 }
402
5b1714d3
AD
403 if (property == rdev->mode_info.underscan_property) {
404 /* need to find digital encoder on connector */
405 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
406 if (!encoder)
407 return 0;
408
409 radeon_encoder = to_radeon_encoder(encoder);
410
411 if (radeon_encoder->underscan_type != val) {
412 radeon_encoder->underscan_type = val;
413 radeon_property_change_mode(&radeon_encoder->base);
414 }
415 }
416
5bccf5e3
MG
417 if (property == rdev->mode_info.underscan_hborder_property) {
418 /* need to find digital encoder on connector */
419 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
420 if (!encoder)
421 return 0;
422
423 radeon_encoder = to_radeon_encoder(encoder);
424
425 if (radeon_encoder->underscan_hborder != val) {
426 radeon_encoder->underscan_hborder = val;
427 radeon_property_change_mode(&radeon_encoder->base);
428 }
429 }
430
431 if (property == rdev->mode_info.underscan_vborder_property) {
432 /* need to find digital encoder on connector */
433 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
434 if (!encoder)
435 return 0;
436
437 radeon_encoder = to_radeon_encoder(encoder);
438
439 if (radeon_encoder->underscan_vborder != val) {
440 radeon_encoder->underscan_vborder = val;
441 radeon_property_change_mode(&radeon_encoder->base);
442 }
443 }
444
445282db
DA
445 if (property == rdev->mode_info.tv_std_property) {
446 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
447 if (!encoder) {
448 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
449 }
450
451 if (!encoder)
452 return 0;
453
454 radeon_encoder = to_radeon_encoder(encoder);
455 if (!radeon_encoder->enc_priv)
456 return 0;
643acacf 457 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA
458 struct radeon_encoder_atom_dac *dac_int;
459 dac_int = radeon_encoder->enc_priv;
460 dac_int->tv_std = val;
461 } else {
462 struct radeon_encoder_tv_dac *dac_int;
463 dac_int = radeon_encoder->enc_priv;
464 dac_int->tv_std = val;
465 }
466 radeon_property_change_mode(&radeon_encoder->base);
467 }
468
469 if (property == rdev->mode_info.load_detect_property) {
470 struct radeon_connector *radeon_connector =
471 to_radeon_connector(connector);
472
473 if (val == 0)
474 radeon_connector->dac_load_detect = false;
475 else
476 radeon_connector->dac_load_detect = true;
477 }
478
479 if (property == rdev->mode_info.tmds_pll_property) {
480 struct radeon_encoder_int_tmds *tmds = NULL;
481 bool ret = false;
482 /* need to find digital encoder on connector */
483 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
484 if (!encoder)
485 return 0;
486
487 radeon_encoder = to_radeon_encoder(encoder);
488
489 tmds = radeon_encoder->enc_priv;
490 if (!tmds)
491 return 0;
492
493 if (val == 0) {
494 if (rdev->is_atom_bios)
495 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
496 else
497 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
498 }
499 if (val == 1 || ret == false) {
500 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
501 }
502 radeon_property_change_mode(&radeon_encoder->base);
503 }
504
771fe6b9
JG
505 return 0;
506}
507
8dfaa8a7
MD
508static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
509 struct drm_connector *connector)
510{
511 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 512 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG
513 struct drm_display_mode *t, *mode;
514
515 /* If the EDID preferred mode doesn't match the native mode, use it */
516 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
517 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
518 if (mode->hdisplay != native_mode->hdisplay ||
519 mode->vdisplay != native_mode->vdisplay)
520 memcpy(native_mode, mode, sizeof(*mode));
521 }
522 }
8dfaa8a7
MD
523
524 /* Try to get native mode details from EDID if necessary */
de2103e4 525 if (!native_mode->clock) {
8dfaa8a7 526 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD
527 if (mode->hdisplay == native_mode->hdisplay &&
528 mode->vdisplay == native_mode->vdisplay) {
529 *native_mode = *mode;
530 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 531 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD
532 break;
533 }
534 }
535 }
13bb9430 536
de2103e4 537 if (!native_mode->clock) {
c5d46b4e 538 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD
539 radeon_encoder->rmx_type = RMX_OFF;
540 }
541}
771fe6b9
JG
542
543static int radeon_lvds_get_modes(struct drm_connector *connector)
544{
545 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
546 struct drm_encoder *encoder;
547 int ret = 0;
548 struct drm_display_mode *mode;
549
550 if (radeon_connector->ddc_bus) {
551 ret = radeon_ddc_get_modes(radeon_connector);
552 if (ret > 0) {
7747b713 553 encoder = radeon_best_single_encoder(connector);
8dfaa8a7
MD
554 if (encoder) {
555 radeon_fixup_lvds_native_mode(encoder, connector);
7747b713
AD
556 /* add scaled modes */
557 radeon_add_common_modes(encoder, connector);
8dfaa8a7 558 }
771fe6b9
JG
559 return ret;
560 }
561 }
562
563 encoder = radeon_best_single_encoder(connector);
564 if (!encoder)
565 return 0;
566
567 /* we have no EDID modes */
568 mode = radeon_fp_native_mode(encoder);
569 if (mode) {
570 ret = 1;
571 drm_mode_probed_add(connector, mode);
7a868e18
AD
572 /* add the width/height from vbios tables if available */
573 connector->display_info.width_mm = mode->width_mm;
574 connector->display_info.height_mm = mode->height_mm;
7747b713
AD
575 /* add scaled modes */
576 radeon_add_common_modes(encoder, connector);
771fe6b9 577 }
923f6848 578
771fe6b9
JG
579 return ret;
580}
581
582static int radeon_lvds_mode_valid(struct drm_connector *connector,
583 struct drm_display_mode *mode)
584{
a3fa6320
AD
585 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
586
587 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
588 return MODE_PANEL;
589
590 if (encoder) {
591 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
592 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
593
594 /* AVIVO hardware supports downscaling modes larger than the panel
595 * to the panel size, but I'm not sure this is desirable.
596 */
597 if ((mode->hdisplay > native_mode->hdisplay) ||
598 (mode->vdisplay > native_mode->vdisplay))
599 return MODE_PANEL;
600
601 /* if scaling is disabled, block non-native modes */
602 if (radeon_encoder->rmx_type == RMX_OFF) {
603 if ((mode->hdisplay != native_mode->hdisplay) ||
604 (mode->vdisplay != native_mode->vdisplay))
605 return MODE_PANEL;
606 }
607 }
608
771fe6b9
JG
609 return MODE_OK;
610}
611
7b334fcb 612static enum drm_connector_status
930a9e28 613radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 614{
0549a061 615 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 616 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 617 enum drm_connector_status ret = connector_status_disconnected;
2ffb8429
AD
618
619 if (encoder) {
620 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 621 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD
622
623 /* check if panel is valid */
de2103e4 624 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429
AD
625 ret = connector_status_connected;
626
627 }
0549a061
AD
628
629 /* check for edid as well */
0294cf4f
AD
630 if (radeon_connector->edid)
631 ret = connector_status_connected;
632 else {
633 if (radeon_connector->ddc_bus) {
0294cf4f
AD
634 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
635 &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
636 if (radeon_connector->edid)
637 ret = connector_status_connected;
638 }
0549a061 639 }
771fe6b9 640 /* check acpi lid status ??? */
2ffb8429 641
771fe6b9
JG
642 radeon_connector_update_scratch_regs(connector, ret);
643 return ret;
644}
645
646static void radeon_connector_destroy(struct drm_connector *connector)
647{
648 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
649
0294cf4f
AD
650 if (radeon_connector->edid)
651 kfree(radeon_connector->edid);
771fe6b9
JG
652 kfree(radeon_connector->con_priv);
653 drm_sysfs_connector_remove(connector);
654 drm_connector_cleanup(connector);
655 kfree(connector);
656}
657
445282db
DA
658static int radeon_lvds_set_property(struct drm_connector *connector,
659 struct drm_property *property,
660 uint64_t value)
661{
662 struct drm_device *dev = connector->dev;
663 struct radeon_encoder *radeon_encoder;
664 enum radeon_rmx_type rmx_type;
665
d9fdaafb 666 DRM_DEBUG_KMS("\n");
445282db
DA
667 if (property != dev->mode_config.scaling_mode_property)
668 return 0;
669
670 if (connector->encoder)
671 radeon_encoder = to_radeon_encoder(connector->encoder);
672 else {
673 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
674 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
675 }
676
677 switch (value) {
678 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
679 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
680 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
681 default:
682 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
683 }
684 if (radeon_encoder->rmx_type == rmx_type)
685 return 0;
686
687 radeon_encoder->rmx_type = rmx_type;
688
689 radeon_property_change_mode(&radeon_encoder->base);
690 return 0;
691}
692
693
771fe6b9
JG
694struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
695 .get_modes = radeon_lvds_get_modes,
696 .mode_valid = radeon_lvds_mode_valid,
697 .best_encoder = radeon_best_single_encoder,
698};
699
700struct drm_connector_funcs radeon_lvds_connector_funcs = {
701 .dpms = drm_helper_connector_dpms,
702 .detect = radeon_lvds_detect,
703 .fill_modes = drm_helper_probe_single_connector_modes,
704 .destroy = radeon_connector_destroy,
445282db 705 .set_property = radeon_lvds_set_property,
771fe6b9
JG
706};
707
708static int radeon_vga_get_modes(struct drm_connector *connector)
709{
710 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
711 int ret;
712
713 ret = radeon_ddc_get_modes(radeon_connector);
714
715 return ret;
716}
717
718static int radeon_vga_mode_valid(struct drm_connector *connector,
719 struct drm_display_mode *mode)
720{
b20f9bef
AD
721 struct drm_device *dev = connector->dev;
722 struct radeon_device *rdev = dev->dev_private;
723
a3fa6320 724 /* XXX check mode bandwidth */
b20f9bef
AD
725
726 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
727 return MODE_CLOCK_HIGH;
728
771fe6b9
JG
729 return MODE_OK;
730}
731
7b334fcb 732static enum drm_connector_status
930a9e28 733radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 734{
fafcf94e
AD
735 struct drm_device *dev = connector->dev;
736 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
737 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
738 struct drm_encoder *encoder;
739 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 740 bool dret = false;
771fe6b9
JG
741 enum drm_connector_status ret = connector_status_disconnected;
742
4ce001ab
DA
743 encoder = radeon_best_single_encoder(connector);
744 if (!encoder)
745 ret = connector_status_disconnected;
746
eb6b6d7c 747 if (radeon_connector->ddc_bus)
bc1c4dc3 748 dret = radeon_ddc_probe(radeon_connector);
0294cf4f 749 if (dret) {
d0d0a225 750 radeon_connector->detected_by_load = false;
0294cf4f
AD
751 if (radeon_connector->edid) {
752 kfree(radeon_connector->edid);
753 radeon_connector->edid = NULL;
754 }
0294cf4f 755 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
756
757 if (!radeon_connector->edid) {
f82f5f3a
JG
758 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
759 drm_get_connector_name(connector));
760 ret = connector_status_connected;
0294cf4f
AD
761 } else {
762 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
763
764 /* some oems have boards with separate digital and analog connectors
765 * with a shared ddc line (often vga + hdmi)
766 */
767 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
768 kfree(radeon_connector->edid);
769 radeon_connector->edid = NULL;
770 ret = connector_status_disconnected;
771 } else
772 ret = connector_status_connected;
773 }
774 } else {
c3cceedd
DA
775
776 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD
777 if (!force) {
778 /* only return the previous status if we last
779 * detected a monitor via load.
780 */
781 if (radeon_connector->detected_by_load)
782 return connector->status;
783 else
784 return ret;
785 }
c3cceedd 786
d8a7f792 787 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA
788 encoder_funcs = encoder->helper_private;
789 ret = encoder_funcs->detect(encoder, connector);
34076446 790 if (ret != connector_status_disconnected)
d0d0a225 791 radeon_connector->detected_by_load = true;
445282db 792 }
771fe6b9
JG
793 }
794
4ce001ab
DA
795 if (ret == connector_status_connected)
796 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD
797
798 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
799 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
800 * by other means, assume the CRT is connected and use that EDID.
801 */
802 if ((!rdev->is_atom_bios) &&
803 (ret == connector_status_disconnected) &&
804 rdev->mode_info.bios_hardcoded_edid_size) {
805 ret = connector_status_connected;
806 }
807
771fe6b9
JG
808 radeon_connector_update_scratch_regs(connector, ret);
809 return ret;
810}
811
812struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
813 .get_modes = radeon_vga_get_modes,
814 .mode_valid = radeon_vga_mode_valid,
815 .best_encoder = radeon_best_single_encoder,
816};
817
818struct drm_connector_funcs radeon_vga_connector_funcs = {
819 .dpms = drm_helper_connector_dpms,
820 .detect = radeon_vga_detect,
821 .fill_modes = drm_helper_probe_single_connector_modes,
822 .destroy = radeon_connector_destroy,
823 .set_property = radeon_connector_set_property,
824};
825
4ce001ab
DA
826static int radeon_tv_get_modes(struct drm_connector *connector)
827{
828 struct drm_device *dev = connector->dev;
923f6848 829 struct radeon_device *rdev = dev->dev_private;
4ce001ab 830 struct drm_display_mode *tv_mode;
923f6848 831 struct drm_encoder *encoder;
4ce001ab 832
923f6848
AD
833 encoder = radeon_best_single_encoder(connector);
834 if (!encoder)
835 return 0;
4ce001ab 836
923f6848
AD
837 /* avivo chips can scale any mode */
838 if (rdev->family >= CHIP_RS600)
839 /* add scaled modes */
840 radeon_add_common_modes(encoder, connector);
841 else {
842 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 843 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD
844 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
845 drm_mode_probed_add(connector, tv_mode);
846 }
4ce001ab
DA
847 return 1;
848}
849
850static int radeon_tv_mode_valid(struct drm_connector *connector,
851 struct drm_display_mode *mode)
852{
a3fa6320
AD
853 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
854 return MODE_CLOCK_RANGE;
4ce001ab
DA
855 return MODE_OK;
856}
857
7b334fcb 858static enum drm_connector_status
930a9e28 859radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA
860{
861 struct drm_encoder *encoder;
862 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA
863 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
864 enum drm_connector_status ret = connector_status_disconnected;
865
866 if (!radeon_connector->dac_load_detect)
867 return ret;
4ce001ab
DA
868
869 encoder = radeon_best_single_encoder(connector);
870 if (!encoder)
871 ret = connector_status_disconnected;
872 else {
873 encoder_funcs = encoder->helper_private;
874 ret = encoder_funcs->detect(encoder, connector);
875 }
876 if (ret == connector_status_connected)
877 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
878 radeon_connector_update_scratch_regs(connector, ret);
879 return ret;
880}
881
882struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
883 .get_modes = radeon_tv_get_modes,
884 .mode_valid = radeon_tv_mode_valid,
885 .best_encoder = radeon_best_single_encoder,
886};
887
888struct drm_connector_funcs radeon_tv_connector_funcs = {
889 .dpms = drm_helper_connector_dpms,
890 .detect = radeon_tv_detect,
891 .fill_modes = drm_helper_probe_single_connector_modes,
892 .destroy = radeon_connector_destroy,
893 .set_property = radeon_connector_set_property,
894};
895
771fe6b9
JG
896static int radeon_dvi_get_modes(struct drm_connector *connector)
897{
898 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
899 int ret;
900
901 ret = radeon_ddc_get_modes(radeon_connector);
771fe6b9
JG
902 return ret;
903}
904
11fe1266
TU
905static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
906{
907 struct drm_device *dev = connector->dev;
908 struct radeon_device *rdev = dev->dev_private;
909 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
910 enum drm_connector_status status;
911
912 /* We only trust HPD on R600 and newer ASICS. */
913 if (rdev->family >= CHIP_R600
914 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
915 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
916 status = connector_status_connected;
917 else
918 status = connector_status_disconnected;
919 if (connector->status == status)
920 return true;
921 }
922
923 return false;
924}
925
4ce001ab
DA
926/*
927 * DVI is complicated
928 * Do a DDC probe, if DDC probe passes, get the full EDID so
929 * we can do analog/digital monitor detection at this point.
930 * If the monitor is an analog monitor or we got no DDC,
931 * we need to find the DAC encoder object for this connector.
932 * If we got no DDC, we do load detection on the DAC encoder object.
933 * If we got analog DDC or load detection passes on the DAC encoder
934 * we have to check if this analog encoder is shared with anyone else (TV)
935 * if its shared we have to set the other connector to disconnected.
936 */
7b334fcb 937static enum drm_connector_status
930a9e28 938radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 939{
fafcf94e
AD
940 struct drm_device *dev = connector->dev;
941 struct radeon_device *rdev = dev->dev_private;
771fe6b9 942 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 943 struct drm_encoder *encoder = NULL;
771fe6b9
JG
944 struct drm_encoder_helper_funcs *encoder_funcs;
945 struct drm_mode_object *obj;
946 int i;
947 enum drm_connector_status ret = connector_status_disconnected;
4b9d2a21 948 bool dret = false;
771fe6b9 949
11fe1266
TU
950 if (!force && radeon_check_hpd_status_unchanged(connector))
951 return connector->status;
952
eb6b6d7c 953 if (radeon_connector->ddc_bus)
bc1c4dc3 954 dret = radeon_ddc_probe(radeon_connector);
4ce001ab 955 if (dret) {
d0d0a225 956 radeon_connector->detected_by_load = false;
0294cf4f
AD
957 if (radeon_connector->edid) {
958 kfree(radeon_connector->edid);
959 radeon_connector->edid = NULL;
960 }
4ce001ab 961 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
4ce001ab
DA
962
963 if (!radeon_connector->edid) {
f82f5f3a
JG
964 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
965 drm_get_connector_name(connector));
4a9a8b71
DA
966 /* rs690 seems to have a problem with connectors not existing and always
967 * return a block of 0's. If we see this just stop polling on this output */
968 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) {
969 ret = connector_status_disconnected;
970 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector));
971 radeon_connector->ddc_bus = NULL;
972 }
4ce001ab
DA
973 } else {
974 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
975
0294cf4f
AD
976 /* some oems have boards with separate digital and analog connectors
977 * with a shared ddc line (often vga + hdmi)
978 */
979 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
980 kfree(radeon_connector->edid);
981 radeon_connector->edid = NULL;
982 ret = connector_status_disconnected;
983 } else
984 ret = connector_status_connected;
71407c46 985
42f14c4b
AD
986 /* This gets complicated. We have boards with VGA + HDMI with a
987 * shared DDC line and we have boards with DVI-D + HDMI with a shared
988 * DDC line. The latter is more complex because with DVI<->HDMI adapters
989 * you don't really know what's connected to which port as both are digital.
71407c46 990 */
d3932d6c 991 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD
992 struct drm_connector *list_connector;
993 struct radeon_connector *list_radeon_connector;
994 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
995 if (connector == list_connector)
996 continue;
997 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD
998 if (list_radeon_connector->shared_ddc &&
999 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1000 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD
1001 /* cases where both connectors are digital */
1002 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1003 /* hpd is our only option in this case */
1004 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
71407c46
AD
1005 kfree(radeon_connector->edid);
1006 radeon_connector->edid = NULL;
1007 ret = connector_status_disconnected;
1008 }
1009 }
1010 }
1011 }
1012 }
4ce001ab
DA
1013 }
1014 }
1015
1016 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1017 goto out;
1018
5f0a2612
AD
1019 /* DVI-D and HDMI-A are digital only */
1020 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1021 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1022 goto out;
1023
d0d0a225 1024 /* if we aren't forcing don't do destructive polling */
c3cceedd 1025 if (!force) {
d0d0a225
AD
1026 /* only return the previous status if we last
1027 * detected a monitor via load.
1028 */
1029 if (radeon_connector->detected_by_load)
1030 ret = connector->status;
c3cceedd
DA
1031 goto out;
1032 }
1033
4ce001ab 1034 /* find analog encoder */
445282db
DA
1035 if (radeon_connector->dac_load_detect) {
1036 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1037 if (connector->encoder_ids[i] == 0)
1038 break;
771fe6b9 1039
445282db
DA
1040 obj = drm_mode_object_find(connector->dev,
1041 connector->encoder_ids[i],
1042 DRM_MODE_OBJECT_ENCODER);
1043 if (!obj)
1044 continue;
771fe6b9 1045
445282db 1046 encoder = obj_to_encoder(obj);
771fe6b9 1047
e3632507 1048 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD
1049 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1050 continue;
1051
445282db
DA
1052 encoder_funcs = encoder->helper_private;
1053 if (encoder_funcs->detect) {
1054 if (ret != connector_status_connected) {
1055 ret = encoder_funcs->detect(encoder, connector);
1056 if (ret == connector_status_connected) {
1057 radeon_connector->use_digital = false;
1058 }
34076446
JG
1059 if (ret != connector_status_disconnected)
1060 radeon_connector->detected_by_load = true;
771fe6b9 1061 }
445282db 1062 break;
771fe6b9
JG
1063 }
1064 }
1065 }
1066
4ce001ab
DA
1067 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1068 encoder) {
1069 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1070 }
1071
fafcf94e
AD
1072 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1073 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1074 * by other means, assume the DFP is connected and use that EDID. In most
1075 * cases the DVI port is actually a virtual KVM port connected to the service
1076 * processor.
1077 */
a09d431f 1078out:
fafcf94e
AD
1079 if ((!rdev->is_atom_bios) &&
1080 (ret == connector_status_disconnected) &&
1081 rdev->mode_info.bios_hardcoded_edid_size) {
1082 radeon_connector->use_digital = true;
1083 ret = connector_status_connected;
1084 }
1085
771fe6b9
JG
1086 /* updated in get modes as well since we need to know if it's analog or digital */
1087 radeon_connector_update_scratch_regs(connector, ret);
1088 return ret;
1089}
1090
1091/* okay need to be smart in here about which encoder to pick */
1092struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
1093{
1094 int enc_id = connector->encoder_ids[0];
1095 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1096 struct drm_mode_object *obj;
1097 struct drm_encoder *encoder;
1098 int i;
1099 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1100 if (connector->encoder_ids[i] == 0)
1101 break;
1102
1103 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1104 if (!obj)
1105 continue;
1106
1107 encoder = obj_to_encoder(obj);
1108
4ce001ab 1109 if (radeon_connector->use_digital == true) {
771fe6b9
JG
1110 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1111 return encoder;
1112 } else {
1113 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1114 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1115 return encoder;
1116 }
1117 }
1118
1119 /* see if we have a default encoder TODO */
1120
1121 /* then check use digitial */
1122 /* pick the first one */
1123 if (enc_id) {
1124 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
1125 if (!obj)
1126 return NULL;
1127 encoder = obj_to_encoder(obj);
1128 return encoder;
1129 }
1130 return NULL;
1131}
1132
d50ba256
DA
1133static void radeon_dvi_force(struct drm_connector *connector)
1134{
1135 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1136 if (connector->force == DRM_FORCE_ON)
1137 radeon_connector->use_digital = false;
1138 if (connector->force == DRM_FORCE_ON_DIGITAL)
1139 radeon_connector->use_digital = true;
1140}
1141
a3fa6320
AD
1142static int radeon_dvi_mode_valid(struct drm_connector *connector,
1143 struct drm_display_mode *mode)
1144{
1b24203e
AD
1145 struct drm_device *dev = connector->dev;
1146 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD
1147 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1148
1149 /* XXX check mode bandwidth */
1150
1b24203e
AD
1151 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1152 if (radeon_connector->use_digital &&
1153 (rdev->family == CHIP_RV100) &&
1154 (mode->clock > 135000))
1155 return MODE_CLOCK_HIGH;
1156
a3fa6320
AD
1157 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1158 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1159 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1160 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1161 return MODE_OK;
e1e84017 1162 else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
1b2681ba 1163 if (ASIC_IS_DCE6(rdev)) {
e1e84017
AD
1164 /* HDMI 1.3+ supports max clock of 340 Mhz */
1165 if (mode->clock > 340000)
1166 return MODE_CLOCK_HIGH;
1167 else
1168 return MODE_OK;
1169 } else
1170 return MODE_CLOCK_HIGH;
1171 } else
a3fa6320
AD
1172 return MODE_CLOCK_HIGH;
1173 }
b20f9bef
AD
1174
1175 /* check against the max pixel clock */
1176 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1177 return MODE_CLOCK_HIGH;
1178
a3fa6320
AD
1179 return MODE_OK;
1180}
1181
771fe6b9
JG
1182struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
1183 .get_modes = radeon_dvi_get_modes,
a3fa6320 1184 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG
1185 .best_encoder = radeon_dvi_encoder,
1186};
1187
1188struct drm_connector_funcs radeon_dvi_connector_funcs = {
1189 .dpms = drm_helper_connector_dpms,
1190 .detect = radeon_dvi_detect,
1191 .fill_modes = drm_helper_probe_single_connector_modes,
1192 .set_property = radeon_connector_set_property,
1193 .destroy = radeon_connector_destroy,
d50ba256 1194 .force = radeon_dvi_force,
771fe6b9
JG
1195};
1196
ffd09c64
AD
1197static void radeon_dp_connector_destroy(struct drm_connector *connector)
1198{
1199 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1200 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1201
ffd09c64
AD
1202 if (radeon_connector->edid)
1203 kfree(radeon_connector->edid);
1204 if (radeon_dig_connector->dp_i2c_bus)
ac1aade6 1205 radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus);
ffd09c64
AD
1206 kfree(radeon_connector->con_priv);
1207 drm_sysfs_connector_remove(connector);
1208 drm_connector_cleanup(connector);
1209 kfree(connector);
1210}
1211
746c1aa4
DA
1212static int radeon_dp_get_modes(struct drm_connector *connector)
1213{
1214 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1215 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1216 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA
1217 int ret;
1218
f89931f3
AD
1219 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1220 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1221 struct drm_display_mode *mode;
1222
2b69ffb9
AD
1223 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1224 if (!radeon_dig_connector->edp_on)
1225 atombios_set_edp_panel_power(connector,
1226 ATOM_TRANSMITTER_ACTION_POWER_ON);
1227 ret = radeon_ddc_get_modes(radeon_connector);
1228 if (!radeon_dig_connector->edp_on)
1229 atombios_set_edp_panel_power(connector,
1230 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1231 } else {
1232 /* need to setup ddc on the bridge */
1233 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1234 ENCODER_OBJECT_ID_NONE) {
1235 if (encoder)
1236 radeon_atom_ext_encoder_setup_ddc(encoder);
1237 }
1238 ret = radeon_ddc_get_modes(radeon_connector);
1239 }
d291767b
AD
1240
1241 if (ret > 0) {
d291767b
AD
1242 if (encoder) {
1243 radeon_fixup_lvds_native_mode(encoder, connector);
1244 /* add scaled modes */
1245 radeon_add_common_modes(encoder, connector);
1246 }
1247 return ret;
1248 }
1249
d291767b
AD
1250 if (!encoder)
1251 return 0;
1252
1253 /* we have no EDID modes */
1254 mode = radeon_fp_native_mode(encoder);
1255 if (mode) {
1256 ret = 1;
1257 drm_mode_probed_add(connector, mode);
1258 /* add the width/height from vbios tables if available */
1259 connector->display_info.width_mm = mode->width_mm;
1260 connector->display_info.height_mm = mode->height_mm;
1261 /* add scaled modes */
1262 radeon_add_common_modes(encoder, connector);
1263 }
591a10e1
AD
1264 } else {
1265 /* need to setup ddc on the bridge */
1d33e1fc
AD
1266 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1267 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD
1268 if (encoder)
1269 radeon_atom_ext_encoder_setup_ddc(encoder);
1270 }
d291767b 1271 ret = radeon_ddc_get_modes(radeon_connector);
591a10e1 1272 }
8b834852 1273
746c1aa4
DA
1274 return ret;
1275}
1276
1d33e1fc 1277u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3
AD
1278{
1279 struct drm_mode_object *obj;
1280 struct drm_encoder *encoder;
1281 struct radeon_encoder *radeon_encoder;
1282 int i;
d7fa8bb3
AD
1283
1284 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1285 if (connector->encoder_ids[i] == 0)
1286 break;
1287
1288 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1289 if (!obj)
1290 continue;
1291
1292 encoder = obj_to_encoder(obj);
1293 radeon_encoder = to_radeon_encoder(encoder);
1294
1295 switch (radeon_encoder->encoder_id) {
1296 case ENCODER_OBJECT_ID_TRAVIS:
1297 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1298 return radeon_encoder->encoder_id;
d7fa8bb3
AD
1299 default:
1300 break;
1301 }
1302 }
1303
1d33e1fc 1304 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD
1305}
1306
1307bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1308{
1309 struct drm_mode_object *obj;
1310 struct drm_encoder *encoder;
1311 struct radeon_encoder *radeon_encoder;
1312 int i;
1313 bool found = false;
1314
1315 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1316 if (connector->encoder_ids[i] == 0)
1317 break;
1318
1319 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1320 if (!obj)
1321 continue;
1322
1323 encoder = obj_to_encoder(obj);
1324 radeon_encoder = to_radeon_encoder(encoder);
1325 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1326 found = true;
1327 }
1328
1329 return found;
1330}
1331
1332bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1333{
1334 struct drm_device *dev = connector->dev;
1335 struct radeon_device *rdev = dev->dev_private;
1336
1337 if (ASIC_IS_DCE5(rdev) &&
1338 (rdev->clock.dp_extclk >= 53900) &&
1339 radeon_connector_encoder_is_hbr2(connector)) {
1340 return true;
1341 }
1342
1343 return false;
1344}
1345
7b334fcb 1346static enum drm_connector_status
930a9e28 1347radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1348{
f8d0edde
AD
1349 struct drm_device *dev = connector->dev;
1350 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1351 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1352 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1353 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1354 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4 1355
11fe1266
TU
1356 if (!force && radeon_check_hpd_status_unchanged(connector))
1357 return connector->status;
1358
746c1aa4
DA
1359 if (radeon_connector->edid) {
1360 kfree(radeon_connector->edid);
1361 radeon_connector->edid = NULL;
1362 }
1363
f89931f3
AD
1364 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1365 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1366 if (encoder) {
1367 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1368 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1369
1370 /* check if panel is valid */
1371 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1372 ret = connector_status_connected;
1373 }
6f50eae7
AD
1374 /* eDP is always DP */
1375 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD
1376 if (!radeon_dig_connector->edp_on)
1377 atombios_set_edp_panel_power(connector,
1378 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1379 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1380 ret = connector_status_connected;
8b834852
AD
1381 if (!radeon_dig_connector->edp_on)
1382 atombios_set_edp_panel_power(connector,
1383 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD
1384 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1385 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD
1386 /* DP bridges are always DP */
1387 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1388 /* get the DPCD from the bridge */
1389 radeon_dp_getdpcd(radeon_connector);
1390
6777a4f6
AD
1391 if (encoder) {
1392 /* setup ddc on the bridge */
1393 radeon_atom_ext_encoder_setup_ddc(encoder);
bc1c4dc3 1394 if (radeon_ddc_probe(radeon_connector)) /* try DDC */
b06947b5 1395 ret = connector_status_connected;
6777a4f6
AD
1396 else if (radeon_connector->dac_load_detect) { /* try load detection */
1397 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD
1398 ret = encoder_funcs->detect(encoder, connector);
1399 }
591a10e1 1400 }
b06947b5 1401 } else {
6f50eae7 1402 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD
1403 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1404 ret = connector_status_connected;
1405 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1406 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1407 } else {
f8d0edde
AD
1408 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1409 if (radeon_dp_getdpcd(radeon_connector))
1410 ret = connector_status_connected;
1411 } else {
bc1c4dc3 1412 if (radeon_ddc_probe(radeon_connector))
f8d0edde
AD
1413 ret = connector_status_connected;
1414 }
4143e919 1415 }
746c1aa4 1416 }
4143e919 1417
30f44372 1418 radeon_connector_update_scratch_regs(connector, ret);
746c1aa4
DA
1419 return ret;
1420}
1421
5801ead6
AD
1422static int radeon_dp_mode_valid(struct drm_connector *connector,
1423 struct drm_display_mode *mode)
1424{
1425 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1426 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1427
1428 /* XXX check mode bandwidth */
1429
f89931f3
AD
1430 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1431 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1432 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1433
1434 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1435 return MODE_PANEL;
1436
1437 if (encoder) {
1438 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1439 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1440
f89931f3 1441 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD
1442 * to the panel size, but I'm not sure this is desirable.
1443 */
1444 if ((mode->hdisplay > native_mode->hdisplay) ||
1445 (mode->vdisplay > native_mode->vdisplay))
1446 return MODE_PANEL;
1447
1448 /* if scaling is disabled, block non-native modes */
1449 if (radeon_encoder->rmx_type == RMX_OFF) {
1450 if ((mode->hdisplay != native_mode->hdisplay) ||
1451 (mode->vdisplay != native_mode->vdisplay))
1452 return MODE_PANEL;
1453 }
1454 }
5801ead6 1455 return MODE_OK;
d291767b
AD
1456 } else {
1457 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1458 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
1459 return radeon_dp_mode_valid_helper(connector, mode);
1460 else
1461 return MODE_OK;
1462 }
5801ead6
AD
1463}
1464
746c1aa4
DA
1465struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
1466 .get_modes = radeon_dp_get_modes,
5801ead6 1467 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA
1468 .best_encoder = radeon_dvi_encoder,
1469};
1470
1471struct drm_connector_funcs radeon_dp_connector_funcs = {
1472 .dpms = drm_helper_connector_dpms,
1473 .detect = radeon_dp_detect,
1474 .fill_modes = drm_helper_probe_single_connector_modes,
1475 .set_property = radeon_connector_set_property,
ffd09c64 1476 .destroy = radeon_dp_connector_destroy,
746c1aa4
DA
1477 .force = radeon_dvi_force,
1478};
1479
771fe6b9
JG
1480void
1481radeon_add_atom_connector(struct drm_device *dev,
1482 uint32_t connector_id,
1483 uint32_t supported_device,
1484 int connector_type,
1485 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1486 uint32_t igp_lane_info,
eed45b30 1487 uint16_t connector_object_id,
26b5bc98
AD
1488 struct radeon_hpd *hpd,
1489 struct radeon_router *router)
771fe6b9 1490{
445282db 1491 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
1492 struct drm_connector *connector;
1493 struct radeon_connector *radeon_connector;
1494 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD
1495 struct drm_encoder *encoder;
1496 struct radeon_encoder *radeon_encoder;
771fe6b9 1497 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1498 bool shared_ddc = false;
eac4dff6 1499 bool is_dp_bridge = false;
771fe6b9 1500
4ce001ab 1501 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
1502 return;
1503
cf4c12f9
AD
1504 /* if the user selected tv=0 don't try and add the connector */
1505 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1506 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1507 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1508 (radeon_tv == 0))
1509 return;
1510
771fe6b9
JG
1511 /* see if we already added it */
1512 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1513 radeon_connector = to_radeon_connector(connector);
1514 if (radeon_connector->connector_id == connector_id) {
1515 radeon_connector->devices |= supported_device;
1516 return;
1517 }
0294cf4f 1518 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1519 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD
1520 radeon_connector->shared_ddc = true;
1521 shared_ddc = true;
1522 }
fb939dfc 1523 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD
1524 (radeon_connector->router.router_id == router->router_id)) {
1525 radeon_connector->shared_ddc = false;
1526 shared_ddc = false;
1527 }
0294cf4f 1528 }
771fe6b9
JG
1529 }
1530
eac4dff6
AD
1531 /* check if it's a dp bridge */
1532 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1533 radeon_encoder = to_radeon_encoder(encoder);
1534 if (radeon_encoder->devices & supported_device) {
1535 switch (radeon_encoder->encoder_id) {
1536 case ENCODER_OBJECT_ID_TRAVIS:
1537 case ENCODER_OBJECT_ID_NUTMEG:
1538 is_dp_bridge = true;
1539 break;
1540 default:
1541 break;
1542 }
1543 }
1544 }
1545
771fe6b9
JG
1546 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1547 if (!radeon_connector)
1548 return;
1549
1550 connector = &radeon_connector->base;
1551
1552 radeon_connector->connector_id = connector_id;
1553 radeon_connector->devices = supported_device;
0294cf4f 1554 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1555 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1556 radeon_connector->hpd = *hpd;
bc1c4dc3 1557
26b5bc98 1558 radeon_connector->router = *router;
fb939dfc 1559 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD
1560 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1561 if (!radeon_connector->router_bus)
a70882aa 1562 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1563 }
eac4dff6
AD
1564
1565 if (is_dp_bridge) {
771fe6b9
JG
1566 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1567 if (!radeon_dig_connector)
1568 goto failed;
771fe6b9
JG
1569 radeon_dig_connector->igp_lane_info = igp_lane_info;
1570 radeon_connector->con_priv = radeon_dig_connector;
eac4dff6
AD
1571 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1572 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
771fe6b9 1573 if (i2c_bus->valid) {
eac4dff6
AD
1574 /* add DP i2c bus */
1575 if (connector_type == DRM_MODE_CONNECTOR_eDP)
1576 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1577 else
1578 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1579 if (!radeon_dig_connector->dp_i2c_bus)
1580 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
f376b94f 1581 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1582 if (!radeon_connector->ddc_bus)
eac4dff6 1583 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1584 }
eac4dff6
AD
1585 switch (connector_type) {
1586 case DRM_MODE_CONNECTOR_VGA:
1587 case DRM_MODE_CONNECTOR_DVIA:
1588 default:
1589 connector->interlace_allowed = true;
1590 connector->doublescan_allowed = true;
d629a3ce
AD
1591 radeon_connector->dac_load_detect = true;
1592 drm_connector_attach_property(&radeon_connector->base,
1593 rdev->mode_info.load_detect_property,
1594 1);
eac4dff6
AD
1595 break;
1596 case DRM_MODE_CONNECTOR_DVII:
1597 case DRM_MODE_CONNECTOR_DVID:
1598 case DRM_MODE_CONNECTOR_HDMIA:
1599 case DRM_MODE_CONNECTOR_HDMIB:
1600 case DRM_MODE_CONNECTOR_DisplayPort:
430f70d5
AD
1601 drm_connector_attach_property(&radeon_connector->base,
1602 rdev->mode_info.underscan_property,
56bec7c0 1603 UNDERSCAN_OFF);
5bccf5e3
MG
1604 drm_connector_attach_property(&radeon_connector->base,
1605 rdev->mode_info.underscan_hborder_property,
1606 0);
1607 drm_connector_attach_property(&radeon_connector->base,
1608 rdev->mode_info.underscan_vborder_property,
1609 0);
eac4dff6
AD
1610 subpixel_order = SubPixelHorizontalRGB;
1611 connector->interlace_allowed = true;
1612 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1613 connector->doublescan_allowed = true;
1614 else
1615 connector->doublescan_allowed = false;
d629a3ce
AD
1616 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1617 radeon_connector->dac_load_detect = true;
1618 drm_connector_attach_property(&radeon_connector->base,
1619 rdev->mode_info.load_detect_property,
1620 1);
1621 }
eac4dff6
AD
1622 break;
1623 case DRM_MODE_CONNECTOR_LVDS:
1624 case DRM_MODE_CONNECTOR_eDP:
1625 drm_connector_attach_property(&radeon_connector->base,
1626 dev->mode_config.scaling_mode_property,
1627 DRM_MODE_SCALE_FULLSCREEN);
1628 subpixel_order = SubPixelHorizontalRGB;
1629 connector->interlace_allowed = false;
1630 connector->doublescan_allowed = false;
1631 break;
5bccf5e3 1632 }
eac4dff6
AD
1633 } else {
1634 switch (connector_type) {
1635 case DRM_MODE_CONNECTOR_VGA:
1636 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1637 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1638 if (i2c_bus->valid) {
1639 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1640 if (!radeon_connector->ddc_bus)
1641 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1642 }
390d0bbe
AD
1643 radeon_connector->dac_load_detect = true;
1644 drm_connector_attach_property(&radeon_connector->base,
1645 rdev->mode_info.load_detect_property,
1646 1);
eac4dff6
AD
1647 /* no HPD on analog connectors */
1648 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1649 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1650 connector->interlace_allowed = true;
c49948f4 1651 connector->doublescan_allowed = true;
eac4dff6
AD
1652 break;
1653 case DRM_MODE_CONNECTOR_DVIA:
1654 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1655 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1656 if (i2c_bus->valid) {
1657 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1658 if (!radeon_connector->ddc_bus)
1659 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1660 }
1661 radeon_connector->dac_load_detect = true;
430f70d5 1662 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1663 rdev->mode_info.load_detect_property,
1664 1);
1665 /* no HPD on analog connectors */
1666 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1667 connector->interlace_allowed = true;
1668 connector->doublescan_allowed = true;
1669 break;
1670 case DRM_MODE_CONNECTOR_DVII:
1671 case DRM_MODE_CONNECTOR_DVID:
1672 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1673 if (!radeon_dig_connector)
1674 goto failed;
1675 radeon_dig_connector->igp_lane_info = igp_lane_info;
1676 radeon_connector->con_priv = radeon_dig_connector;
1677 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1678 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1679 if (i2c_bus->valid) {
1680 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1681 if (!radeon_connector->ddc_bus)
1682 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1683 }
1684 subpixel_order = SubPixelHorizontalRGB;
5bccf5e3 1685 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1686 rdev->mode_info.coherent_mode_property,
1687 1);
1688 if (ASIC_IS_AVIVO(rdev)) {
1689 drm_connector_attach_property(&radeon_connector->base,
1690 rdev->mode_info.underscan_property,
1691 UNDERSCAN_OFF);
1692 drm_connector_attach_property(&radeon_connector->base,
1693 rdev->mode_info.underscan_hborder_property,
1694 0);
1695 drm_connector_attach_property(&radeon_connector->base,
1696 rdev->mode_info.underscan_vborder_property,
1697 0);
1698 }
1699 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1700 radeon_connector->dac_load_detect = true;
1701 drm_connector_attach_property(&radeon_connector->base,
1702 rdev->mode_info.load_detect_property,
1703 1);
1704 }
1705 connector->interlace_allowed = true;
1706 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1707 connector->doublescan_allowed = true;
1708 else
1709 connector->doublescan_allowed = false;
1710 break;
1711 case DRM_MODE_CONNECTOR_HDMIA:
1712 case DRM_MODE_CONNECTOR_HDMIB:
1713 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1714 if (!radeon_dig_connector)
1715 goto failed;
1716 radeon_dig_connector->igp_lane_info = igp_lane_info;
1717 radeon_connector->con_priv = radeon_dig_connector;
1718 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1719 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1720 if (i2c_bus->valid) {
1721 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1722 if (!radeon_connector->ddc_bus)
1723 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1724 }
5bccf5e3 1725 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1726 rdev->mode_info.coherent_mode_property,
1727 1);
1728 if (ASIC_IS_AVIVO(rdev)) {
1729 drm_connector_attach_property(&radeon_connector->base,
1730 rdev->mode_info.underscan_property,
1731 UNDERSCAN_OFF);
1732 drm_connector_attach_property(&radeon_connector->base,
1733 rdev->mode_info.underscan_hborder_property,
1734 0);
1735 drm_connector_attach_property(&radeon_connector->base,
1736 rdev->mode_info.underscan_vborder_property,
1737 0);
1738 }
1739 subpixel_order = SubPixelHorizontalRGB;
1740 connector->interlace_allowed = true;
1741 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1742 connector->doublescan_allowed = true;
1743 else
1744 connector->doublescan_allowed = false;
1745 break;
1746 case DRM_MODE_CONNECTOR_DisplayPort:
1747 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1748 if (!radeon_dig_connector)
1749 goto failed;
1750 radeon_dig_connector->igp_lane_info = igp_lane_info;
1751 radeon_connector->con_priv = radeon_dig_connector;
1752 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1753 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1754 if (i2c_bus->valid) {
1755 /* add DP i2c bus */
1756 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1757 if (!radeon_dig_connector->dp_i2c_bus)
1758 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1759 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1760 if (!radeon_connector->ddc_bus)
1761 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1762 }
1763 subpixel_order = SubPixelHorizontalRGB;
1764 drm_connector_attach_property(&radeon_connector->base,
1765 rdev->mode_info.coherent_mode_property,
1766 1);
1767 if (ASIC_IS_AVIVO(rdev)) {
1768 drm_connector_attach_property(&radeon_connector->base,
1769 rdev->mode_info.underscan_property,
1770 UNDERSCAN_OFF);
1771 drm_connector_attach_property(&radeon_connector->base,
1772 rdev->mode_info.underscan_hborder_property,
1773 0);
1774 drm_connector_attach_property(&radeon_connector->base,
1775 rdev->mode_info.underscan_vborder_property,
1776 0);
1777 }
1778 connector->interlace_allowed = true;
1779 /* in theory with a DP to VGA converter... */
c49948f4 1780 connector->doublescan_allowed = false;
eac4dff6
AD
1781 break;
1782 case DRM_MODE_CONNECTOR_eDP:
1783 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1784 if (!radeon_dig_connector)
1785 goto failed;
1786 radeon_dig_connector->igp_lane_info = igp_lane_info;
1787 radeon_connector->con_priv = radeon_dig_connector;
1788 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1789 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1790 if (i2c_bus->valid) {
1791 /* add DP i2c bus */
1792 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1793 if (!radeon_dig_connector->dp_i2c_bus)
1794 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1795 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1796 if (!radeon_connector->ddc_bus)
1797 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1798 }
430f70d5 1799 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1800 dev->mode_config.scaling_mode_property,
1801 DRM_MODE_SCALE_FULLSCREEN);
1802 subpixel_order = SubPixelHorizontalRGB;
1803 connector->interlace_allowed = false;
1804 connector->doublescan_allowed = false;
1805 break;
1806 case DRM_MODE_CONNECTOR_SVIDEO:
1807 case DRM_MODE_CONNECTOR_Composite:
1808 case DRM_MODE_CONNECTOR_9PinDIN:
1809 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1810 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1811 radeon_connector->dac_load_detect = true;
5bccf5e3 1812 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1813 rdev->mode_info.load_detect_property,
1814 1);
5bccf5e3 1815 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1816 rdev->mode_info.tv_std_property,
1817 radeon_atombios_get_tv_info(rdev));
1818 /* no HPD on analog connectors */
1819 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1820 connector->interlace_allowed = false;
1821 connector->doublescan_allowed = false;
1822 break;
1823 case DRM_MODE_CONNECTOR_LVDS:
1824 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1825 if (!radeon_dig_connector)
1826 goto failed;
1827 radeon_dig_connector->igp_lane_info = igp_lane_info;
1828 radeon_connector->con_priv = radeon_dig_connector;
1829 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
1830 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
1831 if (i2c_bus->valid) {
1832 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1833 if (!radeon_connector->ddc_bus)
1834 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1835 }
1836 drm_connector_attach_property(&radeon_connector->base,
1837 dev->mode_config.scaling_mode_property,
1838 DRM_MODE_SCALE_FULLSCREEN);
1839 subpixel_order = SubPixelHorizontalRGB;
1840 connector->interlace_allowed = false;
1841 connector->doublescan_allowed = false;
1842 break;
771fe6b9 1843 }
771fe6b9
JG
1844 }
1845
2581afcc 1846 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
1847 if (i2c_bus->valid)
1848 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1849 } else
1850 connector->polled = DRM_CONNECTOR_POLL_HPD;
1851
771fe6b9
JG
1852 connector->display_info.subpixel_order = subpixel_order;
1853 drm_sysfs_connector_add(connector);
1854 return;
1855
1856failed:
771fe6b9
JG
1857 drm_connector_cleanup(connector);
1858 kfree(connector);
1859}
1860
1861void
1862radeon_add_legacy_connector(struct drm_device *dev,
1863 uint32_t connector_id,
1864 uint32_t supported_device,
1865 int connector_type,
b75fad06 1866 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD
1867 uint16_t connector_object_id,
1868 struct radeon_hpd *hpd)
771fe6b9 1869{
445282db 1870 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
1871 struct drm_connector *connector;
1872 struct radeon_connector *radeon_connector;
1873 uint32_t subpixel_order = SubPixelNone;
1874
4ce001ab 1875 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
1876 return;
1877
cf4c12f9
AD
1878 /* if the user selected tv=0 don't try and add the connector */
1879 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1880 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1881 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1882 (radeon_tv == 0))
1883 return;
1884
771fe6b9
JG
1885 /* see if we already added it */
1886 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1887 radeon_connector = to_radeon_connector(connector);
1888 if (radeon_connector->connector_id == connector_id) {
1889 radeon_connector->devices |= supported_device;
1890 return;
1891 }
1892 }
1893
1894 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1895 if (!radeon_connector)
1896 return;
1897
1898 connector = &radeon_connector->base;
1899
1900 radeon_connector->connector_id = connector_id;
1901 radeon_connector->devices = supported_device;
b75fad06 1902 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1903 radeon_connector->hpd = *hpd;
bc1c4dc3 1904
771fe6b9
JG
1905 switch (connector_type) {
1906 case DRM_MODE_CONNECTOR_VGA:
1907 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 1908 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 1909 if (i2c_bus->valid) {
f376b94f 1910 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1911 if (!radeon_connector->ddc_bus)
a70882aa 1912 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1913 }
35e4b7af 1914 radeon_connector->dac_load_detect = true;
445282db
DA
1915 drm_connector_attach_property(&radeon_connector->base,
1916 rdev->mode_info.load_detect_property,
1917 1);
2581afcc
AD
1918 /* no HPD on analog connectors */
1919 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 1920 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD
1921 connector->interlace_allowed = true;
1922 connector->doublescan_allowed = true;
771fe6b9
JG
1923 break;
1924 case DRM_MODE_CONNECTOR_DVIA:
1925 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 1926 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 1927 if (i2c_bus->valid) {
f376b94f 1928 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1929 if (!radeon_connector->ddc_bus)
a70882aa 1930 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1931 }
35e4b7af 1932 radeon_connector->dac_load_detect = true;
445282db
DA
1933 drm_connector_attach_property(&radeon_connector->base,
1934 rdev->mode_info.load_detect_property,
1935 1);
2581afcc
AD
1936 /* no HPD on analog connectors */
1937 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
1938 connector->interlace_allowed = true;
1939 connector->doublescan_allowed = true;
771fe6b9
JG
1940 break;
1941 case DRM_MODE_CONNECTOR_DVII:
1942 case DRM_MODE_CONNECTOR_DVID:
1943 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 1944 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 1945 if (i2c_bus->valid) {
f376b94f 1946 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1947 if (!radeon_connector->ddc_bus)
a70882aa 1948 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD
1949 }
1950 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 1951 radeon_connector->dac_load_detect = true;
445282db
DA
1952 drm_connector_attach_property(&radeon_connector->base,
1953 rdev->mode_info.load_detect_property,
1954 1);
771fe6b9
JG
1955 }
1956 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
1957 connector->interlace_allowed = true;
1958 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1959 connector->doublescan_allowed = true;
1960 else
1961 connector->doublescan_allowed = false;
771fe6b9
JG
1962 break;
1963 case DRM_MODE_CONNECTOR_SVIDEO:
1964 case DRM_MODE_CONNECTOR_Composite:
1965 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD
1966 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1967 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1968 radeon_connector->dac_load_detect = true;
1969 /* RS400,RC410,RS480 chipset seems to report a lot
1970 * of false positive on load detect, we haven't yet
1971 * found a way to make load detect reliable on those
1972 * chipset, thus just disable it for TV.
1973 */
1974 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
1975 radeon_connector->dac_load_detect = false;
1976 drm_connector_attach_property(&radeon_connector->base,
1977 rdev->mode_info.load_detect_property,
1978 radeon_connector->dac_load_detect);
1979 drm_connector_attach_property(&radeon_connector->base,
1980 rdev->mode_info.tv_std_property,
1981 radeon_combios_get_tv_info(rdev));
1982 /* no HPD on analog connectors */
1983 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
1984 connector->interlace_allowed = false;
1985 connector->doublescan_allowed = false;
771fe6b9
JG
1986 break;
1987 case DRM_MODE_CONNECTOR_LVDS:
1988 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 1989 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 1990 if (i2c_bus->valid) {
f376b94f 1991 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1992 if (!radeon_connector->ddc_bus)
a70882aa 1993 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1994 }
445282db
DA
1995 drm_connector_attach_property(&radeon_connector->base,
1996 dev->mode_config.scaling_mode_property,
1997 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 1998 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
1999 connector->interlace_allowed = false;
2000 connector->doublescan_allowed = false;
771fe6b9
JG
2001 break;
2002 }
2003
2581afcc 2004 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
2005 if (i2c_bus->valid)
2006 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2007 } else
2008 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9
JG
2009 connector->display_info.subpixel_order = subpixel_order;
2010 drm_sysfs_connector_add(connector);
63ec0119
MD
2011 if (connector_type == DRM_MODE_CONNECTOR_LVDS) {
2012 struct drm_encoder *drm_encoder;
2013
2014 list_for_each_entry(drm_encoder, &dev->mode_config.encoder_list, head) {
2015 struct radeon_encoder *radeon_encoder;
2016
2017 radeon_encoder = to_radeon_encoder(drm_encoder);
2018 if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_LVDS)
2019 radeon_legacy_backlight_init(radeon_encoder, connector);
2020 }
2021 }
771fe6b9 2022}