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Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarn...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
JG		 1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
26#include "drmP.h"
27#include "drm_edid.h"
28#include "drm_crtc_helper.h"
d50ba256 29#include "drm_fb_helper.h"
771fe6b9
JG		 30#include "radeon_drm.h"
31#include "radeon.h"
923f6848 32#include "atom.h"
771fe6b9
JG		 33
34extern void
35radeon_combios_connected_scratch_regs(struct drm_connector *connector,
36 struct drm_encoder *encoder,
37 bool connected);
38extern void
39radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
40 struct drm_encoder *encoder,
41 bool connected);
42
63ec0119
MD		 43extern void
44radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder,
45 struct drm_connector *drm_connector);
46
d4877cf2
AD		 47void radeon_connector_hotplug(struct drm_connector *connector)
48{
49 struct drm_device *dev = connector->dev;
50 struct radeon_device *rdev = dev->dev_private;
51 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
52
cbac9543
AD		 53 /* bail if the connector does not have hpd pin, e.g.,
54 * VGA, TV, etc.
55 */
56 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
57 return;
58
1e85e1d0 59 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 60
73104b5c
AD		 61 /* if the connector is already off, don't turn it back on */
62 if (connector->dpms != DRM_MODE_DPMS_ON)
63 return;
64
d5811e87
AD		 65 /* just deal with DP (not eDP) here. */
66 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
67 int saved_dpms = connector->dpms;
7c3ed0fd 68
5ba7ddf8
AD		 69 /* Only turn off the display it it's physically disconnected */
70 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
1e85e1d0 71 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
5ba7ddf8
AD		 72 else if (radeon_dp_needs_link_train(radeon_connector))
73 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
d5811e87 74 connector->dpms = saved_dpms;
d4877cf2 75 }
d4877cf2
AD		 76}
77
445282db
DA		 78static void radeon_property_change_mode(struct drm_encoder *encoder)
79{
80 struct drm_crtc *crtc = encoder->crtc;
81
82 if (crtc && crtc->enabled) {
83 drm_crtc_helper_set_mode(crtc, &crtc->mode,
84 crtc->x, crtc->y, crtc->fb);
85 }
86}
771fe6b9
JG		 87static void
88radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
89{
90 struct drm_device *dev = connector->dev;
91 struct radeon_device *rdev = dev->dev_private;
92 struct drm_encoder *best_encoder = NULL;
93 struct drm_encoder *encoder = NULL;
94 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
95 struct drm_mode_object *obj;
96 bool connected;
97 int i;
98
99 best_encoder = connector_funcs->best_encoder(connector);
100
101 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
102 if (connector->encoder_ids[i] == 0)
103 break;
104
105 obj = drm_mode_object_find(connector->dev,
106 connector->encoder_ids[i],
107 DRM_MODE_OBJECT_ENCODER);
108 if (!obj)
109 continue;
110
111 encoder = obj_to_encoder(obj);
112
113 if ((encoder == best_encoder) && (status == connector_status_connected))
114 connected = true;
115 else
116 connected = false;
117
118 if (rdev->is_atom_bios)
119 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
120 else
121 radeon_combios_connected_scratch_regs(connector, encoder, connected);
122
123 }
124}
125
445282db
DA		 126struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
127{
128 struct drm_mode_object *obj;
129 struct drm_encoder *encoder;
130 int i;
131
132 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
133 if (connector->encoder_ids[i] == 0)
134 break;
135
136 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
137 if (!obj)
138 continue;
139
140 encoder = obj_to_encoder(obj);
141 if (encoder->encoder_type == encoder_type)
142 return encoder;
143 }
144 return NULL;
145}
146
771fe6b9
JG		 147struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
148{
149 int enc_id = connector->encoder_ids[0];
150 struct drm_mode_object *obj;
151 struct drm_encoder *encoder;
152
153 /* pick the encoder ids */
154 if (enc_id) {
155 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
156 if (!obj)
157 return NULL;
158 encoder = obj_to_encoder(obj);
159 return encoder;
160 }
161 return NULL;
162}
163
4ce001ab
DA		 164/*
165 * radeon_connector_analog_encoder_conflict_solve
166 * - search for other connectors sharing this encoder
167 * if priority is true, then set them disconnected if this is connected
168 * if priority is false, set us disconnected if they are connected
169 */
170static enum drm_connector_status
171radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
172 struct drm_encoder *encoder,
173 enum drm_connector_status current_status,
174 bool priority)
175{
176 struct drm_device *dev = connector->dev;
177 struct drm_connector *conflict;
08d07511 178 struct radeon_connector *radeon_conflict;
4ce001ab
DA		 179 int i;
180
181 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
182 if (conflict == connector)
183 continue;
184
08d07511 185 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA		 186 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
187 if (conflict->encoder_ids[i] == 0)
188 break;
189
190 /* if the IDs match */
191 if (conflict->encoder_ids[i] == encoder->base.id) {
192 if (conflict->status != connector_status_connected)
193 continue;
08d07511
AD		 194
195 if (radeon_conflict->use_digital)
196 continue;
4ce001ab
DA		 197
198 if (priority == true) {
c5d46b4e
AD		 199 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict));
200 DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector));
4ce001ab
DA		 201 conflict->status = connector_status_disconnected;
202 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
203 } else {
c5d46b4e
AD		 204 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector));
205 DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict));
4ce001ab
DA		 206 current_status = connector_status_disconnected;
207 }
208 break;
209 }
210 }
211 }
212 return current_status;
213
214}
215
771fe6b9
JG		 216static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
217{
218 struct drm_device *dev = encoder->dev;
219 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
220 struct drm_display_mode *mode = NULL;
de2103e4 221 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 222
de2103e4
AD		 223 if (native_mode->hdisplay != 0 &&
224 native_mode->vdisplay != 0 &&
225 native_mode->clock != 0) {
fb06ca8f 226 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG		 227 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
228 drm_mode_set_name(mode);
229
d9fdaafb 230 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD		 231 } else if (native_mode->hdisplay != 0 &&
232 native_mode->vdisplay != 0) {
233 /* mac laptops without an edid */
234 /* Note that this is not necessarily the exact panel mode,
235 * but an approximation based on the cvt formula. For these
236 * systems we should ideally read the mode info out of the
237 * registers or add a mode table, but this works and is much
238 * simpler.
239 */
240 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
241 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 242 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG		 243 }
244 return mode;
245}
246
923f6848
AD		 247static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
248{
249 struct drm_device *dev = encoder->dev;
250 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
251 struct drm_display_mode *mode = NULL;
de2103e4 252 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD		 253 int i;
254 struct mode_size {
255 int w;
256 int h;
257 } common_modes[17] = {
258 { 640, 480},
259 { 720, 480},
260 { 800, 600},
261 { 848, 480},
262 {1024, 768},
263 {1152, 768},
264 {1280, 720},
265 {1280, 800},
266 {1280, 854},
267 {1280, 960},
268 {1280, 1024},
269 {1440, 900},
270 {1400, 1050},
271 {1680, 1050},
272 {1600, 1200},
273 {1920, 1080},
274 {1920, 1200}
275 };
276
277 for (i = 0; i < 17; i++) {
dfdd6467
AD		 278 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
279 if (common_modes[i].w > 1024 ||
280 common_modes[i].h > 768)
281 continue;
282 }
923f6848 283 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD		 284 if (common_modes[i].w > native_mode->hdisplay ||
285 common_modes[i].h > native_mode->vdisplay ||
286 (common_modes[i].w == native_mode->hdisplay &&
287 common_modes[i].h == native_mode->vdisplay))
923f6848
AD		 288 continue;
289 }
290 if (common_modes[i].w < 320 || common_modes[i].h < 200)
291 continue;
292
d50ba256 293 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD		 294 drm_mode_probed_add(connector, mode);
295 }
296}
297
771fe6b9
JG		 298int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
299 uint64_t val)
300{
445282db
DA		 301 struct drm_device *dev = connector->dev;
302 struct radeon_device *rdev = dev->dev_private;
303 struct drm_encoder *encoder;
304 struct radeon_encoder *radeon_encoder;
305
306 if (property == rdev->mode_info.coherent_mode_property) {
307 struct radeon_encoder_atom_dig *dig;
ce227c41 308 bool new_coherent_mode;
445282db
DA		 309
310 /* need to find digital encoder on connector */
311 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
312 if (!encoder)
313 return 0;
314
315 radeon_encoder = to_radeon_encoder(encoder);
316
317 if (!radeon_encoder->enc_priv)
318 return 0;
319
320 dig = radeon_encoder->enc_priv;
ce227c41
DA		 321 new_coherent_mode = val ? true : false;
322 if (dig->coherent_mode != new_coherent_mode) {
323 dig->coherent_mode = new_coherent_mode;
324 radeon_property_change_mode(&radeon_encoder->base);
325 }
445282db
DA		 326 }
327
5b1714d3
AD		 328 if (property == rdev->mode_info.underscan_property) {
329 /* need to find digital encoder on connector */
330 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
331 if (!encoder)
332 return 0;
333
334 radeon_encoder = to_radeon_encoder(encoder);
335
336 if (radeon_encoder->underscan_type != val) {
337 radeon_encoder->underscan_type = val;
338 radeon_property_change_mode(&radeon_encoder->base);
339 }
340 }
341
5bccf5e3
MG		 342 if (property == rdev->mode_info.underscan_hborder_property) {
343 /* need to find digital encoder on connector */
344 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
345 if (!encoder)
346 return 0;
347
348 radeon_encoder = to_radeon_encoder(encoder);
349
350 if (radeon_encoder->underscan_hborder != val) {
351 radeon_encoder->underscan_hborder = val;
352 radeon_property_change_mode(&radeon_encoder->base);
353 }
354 }
355
356 if (property == rdev->mode_info.underscan_vborder_property) {
357 /* need to find digital encoder on connector */
358 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
359 if (!encoder)
360 return 0;
361
362 radeon_encoder = to_radeon_encoder(encoder);
363
364 if (radeon_encoder->underscan_vborder != val) {
365 radeon_encoder->underscan_vborder = val;
366 radeon_property_change_mode(&radeon_encoder->base);
367 }
368 }
369
445282db
DA		 370 if (property == rdev->mode_info.tv_std_property) {
371 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
372 if (!encoder) {
373 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
374 }
375
376 if (!encoder)
377 return 0;
378
379 radeon_encoder = to_radeon_encoder(encoder);
380 if (!radeon_encoder->enc_priv)
381 return 0;
643acacf 382 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA		 383 struct radeon_encoder_atom_dac *dac_int;
384 dac_int = radeon_encoder->enc_priv;
385 dac_int->tv_std = val;
386 } else {
387 struct radeon_encoder_tv_dac *dac_int;
388 dac_int = radeon_encoder->enc_priv;
389 dac_int->tv_std = val;
390 }
391 radeon_property_change_mode(&radeon_encoder->base);
392 }
393
394 if (property == rdev->mode_info.load_detect_property) {
395 struct radeon_connector *radeon_connector =
396 to_radeon_connector(connector);
397
398 if (val == 0)
399 radeon_connector->dac_load_detect = false;
400 else
401 radeon_connector->dac_load_detect = true;
402 }
403
404 if (property == rdev->mode_info.tmds_pll_property) {
405 struct radeon_encoder_int_tmds *tmds = NULL;
406 bool ret = false;
407 /* need to find digital encoder on connector */
408 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
409 if (!encoder)
410 return 0;
411
412 radeon_encoder = to_radeon_encoder(encoder);
413
414 tmds = radeon_encoder->enc_priv;
415 if (!tmds)
416 return 0;
417
418 if (val == 0) {
419 if (rdev->is_atom_bios)
420 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
421 else
422 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
423 }
424 if (val == 1 || ret == false) {
425 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
426 }
427 radeon_property_change_mode(&radeon_encoder->base);
428 }
429
771fe6b9
JG		 430 return 0;
431}
432
8dfaa8a7
MD		 433static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
434 struct drm_connector *connector)
435{
436 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 437 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG		 438 struct drm_display_mode *t, *mode;
439
440 /* If the EDID preferred mode doesn't match the native mode, use it */
441 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
442 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
443 if (mode->hdisplay != native_mode->hdisplay ||
444 mode->vdisplay != native_mode->vdisplay)
445 memcpy(native_mode, mode, sizeof(*mode));
446 }
447 }
8dfaa8a7
MD		 448
449 /* Try to get native mode details from EDID if necessary */
de2103e4 450 if (!native_mode->clock) {
8dfaa8a7 451 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD		 452 if (mode->hdisplay == native_mode->hdisplay &&
453 mode->vdisplay == native_mode->vdisplay) {
454 *native_mode = *mode;
455 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 456 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD		 457 break;
458 }
459 }
460 }
13bb9430 461
de2103e4 462 if (!native_mode->clock) {
c5d46b4e 463 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD		 464 radeon_encoder->rmx_type = RMX_OFF;
465 }
466}
771fe6b9
JG		 467
468static int radeon_lvds_get_modes(struct drm_connector *connector)
469{
470 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
471 struct drm_encoder *encoder;
472 int ret = 0;
473 struct drm_display_mode *mode;
474
475 if (radeon_connector->ddc_bus) {
476 ret = radeon_ddc_get_modes(radeon_connector);
477 if (ret > 0) {
7747b713 478 encoder = radeon_best_single_encoder(connector);
8dfaa8a7
MD		 479 if (encoder) {
480 radeon_fixup_lvds_native_mode(encoder, connector);
7747b713
AD		 481 /* add scaled modes */
482 radeon_add_common_modes(encoder, connector);
8dfaa8a7 483 }
771fe6b9
JG		 484 return ret;
485 }
486 }
487
488 encoder = radeon_best_single_encoder(connector);
489 if (!encoder)
490 return 0;
491
492 /* we have no EDID modes */
493 mode = radeon_fp_native_mode(encoder);
494 if (mode) {
495 ret = 1;
496 drm_mode_probed_add(connector, mode);
7a868e18
AD		 497 /* add the width/height from vbios tables if available */
498 connector->display_info.width_mm = mode->width_mm;
499 connector->display_info.height_mm = mode->height_mm;
7747b713
AD		 500 /* add scaled modes */
501 radeon_add_common_modes(encoder, connector);
771fe6b9 502 }
923f6848 503
771fe6b9
JG		 504 return ret;
505}
506
507static int radeon_lvds_mode_valid(struct drm_connector *connector,
508 struct drm_display_mode *mode)
509{
a3fa6320
AD		 510 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
511
512 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
513 return MODE_PANEL;
514
515 if (encoder) {
516 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
517 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
518
519 /* AVIVO hardware supports downscaling modes larger than the panel
520 * to the panel size, but I'm not sure this is desirable.
521 */
522 if ((mode->hdisplay > native_mode->hdisplay) ||
523 (mode->vdisplay > native_mode->vdisplay))
524 return MODE_PANEL;
525
526 /* if scaling is disabled, block non-native modes */
527 if (radeon_encoder->rmx_type == RMX_OFF) {
528 if ((mode->hdisplay != native_mode->hdisplay) ||
529 (mode->vdisplay != native_mode->vdisplay))
530 return MODE_PANEL;
531 }
532 }
533
771fe6b9
JG		 534 return MODE_OK;
535}
536
7b334fcb 537static enum drm_connector_status
930a9e28 538radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 539{
0549a061 540 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 541 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 542 enum drm_connector_status ret = connector_status_disconnected;
2ffb8429
AD		 543
544 if (encoder) {
545 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 546 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD		 547
548 /* check if panel is valid */
de2103e4 549 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429
AD		 550 ret = connector_status_connected;
551
552 }
0549a061
AD		 553
554 /* check for edid as well */
0294cf4f
AD		 555 if (radeon_connector->edid)
556 ret = connector_status_connected;
557 else {
558 if (radeon_connector->ddc_bus) {
0294cf4f
AD		 559 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
560 &radeon_connector->ddc_bus->adapter);
0294cf4f
AD		 561 if (radeon_connector->edid)
562 ret = connector_status_connected;
563 }
0549a061 564 }
771fe6b9 565 /* check acpi lid status ??? */
2ffb8429 566
771fe6b9
JG		 567 radeon_connector_update_scratch_regs(connector, ret);
568 return ret;
569}
570
571static void radeon_connector_destroy(struct drm_connector *connector)
572{
573 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
574
0294cf4f
AD		 575 if (radeon_connector->edid)
576 kfree(radeon_connector->edid);
771fe6b9
JG		 577 kfree(radeon_connector->con_priv);
578 drm_sysfs_connector_remove(connector);
579 drm_connector_cleanup(connector);
580 kfree(connector);
581}
582
445282db
DA		 583static int radeon_lvds_set_property(struct drm_connector *connector,
584 struct drm_property *property,
585 uint64_t value)
586{
587 struct drm_device *dev = connector->dev;
588 struct radeon_encoder *radeon_encoder;
589 enum radeon_rmx_type rmx_type;
590
d9fdaafb 591 DRM_DEBUG_KMS("\n");
445282db
DA		 592 if (property != dev->mode_config.scaling_mode_property)
593 return 0;
594
595 if (connector->encoder)
596 radeon_encoder = to_radeon_encoder(connector->encoder);
597 else {
598 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
599 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
600 }
601
602 switch (value) {
603 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
604 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
605 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
606 default:
607 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
608 }
609 if (radeon_encoder->rmx_type == rmx_type)
610 return 0;
611
612 radeon_encoder->rmx_type = rmx_type;
613
614 radeon_property_change_mode(&radeon_encoder->base);
615 return 0;
616}
617
618
771fe6b9
JG		 619struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
620 .get_modes = radeon_lvds_get_modes,
621 .mode_valid = radeon_lvds_mode_valid,
622 .best_encoder = radeon_best_single_encoder,
623};
624
625struct drm_connector_funcs radeon_lvds_connector_funcs = {
626 .dpms = drm_helper_connector_dpms,
627 .detect = radeon_lvds_detect,
628 .fill_modes = drm_helper_probe_single_connector_modes,
629 .destroy = radeon_connector_destroy,
445282db 630 .set_property = radeon_lvds_set_property,
771fe6b9
JG		 631};
632
633static int radeon_vga_get_modes(struct drm_connector *connector)
634{
635 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
636 int ret;
637
638 ret = radeon_ddc_get_modes(radeon_connector);
639
640 return ret;
641}
642
643static int radeon_vga_mode_valid(struct drm_connector *connector,
644 struct drm_display_mode *mode)
645{
b20f9bef
AD		 646 struct drm_device *dev = connector->dev;
647 struct radeon_device *rdev = dev->dev_private;
648
a3fa6320 649 /* XXX check mode bandwidth */
b20f9bef
AD		 650
651 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
652 return MODE_CLOCK_HIGH;
653
771fe6b9
JG		 654 return MODE_OK;
655}
656
7b334fcb 657static enum drm_connector_status
930a9e28 658radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 659{
fafcf94e
AD		 660 struct drm_device *dev = connector->dev;
661 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 662 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
663 struct drm_encoder *encoder;
664 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 665 bool dret = false;
771fe6b9
JG		 666 enum drm_connector_status ret = connector_status_disconnected;
667
4ce001ab
DA		 668 encoder = radeon_best_single_encoder(connector);
669 if (!encoder)
670 ret = connector_status_disconnected;
671
eb6b6d7c 672 if (radeon_connector->ddc_bus)
bc1c4dc3 673 dret = radeon_ddc_probe(radeon_connector);
0294cf4f 674 if (dret) {
d0d0a225 675 radeon_connector->detected_by_load = false;
0294cf4f
AD		 676 if (radeon_connector->edid) {
677 kfree(radeon_connector->edid);
678 radeon_connector->edid = NULL;
679 }
0294cf4f 680 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
0294cf4f
AD		 681
682 if (!radeon_connector->edid) {
f82f5f3a
JG		 683 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
684 drm_get_connector_name(connector));
685 ret = connector_status_connected;
0294cf4f
AD		 686 } else {
687 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
688
689 /* some oems have boards with separate digital and analog connectors
690 * with a shared ddc line (often vga + hdmi)
691 */
692 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
693 kfree(radeon_connector->edid);
694 radeon_connector->edid = NULL;
695 ret = connector_status_disconnected;
696 } else
697 ret = connector_status_connected;
698 }
699 } else {
c3cceedd
DA		 700
701 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD		 702 if (!force) {
703 /* only return the previous status if we last
704 * detected a monitor via load.
705 */
706 if (radeon_connector->detected_by_load)
707 return connector->status;
708 else
709 return ret;
710 }
c3cceedd 711
d8a7f792 712 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA		 713 encoder_funcs = encoder->helper_private;
714 ret = encoder_funcs->detect(encoder, connector);
34076446 715 if (ret != connector_status_disconnected)
d0d0a225 716 radeon_connector->detected_by_load = true;
445282db 717 }
771fe6b9
JG		 718 }
719
4ce001ab
DA		 720 if (ret == connector_status_connected)
721 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD		 722
723 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
724 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
725 * by other means, assume the CRT is connected and use that EDID.
726 */
727 if ((!rdev->is_atom_bios) &&
728 (ret == connector_status_disconnected) &&
729 rdev->mode_info.bios_hardcoded_edid_size) {
730 ret = connector_status_connected;
731 }
732
771fe6b9
JG		 733 radeon_connector_update_scratch_regs(connector, ret);
734 return ret;
735}
736
737struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
738 .get_modes = radeon_vga_get_modes,
739 .mode_valid = radeon_vga_mode_valid,
740 .best_encoder = radeon_best_single_encoder,
741};
742
743struct drm_connector_funcs radeon_vga_connector_funcs = {
744 .dpms = drm_helper_connector_dpms,
745 .detect = radeon_vga_detect,
746 .fill_modes = drm_helper_probe_single_connector_modes,
747 .destroy = radeon_connector_destroy,
748 .set_property = radeon_connector_set_property,
749};
750
4ce001ab
DA		 751static int radeon_tv_get_modes(struct drm_connector *connector)
752{
753 struct drm_device *dev = connector->dev;
923f6848 754 struct radeon_device *rdev = dev->dev_private;
4ce001ab 755 struct drm_display_mode *tv_mode;
923f6848 756 struct drm_encoder *encoder;
4ce001ab 757
923f6848
AD		 758 encoder = radeon_best_single_encoder(connector);
759 if (!encoder)
760 return 0;
4ce001ab 761
923f6848
AD		 762 /* avivo chips can scale any mode */
763 if (rdev->family >= CHIP_RS600)
764 /* add scaled modes */
765 radeon_add_common_modes(encoder, connector);
766 else {
767 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 768 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD		 769 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
770 drm_mode_probed_add(connector, tv_mode);
771 }
4ce001ab
DA		 772 return 1;
773}
774
775static int radeon_tv_mode_valid(struct drm_connector *connector,
776 struct drm_display_mode *mode)
777{
a3fa6320
AD		 778 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
779 return MODE_CLOCK_RANGE;
4ce001ab
DA		 780 return MODE_OK;
781}
782
7b334fcb 783static enum drm_connector_status
930a9e28 784radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA		 785{
786 struct drm_encoder *encoder;
787 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA		 788 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
789 enum drm_connector_status ret = connector_status_disconnected;
790
791 if (!radeon_connector->dac_load_detect)
792 return ret;
4ce001ab
DA		 793
794 encoder = radeon_best_single_encoder(connector);
795 if (!encoder)
796 ret = connector_status_disconnected;
797 else {
798 encoder_funcs = encoder->helper_private;
799 ret = encoder_funcs->detect(encoder, connector);
800 }
801 if (ret == connector_status_connected)
802 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
803 radeon_connector_update_scratch_regs(connector, ret);
804 return ret;
805}
806
807struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
808 .get_modes = radeon_tv_get_modes,
809 .mode_valid = radeon_tv_mode_valid,
810 .best_encoder = radeon_best_single_encoder,
811};
812
813struct drm_connector_funcs radeon_tv_connector_funcs = {
814 .dpms = drm_helper_connector_dpms,
815 .detect = radeon_tv_detect,
816 .fill_modes = drm_helper_probe_single_connector_modes,
817 .destroy = radeon_connector_destroy,
818 .set_property = radeon_connector_set_property,
819};
820
771fe6b9
JG		 821static int radeon_dvi_get_modes(struct drm_connector *connector)
822{
823 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
824 int ret;
825
826 ret = radeon_ddc_get_modes(radeon_connector);
771fe6b9
JG		 827 return ret;
828}
829
4ce001ab
DA		 830/*
831 * DVI is complicated
832 * Do a DDC probe, if DDC probe passes, get the full EDID so
833 * we can do analog/digital monitor detection at this point.
834 * If the monitor is an analog monitor or we got no DDC,
835 * we need to find the DAC encoder object for this connector.
836 * If we got no DDC, we do load detection on the DAC encoder object.
837 * If we got analog DDC or load detection passes on the DAC encoder
838 * we have to check if this analog encoder is shared with anyone else (TV)
839 * if its shared we have to set the other connector to disconnected.
840 */
7b334fcb 841static enum drm_connector_status
930a9e28 842radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 843{
fafcf94e
AD		 844 struct drm_device *dev = connector->dev;
845 struct radeon_device *rdev = dev->dev_private;
771fe6b9 846 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 847 struct drm_encoder *encoder = NULL;
771fe6b9
JG		 848 struct drm_encoder_helper_funcs *encoder_funcs;
849 struct drm_mode_object *obj;
850 int i;
851 enum drm_connector_status ret = connector_status_disconnected;
4b9d2a21 852 bool dret = false;
771fe6b9 853
eb6b6d7c 854 if (radeon_connector->ddc_bus)
bc1c4dc3 855 dret = radeon_ddc_probe(radeon_connector);
4ce001ab 856 if (dret) {
d0d0a225 857 radeon_connector->detected_by_load = false;
0294cf4f
AD		 858 if (radeon_connector->edid) {
859 kfree(radeon_connector->edid);
860 radeon_connector->edid = NULL;
861 }
4ce001ab 862 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
4ce001ab
DA		 863
864 if (!radeon_connector->edid) {
f82f5f3a
JG		 865 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
866 drm_get_connector_name(connector));
4a9a8b71
DA		 867 /* rs690 seems to have a problem with connectors not existing and always
868 * return a block of 0's. If we see this just stop polling on this output */
869 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) {
870 ret = connector_status_disconnected;
871 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector));
872 radeon_connector->ddc_bus = NULL;
873 }
4ce001ab
DA		 874 } else {
875 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
876
0294cf4f
AD		 877 /* some oems have boards with separate digital and analog connectors
878 * with a shared ddc line (often vga + hdmi)
879 */
880 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
881 kfree(radeon_connector->edid);
882 radeon_connector->edid = NULL;
883 ret = connector_status_disconnected;
884 } else
885 ret = connector_status_connected;
71407c46 886
42f14c4b
AD		 887 /* This gets complicated. We have boards with VGA + HDMI with a
888 * shared DDC line and we have boards with DVI-D + HDMI with a shared
889 * DDC line. The latter is more complex because with DVI<->HDMI adapters
890 * you don't really know what's connected to which port as both are digital.
71407c46 891 */
d3932d6c 892 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD		 893 struct drm_connector *list_connector;
894 struct radeon_connector *list_radeon_connector;
895 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
896 if (connector == list_connector)
897 continue;
898 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD		 899 if (list_radeon_connector->shared_ddc &&
900 (list_radeon_connector->ddc_bus->rec.i2c_id ==
901 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD		 902 /* cases where both connectors are digital */
903 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
904 /* hpd is our only option in this case */
905 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
71407c46
AD		 906 kfree(radeon_connector->edid);
907 radeon_connector->edid = NULL;
908 ret = connector_status_disconnected;
909 }
910 }
911 }
912 }
913 }
4ce001ab
DA		 914 }
915 }
916
917 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
918 goto out;
919
5f0a2612
AD		 920 /* DVI-D and HDMI-A are digital only */
921 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
922 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
923 goto out;
924
d0d0a225 925 /* if we aren't forcing don't do destructive polling */
c3cceedd 926 if (!force) {
d0d0a225
AD		 927 /* only return the previous status if we last
928 * detected a monitor via load.
929 */
930 if (radeon_connector->detected_by_load)
931 ret = connector->status;
c3cceedd
DA		 932 goto out;
933 }
934
4ce001ab 935 /* find analog encoder */
445282db
DA		 936 if (radeon_connector->dac_load_detect) {
937 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
938 if (connector->encoder_ids[i] == 0)
939 break;
771fe6b9 940
445282db
DA		 941 obj = drm_mode_object_find(connector->dev,
942 connector->encoder_ids[i],
943 DRM_MODE_OBJECT_ENCODER);
944 if (!obj)
945 continue;
771fe6b9 946
445282db 947 encoder = obj_to_encoder(obj);
771fe6b9 948
445282db
DA		 949 encoder_funcs = encoder->helper_private;
950 if (encoder_funcs->detect) {
951 if (ret != connector_status_connected) {
952 ret = encoder_funcs->detect(encoder, connector);
953 if (ret == connector_status_connected) {
954 radeon_connector->use_digital = false;
955 }
34076446
JG		 956 if (ret != connector_status_disconnected)
957 radeon_connector->detected_by_load = true;
771fe6b9 958 }
445282db 959 break;
771fe6b9
JG		 960 }
961 }
962 }
963
4ce001ab
DA		 964 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
965 encoder) {
966 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
967 }
968
fafcf94e
AD		 969 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
970 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
971 * by other means, assume the DFP is connected and use that EDID. In most
972 * cases the DVI port is actually a virtual KVM port connected to the service
973 * processor.
974 */
975 if ((!rdev->is_atom_bios) &&
976 (ret == connector_status_disconnected) &&
977 rdev->mode_info.bios_hardcoded_edid_size) {
978 radeon_connector->use_digital = true;
979 ret = connector_status_connected;
980 }
981
4ce001ab 982out:
771fe6b9
JG		 983 /* updated in get modes as well since we need to know if it's analog or digital */
984 radeon_connector_update_scratch_regs(connector, ret);
985 return ret;
986}
987
988/* okay need to be smart in here about which encoder to pick */
989struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
990{
991 int enc_id = connector->encoder_ids[0];
992 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
993 struct drm_mode_object *obj;
994 struct drm_encoder *encoder;
995 int i;
996 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
997 if (connector->encoder_ids[i] == 0)
998 break;
999
1000 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1001 if (!obj)
1002 continue;
1003
1004 encoder = obj_to_encoder(obj);
1005
4ce001ab 1006 if (radeon_connector->use_digital == true) {
771fe6b9
JG		 1007 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1008 return encoder;
1009 } else {
1010 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1011 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1012 return encoder;
1013 }
1014 }
1015
1016 /* see if we have a default encoder TODO */
1017
1018 /* then check use digitial */
1019 /* pick the first one */
1020 if (enc_id) {
1021 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
1022 if (!obj)
1023 return NULL;
1024 encoder = obj_to_encoder(obj);
1025 return encoder;
1026 }
1027 return NULL;
1028}
1029
d50ba256
DA		 1030static void radeon_dvi_force(struct drm_connector *connector)
1031{
1032 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1033 if (connector->force == DRM_FORCE_ON)
1034 radeon_connector->use_digital = false;
1035 if (connector->force == DRM_FORCE_ON_DIGITAL)
1036 radeon_connector->use_digital = true;
1037}
1038
a3fa6320
AD		 1039static int radeon_dvi_mode_valid(struct drm_connector *connector,
1040 struct drm_display_mode *mode)
1041{
1b24203e
AD		 1042 struct drm_device *dev = connector->dev;
1043 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD		 1044 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1045
1046 /* XXX check mode bandwidth */
1047
1b24203e
AD		 1048 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1049 if (radeon_connector->use_digital &&
1050 (rdev->family == CHIP_RV100) &&
1051 (mode->clock > 135000))
1052 return MODE_CLOCK_HIGH;
1053
a3fa6320
AD		 1054 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1055 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1056 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1057 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1058 return MODE_OK;
e1e84017
AD		 1059 else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
1060 if (ASIC_IS_DCE3(rdev)) {
1061 /* HDMI 1.3+ supports max clock of 340 Mhz */
1062 if (mode->clock > 340000)
1063 return MODE_CLOCK_HIGH;
1064 else
1065 return MODE_OK;
1066 } else
1067 return MODE_CLOCK_HIGH;
1068 } else
a3fa6320
AD		 1069 return MODE_CLOCK_HIGH;
1070 }
b20f9bef
AD		 1071
1072 /* check against the max pixel clock */
1073 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1074 return MODE_CLOCK_HIGH;
1075
a3fa6320
AD		 1076 return MODE_OK;
1077}
1078
771fe6b9
JG		 1079struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
1080 .get_modes = radeon_dvi_get_modes,
a3fa6320 1081 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG		 1082 .best_encoder = radeon_dvi_encoder,
1083};
1084
1085struct drm_connector_funcs radeon_dvi_connector_funcs = {
1086 .dpms = drm_helper_connector_dpms,
1087 .detect = radeon_dvi_detect,
1088 .fill_modes = drm_helper_probe_single_connector_modes,
1089 .set_property = radeon_connector_set_property,
1090 .destroy = radeon_connector_destroy,
d50ba256 1091 .force = radeon_dvi_force,
771fe6b9
JG		 1092};
1093
ffd09c64
AD		 1094static void radeon_dp_connector_destroy(struct drm_connector *connector)
1095{
1096 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1097 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1098
ffd09c64
AD		 1099 if (radeon_connector->edid)
1100 kfree(radeon_connector->edid);
1101 if (radeon_dig_connector->dp_i2c_bus)
ac1aade6 1102 radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus);
ffd09c64
AD		 1103 kfree(radeon_connector->con_priv);
1104 drm_sysfs_connector_remove(connector);
1105 drm_connector_cleanup(connector);
1106 kfree(connector);
1107}
1108
746c1aa4
DA		 1109static int radeon_dp_get_modes(struct drm_connector *connector)
1110{
1111 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1112 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1113 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA		 1114 int ret;
1115
f89931f3
AD		 1116 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1117 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1118 struct drm_display_mode *mode;
1119
8b834852
AD		 1120 if (!radeon_dig_connector->edp_on)
1121 atombios_set_edp_panel_power(connector,
1122 ATOM_TRANSMITTER_ACTION_POWER_ON);
d291767b 1123 ret = radeon_ddc_get_modes(radeon_connector);
8b834852
AD		 1124 if (!radeon_dig_connector->edp_on)
1125 atombios_set_edp_panel_power(connector,
1126 ATOM_TRANSMITTER_ACTION_POWER_OFF);
d291767b
AD		 1127
1128 if (ret > 0) {
d291767b
AD		 1129 if (encoder) {
1130 radeon_fixup_lvds_native_mode(encoder, connector);
1131 /* add scaled modes */
1132 radeon_add_common_modes(encoder, connector);
1133 }
1134 return ret;
1135 }
1136
1137 encoder = radeon_best_single_encoder(connector);
1138 if (!encoder)
1139 return 0;
1140
1141 /* we have no EDID modes */
1142 mode = radeon_fp_native_mode(encoder);
1143 if (mode) {
1144 ret = 1;
1145 drm_mode_probed_add(connector, mode);
1146 /* add the width/height from vbios tables if available */
1147 connector->display_info.width_mm = mode->width_mm;
1148 connector->display_info.height_mm = mode->height_mm;
1149 /* add scaled modes */
1150 radeon_add_common_modes(encoder, connector);
1151 }
591a10e1
AD		 1152 } else {
1153 /* need to setup ddc on the bridge */
1d33e1fc
AD		 1154 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1155 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD		 1156 if (encoder)
1157 radeon_atom_ext_encoder_setup_ddc(encoder);
1158 }
d291767b 1159 ret = radeon_ddc_get_modes(radeon_connector);
591a10e1 1160 }
8b834852 1161
746c1aa4
DA		 1162 return ret;
1163}
1164
1d33e1fc 1165u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3
AD		 1166{
1167 struct drm_mode_object *obj;
1168 struct drm_encoder *encoder;
1169 struct radeon_encoder *radeon_encoder;
1170 int i;
d7fa8bb3
AD		 1171
1172 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1173 if (connector->encoder_ids[i] == 0)
1174 break;
1175
1176 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1177 if (!obj)
1178 continue;
1179
1180 encoder = obj_to_encoder(obj);
1181 radeon_encoder = to_radeon_encoder(encoder);
1182
1183 switch (radeon_encoder->encoder_id) {
1184 case ENCODER_OBJECT_ID_TRAVIS:
1185 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1186 return radeon_encoder->encoder_id;
d7fa8bb3
AD		 1187 default:
1188 break;
1189 }
1190 }
1191
1d33e1fc 1192 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD		 1193}
1194
1195bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1196{
1197 struct drm_mode_object *obj;
1198 struct drm_encoder *encoder;
1199 struct radeon_encoder *radeon_encoder;
1200 int i;
1201 bool found = false;
1202
1203 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1204 if (connector->encoder_ids[i] == 0)
1205 break;
1206
1207 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1208 if (!obj)
1209 continue;
1210
1211 encoder = obj_to_encoder(obj);
1212 radeon_encoder = to_radeon_encoder(encoder);
1213 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1214 found = true;
1215 }
1216
1217 return found;
1218}
1219
1220bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1221{
1222 struct drm_device *dev = connector->dev;
1223 struct radeon_device *rdev = dev->dev_private;
1224
1225 if (ASIC_IS_DCE5(rdev) &&
1226 (rdev->clock.dp_extclk >= 53900) &&
1227 radeon_connector_encoder_is_hbr2(connector)) {
1228 return true;
1229 }
1230
1231 return false;
1232}
1233
7b334fcb 1234static enum drm_connector_status
930a9e28 1235radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1236{
f8d0edde
AD		 1237 struct drm_device *dev = connector->dev;
1238 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1239 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1240 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1241 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1242 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA		 1243
1244 if (radeon_connector->edid) {
1245 kfree(radeon_connector->edid);
1246 radeon_connector->edid = NULL;
1247 }
1248
f89931f3
AD		 1249 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1250 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1251 if (encoder) {
1252 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1253 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1254
1255 /* check if panel is valid */
1256 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1257 ret = connector_status_connected;
1258 }
6f50eae7
AD		 1259 /* eDP is always DP */
1260 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD		 1261 if (!radeon_dig_connector->edp_on)
1262 atombios_set_edp_panel_power(connector,
1263 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1264 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1265 ret = connector_status_connected;
8b834852
AD		 1266 if (!radeon_dig_connector->edp_on)
1267 atombios_set_edp_panel_power(connector,
1268 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD		 1269 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1270 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD		 1271 /* DP bridges are always DP */
1272 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1273 /* get the DPCD from the bridge */
1274 radeon_dp_getdpcd(radeon_connector);
1275
6777a4f6
AD		 1276 if (encoder) {
1277 /* setup ddc on the bridge */
1278 radeon_atom_ext_encoder_setup_ddc(encoder);
bc1c4dc3 1279 if (radeon_ddc_probe(radeon_connector)) /* try DDC */
b06947b5 1280 ret = connector_status_connected;
6777a4f6
AD		 1281 else if (radeon_connector->dac_load_detect) { /* try load detection */
1282 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD		 1283 ret = encoder_funcs->detect(encoder, connector);
1284 }
591a10e1 1285 }
b06947b5 1286 } else {
6f50eae7 1287 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD		 1288 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1289 ret = connector_status_connected;
1290 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1291 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1292 } else {
f8d0edde
AD		 1293 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1294 if (radeon_dp_getdpcd(radeon_connector))
1295 ret = connector_status_connected;
1296 } else {
bc1c4dc3 1297 if (radeon_ddc_probe(radeon_connector))
f8d0edde
AD		 1298 ret = connector_status_connected;
1299 }
4143e919 1300 }
746c1aa4 1301 }
4143e919 1302
30f44372 1303 radeon_connector_update_scratch_regs(connector, ret);
746c1aa4
DA		 1304 return ret;
1305}
1306
5801ead6
AD		 1307static int radeon_dp_mode_valid(struct drm_connector *connector,
1308 struct drm_display_mode *mode)
1309{
1310 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1311 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1312
1313 /* XXX check mode bandwidth */
1314
f89931f3
AD		 1315 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1316 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1317 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1318
1319 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1320 return MODE_PANEL;
1321
1322 if (encoder) {
1323 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1324 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1325
f89931f3 1326 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD		 1327 * to the panel size, but I'm not sure this is desirable.
1328 */
1329 if ((mode->hdisplay > native_mode->hdisplay) ||
1330 (mode->vdisplay > native_mode->vdisplay))
1331 return MODE_PANEL;
1332
1333 /* if scaling is disabled, block non-native modes */
1334 if (radeon_encoder->rmx_type == RMX_OFF) {
1335 if ((mode->hdisplay != native_mode->hdisplay) ||
1336 (mode->vdisplay != native_mode->vdisplay))
1337 return MODE_PANEL;
1338 }
1339 }
5801ead6 1340 return MODE_OK;
d291767b
AD		 1341 } else {
1342 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1343 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
1344 return radeon_dp_mode_valid_helper(connector, mode);
1345 else
1346 return MODE_OK;
1347 }
5801ead6
AD		 1348}
1349
746c1aa4
DA		 1350struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
1351 .get_modes = radeon_dp_get_modes,
5801ead6 1352 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA		 1353 .best_encoder = radeon_dvi_encoder,
1354};
1355
1356struct drm_connector_funcs radeon_dp_connector_funcs = {
1357 .dpms = drm_helper_connector_dpms,
1358 .detect = radeon_dp_detect,
1359 .fill_modes = drm_helper_probe_single_connector_modes,
1360 .set_property = radeon_connector_set_property,
ffd09c64 1361 .destroy = radeon_dp_connector_destroy,
746c1aa4
DA		 1362 .force = radeon_dvi_force,
1363};
1364
771fe6b9
JG		 1365void
1366radeon_add_atom_connector(struct drm_device *dev,
1367 uint32_t connector_id,
1368 uint32_t supported_device,
1369 int connector_type,
1370 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1371 uint32_t igp_lane_info,
eed45b30 1372 uint16_t connector_object_id,
26b5bc98
AD		 1373 struct radeon_hpd *hpd,
1374 struct radeon_router *router)
771fe6b9 1375{
445282db 1376 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1377 struct drm_connector *connector;
1378 struct radeon_connector *radeon_connector;
1379 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD		 1380 struct drm_encoder *encoder;
1381 struct radeon_encoder *radeon_encoder;
771fe6b9 1382 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1383 bool shared_ddc = false;
eac4dff6 1384 bool is_dp_bridge = false;
771fe6b9 1385
4ce001ab 1386 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 1387 return;
1388
cf4c12f9
AD		 1389 /* if the user selected tv=0 don't try and add the connector */
1390 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1391 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1392 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1393 (radeon_tv == 0))
1394 return;
1395
771fe6b9
JG		 1396 /* see if we already added it */
1397 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1398 radeon_connector = to_radeon_connector(connector);
1399 if (radeon_connector->connector_id == connector_id) {
1400 radeon_connector->devices |= supported_device;
1401 return;
1402 }
0294cf4f 1403 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1404 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD		 1405 radeon_connector->shared_ddc = true;
1406 shared_ddc = true;
1407 }
fb939dfc 1408 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD		 1409 (radeon_connector->router.router_id == router->router_id)) {
1410 radeon_connector->shared_ddc = false;
1411 shared_ddc = false;
1412 }
0294cf4f 1413 }
771fe6b9
JG		 1414 }
1415
eac4dff6
AD		 1416 /* check if it's a dp bridge */
1417 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1418 radeon_encoder = to_radeon_encoder(encoder);
1419 if (radeon_encoder->devices & supported_device) {
1420 switch (radeon_encoder->encoder_id) {
1421 case ENCODER_OBJECT_ID_TRAVIS:
1422 case ENCODER_OBJECT_ID_NUTMEG:
1423 is_dp_bridge = true;
1424 break;
1425 default:
1426 break;
1427 }
1428 }
1429 }
1430
771fe6b9
JG		 1431 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1432 if (!radeon_connector)
1433 return;
1434
1435 connector = &radeon_connector->base;
1436
1437 radeon_connector->connector_id = connector_id;
1438 radeon_connector->devices = supported_device;
0294cf4f 1439 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1440 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1441 radeon_connector->hpd = *hpd;
bc1c4dc3 1442
26b5bc98 1443 radeon_connector->router = *router;
fb939dfc 1444 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD		 1445 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1446 if (!radeon_connector->router_bus)
a70882aa 1447 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1448 }
eac4dff6
AD		 1449
1450 if (is_dp_bridge) {
771fe6b9
JG		 1451 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1452 if (!radeon_dig_connector)
1453 goto failed;
771fe6b9
JG		 1454 radeon_dig_connector->igp_lane_info = igp_lane_info;
1455 radeon_connector->con_priv = radeon_dig_connector;
eac4dff6
AD		 1456 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1457 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
771fe6b9 1458 if (i2c_bus->valid) {
eac4dff6
AD		 1459 /* add DP i2c bus */
1460 if (connector_type == DRM_MODE_CONNECTOR_eDP)
1461 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1462 else
1463 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1464 if (!radeon_dig_connector->dp_i2c_bus)
1465 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
f376b94f 1466 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1467 if (!radeon_connector->ddc_bus)
eac4dff6 1468 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1469 }
eac4dff6
AD		 1470 switch (connector_type) {
1471 case DRM_MODE_CONNECTOR_VGA:
1472 case DRM_MODE_CONNECTOR_DVIA:
1473 default:
1474 connector->interlace_allowed = true;
1475 connector->doublescan_allowed = true;
d629a3ce
AD		 1476 radeon_connector->dac_load_detect = true;
1477 drm_connector_attach_property(&radeon_connector->base,
1478 rdev->mode_info.load_detect_property,
1479 1);
eac4dff6
AD		 1480 break;
1481 case DRM_MODE_CONNECTOR_DVII:
1482 case DRM_MODE_CONNECTOR_DVID:
1483 case DRM_MODE_CONNECTOR_HDMIA:
1484 case DRM_MODE_CONNECTOR_HDMIB:
1485 case DRM_MODE_CONNECTOR_DisplayPort:
430f70d5
AD		 1486 drm_connector_attach_property(&radeon_connector->base,
1487 rdev->mode_info.underscan_property,
56bec7c0 1488 UNDERSCAN_OFF);
5bccf5e3
MG		 1489 drm_connector_attach_property(&radeon_connector->base,
1490 rdev->mode_info.underscan_hborder_property,
1491 0);
1492 drm_connector_attach_property(&radeon_connector->base,
1493 rdev->mode_info.underscan_vborder_property,
1494 0);
eac4dff6
AD		 1495 subpixel_order = SubPixelHorizontalRGB;
1496 connector->interlace_allowed = true;
1497 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1498 connector->doublescan_allowed = true;
1499 else
1500 connector->doublescan_allowed = false;
d629a3ce
AD		 1501 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1502 radeon_connector->dac_load_detect = true;
1503 drm_connector_attach_property(&radeon_connector->base,
1504 rdev->mode_info.load_detect_property,
1505 1);
1506 }
eac4dff6
AD		 1507 break;
1508 case DRM_MODE_CONNECTOR_LVDS:
1509 case DRM_MODE_CONNECTOR_eDP:
1510 drm_connector_attach_property(&radeon_connector->base,
1511 dev->mode_config.scaling_mode_property,
1512 DRM_MODE_SCALE_FULLSCREEN);
1513 subpixel_order = SubPixelHorizontalRGB;
1514 connector->interlace_allowed = false;
1515 connector->doublescan_allowed = false;
1516 break;
5bccf5e3 1517 }
eac4dff6
AD		 1518 } else {
1519 switch (connector_type) {
1520 case DRM_MODE_CONNECTOR_VGA:
1521 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1522 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1523 if (i2c_bus->valid) {
1524 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1525 if (!radeon_connector->ddc_bus)
1526 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1527 }
390d0bbe
AD		 1528 radeon_connector->dac_load_detect = true;
1529 drm_connector_attach_property(&radeon_connector->base,
1530 rdev->mode_info.load_detect_property,
1531 1);
eac4dff6
AD		 1532 /* no HPD on analog connectors */
1533 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1534 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1535 connector->interlace_allowed = true;
c49948f4 1536 connector->doublescan_allowed = true;
eac4dff6
AD		 1537 break;
1538 case DRM_MODE_CONNECTOR_DVIA:
1539 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1540 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1541 if (i2c_bus->valid) {
1542 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1543 if (!radeon_connector->ddc_bus)
1544 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1545 }
1546 radeon_connector->dac_load_detect = true;
430f70d5 1547 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD		 1548 rdev->mode_info.load_detect_property,
1549 1);
1550 /* no HPD on analog connectors */
1551 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1552 connector->interlace_allowed = true;
1553 connector->doublescan_allowed = true;
1554 break;
1555 case DRM_MODE_CONNECTOR_DVII:
1556 case DRM_MODE_CONNECTOR_DVID:
1557 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1558 if (!radeon_dig_connector)
1559 goto failed;
1560 radeon_dig_connector->igp_lane_info = igp_lane_info;
1561 radeon_connector->con_priv = radeon_dig_connector;
1562 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1563 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1564 if (i2c_bus->valid) {
1565 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1566 if (!radeon_connector->ddc_bus)
1567 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1568 }
1569 subpixel_order = SubPixelHorizontalRGB;
5bccf5e3 1570 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD		 1571 rdev->mode_info.coherent_mode_property,
1572 1);
1573 if (ASIC_IS_AVIVO(rdev)) {
1574 drm_connector_attach_property(&radeon_connector->base,
1575 rdev->mode_info.underscan_property,
1576 UNDERSCAN_OFF);
1577 drm_connector_attach_property(&radeon_connector->base,
1578 rdev->mode_info.underscan_hborder_property,
1579 0);
1580 drm_connector_attach_property(&radeon_connector->base,
1581 rdev->mode_info.underscan_vborder_property,
1582 0);
1583 }
1584 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1585 radeon_connector->dac_load_detect = true;
1586 drm_connector_attach_property(&radeon_connector->base,
1587 rdev->mode_info.load_detect_property,
1588 1);
1589 }
1590 connector->interlace_allowed = true;
1591 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1592 connector->doublescan_allowed = true;
1593 else
1594 connector->doublescan_allowed = false;
1595 break;
1596 case DRM_MODE_CONNECTOR_HDMIA:
1597 case DRM_MODE_CONNECTOR_HDMIB:
1598 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1599 if (!radeon_dig_connector)
1600 goto failed;
1601 radeon_dig_connector->igp_lane_info = igp_lane_info;
1602 radeon_connector->con_priv = radeon_dig_connector;
1603 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1604 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1605 if (i2c_bus->valid) {
1606 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1607 if (!radeon_connector->ddc_bus)
1608 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1609 }
5bccf5e3 1610 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD		 1611 rdev->mode_info.coherent_mode_property,
1612 1);
1613 if (ASIC_IS_AVIVO(rdev)) {
1614 drm_connector_attach_property(&radeon_connector->base,
1615 rdev->mode_info.underscan_property,
1616 UNDERSCAN_OFF);
1617 drm_connector_attach_property(&radeon_connector->base,
1618 rdev->mode_info.underscan_hborder_property,
1619 0);
1620 drm_connector_attach_property(&radeon_connector->base,
1621 rdev->mode_info.underscan_vborder_property,
1622 0);
1623 }
1624 subpixel_order = SubPixelHorizontalRGB;
1625 connector->interlace_allowed = true;
1626 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1627 connector->doublescan_allowed = true;
1628 else
1629 connector->doublescan_allowed = false;
1630 break;
1631 case DRM_MODE_CONNECTOR_DisplayPort:
1632 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1633 if (!radeon_dig_connector)
1634 goto failed;
1635 radeon_dig_connector->igp_lane_info = igp_lane_info;
1636 radeon_connector->con_priv = radeon_dig_connector;
1637 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1638 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1639 if (i2c_bus->valid) {
1640 /* add DP i2c bus */
1641 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1642 if (!radeon_dig_connector->dp_i2c_bus)
1643 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1644 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1645 if (!radeon_connector->ddc_bus)
1646 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1647 }
1648 subpixel_order = SubPixelHorizontalRGB;
1649 drm_connector_attach_property(&radeon_connector->base,
1650 rdev->mode_info.coherent_mode_property,
1651 1);
1652 if (ASIC_IS_AVIVO(rdev)) {
1653 drm_connector_attach_property(&radeon_connector->base,
1654 rdev->mode_info.underscan_property,
1655 UNDERSCAN_OFF);
1656 drm_connector_attach_property(&radeon_connector->base,
1657 rdev->mode_info.underscan_hborder_property,
1658 0);
1659 drm_connector_attach_property(&radeon_connector->base,
1660 rdev->mode_info.underscan_vborder_property,
1661 0);
1662 }
1663 connector->interlace_allowed = true;
1664 /* in theory with a DP to VGA converter... */
c49948f4 1665 connector->doublescan_allowed = false;
eac4dff6
AD		 1666 break;
1667 case DRM_MODE_CONNECTOR_eDP:
1668 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1669 if (!radeon_dig_connector)
1670 goto failed;
1671 radeon_dig_connector->igp_lane_info = igp_lane_info;
1672 radeon_connector->con_priv = radeon_dig_connector;
1673 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1674 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1675 if (i2c_bus->valid) {
1676 /* add DP i2c bus */
1677 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1678 if (!radeon_dig_connector->dp_i2c_bus)
1679 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1680 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1681 if (!radeon_connector->ddc_bus)
1682 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1683 }
430f70d5 1684 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD		 1685 dev->mode_config.scaling_mode_property,
1686 DRM_MODE_SCALE_FULLSCREEN);
1687 subpixel_order = SubPixelHorizontalRGB;
1688 connector->interlace_allowed = false;
1689 connector->doublescan_allowed = false;
1690 break;
1691 case DRM_MODE_CONNECTOR_SVIDEO:
1692 case DRM_MODE_CONNECTOR_Composite:
1693 case DRM_MODE_CONNECTOR_9PinDIN:
1694 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1695 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1696 radeon_connector->dac_load_detect = true;
5bccf5e3 1697 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD		 1698 rdev->mode_info.load_detect_property,
1699 1);
5bccf5e3 1700 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD		 1701 rdev->mode_info.tv_std_property,
1702 radeon_atombios_get_tv_info(rdev));
1703 /* no HPD on analog connectors */
1704 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1705 connector->interlace_allowed = false;
1706 connector->doublescan_allowed = false;
1707 break;
1708 case DRM_MODE_CONNECTOR_LVDS:
1709 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1710 if (!radeon_dig_connector)
1711 goto failed;
1712 radeon_dig_connector->igp_lane_info = igp_lane_info;
1713 radeon_connector->con_priv = radeon_dig_connector;
1714 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
1715 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
1716 if (i2c_bus->valid) {
1717 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1718 if (!radeon_connector->ddc_bus)
1719 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1720 }
1721 drm_connector_attach_property(&radeon_connector->base,
1722 dev->mode_config.scaling_mode_property,
1723 DRM_MODE_SCALE_FULLSCREEN);
1724 subpixel_order = SubPixelHorizontalRGB;
1725 connector->interlace_allowed = false;
1726 connector->doublescan_allowed = false;
1727 break;
771fe6b9 1728 }
771fe6b9
JG		 1729 }
1730
2581afcc 1731 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 1732 if (i2c_bus->valid)
1733 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1734 } else
1735 connector->polled = DRM_CONNECTOR_POLL_HPD;
1736
771fe6b9
JG		 1737 connector->display_info.subpixel_order = subpixel_order;
1738 drm_sysfs_connector_add(connector);
1739 return;
1740
1741failed:
771fe6b9
JG		 1742 drm_connector_cleanup(connector);
1743 kfree(connector);
1744}
1745
1746void
1747radeon_add_legacy_connector(struct drm_device *dev,
1748 uint32_t connector_id,
1749 uint32_t supported_device,
1750 int connector_type,
b75fad06 1751 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD		 1752 uint16_t connector_object_id,
1753 struct radeon_hpd *hpd)
771fe6b9 1754{
445282db 1755 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1756 struct drm_connector *connector;
1757 struct radeon_connector *radeon_connector;
1758 uint32_t subpixel_order = SubPixelNone;
1759
4ce001ab 1760 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 1761 return;
1762
cf4c12f9
AD		 1763 /* if the user selected tv=0 don't try and add the connector */
1764 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1765 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1766 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1767 (radeon_tv == 0))
1768 return;
1769
771fe6b9
JG		 1770 /* see if we already added it */
1771 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1772 radeon_connector = to_radeon_connector(connector);
1773 if (radeon_connector->connector_id == connector_id) {
1774 radeon_connector->devices |= supported_device;
1775 return;
1776 }
1777 }
1778
1779 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1780 if (!radeon_connector)
1781 return;
1782
1783 connector = &radeon_connector->base;
1784
1785 radeon_connector->connector_id = connector_id;
1786 radeon_connector->devices = supported_device;
b75fad06 1787 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1788 radeon_connector->hpd = *hpd;
bc1c4dc3 1789
771fe6b9
JG		 1790 switch (connector_type) {
1791 case DRM_MODE_CONNECTOR_VGA:
1792 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 1793 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 1794 if (i2c_bus->valid) {
f376b94f 1795 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1796 if (!radeon_connector->ddc_bus)
a70882aa 1797 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1798 }
35e4b7af 1799 radeon_connector->dac_load_detect = true;
445282db
DA		 1800 drm_connector_attach_property(&radeon_connector->base,
1801 rdev->mode_info.load_detect_property,
1802 1);
2581afcc
AD		 1803 /* no HPD on analog connectors */
1804 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 1805 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD		 1806 connector->interlace_allowed = true;
1807 connector->doublescan_allowed = true;
771fe6b9
JG		 1808 break;
1809 case DRM_MODE_CONNECTOR_DVIA:
1810 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 1811 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 1812 if (i2c_bus->valid) {
f376b94f 1813 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1814 if (!radeon_connector->ddc_bus)
a70882aa 1815 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1816 }
35e4b7af 1817 radeon_connector->dac_load_detect = true;
445282db
DA		 1818 drm_connector_attach_property(&radeon_connector->base,
1819 rdev->mode_info.load_detect_property,
1820 1);
2581afcc
AD		 1821 /* no HPD on analog connectors */
1822 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 1823 connector->interlace_allowed = true;
1824 connector->doublescan_allowed = true;
771fe6b9
JG		 1825 break;
1826 case DRM_MODE_CONNECTOR_DVII:
1827 case DRM_MODE_CONNECTOR_DVID:
1828 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 1829 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 1830 if (i2c_bus->valid) {
f376b94f 1831 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1832 if (!radeon_connector->ddc_bus)
a70882aa 1833 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD		 1834 }
1835 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 1836 radeon_connector->dac_load_detect = true;
445282db
DA		 1837 drm_connector_attach_property(&radeon_connector->base,
1838 rdev->mode_info.load_detect_property,
1839 1);
771fe6b9
JG		 1840 }
1841 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 1842 connector->interlace_allowed = true;
1843 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1844 connector->doublescan_allowed = true;
1845 else
1846 connector->doublescan_allowed = false;
771fe6b9
JG		 1847 break;
1848 case DRM_MODE_CONNECTOR_SVIDEO:
1849 case DRM_MODE_CONNECTOR_Composite:
1850 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD		 1851 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1852 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1853 radeon_connector->dac_load_detect = true;
1854 /* RS400,RC410,RS480 chipset seems to report a lot
1855 * of false positive on load detect, we haven't yet
1856 * found a way to make load detect reliable on those
1857 * chipset, thus just disable it for TV.
1858 */
1859 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
1860 radeon_connector->dac_load_detect = false;
1861 drm_connector_attach_property(&radeon_connector->base,
1862 rdev->mode_info.load_detect_property,
1863 radeon_connector->dac_load_detect);
1864 drm_connector_attach_property(&radeon_connector->base,
1865 rdev->mode_info.tv_std_property,
1866 radeon_combios_get_tv_info(rdev));
1867 /* no HPD on analog connectors */
1868 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 1869 connector->interlace_allowed = false;
1870 connector->doublescan_allowed = false;
771fe6b9
JG		 1871 break;
1872 case DRM_MODE_CONNECTOR_LVDS:
1873 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 1874 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 1875 if (i2c_bus->valid) {
f376b94f 1876 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1877 if (!radeon_connector->ddc_bus)
a70882aa 1878 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1879 }
445282db
DA		 1880 drm_connector_attach_property(&radeon_connector->base,
1881 dev->mode_config.scaling_mode_property,
1882 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 1883 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 1884 connector->interlace_allowed = false;
1885 connector->doublescan_allowed = false;
771fe6b9
JG		 1886 break;
1887 }
1888
2581afcc 1889 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 1890 if (i2c_bus->valid)
1891 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1892 } else
1893 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9
JG		 1894 connector->display_info.subpixel_order = subpixel_order;
1895 drm_sysfs_connector_add(connector);
63ec0119
MD		 1896 if (connector_type == DRM_MODE_CONNECTOR_LVDS) {
1897 struct drm_encoder *drm_encoder;
1898
1899 list_for_each_entry(drm_encoder, &dev->mode_config.encoder_list, head) {
1900 struct radeon_encoder *radeon_encoder;
1901
1902 radeon_encoder = to_radeon_encoder(drm_encoder);
1903 if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_LVDS)
1904 radeon_legacy_backlight_init(radeon_encoder, connector);
1905 }
1906 }
771fe6b9 1907}
kernel source for telekom puls (alcatel/mediatek)