Commit | Line | Data |
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771fe6b9 JG |
1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice shall be included in | |
13 | * all copies or substantial portions of the Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
21 | * OTHER DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: Dave Airlie | |
24 | * Alex Deucher | |
25 | */ | |
760285e7 DH |
26 | #include <drm/drmP.h> |
27 | #include <drm/drm_edid.h> | |
28 | #include <drm/drm_crtc_helper.h> | |
29 | #include <drm/drm_fb_helper.h> | |
30 | #include <drm/radeon_drm.h> | |
771fe6b9 | 31 | #include "radeon.h" |
923f6848 | 32 | #include "atom.h" |
771fe6b9 JG |
33 | |
34 | extern void | |
35 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |
36 | struct drm_encoder *encoder, | |
37 | bool connected); | |
38 | extern void | |
39 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |
40 | struct drm_encoder *encoder, | |
41 | bool connected); | |
42 | ||
d4877cf2 AD |
43 | void radeon_connector_hotplug(struct drm_connector *connector) |
44 | { | |
45 | struct drm_device *dev = connector->dev; | |
46 | struct radeon_device *rdev = dev->dev_private; | |
47 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
48 | ||
cbac9543 AD |
49 | /* bail if the connector does not have hpd pin, e.g., |
50 | * VGA, TV, etc. | |
51 | */ | |
52 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) | |
53 | return; | |
54 | ||
1e85e1d0 | 55 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); |
d4877cf2 | 56 | |
73104b5c AD |
57 | /* if the connector is already off, don't turn it back on */ |
58 | if (connector->dpms != DRM_MODE_DPMS_ON) | |
59 | return; | |
60 | ||
d5811e87 AD |
61 | /* just deal with DP (not eDP) here. */ |
62 | if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { | |
266dcba5 JG |
63 | struct radeon_connector_atom_dig *dig_connector = |
64 | radeon_connector->con_priv; | |
7c3ed0fd | 65 | |
266dcba5 JG |
66 | /* if existing sink type was not DP no need to retrain */ |
67 | if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
68 | return; | |
69 | ||
70 | /* first get sink type as it may be reset after (un)plug */ | |
71 | dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); | |
72 | /* don't do anything if sink is not display port, i.e., | |
73 | * passive dp->(dvi|hdmi) adaptor | |
74 | */ | |
75 | if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { | |
76 | int saved_dpms = connector->dpms; | |
77 | /* Only turn off the display if it's physically disconnected */ | |
ca2ccde5 | 78 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
266dcba5 | 79 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); |
ca2ccde5 | 80 | } else if (radeon_dp_needs_link_train(radeon_connector)) { |
c043ef53 SCP |
81 | /* Don't try to start link training before we |
82 | * have the dpcd */ | |
83 | if (!radeon_dp_getdpcd(radeon_connector)) | |
84 | return; | |
85 | ||
ca2ccde5 JG |
86 | /* set it to OFF so that drm_helper_connector_dpms() |
87 | * won't return immediately since the current state | |
88 | * is ON at this point. | |
89 | */ | |
90 | connector->dpms = DRM_MODE_DPMS_OFF; | |
266dcba5 | 91 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON); |
ca2ccde5 | 92 | } |
266dcba5 JG |
93 | connector->dpms = saved_dpms; |
94 | } | |
d4877cf2 | 95 | } |
d4877cf2 AD |
96 | } |
97 | ||
445282db DA |
98 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
99 | { | |
100 | struct drm_crtc *crtc = encoder->crtc; | |
101 | ||
102 | if (crtc && crtc->enabled) { | |
103 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
104 | crtc->x, crtc->y, crtc->fb); | |
105 | } | |
106 | } | |
eccea792 AD |
107 | |
108 | int radeon_get_monitor_bpc(struct drm_connector *connector) | |
109 | { | |
110 | struct drm_device *dev = connector->dev; | |
111 | struct radeon_device *rdev = dev->dev_private; | |
112 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
113 | struct radeon_connector_atom_dig *dig_connector; | |
114 | int bpc = 8; | |
115 | ||
116 | switch (connector->connector_type) { | |
117 | case DRM_MODE_CONNECTOR_DVII: | |
118 | case DRM_MODE_CONNECTOR_HDMIB: | |
119 | if (radeon_connector->use_digital) { | |
120 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
121 | if (connector->display_info.bpc) | |
122 | bpc = connector->display_info.bpc; | |
123 | } | |
124 | } | |
125 | break; | |
126 | case DRM_MODE_CONNECTOR_DVID: | |
127 | case DRM_MODE_CONNECTOR_HDMIA: | |
128 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
129 | if (connector->display_info.bpc) | |
130 | bpc = connector->display_info.bpc; | |
131 | } | |
132 | break; | |
133 | case DRM_MODE_CONNECTOR_DisplayPort: | |
134 | dig_connector = radeon_connector->con_priv; | |
135 | if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
136 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) || | |
137 | drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
138 | if (connector->display_info.bpc) | |
139 | bpc = connector->display_info.bpc; | |
140 | } | |
141 | break; | |
142 | case DRM_MODE_CONNECTOR_eDP: | |
143 | case DRM_MODE_CONNECTOR_LVDS: | |
144 | if (connector->display_info.bpc) | |
145 | bpc = connector->display_info.bpc; | |
146 | else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { | |
147 | struct drm_connector_helper_funcs *connector_funcs = | |
148 | connector->helper_private; | |
149 | struct drm_encoder *encoder = connector_funcs->best_encoder(connector); | |
150 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
151 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | |
152 | ||
153 | if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR) | |
154 | bpc = 6; | |
155 | else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR) | |
156 | bpc = 8; | |
157 | } | |
158 | break; | |
159 | } | |
160 | return bpc; | |
161 | } | |
162 | ||
771fe6b9 JG |
163 | static void |
164 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) | |
165 | { | |
166 | struct drm_device *dev = connector->dev; | |
167 | struct radeon_device *rdev = dev->dev_private; | |
168 | struct drm_encoder *best_encoder = NULL; | |
169 | struct drm_encoder *encoder = NULL; | |
170 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
171 | struct drm_mode_object *obj; | |
172 | bool connected; | |
173 | int i; | |
174 | ||
175 | best_encoder = connector_funcs->best_encoder(connector); | |
176 | ||
177 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
178 | if (connector->encoder_ids[i] == 0) | |
179 | break; | |
180 | ||
181 | obj = drm_mode_object_find(connector->dev, | |
182 | connector->encoder_ids[i], | |
183 | DRM_MODE_OBJECT_ENCODER); | |
184 | if (!obj) | |
185 | continue; | |
186 | ||
187 | encoder = obj_to_encoder(obj); | |
188 | ||
189 | if ((encoder == best_encoder) && (status == connector_status_connected)) | |
190 | connected = true; | |
191 | else | |
192 | connected = false; | |
193 | ||
194 | if (rdev->is_atom_bios) | |
195 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); | |
196 | else | |
197 | radeon_combios_connected_scratch_regs(connector, encoder, connected); | |
198 | ||
199 | } | |
200 | } | |
201 | ||
1109ca09 | 202 | static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
445282db DA |
203 | { |
204 | struct drm_mode_object *obj; | |
205 | struct drm_encoder *encoder; | |
206 | int i; | |
207 | ||
208 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
209 | if (connector->encoder_ids[i] == 0) | |
210 | break; | |
211 | ||
212 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
213 | if (!obj) | |
214 | continue; | |
215 | ||
216 | encoder = obj_to_encoder(obj); | |
217 | if (encoder->encoder_type == encoder_type) | |
218 | return encoder; | |
219 | } | |
220 | return NULL; | |
221 | } | |
222 | ||
1109ca09 | 223 | static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
771fe6b9 JG |
224 | { |
225 | int enc_id = connector->encoder_ids[0]; | |
226 | struct drm_mode_object *obj; | |
227 | struct drm_encoder *encoder; | |
228 | ||
229 | /* pick the encoder ids */ | |
230 | if (enc_id) { | |
231 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
232 | if (!obj) | |
233 | return NULL; | |
234 | encoder = obj_to_encoder(obj); | |
235 | return encoder; | |
236 | } | |
237 | return NULL; | |
238 | } | |
239 | ||
4ce001ab DA |
240 | /* |
241 | * radeon_connector_analog_encoder_conflict_solve | |
242 | * - search for other connectors sharing this encoder | |
243 | * if priority is true, then set them disconnected if this is connected | |
244 | * if priority is false, set us disconnected if they are connected | |
245 | */ | |
246 | static enum drm_connector_status | |
247 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |
248 | struct drm_encoder *encoder, | |
249 | enum drm_connector_status current_status, | |
250 | bool priority) | |
251 | { | |
252 | struct drm_device *dev = connector->dev; | |
253 | struct drm_connector *conflict; | |
08d07511 | 254 | struct radeon_connector *radeon_conflict; |
4ce001ab DA |
255 | int i; |
256 | ||
257 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | |
258 | if (conflict == connector) | |
259 | continue; | |
260 | ||
08d07511 | 261 | radeon_conflict = to_radeon_connector(conflict); |
4ce001ab DA |
262 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
263 | if (conflict->encoder_ids[i] == 0) | |
264 | break; | |
265 | ||
266 | /* if the IDs match */ | |
267 | if (conflict->encoder_ids[i] == encoder->base.id) { | |
268 | if (conflict->status != connector_status_connected) | |
269 | continue; | |
08d07511 AD |
270 | |
271 | if (radeon_conflict->use_digital) | |
272 | continue; | |
4ce001ab DA |
273 | |
274 | if (priority == true) { | |
c5d46b4e AD |
275 | DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); |
276 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector)); | |
4ce001ab DA |
277 | conflict->status = connector_status_disconnected; |
278 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); | |
279 | } else { | |
c5d46b4e AD |
280 | DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector)); |
281 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict)); | |
4ce001ab DA |
282 | current_status = connector_status_disconnected; |
283 | } | |
284 | break; | |
285 | } | |
286 | } | |
287 | } | |
288 | return current_status; | |
289 | ||
290 | } | |
291 | ||
771fe6b9 JG |
292 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
293 | { | |
294 | struct drm_device *dev = encoder->dev; | |
295 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
296 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 297 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
771fe6b9 | 298 | |
de2103e4 AD |
299 | if (native_mode->hdisplay != 0 && |
300 | native_mode->vdisplay != 0 && | |
301 | native_mode->clock != 0) { | |
fb06ca8f | 302 | mode = drm_mode_duplicate(dev, native_mode); |
771fe6b9 JG |
303 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
304 | drm_mode_set_name(mode); | |
305 | ||
d9fdaafb | 306 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
d2efdf6d AD |
307 | } else if (native_mode->hdisplay != 0 && |
308 | native_mode->vdisplay != 0) { | |
309 | /* mac laptops without an edid */ | |
310 | /* Note that this is not necessarily the exact panel mode, | |
311 | * but an approximation based on the cvt formula. For these | |
312 | * systems we should ideally read the mode info out of the | |
313 | * registers or add a mode table, but this works and is much | |
314 | * simpler. | |
315 | */ | |
316 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | |
317 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
d9fdaafb | 318 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
771fe6b9 JG |
319 | } |
320 | return mode; | |
321 | } | |
322 | ||
923f6848 AD |
323 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
324 | { | |
325 | struct drm_device *dev = encoder->dev; | |
326 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
327 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 328 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
923f6848 AD |
329 | int i; |
330 | struct mode_size { | |
331 | int w; | |
332 | int h; | |
333 | } common_modes[17] = { | |
334 | { 640, 480}, | |
335 | { 720, 480}, | |
336 | { 800, 600}, | |
337 | { 848, 480}, | |
338 | {1024, 768}, | |
339 | {1152, 768}, | |
340 | {1280, 720}, | |
341 | {1280, 800}, | |
342 | {1280, 854}, | |
343 | {1280, 960}, | |
344 | {1280, 1024}, | |
345 | {1440, 900}, | |
346 | {1400, 1050}, | |
347 | {1680, 1050}, | |
348 | {1600, 1200}, | |
349 | {1920, 1080}, | |
350 | {1920, 1200} | |
351 | }; | |
352 | ||
353 | for (i = 0; i < 17; i++) { | |
dfdd6467 AD |
354 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { |
355 | if (common_modes[i].w > 1024 || | |
356 | common_modes[i].h > 768) | |
357 | continue; | |
358 | } | |
923f6848 | 359 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
de2103e4 AD |
360 | if (common_modes[i].w > native_mode->hdisplay || |
361 | common_modes[i].h > native_mode->vdisplay || | |
362 | (common_modes[i].w == native_mode->hdisplay && | |
363 | common_modes[i].h == native_mode->vdisplay)) | |
923f6848 AD |
364 | continue; |
365 | } | |
366 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | |
367 | continue; | |
368 | ||
d50ba256 | 369 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); |
923f6848 AD |
370 | drm_mode_probed_add(connector, mode); |
371 | } | |
372 | } | |
373 | ||
1109ca09 | 374 | static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
771fe6b9 JG |
375 | uint64_t val) |
376 | { | |
445282db DA |
377 | struct drm_device *dev = connector->dev; |
378 | struct radeon_device *rdev = dev->dev_private; | |
379 | struct drm_encoder *encoder; | |
380 | struct radeon_encoder *radeon_encoder; | |
381 | ||
382 | if (property == rdev->mode_info.coherent_mode_property) { | |
383 | struct radeon_encoder_atom_dig *dig; | |
ce227c41 | 384 | bool new_coherent_mode; |
445282db DA |
385 | |
386 | /* need to find digital encoder on connector */ | |
387 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
388 | if (!encoder) | |
389 | return 0; | |
390 | ||
391 | radeon_encoder = to_radeon_encoder(encoder); | |
392 | ||
393 | if (!radeon_encoder->enc_priv) | |
394 | return 0; | |
395 | ||
396 | dig = radeon_encoder->enc_priv; | |
ce227c41 DA |
397 | new_coherent_mode = val ? true : false; |
398 | if (dig->coherent_mode != new_coherent_mode) { | |
399 | dig->coherent_mode = new_coherent_mode; | |
400 | radeon_property_change_mode(&radeon_encoder->base); | |
401 | } | |
445282db DA |
402 | } |
403 | ||
5b1714d3 AD |
404 | if (property == rdev->mode_info.underscan_property) { |
405 | /* need to find digital encoder on connector */ | |
406 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
407 | if (!encoder) | |
408 | return 0; | |
409 | ||
410 | radeon_encoder = to_radeon_encoder(encoder); | |
411 | ||
412 | if (radeon_encoder->underscan_type != val) { | |
413 | radeon_encoder->underscan_type = val; | |
414 | radeon_property_change_mode(&radeon_encoder->base); | |
415 | } | |
416 | } | |
417 | ||
5bccf5e3 MG |
418 | if (property == rdev->mode_info.underscan_hborder_property) { |
419 | /* need to find digital encoder on connector */ | |
420 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
421 | if (!encoder) | |
422 | return 0; | |
423 | ||
424 | radeon_encoder = to_radeon_encoder(encoder); | |
425 | ||
426 | if (radeon_encoder->underscan_hborder != val) { | |
427 | radeon_encoder->underscan_hborder = val; | |
428 | radeon_property_change_mode(&radeon_encoder->base); | |
429 | } | |
430 | } | |
431 | ||
432 | if (property == rdev->mode_info.underscan_vborder_property) { | |
433 | /* need to find digital encoder on connector */ | |
434 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
435 | if (!encoder) | |
436 | return 0; | |
437 | ||
438 | radeon_encoder = to_radeon_encoder(encoder); | |
439 | ||
440 | if (radeon_encoder->underscan_vborder != val) { | |
441 | radeon_encoder->underscan_vborder = val; | |
442 | radeon_property_change_mode(&radeon_encoder->base); | |
443 | } | |
444 | } | |
445 | ||
445282db DA |
446 | if (property == rdev->mode_info.tv_std_property) { |
447 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); | |
448 | if (!encoder) { | |
449 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); | |
450 | } | |
451 | ||
452 | if (!encoder) | |
453 | return 0; | |
454 | ||
455 | radeon_encoder = to_radeon_encoder(encoder); | |
456 | if (!radeon_encoder->enc_priv) | |
457 | return 0; | |
643acacf | 458 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
445282db DA |
459 | struct radeon_encoder_atom_dac *dac_int; |
460 | dac_int = radeon_encoder->enc_priv; | |
461 | dac_int->tv_std = val; | |
462 | } else { | |
463 | struct radeon_encoder_tv_dac *dac_int; | |
464 | dac_int = radeon_encoder->enc_priv; | |
465 | dac_int->tv_std = val; | |
466 | } | |
467 | radeon_property_change_mode(&radeon_encoder->base); | |
468 | } | |
469 | ||
470 | if (property == rdev->mode_info.load_detect_property) { | |
471 | struct radeon_connector *radeon_connector = | |
472 | to_radeon_connector(connector); | |
473 | ||
474 | if (val == 0) | |
475 | radeon_connector->dac_load_detect = false; | |
476 | else | |
477 | radeon_connector->dac_load_detect = true; | |
478 | } | |
479 | ||
480 | if (property == rdev->mode_info.tmds_pll_property) { | |
481 | struct radeon_encoder_int_tmds *tmds = NULL; | |
482 | bool ret = false; | |
483 | /* need to find digital encoder on connector */ | |
484 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
485 | if (!encoder) | |
486 | return 0; | |
487 | ||
488 | radeon_encoder = to_radeon_encoder(encoder); | |
489 | ||
490 | tmds = radeon_encoder->enc_priv; | |
491 | if (!tmds) | |
492 | return 0; | |
493 | ||
494 | if (val == 0) { | |
495 | if (rdev->is_atom_bios) | |
496 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); | |
497 | else | |
498 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); | |
499 | } | |
500 | if (val == 1 || ret == false) { | |
501 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); | |
502 | } | |
503 | radeon_property_change_mode(&radeon_encoder->base); | |
504 | } | |
505 | ||
771fe6b9 JG |
506 | return 0; |
507 | } | |
508 | ||
8dfaa8a7 MD |
509 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
510 | struct drm_connector *connector) | |
511 | { | |
512 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 513 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
13bb9430 MG |
514 | struct drm_display_mode *t, *mode; |
515 | ||
516 | /* If the EDID preferred mode doesn't match the native mode, use it */ | |
517 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | |
518 | if (mode->type & DRM_MODE_TYPE_PREFERRED) { | |
519 | if (mode->hdisplay != native_mode->hdisplay || | |
520 | mode->vdisplay != native_mode->vdisplay) | |
521 | memcpy(native_mode, mode, sizeof(*mode)); | |
522 | } | |
523 | } | |
8dfaa8a7 MD |
524 | |
525 | /* Try to get native mode details from EDID if necessary */ | |
de2103e4 | 526 | if (!native_mode->clock) { |
8dfaa8a7 | 527 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { |
de2103e4 AD |
528 | if (mode->hdisplay == native_mode->hdisplay && |
529 | mode->vdisplay == native_mode->vdisplay) { | |
530 | *native_mode = *mode; | |
531 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); | |
c5d46b4e | 532 | DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n"); |
8dfaa8a7 MD |
533 | break; |
534 | } | |
535 | } | |
536 | } | |
13bb9430 | 537 | |
de2103e4 | 538 | if (!native_mode->clock) { |
c5d46b4e | 539 | DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n"); |
8dfaa8a7 MD |
540 | radeon_encoder->rmx_type = RMX_OFF; |
541 | } | |
542 | } | |
771fe6b9 JG |
543 | |
544 | static int radeon_lvds_get_modes(struct drm_connector *connector) | |
545 | { | |
546 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
547 | struct drm_encoder *encoder; | |
548 | int ret = 0; | |
549 | struct drm_display_mode *mode; | |
550 | ||
551 | if (radeon_connector->ddc_bus) { | |
552 | ret = radeon_ddc_get_modes(radeon_connector); | |
553 | if (ret > 0) { | |
7747b713 | 554 | encoder = radeon_best_single_encoder(connector); |
8dfaa8a7 MD |
555 | if (encoder) { |
556 | radeon_fixup_lvds_native_mode(encoder, connector); | |
7747b713 AD |
557 | /* add scaled modes */ |
558 | radeon_add_common_modes(encoder, connector); | |
8dfaa8a7 | 559 | } |
771fe6b9 JG |
560 | return ret; |
561 | } | |
562 | } | |
563 | ||
564 | encoder = radeon_best_single_encoder(connector); | |
565 | if (!encoder) | |
566 | return 0; | |
567 | ||
568 | /* we have no EDID modes */ | |
569 | mode = radeon_fp_native_mode(encoder); | |
570 | if (mode) { | |
571 | ret = 1; | |
572 | drm_mode_probed_add(connector, mode); | |
7a868e18 AD |
573 | /* add the width/height from vbios tables if available */ |
574 | connector->display_info.width_mm = mode->width_mm; | |
575 | connector->display_info.height_mm = mode->height_mm; | |
7747b713 AD |
576 | /* add scaled modes */ |
577 | radeon_add_common_modes(encoder, connector); | |
771fe6b9 | 578 | } |
923f6848 | 579 | |
771fe6b9 JG |
580 | return ret; |
581 | } | |
582 | ||
583 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | |
584 | struct drm_display_mode *mode) | |
585 | { | |
a3fa6320 AD |
586 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
587 | ||
588 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
589 | return MODE_PANEL; | |
590 | ||
591 | if (encoder) { | |
592 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
593 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
594 | ||
595 | /* AVIVO hardware supports downscaling modes larger than the panel | |
596 | * to the panel size, but I'm not sure this is desirable. | |
597 | */ | |
598 | if ((mode->hdisplay > native_mode->hdisplay) || | |
599 | (mode->vdisplay > native_mode->vdisplay)) | |
600 | return MODE_PANEL; | |
601 | ||
602 | /* if scaling is disabled, block non-native modes */ | |
603 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
604 | if ((mode->hdisplay != native_mode->hdisplay) || | |
605 | (mode->vdisplay != native_mode->vdisplay)) | |
606 | return MODE_PANEL; | |
607 | } | |
608 | } | |
609 | ||
771fe6b9 JG |
610 | return MODE_OK; |
611 | } | |
612 | ||
7b334fcb | 613 | static enum drm_connector_status |
930a9e28 | 614 | radeon_lvds_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 615 | { |
0549a061 | 616 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
2ffb8429 | 617 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
0549a061 | 618 | enum drm_connector_status ret = connector_status_disconnected; |
2ffb8429 AD |
619 | |
620 | if (encoder) { | |
621 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 622 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
2ffb8429 AD |
623 | |
624 | /* check if panel is valid */ | |
de2103e4 | 625 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
2ffb8429 AD |
626 | ret = connector_status_connected; |
627 | ||
628 | } | |
0549a061 AD |
629 | |
630 | /* check for edid as well */ | |
0294cf4f AD |
631 | if (radeon_connector->edid) |
632 | ret = connector_status_connected; | |
633 | else { | |
634 | if (radeon_connector->ddc_bus) { | |
0294cf4f AD |
635 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
636 | &radeon_connector->ddc_bus->adapter); | |
0294cf4f AD |
637 | if (radeon_connector->edid) |
638 | ret = connector_status_connected; | |
639 | } | |
0549a061 | 640 | } |
771fe6b9 | 641 | /* check acpi lid status ??? */ |
2ffb8429 | 642 | |
771fe6b9 JG |
643 | radeon_connector_update_scratch_regs(connector, ret); |
644 | return ret; | |
645 | } | |
646 | ||
647 | static void radeon_connector_destroy(struct drm_connector *connector) | |
648 | { | |
649 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
650 | ||
0294cf4f AD |
651 | if (radeon_connector->edid) |
652 | kfree(radeon_connector->edid); | |
771fe6b9 JG |
653 | kfree(radeon_connector->con_priv); |
654 | drm_sysfs_connector_remove(connector); | |
655 | drm_connector_cleanup(connector); | |
656 | kfree(connector); | |
657 | } | |
658 | ||
445282db DA |
659 | static int radeon_lvds_set_property(struct drm_connector *connector, |
660 | struct drm_property *property, | |
661 | uint64_t value) | |
662 | { | |
663 | struct drm_device *dev = connector->dev; | |
664 | struct radeon_encoder *radeon_encoder; | |
665 | enum radeon_rmx_type rmx_type; | |
666 | ||
d9fdaafb | 667 | DRM_DEBUG_KMS("\n"); |
445282db DA |
668 | if (property != dev->mode_config.scaling_mode_property) |
669 | return 0; | |
670 | ||
671 | if (connector->encoder) | |
672 | radeon_encoder = to_radeon_encoder(connector->encoder); | |
673 | else { | |
674 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
675 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); | |
676 | } | |
677 | ||
678 | switch (value) { | |
679 | case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; | |
680 | case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; | |
681 | case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; | |
682 | default: | |
683 | case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; | |
684 | } | |
685 | if (radeon_encoder->rmx_type == rmx_type) | |
686 | return 0; | |
687 | ||
688 | radeon_encoder->rmx_type = rmx_type; | |
689 | ||
690 | radeon_property_change_mode(&radeon_encoder->base); | |
691 | return 0; | |
692 | } | |
693 | ||
694 | ||
1109ca09 | 695 | static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
771fe6b9 JG |
696 | .get_modes = radeon_lvds_get_modes, |
697 | .mode_valid = radeon_lvds_mode_valid, | |
698 | .best_encoder = radeon_best_single_encoder, | |
699 | }; | |
700 | ||
1109ca09 | 701 | static const struct drm_connector_funcs radeon_lvds_connector_funcs = { |
771fe6b9 JG |
702 | .dpms = drm_helper_connector_dpms, |
703 | .detect = radeon_lvds_detect, | |
704 | .fill_modes = drm_helper_probe_single_connector_modes, | |
705 | .destroy = radeon_connector_destroy, | |
445282db | 706 | .set_property = radeon_lvds_set_property, |
771fe6b9 JG |
707 | }; |
708 | ||
709 | static int radeon_vga_get_modes(struct drm_connector *connector) | |
710 | { | |
711 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
712 | int ret; | |
713 | ||
714 | ret = radeon_ddc_get_modes(radeon_connector); | |
715 | ||
716 | return ret; | |
717 | } | |
718 | ||
719 | static int radeon_vga_mode_valid(struct drm_connector *connector, | |
720 | struct drm_display_mode *mode) | |
721 | { | |
b20f9bef AD |
722 | struct drm_device *dev = connector->dev; |
723 | struct radeon_device *rdev = dev->dev_private; | |
724 | ||
a3fa6320 | 725 | /* XXX check mode bandwidth */ |
b20f9bef AD |
726 | |
727 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
728 | return MODE_CLOCK_HIGH; | |
729 | ||
771fe6b9 JG |
730 | return MODE_OK; |
731 | } | |
732 | ||
7b334fcb | 733 | static enum drm_connector_status |
930a9e28 | 734 | radeon_vga_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 735 | { |
fafcf94e AD |
736 | struct drm_device *dev = connector->dev; |
737 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 JG |
738 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
739 | struct drm_encoder *encoder; | |
740 | struct drm_encoder_helper_funcs *encoder_funcs; | |
4b9d2a21 | 741 | bool dret = false; |
771fe6b9 JG |
742 | enum drm_connector_status ret = connector_status_disconnected; |
743 | ||
4ce001ab DA |
744 | encoder = radeon_best_single_encoder(connector); |
745 | if (!encoder) | |
746 | ret = connector_status_disconnected; | |
747 | ||
eb6b6d7c | 748 | if (radeon_connector->ddc_bus) |
0a9069d3 | 749 | dret = radeon_ddc_probe(radeon_connector, false); |
0294cf4f | 750 | if (dret) { |
d0d0a225 | 751 | radeon_connector->detected_by_load = false; |
0294cf4f AD |
752 | if (radeon_connector->edid) { |
753 | kfree(radeon_connector->edid); | |
754 | radeon_connector->edid = NULL; | |
755 | } | |
0294cf4f | 756 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
0294cf4f AD |
757 | |
758 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
759 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
760 | drm_get_connector_name(connector)); | |
761 | ret = connector_status_connected; | |
0294cf4f AD |
762 | } else { |
763 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
764 | ||
765 | /* some oems have boards with separate digital and analog connectors | |
766 | * with a shared ddc line (often vga + hdmi) | |
767 | */ | |
768 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | |
769 | kfree(radeon_connector->edid); | |
770 | radeon_connector->edid = NULL; | |
771 | ret = connector_status_disconnected; | |
772 | } else | |
773 | ret = connector_status_connected; | |
774 | } | |
775 | } else { | |
c3cceedd DA |
776 | |
777 | /* if we aren't forcing don't do destructive polling */ | |
d0d0a225 AD |
778 | if (!force) { |
779 | /* only return the previous status if we last | |
780 | * detected a monitor via load. | |
781 | */ | |
782 | if (radeon_connector->detected_by_load) | |
783 | return connector->status; | |
784 | else | |
785 | return ret; | |
786 | } | |
c3cceedd | 787 | |
d8a7f792 | 788 | if (radeon_connector->dac_load_detect && encoder) { |
445282db DA |
789 | encoder_funcs = encoder->helper_private; |
790 | ret = encoder_funcs->detect(encoder, connector); | |
34076446 | 791 | if (ret != connector_status_disconnected) |
d0d0a225 | 792 | radeon_connector->detected_by_load = true; |
445282db | 793 | } |
771fe6b9 JG |
794 | } |
795 | ||
4ce001ab DA |
796 | if (ret == connector_status_connected) |
797 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
fafcf94e AD |
798 | |
799 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the | |
800 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
801 | * by other means, assume the CRT is connected and use that EDID. | |
802 | */ | |
803 | if ((!rdev->is_atom_bios) && | |
804 | (ret == connector_status_disconnected) && | |
805 | rdev->mode_info.bios_hardcoded_edid_size) { | |
806 | ret = connector_status_connected; | |
807 | } | |
808 | ||
771fe6b9 JG |
809 | radeon_connector_update_scratch_regs(connector, ret); |
810 | return ret; | |
811 | } | |
812 | ||
1109ca09 | 813 | static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { |
771fe6b9 JG |
814 | .get_modes = radeon_vga_get_modes, |
815 | .mode_valid = radeon_vga_mode_valid, | |
816 | .best_encoder = radeon_best_single_encoder, | |
817 | }; | |
818 | ||
1109ca09 | 819 | static const struct drm_connector_funcs radeon_vga_connector_funcs = { |
771fe6b9 JG |
820 | .dpms = drm_helper_connector_dpms, |
821 | .detect = radeon_vga_detect, | |
822 | .fill_modes = drm_helper_probe_single_connector_modes, | |
823 | .destroy = radeon_connector_destroy, | |
824 | .set_property = radeon_connector_set_property, | |
825 | }; | |
826 | ||
4ce001ab DA |
827 | static int radeon_tv_get_modes(struct drm_connector *connector) |
828 | { | |
829 | struct drm_device *dev = connector->dev; | |
923f6848 | 830 | struct radeon_device *rdev = dev->dev_private; |
4ce001ab | 831 | struct drm_display_mode *tv_mode; |
923f6848 | 832 | struct drm_encoder *encoder; |
4ce001ab | 833 | |
923f6848 AD |
834 | encoder = radeon_best_single_encoder(connector); |
835 | if (!encoder) | |
836 | return 0; | |
4ce001ab | 837 | |
923f6848 AD |
838 | /* avivo chips can scale any mode */ |
839 | if (rdev->family >= CHIP_RS600) | |
840 | /* add scaled modes */ | |
841 | radeon_add_common_modes(encoder, connector); | |
842 | else { | |
843 | /* only 800x600 is supported right now on pre-avivo chips */ | |
d50ba256 | 844 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); |
923f6848 AD |
845 | tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
846 | drm_mode_probed_add(connector, tv_mode); | |
847 | } | |
4ce001ab DA |
848 | return 1; |
849 | } | |
850 | ||
851 | static int radeon_tv_mode_valid(struct drm_connector *connector, | |
852 | struct drm_display_mode *mode) | |
853 | { | |
a3fa6320 AD |
854 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
855 | return MODE_CLOCK_RANGE; | |
4ce001ab DA |
856 | return MODE_OK; |
857 | } | |
858 | ||
7b334fcb | 859 | static enum drm_connector_status |
930a9e28 | 860 | radeon_tv_detect(struct drm_connector *connector, bool force) |
4ce001ab DA |
861 | { |
862 | struct drm_encoder *encoder; | |
863 | struct drm_encoder_helper_funcs *encoder_funcs; | |
445282db DA |
864 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
865 | enum drm_connector_status ret = connector_status_disconnected; | |
866 | ||
867 | if (!radeon_connector->dac_load_detect) | |
868 | return ret; | |
4ce001ab DA |
869 | |
870 | encoder = radeon_best_single_encoder(connector); | |
871 | if (!encoder) | |
872 | ret = connector_status_disconnected; | |
873 | else { | |
874 | encoder_funcs = encoder->helper_private; | |
875 | ret = encoder_funcs->detect(encoder, connector); | |
876 | } | |
877 | if (ret == connector_status_connected) | |
878 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); | |
879 | radeon_connector_update_scratch_regs(connector, ret); | |
880 | return ret; | |
881 | } | |
882 | ||
1109ca09 | 883 | static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { |
4ce001ab DA |
884 | .get_modes = radeon_tv_get_modes, |
885 | .mode_valid = radeon_tv_mode_valid, | |
886 | .best_encoder = radeon_best_single_encoder, | |
887 | }; | |
888 | ||
1109ca09 | 889 | static const struct drm_connector_funcs radeon_tv_connector_funcs = { |
4ce001ab DA |
890 | .dpms = drm_helper_connector_dpms, |
891 | .detect = radeon_tv_detect, | |
892 | .fill_modes = drm_helper_probe_single_connector_modes, | |
893 | .destroy = radeon_connector_destroy, | |
894 | .set_property = radeon_connector_set_property, | |
895 | }; | |
896 | ||
771fe6b9 JG |
897 | static int radeon_dvi_get_modes(struct drm_connector *connector) |
898 | { | |
899 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
900 | int ret; | |
901 | ||
902 | ret = radeon_ddc_get_modes(radeon_connector); | |
771fe6b9 JG |
903 | return ret; |
904 | } | |
905 | ||
11fe1266 TU |
906 | static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector) |
907 | { | |
908 | struct drm_device *dev = connector->dev; | |
909 | struct radeon_device *rdev = dev->dev_private; | |
910 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
911 | enum drm_connector_status status; | |
912 | ||
913 | /* We only trust HPD on R600 and newer ASICS. */ | |
914 | if (rdev->family >= CHIP_R600 | |
915 | && radeon_connector->hpd.hpd != RADEON_HPD_NONE) { | |
916 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) | |
917 | status = connector_status_connected; | |
918 | else | |
919 | status = connector_status_disconnected; | |
920 | if (connector->status == status) | |
921 | return true; | |
922 | } | |
923 | ||
924 | return false; | |
925 | } | |
926 | ||
4ce001ab DA |
927 | /* |
928 | * DVI is complicated | |
929 | * Do a DDC probe, if DDC probe passes, get the full EDID so | |
930 | * we can do analog/digital monitor detection at this point. | |
931 | * If the monitor is an analog monitor or we got no DDC, | |
932 | * we need to find the DAC encoder object for this connector. | |
933 | * If we got no DDC, we do load detection on the DAC encoder object. | |
934 | * If we got analog DDC or load detection passes on the DAC encoder | |
935 | * we have to check if this analog encoder is shared with anyone else (TV) | |
936 | * if its shared we have to set the other connector to disconnected. | |
937 | */ | |
7b334fcb | 938 | static enum drm_connector_status |
930a9e28 | 939 | radeon_dvi_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 940 | { |
fafcf94e AD |
941 | struct drm_device *dev = connector->dev; |
942 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 | 943 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
4ce001ab | 944 | struct drm_encoder *encoder = NULL; |
771fe6b9 JG |
945 | struct drm_encoder_helper_funcs *encoder_funcs; |
946 | struct drm_mode_object *obj; | |
947 | int i; | |
948 | enum drm_connector_status ret = connector_status_disconnected; | |
fc87f13b | 949 | bool dret = false, broken_edid = false; |
771fe6b9 | 950 | |
11fe1266 TU |
951 | if (!force && radeon_check_hpd_status_unchanged(connector)) |
952 | return connector->status; | |
953 | ||
eb6b6d7c | 954 | if (radeon_connector->ddc_bus) |
0a9069d3 | 955 | dret = radeon_ddc_probe(radeon_connector, false); |
4ce001ab | 956 | if (dret) { |
d0d0a225 | 957 | radeon_connector->detected_by_load = false; |
0294cf4f AD |
958 | if (radeon_connector->edid) { |
959 | kfree(radeon_connector->edid); | |
960 | radeon_connector->edid = NULL; | |
961 | } | |
4ce001ab | 962 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
4ce001ab DA |
963 | |
964 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
965 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
966 | drm_get_connector_name(connector)); | |
4a9a8b71 DA |
967 | /* rs690 seems to have a problem with connectors not existing and always |
968 | * return a block of 0's. If we see this just stop polling on this output */ | |
969 | if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) { | |
970 | ret = connector_status_disconnected; | |
971 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); | |
972 | radeon_connector->ddc_bus = NULL; | |
fc87f13b EE |
973 | } else { |
974 | ret = connector_status_connected; | |
975 | broken_edid = true; /* defer use_digital to later */ | |
4a9a8b71 | 976 | } |
4ce001ab DA |
977 | } else { |
978 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
979 | ||
0294cf4f AD |
980 | /* some oems have boards with separate digital and analog connectors |
981 | * with a shared ddc line (often vga + hdmi) | |
982 | */ | |
983 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { | |
984 | kfree(radeon_connector->edid); | |
985 | radeon_connector->edid = NULL; | |
986 | ret = connector_status_disconnected; | |
987 | } else | |
988 | ret = connector_status_connected; | |
71407c46 | 989 | |
42f14c4b AD |
990 | /* This gets complicated. We have boards with VGA + HDMI with a |
991 | * shared DDC line and we have boards with DVI-D + HDMI with a shared | |
992 | * DDC line. The latter is more complex because with DVI<->HDMI adapters | |
993 | * you don't really know what's connected to which port as both are digital. | |
71407c46 | 994 | */ |
d3932d6c | 995 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
71407c46 AD |
996 | struct drm_connector *list_connector; |
997 | struct radeon_connector *list_radeon_connector; | |
998 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { | |
999 | if (connector == list_connector) | |
1000 | continue; | |
1001 | list_radeon_connector = to_radeon_connector(list_connector); | |
b2ea4aa6 AD |
1002 | if (list_radeon_connector->shared_ddc && |
1003 | (list_radeon_connector->ddc_bus->rec.i2c_id == | |
1004 | radeon_connector->ddc_bus->rec.i2c_id)) { | |
42f14c4b AD |
1005 | /* cases where both connectors are digital */ |
1006 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { | |
1007 | /* hpd is our only option in this case */ | |
1008 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | |
71407c46 AD |
1009 | kfree(radeon_connector->edid); |
1010 | radeon_connector->edid = NULL; | |
1011 | ret = connector_status_disconnected; | |
1012 | } | |
1013 | } | |
1014 | } | |
1015 | } | |
1016 | } | |
4ce001ab DA |
1017 | } |
1018 | } | |
1019 | ||
1020 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) | |
1021 | goto out; | |
1022 | ||
5f0a2612 AD |
1023 | /* DVI-D and HDMI-A are digital only */ |
1024 | if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) || | |
1025 | (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA)) | |
1026 | goto out; | |
1027 | ||
d0d0a225 | 1028 | /* if we aren't forcing don't do destructive polling */ |
c3cceedd | 1029 | if (!force) { |
d0d0a225 AD |
1030 | /* only return the previous status if we last |
1031 | * detected a monitor via load. | |
1032 | */ | |
1033 | if (radeon_connector->detected_by_load) | |
1034 | ret = connector->status; | |
c3cceedd DA |
1035 | goto out; |
1036 | } | |
1037 | ||
4ce001ab | 1038 | /* find analog encoder */ |
445282db DA |
1039 | if (radeon_connector->dac_load_detect) { |
1040 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1041 | if (connector->encoder_ids[i] == 0) | |
1042 | break; | |
771fe6b9 | 1043 | |
445282db DA |
1044 | obj = drm_mode_object_find(connector->dev, |
1045 | connector->encoder_ids[i], | |
1046 | DRM_MODE_OBJECT_ENCODER); | |
1047 | if (!obj) | |
1048 | continue; | |
771fe6b9 | 1049 | |
445282db | 1050 | encoder = obj_to_encoder(obj); |
771fe6b9 | 1051 | |
e3632507 | 1052 | if (encoder->encoder_type != DRM_MODE_ENCODER_DAC && |
e00e8b5e AD |
1053 | encoder->encoder_type != DRM_MODE_ENCODER_TVDAC) |
1054 | continue; | |
1055 | ||
445282db DA |
1056 | encoder_funcs = encoder->helper_private; |
1057 | if (encoder_funcs->detect) { | |
fc87f13b EE |
1058 | if (!broken_edid) { |
1059 | if (ret != connector_status_connected) { | |
1060 | /* deal with analog monitors without DDC */ | |
1061 | ret = encoder_funcs->detect(encoder, connector); | |
1062 | if (ret == connector_status_connected) { | |
1063 | radeon_connector->use_digital = false; | |
1064 | } | |
1065 | if (ret != connector_status_disconnected) | |
1066 | radeon_connector->detected_by_load = true; | |
445282db | 1067 | } |
fc87f13b EE |
1068 | } else { |
1069 | enum drm_connector_status lret; | |
1070 | /* assume digital unless load detected otherwise */ | |
1071 | radeon_connector->use_digital = true; | |
1072 | lret = encoder_funcs->detect(encoder, connector); | |
1073 | DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret); | |
1074 | if (lret == connector_status_connected) | |
1075 | radeon_connector->use_digital = false; | |
771fe6b9 | 1076 | } |
445282db | 1077 | break; |
771fe6b9 JG |
1078 | } |
1079 | } | |
1080 | } | |
1081 | ||
4ce001ab DA |
1082 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && |
1083 | encoder) { | |
1084 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
1085 | } | |
1086 | ||
fafcf94e AD |
1087 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the |
1088 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
1089 | * by other means, assume the DFP is connected and use that EDID. In most | |
1090 | * cases the DVI port is actually a virtual KVM port connected to the service | |
1091 | * processor. | |
1092 | */ | |
a09d431f | 1093 | out: |
fafcf94e AD |
1094 | if ((!rdev->is_atom_bios) && |
1095 | (ret == connector_status_disconnected) && | |
1096 | rdev->mode_info.bios_hardcoded_edid_size) { | |
1097 | radeon_connector->use_digital = true; | |
1098 | ret = connector_status_connected; | |
1099 | } | |
1100 | ||
771fe6b9 JG |
1101 | /* updated in get modes as well since we need to know if it's analog or digital */ |
1102 | radeon_connector_update_scratch_regs(connector, ret); | |
1103 | return ret; | |
1104 | } | |
1105 | ||
1106 | /* okay need to be smart in here about which encoder to pick */ | |
1109ca09 | 1107 | static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) |
771fe6b9 JG |
1108 | { |
1109 | int enc_id = connector->encoder_ids[0]; | |
1110 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1111 | struct drm_mode_object *obj; | |
1112 | struct drm_encoder *encoder; | |
1113 | int i; | |
1114 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1115 | if (connector->encoder_ids[i] == 0) | |
1116 | break; | |
1117 | ||
1118 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1119 | if (!obj) | |
1120 | continue; | |
1121 | ||
1122 | encoder = obj_to_encoder(obj); | |
1123 | ||
4ce001ab | 1124 | if (radeon_connector->use_digital == true) { |
771fe6b9 JG |
1125 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) |
1126 | return encoder; | |
1127 | } else { | |
1128 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || | |
1129 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) | |
1130 | return encoder; | |
1131 | } | |
1132 | } | |
1133 | ||
1134 | /* see if we have a default encoder TODO */ | |
1135 | ||
1136 | /* then check use digitial */ | |
1137 | /* pick the first one */ | |
1138 | if (enc_id) { | |
1139 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
1140 | if (!obj) | |
1141 | return NULL; | |
1142 | encoder = obj_to_encoder(obj); | |
1143 | return encoder; | |
1144 | } | |
1145 | return NULL; | |
1146 | } | |
1147 | ||
d50ba256 DA |
1148 | static void radeon_dvi_force(struct drm_connector *connector) |
1149 | { | |
1150 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1151 | if (connector->force == DRM_FORCE_ON) | |
1152 | radeon_connector->use_digital = false; | |
1153 | if (connector->force == DRM_FORCE_ON_DIGITAL) | |
1154 | radeon_connector->use_digital = true; | |
1155 | } | |
1156 | ||
a3fa6320 AD |
1157 | static int radeon_dvi_mode_valid(struct drm_connector *connector, |
1158 | struct drm_display_mode *mode) | |
1159 | { | |
1b24203e AD |
1160 | struct drm_device *dev = connector->dev; |
1161 | struct radeon_device *rdev = dev->dev_private; | |
a3fa6320 AD |
1162 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
1163 | ||
1164 | /* XXX check mode bandwidth */ | |
1165 | ||
1b24203e AD |
1166 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
1167 | if (radeon_connector->use_digital && | |
1168 | (rdev->family == CHIP_RV100) && | |
1169 | (mode->clock > 135000)) | |
1170 | return MODE_CLOCK_HIGH; | |
1171 | ||
a3fa6320 AD |
1172 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
1173 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | |
1174 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | |
1175 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | |
1176 | return MODE_OK; | |
e1e84017 | 1177 | else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) { |
1b2681ba | 1178 | if (ASIC_IS_DCE6(rdev)) { |
e1e84017 AD |
1179 | /* HDMI 1.3+ supports max clock of 340 Mhz */ |
1180 | if (mode->clock > 340000) | |
1181 | return MODE_CLOCK_HIGH; | |
1182 | else | |
1183 | return MODE_OK; | |
1184 | } else | |
1185 | return MODE_CLOCK_HIGH; | |
1186 | } else | |
a3fa6320 AD |
1187 | return MODE_CLOCK_HIGH; |
1188 | } | |
b20f9bef AD |
1189 | |
1190 | /* check against the max pixel clock */ | |
1191 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
1192 | return MODE_CLOCK_HIGH; | |
1193 | ||
a3fa6320 AD |
1194 | return MODE_OK; |
1195 | } | |
1196 | ||
1109ca09 | 1197 | static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
771fe6b9 | 1198 | .get_modes = radeon_dvi_get_modes, |
a3fa6320 | 1199 | .mode_valid = radeon_dvi_mode_valid, |
771fe6b9 JG |
1200 | .best_encoder = radeon_dvi_encoder, |
1201 | }; | |
1202 | ||
1109ca09 | 1203 | static const struct drm_connector_funcs radeon_dvi_connector_funcs = { |
771fe6b9 JG |
1204 | .dpms = drm_helper_connector_dpms, |
1205 | .detect = radeon_dvi_detect, | |
1206 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1207 | .set_property = radeon_connector_set_property, | |
1208 | .destroy = radeon_connector_destroy, | |
d50ba256 | 1209 | .force = radeon_dvi_force, |
771fe6b9 JG |
1210 | }; |
1211 | ||
ffd09c64 AD |
1212 | static void radeon_dp_connector_destroy(struct drm_connector *connector) |
1213 | { | |
1214 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1215 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1216 | ||
ffd09c64 AD |
1217 | if (radeon_connector->edid) |
1218 | kfree(radeon_connector->edid); | |
1219 | if (radeon_dig_connector->dp_i2c_bus) | |
ac1aade6 | 1220 | radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); |
ffd09c64 AD |
1221 | kfree(radeon_connector->con_priv); |
1222 | drm_sysfs_connector_remove(connector); | |
1223 | drm_connector_cleanup(connector); | |
1224 | kfree(connector); | |
1225 | } | |
1226 | ||
746c1aa4 DA |
1227 | static int radeon_dp_get_modes(struct drm_connector *connector) |
1228 | { | |
1229 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
8b834852 | 1230 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
591a10e1 | 1231 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
746c1aa4 DA |
1232 | int ret; |
1233 | ||
f89931f3 AD |
1234 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1235 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1236 | struct drm_display_mode *mode; |
1237 | ||
2b69ffb9 AD |
1238 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1239 | if (!radeon_dig_connector->edp_on) | |
1240 | atombios_set_edp_panel_power(connector, | |
1241 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
1242 | ret = radeon_ddc_get_modes(radeon_connector); | |
1243 | if (!radeon_dig_connector->edp_on) | |
1244 | atombios_set_edp_panel_power(connector, | |
1245 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1246 | } else { | |
1247 | /* need to setup ddc on the bridge */ | |
1248 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != | |
1249 | ENCODER_OBJECT_ID_NONE) { | |
1250 | if (encoder) | |
1251 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
1252 | } | |
1253 | ret = radeon_ddc_get_modes(radeon_connector); | |
1254 | } | |
d291767b AD |
1255 | |
1256 | if (ret > 0) { | |
d291767b AD |
1257 | if (encoder) { |
1258 | radeon_fixup_lvds_native_mode(encoder, connector); | |
1259 | /* add scaled modes */ | |
1260 | radeon_add_common_modes(encoder, connector); | |
1261 | } | |
1262 | return ret; | |
1263 | } | |
1264 | ||
d291767b AD |
1265 | if (!encoder) |
1266 | return 0; | |
1267 | ||
1268 | /* we have no EDID modes */ | |
1269 | mode = radeon_fp_native_mode(encoder); | |
1270 | if (mode) { | |
1271 | ret = 1; | |
1272 | drm_mode_probed_add(connector, mode); | |
1273 | /* add the width/height from vbios tables if available */ | |
1274 | connector->display_info.width_mm = mode->width_mm; | |
1275 | connector->display_info.height_mm = mode->height_mm; | |
1276 | /* add scaled modes */ | |
1277 | radeon_add_common_modes(encoder, connector); | |
1278 | } | |
591a10e1 AD |
1279 | } else { |
1280 | /* need to setup ddc on the bridge */ | |
1d33e1fc AD |
1281 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
1282 | ENCODER_OBJECT_ID_NONE) { | |
591a10e1 AD |
1283 | if (encoder) |
1284 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
1285 | } | |
d291767b | 1286 | ret = radeon_ddc_get_modes(radeon_connector); |
591a10e1 | 1287 | } |
8b834852 | 1288 | |
746c1aa4 DA |
1289 | return ret; |
1290 | } | |
1291 | ||
1d33e1fc | 1292 | u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector) |
d7fa8bb3 AD |
1293 | { |
1294 | struct drm_mode_object *obj; | |
1295 | struct drm_encoder *encoder; | |
1296 | struct radeon_encoder *radeon_encoder; | |
1297 | int i; | |
d7fa8bb3 AD |
1298 | |
1299 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1300 | if (connector->encoder_ids[i] == 0) | |
1301 | break; | |
1302 | ||
1303 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1304 | if (!obj) | |
1305 | continue; | |
1306 | ||
1307 | encoder = obj_to_encoder(obj); | |
1308 | radeon_encoder = to_radeon_encoder(encoder); | |
1309 | ||
1310 | switch (radeon_encoder->encoder_id) { | |
1311 | case ENCODER_OBJECT_ID_TRAVIS: | |
1312 | case ENCODER_OBJECT_ID_NUTMEG: | |
1d33e1fc | 1313 | return radeon_encoder->encoder_id; |
d7fa8bb3 AD |
1314 | default: |
1315 | break; | |
1316 | } | |
1317 | } | |
1318 | ||
1d33e1fc | 1319 | return ENCODER_OBJECT_ID_NONE; |
d7fa8bb3 AD |
1320 | } |
1321 | ||
1322 | bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector) | |
1323 | { | |
1324 | struct drm_mode_object *obj; | |
1325 | struct drm_encoder *encoder; | |
1326 | struct radeon_encoder *radeon_encoder; | |
1327 | int i; | |
1328 | bool found = false; | |
1329 | ||
1330 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1331 | if (connector->encoder_ids[i] == 0) | |
1332 | break; | |
1333 | ||
1334 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1335 | if (!obj) | |
1336 | continue; | |
1337 | ||
1338 | encoder = obj_to_encoder(obj); | |
1339 | radeon_encoder = to_radeon_encoder(encoder); | |
1340 | if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2) | |
1341 | found = true; | |
1342 | } | |
1343 | ||
1344 | return found; | |
1345 | } | |
1346 | ||
1347 | bool radeon_connector_is_dp12_capable(struct drm_connector *connector) | |
1348 | { | |
1349 | struct drm_device *dev = connector->dev; | |
1350 | struct radeon_device *rdev = dev->dev_private; | |
1351 | ||
1352 | if (ASIC_IS_DCE5(rdev) && | |
e3eda5c5 | 1353 | (rdev->clock.default_dispclk >= 53900) && |
d7fa8bb3 AD |
1354 | radeon_connector_encoder_is_hbr2(connector)) { |
1355 | return true; | |
1356 | } | |
1357 | ||
1358 | return false; | |
1359 | } | |
1360 | ||
7b334fcb | 1361 | static enum drm_connector_status |
930a9e28 | 1362 | radeon_dp_detect(struct drm_connector *connector, bool force) |
746c1aa4 | 1363 | { |
f8d0edde AD |
1364 | struct drm_device *dev = connector->dev; |
1365 | struct radeon_device *rdev = dev->dev_private; | |
746c1aa4 | 1366 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
746c1aa4 | 1367 | enum drm_connector_status ret = connector_status_disconnected; |
4143e919 | 1368 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
591a10e1 | 1369 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
746c1aa4 | 1370 | |
11fe1266 TU |
1371 | if (!force && radeon_check_hpd_status_unchanged(connector)) |
1372 | return connector->status; | |
1373 | ||
746c1aa4 DA |
1374 | if (radeon_connector->edid) { |
1375 | kfree(radeon_connector->edid); | |
1376 | radeon_connector->edid = NULL; | |
1377 | } | |
1378 | ||
f89931f3 AD |
1379 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1380 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1381 | if (encoder) { |
1382 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1383 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1384 | ||
1385 | /* check if panel is valid */ | |
1386 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) | |
1387 | ret = connector_status_connected; | |
1388 | } | |
6f50eae7 AD |
1389 | /* eDP is always DP */ |
1390 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
8b834852 AD |
1391 | if (!radeon_dig_connector->edp_on) |
1392 | atombios_set_edp_panel_power(connector, | |
1393 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
6f50eae7 | 1394 | if (radeon_dp_getdpcd(radeon_connector)) |
9fa05c98 | 1395 | ret = connector_status_connected; |
8b834852 AD |
1396 | if (!radeon_dig_connector->edp_on) |
1397 | atombios_set_edp_panel_power(connector, | |
1398 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1d33e1fc AD |
1399 | } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
1400 | ENCODER_OBJECT_ID_NONE) { | |
b06947b5 AD |
1401 | /* DP bridges are always DP */ |
1402 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
1403 | /* get the DPCD from the bridge */ | |
1404 | radeon_dp_getdpcd(radeon_connector); | |
1405 | ||
6777a4f6 AD |
1406 | if (encoder) { |
1407 | /* setup ddc on the bridge */ | |
1408 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
0a9069d3 NOS |
1409 | /* bridge chips are always aux */ |
1410 | if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */ | |
b06947b5 | 1411 | ret = connector_status_connected; |
6777a4f6 AD |
1412 | else if (radeon_connector->dac_load_detect) { /* try load detection */ |
1413 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; | |
b06947b5 AD |
1414 | ret = encoder_funcs->detect(encoder, connector); |
1415 | } | |
591a10e1 | 1416 | } |
b06947b5 | 1417 | } else { |
6f50eae7 | 1418 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
f8d0edde AD |
1419 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
1420 | ret = connector_status_connected; | |
1421 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
1422 | radeon_dp_getdpcd(radeon_connector); | |
6f50eae7 | 1423 | } else { |
f8d0edde AD |
1424 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { |
1425 | if (radeon_dp_getdpcd(radeon_connector)) | |
1426 | ret = connector_status_connected; | |
1427 | } else { | |
0a9069d3 NOS |
1428 | /* try non-aux ddc (DP to DVI/HMDI/etc. adapter) */ |
1429 | if (radeon_ddc_probe(radeon_connector, false)) | |
f8d0edde AD |
1430 | ret = connector_status_connected; |
1431 | } | |
4143e919 | 1432 | } |
746c1aa4 | 1433 | } |
4143e919 | 1434 | |
30f44372 | 1435 | radeon_connector_update_scratch_regs(connector, ret); |
746c1aa4 DA |
1436 | return ret; |
1437 | } | |
1438 | ||
5801ead6 AD |
1439 | static int radeon_dp_mode_valid(struct drm_connector *connector, |
1440 | struct drm_display_mode *mode) | |
1441 | { | |
1442 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1443 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1444 | ||
1445 | /* XXX check mode bandwidth */ | |
1446 | ||
f89931f3 AD |
1447 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1448 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1449 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
1450 | ||
1451 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
1452 | return MODE_PANEL; | |
1453 | ||
1454 | if (encoder) { | |
1455 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1456 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1457 | ||
f89931f3 | 1458 | /* AVIVO hardware supports downscaling modes larger than the panel |
d291767b AD |
1459 | * to the panel size, but I'm not sure this is desirable. |
1460 | */ | |
1461 | if ((mode->hdisplay > native_mode->hdisplay) || | |
1462 | (mode->vdisplay > native_mode->vdisplay)) | |
1463 | return MODE_PANEL; | |
1464 | ||
1465 | /* if scaling is disabled, block non-native modes */ | |
1466 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
1467 | if ((mode->hdisplay != native_mode->hdisplay) || | |
1468 | (mode->vdisplay != native_mode->vdisplay)) | |
1469 | return MODE_PANEL; | |
1470 | } | |
1471 | } | |
5801ead6 | 1472 | return MODE_OK; |
d291767b AD |
1473 | } else { |
1474 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
1475 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | |
1476 | return radeon_dp_mode_valid_helper(connector, mode); | |
1477 | else | |
1478 | return MODE_OK; | |
1479 | } | |
5801ead6 AD |
1480 | } |
1481 | ||
1109ca09 | 1482 | static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
746c1aa4 | 1483 | .get_modes = radeon_dp_get_modes, |
5801ead6 | 1484 | .mode_valid = radeon_dp_mode_valid, |
746c1aa4 DA |
1485 | .best_encoder = radeon_dvi_encoder, |
1486 | }; | |
1487 | ||
1109ca09 | 1488 | static const struct drm_connector_funcs radeon_dp_connector_funcs = { |
746c1aa4 DA |
1489 | .dpms = drm_helper_connector_dpms, |
1490 | .detect = radeon_dp_detect, | |
1491 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1492 | .set_property = radeon_connector_set_property, | |
ffd09c64 | 1493 | .destroy = radeon_dp_connector_destroy, |
746c1aa4 DA |
1494 | .force = radeon_dvi_force, |
1495 | }; | |
1496 | ||
85faca85 AD |
1497 | static const struct drm_connector_funcs radeon_edp_connector_funcs = { |
1498 | .dpms = drm_helper_connector_dpms, | |
1499 | .detect = radeon_dp_detect, | |
1500 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1501 | .set_property = radeon_lvds_set_property, | |
1502 | .destroy = radeon_dp_connector_destroy, | |
1503 | .force = radeon_dvi_force, | |
1504 | }; | |
1505 | ||
1506 | static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = { | |
1507 | .dpms = drm_helper_connector_dpms, | |
1508 | .detect = radeon_dp_detect, | |
1509 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1510 | .set_property = radeon_lvds_set_property, | |
1511 | .destroy = radeon_dp_connector_destroy, | |
1512 | .force = radeon_dvi_force, | |
1513 | }; | |
1514 | ||
771fe6b9 JG |
1515 | void |
1516 | radeon_add_atom_connector(struct drm_device *dev, | |
1517 | uint32_t connector_id, | |
1518 | uint32_t supported_device, | |
1519 | int connector_type, | |
1520 | struct radeon_i2c_bus_rec *i2c_bus, | |
b75fad06 | 1521 | uint32_t igp_lane_info, |
eed45b30 | 1522 | uint16_t connector_object_id, |
26b5bc98 AD |
1523 | struct radeon_hpd *hpd, |
1524 | struct radeon_router *router) | |
771fe6b9 | 1525 | { |
445282db | 1526 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1527 | struct drm_connector *connector; |
1528 | struct radeon_connector *radeon_connector; | |
1529 | struct radeon_connector_atom_dig *radeon_dig_connector; | |
eac4dff6 AD |
1530 | struct drm_encoder *encoder; |
1531 | struct radeon_encoder *radeon_encoder; | |
771fe6b9 | 1532 | uint32_t subpixel_order = SubPixelNone; |
0294cf4f | 1533 | bool shared_ddc = false; |
eac4dff6 | 1534 | bool is_dp_bridge = false; |
771fe6b9 | 1535 | |
4ce001ab | 1536 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1537 | return; |
1538 | ||
cf4c12f9 AD |
1539 | /* if the user selected tv=0 don't try and add the connector */ |
1540 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1541 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1542 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1543 | (radeon_tv == 0)) | |
1544 | return; | |
1545 | ||
771fe6b9 JG |
1546 | /* see if we already added it */ |
1547 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1548 | radeon_connector = to_radeon_connector(connector); | |
1549 | if (radeon_connector->connector_id == connector_id) { | |
1550 | radeon_connector->devices |= supported_device; | |
1551 | return; | |
1552 | } | |
0294cf4f | 1553 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
d3932d6c | 1554 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
0294cf4f AD |
1555 | radeon_connector->shared_ddc = true; |
1556 | shared_ddc = true; | |
1557 | } | |
fb939dfc | 1558 | if (radeon_connector->router_bus && router->ddc_valid && |
26b5bc98 AD |
1559 | (radeon_connector->router.router_id == router->router_id)) { |
1560 | radeon_connector->shared_ddc = false; | |
1561 | shared_ddc = false; | |
1562 | } | |
0294cf4f | 1563 | } |
771fe6b9 JG |
1564 | } |
1565 | ||
eac4dff6 AD |
1566 | /* check if it's a dp bridge */ |
1567 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | |
1568 | radeon_encoder = to_radeon_encoder(encoder); | |
1569 | if (radeon_encoder->devices & supported_device) { | |
1570 | switch (radeon_encoder->encoder_id) { | |
1571 | case ENCODER_OBJECT_ID_TRAVIS: | |
1572 | case ENCODER_OBJECT_ID_NUTMEG: | |
1573 | is_dp_bridge = true; | |
1574 | break; | |
1575 | default: | |
1576 | break; | |
1577 | } | |
1578 | } | |
1579 | } | |
1580 | ||
771fe6b9 JG |
1581 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); |
1582 | if (!radeon_connector) | |
1583 | return; | |
1584 | ||
1585 | connector = &radeon_connector->base; | |
1586 | ||
1587 | radeon_connector->connector_id = connector_id; | |
1588 | radeon_connector->devices = supported_device; | |
0294cf4f | 1589 | radeon_connector->shared_ddc = shared_ddc; |
b75fad06 | 1590 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1591 | radeon_connector->hpd = *hpd; |
bc1c4dc3 | 1592 | |
26b5bc98 | 1593 | radeon_connector->router = *router; |
fb939dfc | 1594 | if (router->ddc_valid || router->cd_valid) { |
26b5bc98 AD |
1595 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); |
1596 | if (!radeon_connector->router_bus) | |
a70882aa | 1597 | DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n"); |
26b5bc98 | 1598 | } |
eac4dff6 AD |
1599 | |
1600 | if (is_dp_bridge) { | |
771fe6b9 JG |
1601 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1602 | if (!radeon_dig_connector) | |
1603 | goto failed; | |
771fe6b9 JG |
1604 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1605 | radeon_connector->con_priv = radeon_dig_connector; | |
771fe6b9 | 1606 | if (i2c_bus->valid) { |
eac4dff6 AD |
1607 | /* add DP i2c bus */ |
1608 | if (connector_type == DRM_MODE_CONNECTOR_eDP) | |
1609 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1610 | else | |
1611 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1612 | if (!radeon_dig_connector->dp_i2c_bus) | |
1613 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
f376b94f | 1614 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1615 | if (!radeon_connector->ddc_bus) |
eac4dff6 | 1616 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1617 | } |
eac4dff6 AD |
1618 | switch (connector_type) { |
1619 | case DRM_MODE_CONNECTOR_VGA: | |
1620 | case DRM_MODE_CONNECTOR_DVIA: | |
1621 | default: | |
85faca85 AD |
1622 | drm_connector_init(dev, &radeon_connector->base, |
1623 | &radeon_dp_connector_funcs, connector_type); | |
1624 | drm_connector_helper_add(&radeon_connector->base, | |
1625 | &radeon_dp_connector_helper_funcs); | |
eac4dff6 AD |
1626 | connector->interlace_allowed = true; |
1627 | connector->doublescan_allowed = true; | |
d629a3ce | 1628 | radeon_connector->dac_load_detect = true; |
e35755fa | 1629 | drm_object_attach_property(&radeon_connector->base.base, |
d629a3ce AD |
1630 | rdev->mode_info.load_detect_property, |
1631 | 1); | |
eac4dff6 AD |
1632 | break; |
1633 | case DRM_MODE_CONNECTOR_DVII: | |
1634 | case DRM_MODE_CONNECTOR_DVID: | |
1635 | case DRM_MODE_CONNECTOR_HDMIA: | |
1636 | case DRM_MODE_CONNECTOR_HDMIB: | |
1637 | case DRM_MODE_CONNECTOR_DisplayPort: | |
85faca85 AD |
1638 | drm_connector_init(dev, &radeon_connector->base, |
1639 | &radeon_dp_connector_funcs, connector_type); | |
1640 | drm_connector_helper_add(&radeon_connector->base, | |
1641 | &radeon_dp_connector_helper_funcs); | |
e35755fa | 1642 | drm_object_attach_property(&radeon_connector->base.base, |
430f70d5 | 1643 | rdev->mode_info.underscan_property, |
56bec7c0 | 1644 | UNDERSCAN_OFF); |
e35755fa | 1645 | drm_object_attach_property(&radeon_connector->base.base, |
5bccf5e3 MG |
1646 | rdev->mode_info.underscan_hborder_property, |
1647 | 0); | |
e35755fa | 1648 | drm_object_attach_property(&radeon_connector->base.base, |
5bccf5e3 MG |
1649 | rdev->mode_info.underscan_vborder_property, |
1650 | 0); | |
eac4dff6 AD |
1651 | subpixel_order = SubPixelHorizontalRGB; |
1652 | connector->interlace_allowed = true; | |
1653 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1654 | connector->doublescan_allowed = true; | |
1655 | else | |
1656 | connector->doublescan_allowed = false; | |
d629a3ce AD |
1657 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
1658 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1659 | drm_object_attach_property(&radeon_connector->base.base, |
d629a3ce AD |
1660 | rdev->mode_info.load_detect_property, |
1661 | 1); | |
1662 | } | |
eac4dff6 AD |
1663 | break; |
1664 | case DRM_MODE_CONNECTOR_LVDS: | |
1665 | case DRM_MODE_CONNECTOR_eDP: | |
85faca85 AD |
1666 | drm_connector_init(dev, &radeon_connector->base, |
1667 | &radeon_lvds_bridge_connector_funcs, connector_type); | |
1668 | drm_connector_helper_add(&radeon_connector->base, | |
1669 | &radeon_dp_connector_helper_funcs); | |
e35755fa | 1670 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1671 | dev->mode_config.scaling_mode_property, |
1672 | DRM_MODE_SCALE_FULLSCREEN); | |
1673 | subpixel_order = SubPixelHorizontalRGB; | |
1674 | connector->interlace_allowed = false; | |
1675 | connector->doublescan_allowed = false; | |
1676 | break; | |
5bccf5e3 | 1677 | } |
eac4dff6 AD |
1678 | } else { |
1679 | switch (connector_type) { | |
1680 | case DRM_MODE_CONNECTOR_VGA: | |
1681 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1682 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1683 | if (i2c_bus->valid) { | |
1684 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1685 | if (!radeon_connector->ddc_bus) | |
1686 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1687 | } | |
390d0bbe | 1688 | radeon_connector->dac_load_detect = true; |
e35755fa | 1689 | drm_object_attach_property(&radeon_connector->base.base, |
390d0bbe AD |
1690 | rdev->mode_info.load_detect_property, |
1691 | 1); | |
eac4dff6 AD |
1692 | /* no HPD on analog connectors */ |
1693 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eac4dff6 | 1694 | connector->interlace_allowed = true; |
c49948f4 | 1695 | connector->doublescan_allowed = true; |
eac4dff6 AD |
1696 | break; |
1697 | case DRM_MODE_CONNECTOR_DVIA: | |
1698 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1699 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1700 | if (i2c_bus->valid) { | |
1701 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1702 | if (!radeon_connector->ddc_bus) | |
1703 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1704 | } | |
1705 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1706 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1707 | rdev->mode_info.load_detect_property, |
1708 | 1); | |
1709 | /* no HPD on analog connectors */ | |
1710 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1711 | connector->interlace_allowed = true; | |
1712 | connector->doublescan_allowed = true; | |
1713 | break; | |
1714 | case DRM_MODE_CONNECTOR_DVII: | |
1715 | case DRM_MODE_CONNECTOR_DVID: | |
1716 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1717 | if (!radeon_dig_connector) | |
1718 | goto failed; | |
1719 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1720 | radeon_connector->con_priv = radeon_dig_connector; | |
1721 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1722 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1723 | if (i2c_bus->valid) { | |
1724 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1725 | if (!radeon_connector->ddc_bus) | |
1726 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1727 | } | |
1728 | subpixel_order = SubPixelHorizontalRGB; | |
e35755fa | 1729 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1730 | rdev->mode_info.coherent_mode_property, |
1731 | 1); | |
1732 | if (ASIC_IS_AVIVO(rdev)) { | |
e35755fa | 1733 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1734 | rdev->mode_info.underscan_property, |
1735 | UNDERSCAN_OFF); | |
e35755fa | 1736 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1737 | rdev->mode_info.underscan_hborder_property, |
1738 | 0); | |
e35755fa | 1739 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1740 | rdev->mode_info.underscan_vborder_property, |
1741 | 0); | |
1742 | } | |
1743 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
1744 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1745 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1746 | rdev->mode_info.load_detect_property, |
1747 | 1); | |
1748 | } | |
1749 | connector->interlace_allowed = true; | |
1750 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1751 | connector->doublescan_allowed = true; | |
1752 | else | |
1753 | connector->doublescan_allowed = false; | |
1754 | break; | |
1755 | case DRM_MODE_CONNECTOR_HDMIA: | |
1756 | case DRM_MODE_CONNECTOR_HDMIB: | |
1757 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1758 | if (!radeon_dig_connector) | |
1759 | goto failed; | |
1760 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1761 | radeon_connector->con_priv = radeon_dig_connector; | |
1762 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1763 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1764 | if (i2c_bus->valid) { | |
1765 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1766 | if (!radeon_connector->ddc_bus) | |
1767 | DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1768 | } | |
e35755fa | 1769 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1770 | rdev->mode_info.coherent_mode_property, |
1771 | 1); | |
1772 | if (ASIC_IS_AVIVO(rdev)) { | |
e35755fa | 1773 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1774 | rdev->mode_info.underscan_property, |
1775 | UNDERSCAN_OFF); | |
e35755fa | 1776 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1777 | rdev->mode_info.underscan_hborder_property, |
1778 | 0); | |
e35755fa | 1779 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1780 | rdev->mode_info.underscan_vborder_property, |
1781 | 0); | |
1782 | } | |
1783 | subpixel_order = SubPixelHorizontalRGB; | |
1784 | connector->interlace_allowed = true; | |
1785 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1786 | connector->doublescan_allowed = true; | |
1787 | else | |
1788 | connector->doublescan_allowed = false; | |
1789 | break; | |
1790 | case DRM_MODE_CONNECTOR_DisplayPort: | |
1791 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1792 | if (!radeon_dig_connector) | |
1793 | goto failed; | |
1794 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1795 | radeon_connector->con_priv = radeon_dig_connector; | |
1796 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1797 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1798 | if (i2c_bus->valid) { | |
1799 | /* add DP i2c bus */ | |
1800 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1801 | if (!radeon_dig_connector->dp_i2c_bus) | |
1802 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1803 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1804 | if (!radeon_connector->ddc_bus) | |
1805 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1806 | } | |
1807 | subpixel_order = SubPixelHorizontalRGB; | |
e35755fa | 1808 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1809 | rdev->mode_info.coherent_mode_property, |
1810 | 1); | |
1811 | if (ASIC_IS_AVIVO(rdev)) { | |
e35755fa | 1812 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1813 | rdev->mode_info.underscan_property, |
1814 | UNDERSCAN_OFF); | |
e35755fa | 1815 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1816 | rdev->mode_info.underscan_hborder_property, |
1817 | 0); | |
e35755fa | 1818 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1819 | rdev->mode_info.underscan_vborder_property, |
1820 | 0); | |
1821 | } | |
1822 | connector->interlace_allowed = true; | |
1823 | /* in theory with a DP to VGA converter... */ | |
c49948f4 | 1824 | connector->doublescan_allowed = false; |
eac4dff6 AD |
1825 | break; |
1826 | case DRM_MODE_CONNECTOR_eDP: | |
1827 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1828 | if (!radeon_dig_connector) | |
1829 | goto failed; | |
1830 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1831 | radeon_connector->con_priv = radeon_dig_connector; | |
85faca85 | 1832 | drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type); |
eac4dff6 AD |
1833 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); |
1834 | if (i2c_bus->valid) { | |
1835 | /* add DP i2c bus */ | |
1836 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1837 | if (!radeon_dig_connector->dp_i2c_bus) | |
1838 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1839 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1840 | if (!radeon_connector->ddc_bus) | |
1841 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1842 | } | |
e35755fa | 1843 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1844 | dev->mode_config.scaling_mode_property, |
1845 | DRM_MODE_SCALE_FULLSCREEN); | |
1846 | subpixel_order = SubPixelHorizontalRGB; | |
1847 | connector->interlace_allowed = false; | |
1848 | connector->doublescan_allowed = false; | |
1849 | break; | |
1850 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1851 | case DRM_MODE_CONNECTOR_Composite: | |
1852 | case DRM_MODE_CONNECTOR_9PinDIN: | |
1853 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); | |
1854 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1855 | radeon_connector->dac_load_detect = true; | |
e35755fa | 1856 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1857 | rdev->mode_info.load_detect_property, |
1858 | 1); | |
e35755fa | 1859 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1860 | rdev->mode_info.tv_std_property, |
1861 | radeon_atombios_get_tv_info(rdev)); | |
1862 | /* no HPD on analog connectors */ | |
1863 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1864 | connector->interlace_allowed = false; | |
1865 | connector->doublescan_allowed = false; | |
1866 | break; | |
1867 | case DRM_MODE_CONNECTOR_LVDS: | |
1868 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1869 | if (!radeon_dig_connector) | |
1870 | goto failed; | |
1871 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1872 | radeon_connector->con_priv = radeon_dig_connector; | |
1873 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
1874 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); | |
1875 | if (i2c_bus->valid) { | |
1876 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1877 | if (!radeon_connector->ddc_bus) | |
1878 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1879 | } | |
e35755fa | 1880 | drm_object_attach_property(&radeon_connector->base.base, |
eac4dff6 AD |
1881 | dev->mode_config.scaling_mode_property, |
1882 | DRM_MODE_SCALE_FULLSCREEN); | |
1883 | subpixel_order = SubPixelHorizontalRGB; | |
1884 | connector->interlace_allowed = false; | |
1885 | connector->doublescan_allowed = false; | |
1886 | break; | |
771fe6b9 | 1887 | } |
771fe6b9 JG |
1888 | } |
1889 | ||
2581afcc | 1890 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
14a039bc L |
1891 | if (i2c_bus->valid) { |
1892 | connector->polled = DRM_CONNECTOR_POLL_CONNECT | | |
1893 | DRM_CONNECTOR_POLL_DISCONNECT; | |
1894 | } | |
eb1f8e4f DA |
1895 | } else |
1896 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
1897 | ||
771fe6b9 JG |
1898 | connector->display_info.subpixel_order = subpixel_order; |
1899 | drm_sysfs_connector_add(connector); | |
1900 | return; | |
1901 | ||
1902 | failed: | |
771fe6b9 JG |
1903 | drm_connector_cleanup(connector); |
1904 | kfree(connector); | |
1905 | } | |
1906 | ||
1907 | void | |
1908 | radeon_add_legacy_connector(struct drm_device *dev, | |
1909 | uint32_t connector_id, | |
1910 | uint32_t supported_device, | |
1911 | int connector_type, | |
b75fad06 | 1912 | struct radeon_i2c_bus_rec *i2c_bus, |
eed45b30 AD |
1913 | uint16_t connector_object_id, |
1914 | struct radeon_hpd *hpd) | |
771fe6b9 | 1915 | { |
445282db | 1916 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1917 | struct drm_connector *connector; |
1918 | struct radeon_connector *radeon_connector; | |
1919 | uint32_t subpixel_order = SubPixelNone; | |
1920 | ||
4ce001ab | 1921 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1922 | return; |
1923 | ||
cf4c12f9 AD |
1924 | /* if the user selected tv=0 don't try and add the connector */ |
1925 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1926 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1927 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1928 | (radeon_tv == 0)) | |
1929 | return; | |
1930 | ||
771fe6b9 JG |
1931 | /* see if we already added it */ |
1932 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1933 | radeon_connector = to_radeon_connector(connector); | |
1934 | if (radeon_connector->connector_id == connector_id) { | |
1935 | radeon_connector->devices |= supported_device; | |
1936 | return; | |
1937 | } | |
1938 | } | |
1939 | ||
1940 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1941 | if (!radeon_connector) | |
1942 | return; | |
1943 | ||
1944 | connector = &radeon_connector->base; | |
1945 | ||
1946 | radeon_connector->connector_id = connector_id; | |
1947 | radeon_connector->devices = supported_device; | |
b75fad06 | 1948 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1949 | radeon_connector->hpd = *hpd; |
bc1c4dc3 | 1950 | |
771fe6b9 JG |
1951 | switch (connector_type) { |
1952 | case DRM_MODE_CONNECTOR_VGA: | |
1953 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1954 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1955 | if (i2c_bus->valid) { |
f376b94f | 1956 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1957 | if (!radeon_connector->ddc_bus) |
a70882aa | 1958 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1959 | } |
35e4b7af | 1960 | radeon_connector->dac_load_detect = true; |
e35755fa | 1961 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
1962 | rdev->mode_info.load_detect_property, |
1963 | 1); | |
2581afcc AD |
1964 | /* no HPD on analog connectors */ |
1965 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1966 | connector->interlace_allowed = true; |
1967 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1968 | break; |
1969 | case DRM_MODE_CONNECTOR_DVIA: | |
1970 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1971 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1972 | if (i2c_bus->valid) { |
f376b94f | 1973 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1974 | if (!radeon_connector->ddc_bus) |
a70882aa | 1975 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1976 | } |
35e4b7af | 1977 | radeon_connector->dac_load_detect = true; |
e35755fa | 1978 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
1979 | rdev->mode_info.load_detect_property, |
1980 | 1); | |
2581afcc AD |
1981 | /* no HPD on analog connectors */ |
1982 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1983 | connector->interlace_allowed = true; |
1984 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1985 | break; |
1986 | case DRM_MODE_CONNECTOR_DVII: | |
1987 | case DRM_MODE_CONNECTOR_DVID: | |
1988 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1989 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1990 | if (i2c_bus->valid) { |
f376b94f | 1991 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1992 | if (!radeon_connector->ddc_bus) |
a70882aa | 1993 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
68b3adb4 AD |
1994 | } |
1995 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
35e4b7af | 1996 | radeon_connector->dac_load_detect = true; |
e35755fa | 1997 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
1998 | rdev->mode_info.load_detect_property, |
1999 | 1); | |
771fe6b9 JG |
2000 | } |
2001 | subpixel_order = SubPixelHorizontalRGB; | |
c49948f4 AD |
2002 | connector->interlace_allowed = true; |
2003 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
2004 | connector->doublescan_allowed = true; | |
2005 | else | |
2006 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
2007 | break; |
2008 | case DRM_MODE_CONNECTOR_SVIDEO: | |
2009 | case DRM_MODE_CONNECTOR_Composite: | |
2010 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
2011 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
2012 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
2013 | radeon_connector->dac_load_detect = true; | |
2014 | /* RS400,RC410,RS480 chipset seems to report a lot | |
2015 | * of false positive on load detect, we haven't yet | |
2016 | * found a way to make load detect reliable on those | |
2017 | * chipset, thus just disable it for TV. | |
2018 | */ | |
2019 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) | |
2020 | radeon_connector->dac_load_detect = false; | |
e35755fa | 2021 | drm_object_attach_property(&radeon_connector->base.base, |
cf4c12f9 AD |
2022 | rdev->mode_info.load_detect_property, |
2023 | radeon_connector->dac_load_detect); | |
e35755fa | 2024 | drm_object_attach_property(&radeon_connector->base.base, |
cf4c12f9 AD |
2025 | rdev->mode_info.tv_std_property, |
2026 | radeon_combios_get_tv_info(rdev)); | |
2027 | /* no HPD on analog connectors */ | |
2028 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
2029 | connector->interlace_allowed = false; |
2030 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
2031 | break; |
2032 | case DRM_MODE_CONNECTOR_LVDS: | |
2033 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 2034 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 2035 | if (i2c_bus->valid) { |
f376b94f | 2036 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 2037 | if (!radeon_connector->ddc_bus) |
a70882aa | 2038 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 2039 | } |
e35755fa | 2040 | drm_object_attach_property(&radeon_connector->base.base, |
445282db DA |
2041 | dev->mode_config.scaling_mode_property, |
2042 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 | 2043 | subpixel_order = SubPixelHorizontalRGB; |
c49948f4 AD |
2044 | connector->interlace_allowed = false; |
2045 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
2046 | break; |
2047 | } | |
2048 | ||
2581afcc | 2049 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
14a039bc L |
2050 | if (i2c_bus->valid) { |
2051 | connector->polled = DRM_CONNECTOR_POLL_CONNECT | | |
2052 | DRM_CONNECTOR_POLL_DISCONNECT; | |
2053 | } | |
eb1f8e4f DA |
2054 | } else |
2055 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
14a039bc | 2056 | |
771fe6b9 JG |
2057 | connector->display_info.subpixel_order = subpixel_order; |
2058 | drm_sysfs_connector_add(connector); | |
771fe6b9 | 2059 | } |