MIPS: Actually decode JALX in `__compute_return_epc_for_insn'
authorMaciej W. Rozycki <macro@imgtec.com>
Thu, 15 Jun 2017 23:06:19 +0000 (00:06 +0100)
committerWilly Tarreau <w@1wt.eu>
Wed, 1 Nov 2017 21:12:44 +0000 (22:12 +0100)
commit6aa23d16b4dab21974ac5fcf46ac75a888006bc7
treeacb32b76bacb0107d6a2e356cd3be486fe29e04a
parenta2555cd3e61b44f4f451989bd21299c546ff635c
MIPS: Actually decode JALX in `__compute_return_epc_for_insn'

commit a9db101b735a9d49295326ae41f610f6da62b08c upstream.

Complement commit fb6883e5809c ("MIPS: microMIPS: Support handling of
delay slots.") and actually decode the regular MIPS JALX major
instruction opcode, the handling of which has been added with the said
commit for EPC calculation in `__compute_return_epc_for_insn'.

Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.")
Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # 3.9+
Patchwork: https://patchwork.linux-mips.org/patch/16394/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Willy Tarreau <w@1wt.eu>
arch/mips/kernel/branch.c