drm/r100/kms: Emit cache flush to the end of command buffer. (v2)
authorPauli Nieminen <suokkos@gmail.com>
Thu, 4 Feb 2010 17:20:53 +0000 (19:20 +0200)
committerDave Airlie <airlied@redhat.com>
Fri, 5 Feb 2010 01:45:10 +0000 (11:45 +1000)
commit9e5b2af75abc67c13005c706cf95bbbb78f7fddc
tree8f8d93c115ad986486e7aab702700c2e263ff8bb
parent062b389c8704e539e234cfd67c7e034a514f50bf
drm/r100/kms: Emit cache flush to the end of command buffer. (v2)

Cache flush is required in case CPU is accessing rendered data.

This fixes glean/readPixSanity test case and random rendering
errors in sauerbraten and warzone2100.

v2 Fix comment ordering in r100_fence_ring_emit and remove extra
   defines added in first version.

Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/r100.c