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[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / ssb / main.c

diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index e05ba6eefc7e7d148fe94db458e2055bf342b9dc..21df968f96174fe7176dac2793e7413b1f13b6bb 100644 (file)
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -3,7 +3,7 @@
  * Subsystem core
  *
  * Copyright 2005, Broadcom Corporation
- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
  *
  * Licensed under the GNU/GPL. See COPYING for details.
  */
@@ -1117,23 +1117,22 @@ static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
 {
        u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
 
-       /* The REJECT bit changed position in TMSLOW between
-        * Backplane revisions. */
+       /* The REJECT bit seems to be different for Backplane rev 2.3 */
        switch (rev) {
        case SSB_IDLOW_SSBREV_22:
-               return SSB_TMSLOW_REJECT_22;
+       case SSB_IDLOW_SSBREV_24:
+       case SSB_IDLOW_SSBREV_26:
+               return SSB_TMSLOW_REJECT;
        case SSB_IDLOW_SSBREV_23:
                return SSB_TMSLOW_REJECT_23;
-       case SSB_IDLOW_SSBREV_24:     /* TODO - find the proper REJECT bits */
-       case SSB_IDLOW_SSBREV_25:     /* same here */
-       case SSB_IDLOW_SSBREV_26:     /* same here */
+       case SSB_IDLOW_SSBREV_25:     /* TODO - find the proper REJECT bit */
        case SSB_IDLOW_SSBREV_27:     /* same here */
-               return SSB_TMSLOW_REJECT_23;    /* this is a guess */
+               return SSB_TMSLOW_REJECT;       /* this is a guess */
        default:
                printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
                WARN_ON(1);
        }
-       return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
+       return (SSB_TMSLOW_REJECT | SSB_TMSLOW_REJECT_23);
 }
 
 int ssb_device_is_enabled(struct ssb_device *dev)
@@ -1309,20 +1308,20 @@ EXPORT_SYMBOL(ssb_bus_may_powerdown);
 
 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
 {
-       struct ssb_chipcommon *cc;
        int err;
        enum ssb_clkmode mode;
 
        err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
        if (err)
                goto error;
-       cc = &bus->chipco;
-       mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
-       ssb_chipco_set_clockmode(cc, mode);
 
 #ifdef CONFIG_SSB_DEBUG
        bus->powered_up = 1;
 #endif
+
+       mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
+       ssb_chipco_set_clockmode(&bus->chipco, mode);
+
        return 0;
 error:
        ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
@@ -1330,6 +1329,37 @@ error:
 }
 EXPORT_SYMBOL(ssb_bus_powerup);
 
+static void ssb_broadcast_value(struct ssb_device *dev,
+                               u32 address, u32 data)
+{
+#ifdef CONFIG_SSB_DRIVER_PCICORE
+       /* This is used for both, PCI and ChipCommon core, so be careful. */
+       BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
+       BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
+#endif
+
+       ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address);
+       ssb_read32(dev, SSB_CHIPCO_BCAST_ADDR); /* flush */
+       ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data);
+       ssb_read32(dev, SSB_CHIPCO_BCAST_DATA); /* flush */
+}
+
+void ssb_commit_settings(struct ssb_bus *bus)
+{
+       struct ssb_device *dev;
+
+#ifdef CONFIG_SSB_DRIVER_PCICORE
+       dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
+#else
+       dev = bus->chipco.dev;
+#endif
+       if (WARN_ON(!dev))
+               return;
+       /* This forces an update of the cached registers. */
+       ssb_broadcast_value(dev, 0xFD8, 0);
+}
+EXPORT_SYMBOL(ssb_commit_settings);
+
 u32 ssb_admatch_base(u32 adm)
 {
        u32 base = 0;