import OT_8063_20170412 mali driver

[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / gpu / mt8127 / mali / mali / common / mali_gp.c

diff --git a/drivers/misc/mediatek/gpu/mt8127/mali/mali/common/mali_gp.c b/drivers/misc/mediatek/gpu/mt8127/mali/mali/common/mali_gp.c
index 0572fded0ee3991b360f854516bac9ec43016ef1..acc1d8e5bc155329cbbf356dc9fe8cf52769791f 100644 (file)
--- a/drivers/misc/mediatek/gpu/mt8127/mali/mali/common/mali_gp.c
+++ b/drivers/misc/mediatek/gpu/mt8127/mali/mali/common/mali_gp.c
@@ -1,7 +1,7 @@
 /*
  * This confidential and proprietary software may be used only as
  * authorised by a licensing agreement from ARM Limited
- * (C) COPYRIGHT 2011-2013 ARM Limited
+ * (C) COPYRIGHT 2011-2015 ARM Limited
  * ALL RIGHTS RESERVED
  * The entire notice above must be reproduced on all authorised
  * copies and copies may only be made to the extent permitted
@@ -25,9 +25,9 @@ static struct mali_gp_core *mali_global_gp_core = NULL;
 static void mali_gp_irq_probe_trigger(void *data);
 static _mali_osk_errcode_t mali_gp_irq_probe_ack(void *data);
 
-struct mali_gp_core *mali_gp_create(const _mali_osk_resource_t * resource, struct mali_group *group)
+struct mali_gp_core *mali_gp_create(const _mali_osk_resource_t *resource, struct mali_group *group)
 {
-       struct mali_gp_core* core = NULL;
+       struct mali_gp_core *core = NULL;
 
        MALI_DEBUG_ASSERT(NULL == mali_global_gp_core);
        MALI_DEBUG_PRINT(2, ("Mali GP: Creating Mali GP core: %s\n", resource->description));
@@ -44,12 +44,12 @@ struct mali_gp_core *mali_gp_create(const _mali_osk_resource_t * resource, struc
                                if (_MALI_OSK_ERR_OK == ret) {
                                        /* Setup IRQ handlers (which will do IRQ probing if needed) */
                                        core->irq = _mali_osk_irq_init(resource->irq,
-                                                                      mali_group_upper_half_gp,
-                                                                      group,
-                                                                      mali_gp_irq_probe_trigger,
-                                                                      mali_gp_irq_probe_ack,
-                                                                      core,
-                                                                      resource->description);
+                                                                      mali_group_upper_half_gp,
+                                                                      group,
+                                                                      mali_gp_irq_probe_trigger,
+                                                                      mali_gp_irq_probe_ack,
+                                                                      core,
+                                                                      resource->description);
                                        if (NULL != core->irq) {
                                                MALI_DEBUG_PRINT(4, ("Mali GP: set global gp core from 0x%08X to 0x%08X\n", mali_global_gp_core, core));
                                                mali_global_gp_core = core;
@@ -101,13 +101,13 @@ _mali_osk_errcode_t mali_gp_stop_bus_wait(struct mali_gp_core *core)
        mali_gp_stop_bus(core);
 
        /* Wait for bus to be stopped */
-       for (i = 0; i < MALI_REG_POLL_COUNT_FAST; i++) {
+       for (i = 0; i < MALI_REG_POLL_COUNT_SLOW; i++) {
                if (mali_hw_core_register_read(&core->hw_core, MALIGP2_REG_ADDR_MGMT_STATUS) & MALIGP2_REG_VAL_STATUS_BUS_STOPPED) {
                        break;
                }
        }
 
-       if (MALI_REG_POLL_COUNT_FAST == i) {
+       if (MALI_REG_POLL_COUNT_SLOW == i) {
                MALI_PRINT_ERROR(("Mali GP: Failed to stop bus on %s\n", core->hw_core.description));
                return _MALI_OSK_ERR_FAULT;
        }
@@ -116,7 +116,7 @@ _mali_osk_errcode_t mali_gp_stop_bus_wait(struct mali_gp_core *core)
 
 void mali_gp_hard_reset(struct mali_gp_core *core)
 {
-       const u32 reset_wait_target_register = MALIGP2_REG_ADDR_MGMT_WRITE_BOUND_LOW;
+       const u32 reset_wait_target_register = MALIGP2_REG_ADDR_MGMT_PERF_CNT_0_LIMIT;
        const u32 reset_invalid_value = 0xC0FFE000;
        const u32 reset_check_value = 0xC01A0000;
        const u32 reset_default_value = 0;
@@ -175,7 +175,7 @@ _mali_osk_errcode_t mali_gp_reset_wait(struct mali_gp_core *core)
 
        if (i == MALI_REG_POLL_COUNT_FAST) {
                MALI_PRINT_ERROR(("Mali GP: Failed to reset core %s, rawstat: 0x%08x\n",
-                                 core->hw_core.description, rawstat));
+                                 core->hw_core.description, rawstat));
                return _MALI_OSK_ERR_FAULT;
        }
 
@@ -229,8 +229,26 @@ void mali_gp_job_start(struct mali_gp_core *core, struct mali_gp_job *job)
        /* Barrier to make sure the previous register write is finished */
        _mali_osk_write_mem_barrier();
 
-       /* This is the command that starts the core. */
+       /* This is the command that starts the core.
+        *
+        * Don't actually run the job if PROFILING_SKIP_PP_JOBS are set, just
+        * force core to assert the completion interrupt.
+        */
+#if !defined(PROFILING_SKIP_GP_JOBS)
        mali_hw_core_register_write_relaxed(&core->hw_core, MALIGP2_REG_ADDR_MGMT_CMD, startcmd);
+#else
+       {
+               u32 bits = 0;
+
+               if (mali_gp_job_has_vs_job(job))
+                       bits = MALIGP2_REG_VAL_IRQ_VS_END_CMD_LST;
+               if (mali_gp_job_has_plbu_job(job))
+                       bits |= MALIGP2_REG_VAL_IRQ_PLBU_END_CMD_LST;
+
+               mali_hw_core_register_write_relaxed(&core->hw_core,
+                                                   MALIGP2_REG_ADDR_MGMT_INT_RAWSTAT, bits);
+       }
+#endif
 
        /* Barrier to make sure the previous register write is finished */
        _mali_osk_write_mem_barrier();
@@ -278,7 +296,7 @@ static void mali_gp_irq_probe_trigger(void *data)
        struct mali_gp_core *core = (struct mali_gp_core *)data;
 
        mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_MASK, MALIGP2_REG_VAL_IRQ_MASK_USED);
-       mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_RAWSTAT, MALIGP2_REG_VAL_CMD_FORCE_HANG);
+       mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_RAWSTAT, MALIGP2_REG_VAL_IRQ_AXI_BUS_ERROR);
        _mali_osk_mem_barrier();
 }
 
@@ -288,8 +306,8 @@ static _mali_osk_errcode_t mali_gp_irq_probe_ack(void *data)
        u32 irq_readout;
 
        irq_readout = mali_hw_core_register_read(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_STAT);
-       if (MALIGP2_REG_VAL_IRQ_FORCE_HANG & irq_readout) {
-               mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_CLEAR, MALIGP2_REG_VAL_IRQ_FORCE_HANG);
+       if (MALIGP2_REG_VAL_IRQ_AXI_BUS_ERROR & irq_readout) {
+               mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_CLEAR, MALIGP2_REG_VAL_IRQ_AXI_BUS_ERROR);
                _mali_osk_mem_barrier();
                return _MALI_OSK_ERR_OK;
        }
@@ -309,7 +327,7 @@ u32 mali_gp_dump_state(struct mali_gp_core *core, char *buf, u32 size)
 }
 #endif
 
-void mali_gp_update_performance_counters(struct mali_gp_core *core, struct mali_gp_job *job, mali_bool suspend)
+void mali_gp_update_performance_counters(struct mali_gp_core *core, struct mali_gp_job *job)
 {
        u32 val0 = 0;
        u32 val1 = 0;
@@ -322,6 +340,7 @@ void mali_gp_update_performance_counters(struct mali_gp_core *core, struct mali_
 
 #if defined(CONFIG_MALI400_PROFILING)
                _mali_osk_profiling_report_hw_counter(COUNTER_VP_0_C0, val0);
+               _mali_osk_profiling_record_global_counters(COUNTER_VP_0_C0, val0);
 #endif
 
        }
@@ -332,6 +351,7 @@ void mali_gp_update_performance_counters(struct mali_gp_core *core, struct mali_
 
 #if defined(CONFIG_MALI400_PROFILING)
                _mali_osk_profiling_report_hw_counter(COUNTER_VP_0_C1, val1);
+               _mali_osk_profiling_record_global_counters(COUNTER_VP_0_C1, val1);
 #endif
        }
 }