mali mess

[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / gpu / ged / src / ged_profile_dvfs.c

diff --git a/drivers/misc/mediatek/gpu/ged/src/ged_profile_dvfs.c b/drivers/misc/mediatek/gpu/ged/src/ged_profile_dvfs.c
index daeffe6e58ef06ffb980387875b64c52c2b3c37b..76697d8356dd40f95aa9b15bfb3c91b517d9cf07 100644 (file)
--- a/drivers/misc/mediatek/gpu/ged/src/ged_profile_dvfs.c
+++ b/drivers/misc/mediatek/gpu/ged/src/ged_profile_dvfs.c
@@ -13,7 +13,7 @@ GED_ERROR ged_profile_dvfs_init(void)
     mutex_init(&gsMutex);
 
 #if 0
-    ghLogBuf = ged_log_buf_alloc(320, 64, GED_LOG_BUF_TYPE_QUEUEBUFFER_AUTO_INCREASE, NULL, "profile_dvfs");
+    ghLogBuf = ged_log_buf_alloc(320, 64 * 320, GED_LOG_BUF_TYPE_QUEUEBUFFER_AUTO_INCREASE, NULL, "profile_dvfs");
 #endif
 
     return GED_OK;
@@ -25,9 +25,9 @@ GED_ERROR ged_profile_dvfs_enable(void)
 
     mutex_lock(&gsMutex);
 
-    if (NULL == ghLogBuf)
+    if (0 == ghLogBuf)
     {
-        ghLogBuf = ged_log_buf_alloc(320, 64, GED_LOG_BUF_TYPE_QUEUEBUFFER_AUTO_INCREASE, NULL, "profile_dvfs");
+        ghLogBuf = ged_log_buf_alloc(320, 64 * 320, GED_LOG_BUF_TYPE_QUEUEBUFFER_AUTO_INCREASE, NULL, "profile_dvfs");
     }
 
     ret = ghLogBuf ? GED_OK : GED_ERROR_FAIL;
@@ -41,10 +41,10 @@ void ged_profile_dvfs_disable(void)
 {
     mutex_lock(&gsMutex);
 
-    if (NULL != ghLogBuf)
+    if (0 != ghLogBuf)
     {
         ged_log_buf_free(ghLogBuf);
-        ghLogBuf = NULL;
+        ghLogBuf = 0;
     }
 
     mutex_unlock(&gsMutex);
@@ -87,7 +87,7 @@ void ged_profile_dvfs_record_freq_volt(unsigned int ui32Frequency, unsigned int
        unsigned long long t;
        unsigned long nanosec_rem;
 
-       t = cpu_clock(smp_processor_id());
+       t = ged_get_time();
        nanosec_rem = do_div(t, 1000000000) / 1000;
 
         ged_log_buf_print(ghLogBuf, "%5lu.%06lu,freq_volt,%u,%u", (unsigned long) t, nanosec_rem, ui32Frequency, ui32Voltage);
@@ -105,7 +105,7 @@ void ged_profile_dvfs_record_temp(int i32Temp)
        unsigned long long t;
        unsigned long nanosec_rem;
 
-       t = cpu_clock(smp_processor_id());
+       t = ged_get_time();
        nanosec_rem = do_div(t, 1000000000) / 1000;
 
         ged_log_buf_print(ghLogBuf, "%5lu.%06lu,temp,%d", (unsigned long) t, nanosec_rem, i32Temp);
@@ -124,7 +124,7 @@ void ged_profile_dvfs_record_thermal_limit(unsigned int ui32FreqLimit)
        unsigned long long t;
        unsigned long nanosec_rem;
 
-       t = cpu_clock(smp_processor_id());
+       t = ged_get_time();
        nanosec_rem = do_div(t, 1000000000) / 1000;
 
         ged_log_buf_print(ghLogBuf, "%5lu.%06lu,thermal_limit,%u", (unsigned long) t, nanosec_rem, ui32FreqLimit);
@@ -142,7 +142,7 @@ void ged_profile_dvfs_record_gpu_loading(unsigned int ui32GpuLoading)
        unsigned long long t;
        unsigned long nanosec_rem;
 
-       t = cpu_clock(smp_processor_id());
+       t = ged_get_time();
        nanosec_rem = do_div(t, 1000000000) / 1000;
 
         ged_log_buf_print(ghLogBuf, "%5lu.%06lu,gpu_load,%u", (unsigned long) t, nanosec_rem, ui32GpuLoading);
@@ -161,7 +161,7 @@ void ged_profile_dvfs_record_clock_on(void)
        unsigned long long t;
        unsigned long nanosec_rem;
 
-       t = cpu_clock(smp_processor_id());
+       t = ged_get_time();
        nanosec_rem = do_div(t, 1000000000) / 1000;
 
         ged_log_buf_print(ghLogBuf, "%5lu.%06lu,gpu_clock,1", (unsigned long) t, nanosec_rem);
@@ -180,7 +180,7 @@ void ged_profile_dvfs_record_clock_off(void)
        unsigned long long t;
        unsigned long nanosec_rem;
 
-       t = cpu_clock(smp_processor_id());
+       t = ged_get_time();
        nanosec_rem = do_div(t, 1000000000) / 1000;
 
         ged_log_buf_print(ghLogBuf, "%5lu.%06lu,gpu_clock,0", (unsigned long) t, nanosec_rem);
@@ -188,3 +188,44 @@ void ged_profile_dvfs_record_clock_off(void)
 
     mutex_unlock(&gsMutex);
 }
+
+void ged_profile_dvfs_record_SW_vsync(unsigned long ulTimeStamp, long lPhase, unsigned long ul3DFenceDoneTime)
+{
+    mutex_lock(&gsMutex);
+
+    if (ghLogBuf && gbAllowRecord)
+    {
+       /* copy & modify from ./kernel/printk.c */
+       unsigned long long t;
+       unsigned long nanosec_rem;
+
+       t = ged_get_time();
+       nanosec_rem = do_div(t, 1000000000) / 1000;
+
+        ged_log_buf_print(ghLogBuf, "%5lu.%06lu,SW_vsync,%lu,%ld,%lu", (unsigned long) t, nanosec_rem, ulTimeStamp, lPhase, ul3DFenceDoneTime);
+    }
+
+    mutex_unlock(&gsMutex);
+}
+
+void ged_profile_dvfs_record_policy(
+    long lFreq, unsigned int ui32GpuLoading, long lPreT1, unsigned long ulPreFreq, long t0, unsigned long ulCurFreq, long t1, long lPhase)
+{
+    mutex_lock(&gsMutex);
+
+    if (ghLogBuf && gbAllowRecord)
+    {
+       /* copy & modify from ./kernel/printk.c */
+       unsigned long long t;
+       unsigned long nanosec_rem;
+
+       t = ged_get_time();
+       nanosec_rem = do_div(t, 1000000000) / 1000;
+
+        ged_log_buf_print(ghLogBuf, "%5lu.%06lu,Freq=%ld,Load=%u,PreT1=%ld,PreF=%lu,t0=%ld,CurF=%lu,t1=%ld,phase=%ld", (unsigned long) t, nanosec_rem, lFreq, ui32GpuLoading, lPreT1, ulPreFreq, t0, ulCurFreq, t1, lPhase);
+    }
+
+    mutex_unlock(&gsMutex);
+
+}
+