[PATCH] Update email address for Kumar

[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / ppc / platforms / 83xx / mpc834x_sys.h

diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h
index a2f6e49d71512946ca5e89e2b7d7ca80fec0f8de..2e514d316fb85c3f651bd001d95923483390bd8d 100644 (file)
--- a/arch/ppc/platforms/83xx/mpc834x_sys.h
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.h
@@ -3,7 +3,7 @@
  *
  * MPC834X SYS common board definitions
  *
- * Maintainer: Kumar Gala <kumar.gala@freescale.com>
+ * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  *
  * Copyright 2005 Freescale Semiconductor, Inc.
  *
@@ -19,14 +19,13 @@
 
 #include <linux/config.h>
 #include <linux/init.h>
-#include <linux/seq_file.h>
 #include <syslib/ppc83xx_setup.h>
 #include <asm/ppcboot.h>
 
 #define VIRT_IMMRBAR           ((uint)0xfe000000)
 
 #define BCSR_PHYS_ADDR         ((uint)0xf8000000)
-#define BCSR_SIZE              ((uint)(32 * 1024))
+#define BCSR_SIZE              ((uint)(128 * 1024))
 
 #define BCSR_MISC_REG2_OFF     0x07
 #define BCSR_MISC_REG2_PORESET 0x01
@@ -34,23 +33,25 @@
 #define BCSR_MISC_REG3_OFF     0x08
 #define BCSR_MISC_REG3_CNFLOCK 0x80
 
-#ifdef CONFIG_PCI
-/* PCI interrupt controller */
-#define PIRQA        MPC83xx_IRQ_IRQ4
-#define PIRQB        MPC83xx_IRQ_IRQ5
-#define PIRQC        MPC83xx_IRQ_IRQ6
-#define PIRQD        MPC83xx_IRQ_IRQ7
-
-#define MPC834x_SYS_PCI1_LOWER_IO        0x00000000
-#define MPC834x_SYS_PCI1_UPPER_IO        0x00ffffff
-
-#define MPC834x_SYS_PCI1_LOWER_MEM       0x80000000
-#define MPC834x_SYS_PCI1_UPPER_MEM       0x9fffffff
-
-#define MPC834x_SYS_PCI1_IO_BASE         0xe2000000
-#define MPC834x_SYS_PCI1_MEM_OFFSET      0x00000000
-
-#define MPC834x_SYS_PCI1_IO_SIZE         0x01000000
-#endif /* CONFIG_PCI */
+#define PIRQA  MPC83xx_IRQ_EXT4
+#define PIRQB  MPC83xx_IRQ_EXT5
+#define PIRQC  MPC83xx_IRQ_EXT6
+#define PIRQD  MPC83xx_IRQ_EXT7
+
+#define MPC83xx_PCI1_LOWER_IO  0x00000000
+#define MPC83xx_PCI1_UPPER_IO  0x00ffffff
+#define MPC83xx_PCI1_LOWER_MEM 0x80000000
+#define MPC83xx_PCI1_UPPER_MEM 0x9fffffff
+#define MPC83xx_PCI1_IO_BASE   0xe2000000
+#define MPC83xx_PCI1_MEM_OFFSET        0x00000000
+#define MPC83xx_PCI1_IO_SIZE   0x01000000
+
+#define MPC83xx_PCI2_LOWER_IO  0x00000000
+#define MPC83xx_PCI2_UPPER_IO  0x00ffffff
+#define MPC83xx_PCI2_LOWER_MEM 0xa0000000
+#define MPC83xx_PCI2_UPPER_MEM 0xbfffffff
+#define MPC83xx_PCI2_IO_BASE   0xe3000000
+#define MPC83xx_PCI2_MEM_OFFSET        0x00000000
+#define MPC83xx_PCI2_IO_SIZE   0x01000000
 
 #endif                /* __MACH_MPC83XX_SYS_H__ */