import PULS_20160108

[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm64 / kernel / irq.c

diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
index ecb3354292ed2af479aa7d3df33c1d3100dfdd4e..71465538427ace8616b57060430c00050320d97e 100644 (file)
--- a/arch/arm64/kernel/irq.c
+++ b/arch/arm64/kernel/irq.c
@@ -29,6 +29,7 @@
 #include <linux/seq_file.h>
 #include <linux/ratelimit.h>
 
+#include <linux/mt_sched_mon.h>
 unsigned long irq_err_count;
 
 int arch_show_interrupts(struct seq_file *p, int prec)
@@ -40,6 +41,10 @@ int arch_show_interrupts(struct seq_file *p, int prec)
        return 0;
 }
 
+#ifdef CONFIG_MTK_SCHED_TRACERS
+#include <trace/events/mtk_events.h>
+#endif
+
 /*
  * handle_IRQ handles all hardware IRQ's.  Decoded IRQs should
  * not come via this function.  Instead, they should provide their
@@ -49,8 +54,17 @@ int arch_show_interrupts(struct seq_file *p, int prec)
 void handle_IRQ(unsigned int irq, struct pt_regs *regs)
 {
        struct pt_regs *old_regs = set_irq_regs(regs);
+#ifdef CONFIG_MTK_SCHED_TRACERS
+    struct irq_desc *desc;
+#endif
 
        irq_enter();
+    mt_trace_ISR_start(irq);
+#ifdef CONFIG_MTK_SCHED_TRACERS
+    desc = irq_to_desc(irq);
+    trace_irq_entry(irq,
+            (desc && desc->action && desc->action->name) ? desc->action->name : "-");
+#endif
 
        /*
         * Some hardware gives randomly wrong interrupts.  Rather
@@ -62,7 +76,10 @@ void handle_IRQ(unsigned int irq, struct pt_regs *regs)
        } else {
                generic_handle_irq(irq);
        }
-
+#ifdef CONFIG_MTK_SCHED_TRACERS
+    trace_irq_exit(irq);
+#endif
+    mt_trace_ISR_end(irq);
        irq_exit();
        set_irq_regs(old_regs);
 }
@@ -81,3 +98,64 @@ void __init init_IRQ(void)
        if (!handle_arch_irq)
                panic("No interrupt controller found.");
 }
+
+#ifdef CONFIG_HOTPLUG_CPU
+static bool migrate_one_irq(struct irq_desc *desc)
+{
+       struct irq_data *d = irq_desc_get_irq_data(desc);
+       const struct cpumask *affinity = d->affinity;
+       struct irq_chip *c;
+       bool ret = false;
+
+       /*
+        * If this is a per-CPU interrupt, or the affinity does not
+        * include this CPU, then we have nothing to do.
+        */
+       if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
+               return false;
+
+       if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
+               affinity = cpu_online_mask;
+               ret = true;
+       }
+
+       c = irq_data_get_irq_chip(d);
+       if (!c->irq_set_affinity)
+               pr_debug("IRQ%u: unable to set affinity\n", d->irq);
+       else if (c->irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK && ret)
+               cpumask_copy(d->affinity, affinity);
+
+       return ret;
+}
+
+/*
+ * The current CPU has been marked offline.  Migrate IRQs off this CPU.
+ * If the affinity settings do not allow other CPUs, force them onto any
+ * available CPU.
+ *
+ * Note: we must iterate over all IRQs, whether they have an attached
+ * action structure or not, as we need to get chained interrupts too.
+ */
+void migrate_irqs(void)
+{
+       unsigned int i;
+       struct irq_desc *desc;
+       unsigned long flags;
+
+       local_irq_save(flags);
+
+       for_each_irq_desc(i, desc) {
+               bool affinity_broken;
+
+               raw_spin_lock(&desc->lock);
+               affinity_broken = migrate_one_irq(desc);
+               raw_spin_unlock(&desc->lock);
+
+               if (affinity_broken)
+                       pr_warn_ratelimited("IRQ%u no longer affine to CPU%u\n",
+                                           i, smp_processor_id());
+       }
+
+       local_irq_restore(flags);
+}
+#endif /* CONFIG_HOTPLUG_CPU */