+#else
+ /* restore VFP registers and state */
+ asm volatile (
+ "LDC p11, cr0, [%0],#32*4\n"
+ //"VFPFMRX \tmp, MVFR0\n"
+ "MRC p10, 7, %1, cr7, cr0, 0\n"
+ "and %1, %1, %6\n"
+ "cmp %1, #2\n"
+ "ldceql p11, cr0, [%0],#32*4\n"
+ "addne %0, %0, #32*4\n"
+ "ldmia %0, {%2, %3, %4, %5}\n"
+ //"VFPFMXR FPSCR, %3\n"
+ "MCR p10, 7, %3, cr1, cr0, 0"
+ : "+r"(vfpstate), "+r"(temp), "+r"(fpexc), "+r"(fpscr), "+r"(fpinst), "+r"(fpinst2)
+ : "r" (MVFR0_A_SIMD_MASK)
+ : "cc"
+ );
+#endif
+