import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mm / proc-v7-3level.S
index 363027e811d6f5c803d7616c318d4aeab7bfb3e9..b45d73fbe547630db79cadd77ed49080326bc12d 100644 (file)
@@ -56,6 +56,14 @@ ENTRY(cpu_v7_switch_mm)
        mov     pc, lr
 ENDPROC(cpu_v7_switch_mm)
 
+#ifdef __ARMEB__
+#define rl r3
+#define rh r2
+#else
+#define rl r2
+#define rh r3
+#endif
+
 /*
  * cpu_v7_set_pte_ext(ptep, pte)
  *
@@ -65,16 +73,20 @@ ENDPROC(cpu_v7_switch_mm)
  */
 ENTRY(cpu_v7_set_pte_ext)
 #ifdef CONFIG_MMU
-       tst     r2, #L_PTE_VALID
+       tst     rl, #L_PTE_VALID
        beq     1f
-       tst     r3, #1 << (57 - 32)             @ L_PTE_NONE
-       bicne   r2, #L_PTE_VALID
+       tst     rh, #1 << (57 - 32)             @ L_PTE_NONE
+       bicne   rl, #L_PTE_VALID
        bne     1f
-       tst     r3, #1 << (55 - 32)             @ L_PTE_DIRTY
-       orreq   r2, #L_PTE_RDONLY
+       tst     rh, #1 << (55 - 32)             @ L_PTE_DIRTY
+       orreq   rl, #L_PTE_RDONLY
 1:     strd    r2, r3, [r0]
-       ALT_SMP(mov     pc, lr)
+       ALT_SMP(W(nop))
+#ifdef CONFIG_ARM_ERRATA_824069
+       ALT_UP (mcr     p15, 0, r0, c7, c14, 1)         @ flush_pte
+#else
        ALT_UP (mcr     p15, 0, r0, c7, c10, 1)         @ flush_pte
+#endif
 #endif
        mov     pc, lr
 ENDPROC(cpu_v7_set_pte_ext)