Merge branches 'audit', 'delay', 'fixes', 'misc' and 'sta2x11' into for-linus

[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mm / mmu.c

diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index cf4528d5177448fb79cb5dc6689c873c2dbddb4a..4c2d0451e84af1c2a0347a6fe462dd2e3306db3e 100644 (file)
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -16,13 +16,13 @@
 #include <linux/memblock.h>
 #include <linux/fs.h>
 #include <linux/vmalloc.h>
+#include <linux/sizes.h>
 
 #include <asm/cp15.h>
 #include <asm/cputype.h>
 #include <asm/sections.h>
 #include <asm/cachetype.h>
 #include <asm/setup.h>
-#include <asm/sizes.h>
 #include <asm/smp_plat.h>
 #include <asm/tlb.h>
 #include <asm/highmem.h>
@@ -421,12 +421,6 @@ static void __init build_mem_type_table(void)
        cp = &cache_policies[cachepolicy];
        vecs_pgprot = kern_pgprot = user_pgprot = cp->pte;
 
-       /*
-        * Only use write-through for non-SMP systems
-        */
-       if (!is_smp() && cpu_arch >= CPU_ARCH_ARMv5 && cachepolicy > CPOLICY_WRITETHROUGH)
-               vecs_pgprot = cache_policies[CPOLICY_WRITETHROUGH].pte;
-
        /*
         * Enable CPU-specific coherency if supported.
         * (Only available on XSC3 at the moment.)