import PULS_20160108

[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / include / asm / outercache.h

diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h
index 12f71a19042253bdd107e78bff70235bb970b75b..ffa26b5e67f1d04cbbe50959f7dd097830d82159 100644 (file)
--- a/arch/arm/include/asm/outercache.h
+++ b/arch/arm/include/asm/outercache.h
@@ -28,6 +28,7 @@ struct outer_cache_fns {
        void (*clean_range)(unsigned long, unsigned long);
        void (*flush_range)(unsigned long, unsigned long);
        void (*flush_all)(void);
+       void (*clean_all)(void);
        void (*inv_all)(void);
        void (*disable)(void);
 #ifdef CONFIG_OUTER_CACHE_SYNC
@@ -37,10 +38,10 @@ struct outer_cache_fns {
        void (*resume)(void);
 };
 
-#ifdef CONFIG_OUTER_CACHE
-
 extern struct outer_cache_fns outer_cache;
 
+#ifdef CONFIG_OUTER_CACHE
+
 static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
 {
        if (outer_cache.inv_range)
@@ -56,7 +57,11 @@ static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
        if (outer_cache.flush_range)
                outer_cache.flush_range(start, end);
 }
-
+static inline void outer_clean_all(void)
+{
+       if (outer_cache.clean_all)
+               outer_cache.clean_all();
+}
 static inline void outer_flush_all(void)
 {
        if (outer_cache.flush_all)
@@ -89,6 +94,8 @@ static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
 { }
 static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
 { }
+static inline void outer_clean_all(void)
+{ }
 static inline void outer_flush_all(void) { }
 static inline void outer_inv_all(void) { }
 static inline void outer_disable(void) { }