2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #ifdef CONFIG_MTK_XHCI
34 #include <asm/uaccess.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/platform_device.h>
37 #include <linux/xhci/xhci-mtk-scheduler.h>
38 #include <linux/xhci/xhci-mtk-power.h>
39 #include <linux/xhci/xhci-mtk.h>
41 #ifdef CONFIG_USBIF_COMPLIANCE
42 #include <linux/proc_fs.h>
43 #include <asm/uaccess.h>
44 #include <linux/seq_file.h>
45 #include <linux/kobject.h>
46 #include <linux/miscdevice.h>
48 static struct miscdevice mu3h_uevent_device
= {
49 .minor
= MISC_DYNAMIC_MINOR
,
50 .name
= "usbif_u3h_uevent",
56 #define DRIVER_AUTHOR "Sarah Sharp"
57 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
59 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
60 static int link_quirk
;
61 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
62 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
64 #ifdef CONFIG_USBIF_COMPLIANCE
65 int usbif_u3h_send_event(char* event
)
68 char *envp
[] = {udev_event
, NULL
};
71 snprintf(udev_event
, 128, "USBIF_EVENT=%s",event
);
72 printk("usbif_u3h_send_event - sending event - %s in %s\n", udev_event
, kobject_get_path(&mu3h_uevent_device
.this_device
->kobj
, GFP_KERNEL
));
73 ret
= kobject_uevent_env(&mu3h_uevent_device
.this_device
->kobj
, KOBJ_CHANGE
, envp
);
75 printk("usbif_u3h_send_event sending failed with ret = %d, \n", ret
);
81 /* TODO: copied from ehci-hcd.c - can this be refactored? */
83 * xhci_handshake - spin reading hc until handshake completes or fails
84 * @ptr: address of hc register to be read
85 * @mask: bits to look at in result of read
86 * @done: value of those bits when handshake succeeds
87 * @usec: timeout in microseconds
89 * Returns negative errno, or zero on success
91 * Success happens when the "mask" bits have the specified value (hardware
92 * handshake done). There are two failure modes: "usec" have passed (major
93 * hardware flakeout), or the register reads as all-ones (hardware removed).
95 int xhci_handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
96 u32 mask
, u32 done
, int usec
)
101 result
= xhci_readl(xhci
, ptr
);
102 if (result
== ~(u32
)0) /* card removed */
114 * Disable interrupts and begin the xHCI halting process.
116 void xhci_quiesce(struct xhci_hcd
*xhci
)
123 halted
= xhci_readl(xhci
, &xhci
->op_regs
->status
) & STS_HALT
;
127 cmd
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
129 xhci_writel(xhci
, cmd
, &xhci
->op_regs
->command
);
133 * Force HC into halt state.
135 * Disable any IRQs and clear the run/stop bit.
136 * HC will complete any current and actively pipelined transactions, and
137 * should halt within 16 ms of the run/stop bit being cleared.
138 * Read HC Halted bit in the status register to see when the HC is finished.
140 int xhci_halt(struct xhci_hcd
*xhci
)
143 xhci_dbg(xhci
, "// Halt the HC\n");
146 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
147 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
149 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
150 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
152 xhci_warn(xhci
, "Host not halted after %u microseconds.\n",
158 * Set the run bit and wait for the host to be running.
160 static int xhci_start(struct xhci_hcd
*xhci
)
165 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
167 xhci_dbg(xhci
, "// Turn on HC, cmd = 0x%x.\n",
169 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
172 * Wait for the HCHalted Status bit to be 0 to indicate the host is
175 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
176 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
177 if (ret
== -ETIMEDOUT
)
178 xhci_err(xhci
, "Host took too long to start, "
179 "waited %u microseconds.\n",
182 xhci
->xhc_state
&= ~(XHCI_STATE_HALTED
| XHCI_STATE_DYING
);
190 * This resets pipelines, timers, counters, state machines, etc.
191 * Transactions will be terminated immediately, and operational registers
192 * will be set to their defaults.
194 int xhci_reset(struct xhci_hcd
*xhci
)
200 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
201 if ((state
& STS_HALT
) == 0) {
202 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
206 xhci_dbg(xhci
, "// Reset the HC\n");
207 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
208 command
|= CMD_RESET
;
209 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
211 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->command
,
212 CMD_RESET
, 0, 10 * 1000 * 1000);
216 xhci_dbg(xhci
, "Wait for controller to be ready for doorbell rings\n");
218 * xHCI cannot write to any doorbells or operational registers other
219 * than status until the "Controller Not Ready" flag is cleared.
221 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
222 STS_CNR
, 0, 10 * 1000 * 1000);
224 for (i
= 0; i
< 2; ++i
) {
225 xhci
->bus_state
[i
].port_c_suspend
= 0;
226 xhci
->bus_state
[i
].suspended_ports
= 0;
227 xhci
->bus_state
[i
].resuming_ports
= 0;
234 static int xhci_free_msi(struct xhci_hcd
*xhci
)
238 if (!xhci
->msix_entries
)
241 for (i
= 0; i
< xhci
->msix_count
; i
++)
242 if (xhci
->msix_entries
[i
].vector
)
243 free_irq(xhci
->msix_entries
[i
].vector
,
251 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
254 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
256 ret
= pci_enable_msi(pdev
);
258 xhci_dbg(xhci
, "failed to allocate MSI entry\n");
262 ret
= request_irq(pdev
->irq
, (irq_handler_t
)xhci_msi_irq
,
263 0, "xhci_hcd", xhci_to_hcd(xhci
));
265 xhci_dbg(xhci
, "disable MSI interrupt\n");
266 pci_disable_msi(pdev
);
274 * free all IRQs request
276 static void xhci_free_irq(struct xhci_hcd
*xhci
)
278 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
281 /* return if using legacy interrupt */
282 if (xhci_to_hcd(xhci
)->irq
> 0)
285 ret
= xhci_free_msi(xhci
);
289 free_irq(pdev
->irq
, xhci_to_hcd(xhci
));
297 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
300 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
301 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
304 * calculate number of msi-x vectors supported.
305 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
306 * with max number of interrupters based on the xhci HCSPARAMS1.
307 * - num_online_cpus: maximum msi-x vectors per CPUs core.
308 * Add additional 1 vector to ensure always available interrupt.
310 xhci
->msix_count
= min(num_online_cpus() + 1,
311 HCS_MAX_INTRS(xhci
->hcs_params1
));
314 kmalloc((sizeof(struct msix_entry
))*xhci
->msix_count
,
316 if (!xhci
->msix_entries
) {
317 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
321 for (i
= 0; i
< xhci
->msix_count
; i
++) {
322 xhci
->msix_entries
[i
].entry
= i
;
323 xhci
->msix_entries
[i
].vector
= 0;
326 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
328 xhci_dbg(xhci
, "Failed to enable MSI-X\n");
332 for (i
= 0; i
< xhci
->msix_count
; i
++) {
333 ret
= request_irq(xhci
->msix_entries
[i
].vector
,
334 (irq_handler_t
)xhci_msi_irq
,
335 0, "xhci_hcd", xhci_to_hcd(xhci
));
340 hcd
->msix_enabled
= 1;
344 xhci_dbg(xhci
, "disable MSI-X interrupt\n");
346 pci_disable_msix(pdev
);
348 kfree(xhci
->msix_entries
);
349 xhci
->msix_entries
= NULL
;
353 /* Free any IRQs and disable MSI-X */
354 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
356 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
357 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
359 if (xhci
->quirks
& XHCI_PLAT
)
364 if (xhci
->msix_entries
) {
365 pci_disable_msix(pdev
);
366 kfree(xhci
->msix_entries
);
367 xhci
->msix_entries
= NULL
;
369 pci_disable_msi(pdev
);
372 hcd
->msix_enabled
= 0;
376 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
380 if (xhci
->msix_entries
) {
381 for (i
= 0; i
< xhci
->msix_count
; i
++)
382 synchronize_irq(xhci
->msix_entries
[i
].vector
);
386 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
388 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
389 struct pci_dev
*pdev
;
392 /* The xhci platform device has set up IRQs through usb_add_hcd. */
393 if (xhci
->quirks
& XHCI_PLAT
)
396 pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
398 * Some Fresco Logic host controllers advertise MSI, but fail to
399 * generate interrupts. Don't even try to enable MSI.
401 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
404 /* unregister the legacy interrupt */
406 free_irq(hcd
->irq
, hcd
);
409 ret
= xhci_setup_msix(xhci
);
411 /* fall back to msi*/
412 ret
= xhci_setup_msi(xhci
);
415 /* hcd->irq is 0, we have MSI */
419 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
424 /* fall back to legacy interrupt*/
425 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
426 hcd
->irq_descr
, hcd
);
428 xhci_err(xhci
, "request interrupt %d failed\n",
432 hcd
->irq
= pdev
->irq
;
438 static inline int xhci_try_enable_msi(struct usb_hcd
*hcd
)
443 static inline void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
447 static inline void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
453 static void compliance_mode_recovery(unsigned long arg
)
455 struct xhci_hcd
*xhci
;
460 xhci
= (struct xhci_hcd
*)arg
;
462 for (i
= 0; i
< xhci
->num_usb3_ports
; i
++) {
463 temp
= xhci_readl(xhci
, xhci
->usb3_ports
[i
]);
464 if ((temp
& PORT_PLS_MASK
) == USB_SS_PORT_LS_COMP_MOD
) {
466 * Compliance Mode Detected. Letting USB Core
467 * handle the Warm Reset
469 xhci_dbg(xhci
, "Compliance mode detected->port %d\n",
471 xhci_dbg(xhci
, "Attempting compliance mode recovery\n");
472 hcd
= xhci
->shared_hcd
;
474 if (hcd
->state
== HC_STATE_SUSPENDED
)
475 usb_hcd_resume_root_hub(hcd
);
477 usb_hcd_poll_rh_status(hcd
);
481 if (xhci
->port_status_u0
!= ((1 << xhci
->num_usb3_ports
)-1))
482 mod_timer(&xhci
->comp_mode_recovery_timer
,
483 jiffies
+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
487 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
488 * that causes ports behind that hardware to enter compliance mode sometimes.
489 * The quirk creates a timer that polls every 2 seconds the link state of
490 * each host controller's port and recovers it by issuing a Warm reset
491 * if Compliance mode is detected, otherwise the port will become "dead" (no
492 * device connections or disconnections will be detected anymore). Becasue no
493 * status event is generated when entering compliance mode (per xhci spec),
494 * this quirk is needed on systems that have the failing hardware installed.
496 static void compliance_mode_recovery_timer_init(struct xhci_hcd
*xhci
)
498 xhci
->port_status_u0
= 0;
499 init_timer(&xhci
->comp_mode_recovery_timer
);
501 xhci
->comp_mode_recovery_timer
.data
= (unsigned long) xhci
;
502 xhci
->comp_mode_recovery_timer
.function
= compliance_mode_recovery
;
503 xhci
->comp_mode_recovery_timer
.expires
= jiffies
+
504 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
);
506 set_timer_slack(&xhci
->comp_mode_recovery_timer
,
507 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
508 add_timer(&xhci
->comp_mode_recovery_timer
);
509 xhci_dbg(xhci
, "Compliance mode recovery timer initialized\n");
513 * This function identifies the systems that have installed the SN65LVPE502CP
514 * USB3.0 re-driver and that need the Compliance Mode Quirk.
516 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
518 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
520 const char *dmi_product_name
, *dmi_sys_vendor
;
522 dmi_product_name
= dmi_get_system_info(DMI_PRODUCT_NAME
);
523 dmi_sys_vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
524 if (!dmi_product_name
|| !dmi_sys_vendor
)
527 if (!(strstr(dmi_sys_vendor
, "Hewlett-Packard")))
530 if (strstr(dmi_product_name
, "Z420") ||
531 strstr(dmi_product_name
, "Z620") ||
532 strstr(dmi_product_name
, "Z820") ||
533 strstr(dmi_product_name
, "Z1 Workstation"))
539 static int xhci_all_ports_seen_u0(struct xhci_hcd
*xhci
)
541 return (xhci
->port_status_u0
== ((1 << xhci
->num_usb3_ports
)-1));
546 * Initialize memory for HCD and xHC (one-time init).
548 * Program the PAGESIZE register, initialize the device context array, create
549 * device contexts (?), set up a command ring segment (or two?), create event
550 * ring (one for now).
552 int xhci_init(struct usb_hcd
*hcd
)
554 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
557 xhci_dbg(xhci
, "xhci_init\n");
558 spin_lock_init(&xhci
->lock
);
559 if (xhci
->hci_version
== 0x95 && link_quirk
) {
560 xhci_dbg(xhci
, "QUIRK: Not clearing Link TRB chain bits.\n");
561 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
563 xhci_dbg(xhci
, "xHCI doesn't need link TRB QUIRK\n");
566 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
567 xhci_dbg(xhci
, "Finished xhci_init\n");
569 /* Initializing Compliance Mode Recovery Data If Needed */
570 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
571 xhci
->quirks
|= XHCI_COMP_MODE_QUIRK
;
572 compliance_mode_recovery_timer_init(xhci
);
578 /*-------------------------------------------------------------------------*/
581 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
582 static void xhci_event_ring_work(unsigned long arg
)
587 struct xhci_hcd
*xhci
= (struct xhci_hcd
*) arg
;
590 xhci_dbg(xhci
, "Poll event ring: %lu\n", jiffies
);
592 spin_lock_irqsave(&xhci
->lock
, flags
);
593 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
594 xhci_dbg(xhci
, "op reg status = 0x%x\n", temp
);
595 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
596 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
597 xhci_dbg(xhci
, "HW died, polling stopped.\n");
598 spin_unlock_irqrestore(&xhci
->lock
, flags
);
602 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
603 xhci_dbg(xhci
, "ir_set 0 pending = 0x%x\n", temp
);
604 xhci_dbg(xhci
, "HC error bitmask = 0x%x\n", xhci
->error_bitmask
);
605 xhci
->error_bitmask
= 0;
606 xhci_dbg(xhci
, "Event ring:\n");
607 xhci_debug_segment(xhci
, xhci
->event_ring
->deq_seg
);
608 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
609 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
610 temp_64
&= ~ERST_PTR_MASK
;
611 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
612 xhci_dbg(xhci
, "Command ring:\n");
613 xhci_debug_segment(xhci
, xhci
->cmd_ring
->deq_seg
);
614 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
615 xhci_dbg_cmd_ptrs(xhci
);
616 for (i
= 0; i
< MAX_HC_SLOTS
; ++i
) {
619 for (j
= 0; j
< 31; ++j
) {
620 xhci_dbg_ep_rings(xhci
, i
, j
, &xhci
->devs
[i
]->eps
[j
]);
623 spin_unlock_irqrestore(&xhci
->lock
, flags
);
626 mod_timer(&xhci
->event_ring_timer
, jiffies
+ POLL_TIMEOUT
* HZ
);
628 xhci_dbg(xhci
, "Quit polling the event ring.\n");
632 static int xhci_run_finished(struct xhci_hcd
*xhci
)
634 if (xhci_start(xhci
)) {
639 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
640 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
642 if (xhci
->quirks
& XHCI_NEC_HOST
)
643 xhci_ring_cmd_db(xhci
);
645 xhci_dbg(xhci
, "Finished xhci_run for USB3 roothub\n");
651 * Start the HC after it was halted.
653 * This function is called by the USB core when the HC driver is added.
654 * Its opposite is xhci_stop().
656 * xhci_init() must be called once before this function can be called.
657 * Reset the HC, enable device slot contexts, program DCBAAP, and
658 * set command ring pointer and event ring pointer.
660 * Setup MSI-X vectors and enable interrupts.
662 int xhci_run(struct usb_hcd
*hcd
)
667 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
669 /* Start the xHCI host controller running only after the USB 2.0 roothub
673 hcd
->uses_new_polling
= 1;
674 if (!usb_hcd_is_primary_hcd(hcd
))
675 return xhci_run_finished(xhci
);
677 xhci_dbg(xhci
, "xhci_run\n");
679 ret
= xhci_try_enable_msi(hcd
);
683 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
684 init_timer(&xhci
->event_ring_timer
);
685 xhci
->event_ring_timer
.data
= (unsigned long) xhci
;
686 xhci
->event_ring_timer
.function
= xhci_event_ring_work
;
687 /* Poll the event ring */
688 xhci
->event_ring_timer
.expires
= jiffies
+ POLL_TIMEOUT
* HZ
;
690 xhci_dbg(xhci
, "Setting event ring polling timer\n");
691 add_timer(&xhci
->event_ring_timer
);
694 xhci_dbg(xhci
, "Command ring memory map follows:\n");
695 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
696 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
697 xhci_dbg_cmd_ptrs(xhci
);
699 xhci_dbg(xhci
, "ERST memory map follows:\n");
700 xhci_dbg_erst(xhci
, &xhci
->erst
);
701 xhci_dbg(xhci
, "Event ring:\n");
702 xhci_debug_ring(xhci
, xhci
->event_ring
);
703 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
704 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
705 temp_64
&= ~ERST_PTR_MASK
;
706 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
708 xhci_dbg(xhci
, "// Set the interrupt modulation register\n");
709 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
710 temp
&= ~ER_IRQ_INTERVAL_MASK
;
712 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_control
);
714 /* Set the HCD state before we enable the irqs */
715 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
717 xhci_dbg(xhci
, "// Enable interrupts, cmd = 0x%x.\n",
719 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
721 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
722 xhci_dbg(xhci
, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
723 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
724 xhci_writel(xhci
, ER_IRQ_ENABLE(temp
),
725 &xhci
->ir_set
->irq_pending
);
726 xhci_print_ir_set(xhci
, 0);
728 if (xhci
->quirks
& XHCI_NEC_HOST
)
729 xhci_queue_vendor_command(xhci
, 0, 0, 0,
730 TRB_TYPE(TRB_NEC_GET_FW
));
732 xhci_dbg(xhci
, "Finished xhci_run for USB2 roothub\n");
736 static void xhci_only_stop_hcd(struct usb_hcd
*hcd
)
738 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
740 spin_lock_irq(&xhci
->lock
);
743 /* The shared_hcd is going to be deallocated shortly (the USB core only
744 * calls this function when allocation fails in usb_add_hcd(), or
745 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
747 xhci
->shared_hcd
= NULL
;
748 spin_unlock_irq(&xhci
->lock
);
754 * This function is called by the USB core when the HC driver is removed.
755 * Its opposite is xhci_run().
757 * Disable device contexts, disable IRQs, and quiesce the HC.
758 * Reset the HC, finish any completed transactions, and cleanup memory.
760 void xhci_stop(struct usb_hcd
*hcd
)
763 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
765 if (!usb_hcd_is_primary_hcd(hcd
)) {
766 xhci_only_stop_hcd(xhci
->shared_hcd
);
770 spin_lock_irq(&xhci
->lock
);
771 /* Make sure the xHC is halted for a USB3 roothub
772 * (xhci_stop() could be called as part of failed init).
776 spin_unlock_irq(&xhci
->lock
);
778 xhci_cleanup_msix(xhci
);
780 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
781 /* Tell the event ring poll function not to reschedule */
783 del_timer_sync(&xhci
->event_ring_timer
);
786 /* Deleting Compliance Mode Recovery Timer */
787 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
788 (!(xhci_all_ports_seen_u0(xhci
)))) {
789 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
790 xhci_dbg(xhci
, "%s: compliance mode recovery timer deleted\n",
793 #ifndef CONFIG_MTK_XHCI
794 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
797 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
798 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
799 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
800 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
801 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
802 &xhci
->ir_set
->irq_pending
);
803 xhci_print_ir_set(xhci
, 0);
805 xhci_dbg(xhci
, "cleaning up memory\n");
806 xhci_mem_cleanup(xhci
);
807 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
808 xhci_readl(xhci
, &xhci
->op_regs
->status
));
812 * Shutdown HC (not bus-specific)
814 * This is called when the machine is rebooting or halting. We assume that the
815 * machine will be powered off, and the HC's internal state will be reset.
816 * Don't bother to free memory.
818 * This will only ever be called with the main usb_hcd (the USB3 roothub).
820 void xhci_shutdown(struct usb_hcd
*hcd
)
822 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
824 if (xhci
->quirks
& XHCI_SPURIOUS_REBOOT
)
825 usb_disable_xhci_ports(to_pci_dev(hcd
->self
.controller
));
827 spin_lock_irq(&xhci
->lock
);
829 spin_unlock_irq(&xhci
->lock
);
831 xhci_cleanup_msix(xhci
);
833 xhci_dbg(xhci
, "xhci_shutdown completed - status = %x\n",
834 xhci_readl(xhci
, &xhci
->op_regs
->status
));
838 static void xhci_save_registers(struct xhci_hcd
*xhci
)
840 xhci
->s3
.command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
841 xhci
->s3
.dev_nt
= xhci_readl(xhci
, &xhci
->op_regs
->dev_notification
);
842 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
843 xhci
->s3
.config_reg
= xhci_readl(xhci
, &xhci
->op_regs
->config_reg
);
844 xhci
->s3
.erst_size
= xhci_readl(xhci
, &xhci
->ir_set
->erst_size
);
845 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
846 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
847 xhci
->s3
.irq_pending
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
848 xhci
->s3
.irq_control
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
851 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
853 xhci_writel(xhci
, xhci
->s3
.command
, &xhci
->op_regs
->command
);
854 xhci_writel(xhci
, xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
855 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
856 xhci_writel(xhci
, xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
857 xhci_writel(xhci
, xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
858 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
859 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
860 xhci_writel(xhci
, xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
861 xhci_writel(xhci
, xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
864 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
868 /* step 2: initialize command ring buffer */
869 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
870 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
871 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
872 xhci
->cmd_ring
->dequeue
) &
873 (u64
) ~CMD_RING_RSVD_BITS
) |
874 xhci
->cmd_ring
->cycle_state
;
875 xhci_dbg(xhci
, "// Setting command ring address to 0x%llx\n",
876 (long unsigned long) val_64
);
877 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
881 * The whole command ring must be cleared to zero when we suspend the host.
883 * The host doesn't save the command ring pointer in the suspend well, so we
884 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
885 * aligned, because of the reserved bits in the command ring dequeue pointer
886 * register. Therefore, we can't just set the dequeue pointer back in the
887 * middle of the ring (TRBs are 16-byte aligned).
889 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
891 struct xhci_ring
*ring
;
892 struct xhci_segment
*seg
;
894 ring
= xhci
->cmd_ring
;
898 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
899 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
900 cpu_to_le32(~TRB_CYCLE
);
902 } while (seg
!= ring
->deq_seg
);
904 /* Reset the software enqueue and dequeue pointers */
905 ring
->deq_seg
= ring
->first_seg
;
906 ring
->dequeue
= ring
->first_seg
->trbs
;
907 ring
->enq_seg
= ring
->deq_seg
;
908 ring
->enqueue
= ring
->dequeue
;
910 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
912 * Ring is now zeroed, so the HW should look for change of ownership
913 * when the cycle bit is set to 1.
915 ring
->cycle_state
= 1;
918 * Reset the hardware dequeue pointer.
919 * Yes, this will need to be re-written after resume, but we're paranoid
920 * and want to make sure the hardware doesn't access bogus memory
921 * because, say, the BIOS or an SMI started the host without changing
922 * the command ring pointers.
924 xhci_set_cmd_ring_deq(xhci
);
928 * Stop HC (not bus-specific)
930 * This is called when the machine transition into S3/S4 mode.
933 int xhci_suspend(struct xhci_hcd
*xhci
)
936 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
939 if (hcd
->state
!= HC_STATE_SUSPENDED
||
940 xhci
->shared_hcd
->state
!= HC_STATE_SUSPENDED
)
943 /* Don't poll the roothubs on bus suspend. */
944 xhci_dbg(xhci
, "%s: stopping port polling.\n", __func__
);
945 clear_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
946 del_timer_sync(&hcd
->rh_timer
);
948 spin_lock_irq(&xhci
->lock
);
949 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
950 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
951 /* step 1: stop endpoint */
952 /* skipped assuming that port suspend has done */
954 /* step 2: clear Run/Stop bit */
955 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
957 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
958 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
959 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
)) {
960 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
961 spin_unlock_irq(&xhci
->lock
);
964 xhci_clear_command_ring(xhci
);
966 /* step 3: save registers */
967 xhci_save_registers(xhci
);
969 /* step 4: set CSS flag */
970 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
972 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
973 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
974 STS_SAVE
, 0, 10 * 1000)) {
975 xhci_warn(xhci
, "WARN: xHC save state timeout\n");
976 spin_unlock_irq(&xhci
->lock
);
979 spin_unlock_irq(&xhci
->lock
);
982 * Deleting Compliance Mode Recovery Timer because the xHCI Host
983 * is about to be suspended.
985 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
986 (!(xhci_all_ports_seen_u0(xhci
)))) {
987 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
988 xhci_dbg(xhci
, "%s: compliance mode recovery timer deleted\n",
992 /* step 5: remove core well power */
993 /* synchronize irq when using MSI-X */
994 xhci_msix_sync_irqs(xhci
);
1000 * start xHC (not bus-specific)
1002 * This is called when the machine transition from S3/S4 mode.
1005 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
1007 u32 command
, temp
= 0, status
;
1008 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
1009 struct usb_hcd
*secondary_hcd
;
1011 bool comp_timer_running
= false;
1013 /* Wait a bit if either of the roothubs need to settle from the
1014 * transition into bus suspend.
1016 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
1017 time_before(jiffies
,
1018 xhci
->bus_state
[1].next_statechange
))
1021 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
1022 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
1024 spin_lock_irq(&xhci
->lock
);
1025 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
1029 /* step 1: restore register */
1030 xhci_restore_registers(xhci
);
1031 /* step 2: initialize command ring buffer */
1032 xhci_set_cmd_ring_deq(xhci
);
1033 /* step 3: restore state and start state*/
1034 /* step 3: set CRS flag */
1035 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1037 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
1038 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
1039 STS_RESTORE
, 0, 10 * 1000)) {
1040 xhci_warn(xhci
, "WARN: xHC restore state timeout\n");
1041 spin_unlock_irq(&xhci
->lock
);
1044 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1047 /* If restore operation fails, re-initialize the HC during resume */
1048 if ((temp
& STS_SRE
) || hibernated
) {
1050 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
1051 !(xhci_all_ports_seen_u0(xhci
))) {
1052 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
1053 xhci_dbg(xhci
, "Compliance Mode Recovery Timer deleted!\n");
1056 /* Let the USB core know _both_ roothubs lost power. */
1057 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
1058 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
1060 xhci_dbg(xhci
, "Stop HCD\n");
1063 spin_unlock_irq(&xhci
->lock
);
1064 xhci_cleanup_msix(xhci
);
1066 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
1067 /* Tell the event ring poll function not to reschedule */
1069 del_timer_sync(&xhci
->event_ring_timer
);
1072 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
1073 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1074 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
1075 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
1076 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
1077 &xhci
->ir_set
->irq_pending
);
1078 xhci_print_ir_set(xhci
, 0);
1080 xhci_dbg(xhci
, "cleaning up memory\n");
1081 xhci_mem_cleanup(xhci
);
1082 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
1083 xhci_readl(xhci
, &xhci
->op_regs
->status
));
1085 /* USB core calls the PCI reinit and start functions twice:
1086 * first with the primary HCD, and then with the secondary HCD.
1087 * If we don't do the same, the host will never be started.
1089 if (!usb_hcd_is_primary_hcd(hcd
))
1090 secondary_hcd
= hcd
;
1092 secondary_hcd
= xhci
->shared_hcd
;
1094 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
1095 retval
= xhci_init(hcd
->primary_hcd
);
1098 comp_timer_running
= true;
1100 xhci_dbg(xhci
, "Start the primary HCD\n");
1101 retval
= xhci_run(hcd
->primary_hcd
);
1103 xhci_dbg(xhci
, "Start the secondary HCD\n");
1104 retval
= xhci_run(secondary_hcd
);
1106 hcd
->state
= HC_STATE_SUSPENDED
;
1107 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
1111 /* step 4: set Run/Stop bit */
1112 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1114 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
1115 xhci_handshake(xhci
, &xhci
->op_regs
->status
, STS_HALT
,
1118 /* step 5: walk topology and initialize portsc,
1119 * portpmsc and portli
1121 /* this is done in bus_resume */
1123 /* step 6: restart each of the previously
1124 * Running endpoints by ringing their doorbells
1127 spin_unlock_irq(&xhci
->lock
);
1131 /* Resume root hubs only when have pending events. */
1132 status
= readl(&xhci
->op_regs
->status
);
1133 if (status
& STS_EINT
) {
1134 usb_hcd_resume_root_hub(hcd
);
1135 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
1140 * If system is subject to the Quirk, Compliance Mode Timer needs to
1141 * be re-initialized Always after a system resume. Ports are subject
1142 * to suffer the Compliance Mode issue again. It doesn't matter if
1143 * ports have entered previously to U0 before system's suspension.
1145 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) && !comp_timer_running
)
1146 compliance_mode_recovery_timer_init(xhci
);
1148 /* Re-enable port polling. */
1149 xhci_dbg(xhci
, "%s: starting port polling.\n", __func__
);
1150 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
1151 usb_hcd_poll_rh_status(hcd
);
1155 #endif /* CONFIG_PM */
1157 /*-------------------------------------------------------------------------*/
1160 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1161 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1162 * value to right shift 1 for the bitmask.
1164 * Index = (epnum * 2) + direction - 1,
1165 * where direction = 0 for OUT, 1 for IN.
1166 * For control endpoints, the IN index is used (OUT index is unused), so
1167 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1169 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
1172 if (usb_endpoint_xfer_control(desc
))
1173 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
1175 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
1176 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
1180 /* Find the flag for this endpoint (for use in the control context). Use the
1181 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1184 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
1186 return 1 << (xhci_get_endpoint_index(desc
) + 1);
1189 /* Find the flag for this endpoint (for use in the control context). Use the
1190 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1193 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
1195 return 1 << (ep_index
+ 1);
1198 /* Compute the last valid endpoint context index. Basically, this is the
1199 * endpoint index plus one. For slot contexts with more than valid endpoint,
1200 * we find the most significant bit set in the added contexts flags.
1201 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1202 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1204 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
1206 return fls(added_ctxs
) - 1;
1209 /* Returns 1 if the arguments are OK;
1210 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1212 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1213 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
1215 struct xhci_hcd
*xhci
;
1216 struct xhci_virt_device
*virt_dev
;
1218 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
1219 printk(KERN_DEBUG
"xHCI %s called with invalid args\n",
1223 if (!udev
->parent
) {
1224 printk(KERN_DEBUG
"xHCI %s called for root hub\n",
1229 xhci
= hcd_to_xhci(hcd
);
1230 if (check_virt_dev
) {
1231 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1232 printk(KERN_DEBUG
"xHCI %s called with unaddressed "
1237 virt_dev
= xhci
->devs
[udev
->slot_id
];
1238 if (virt_dev
->udev
!= udev
) {
1239 printk(KERN_DEBUG
"xHCI %s called with udev and "
1240 "virt_dev does not match\n", func
);
1245 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1251 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1252 struct usb_device
*udev
, struct xhci_command
*command
,
1253 bool ctx_change
, bool must_succeed
);
1256 * Full speed devices may have a max packet size greater than 8 bytes, but the
1257 * USB core doesn't know that until it reads the first 8 bytes of the
1258 * descriptor. If the usb_device's max packet size changes after that point,
1259 * we need to issue an evaluate context command and wait on it.
1261 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1262 unsigned int ep_index
, struct urb
*urb
)
1264 struct xhci_container_ctx
*in_ctx
;
1265 struct xhci_container_ctx
*out_ctx
;
1266 struct xhci_input_control_ctx
*ctrl_ctx
;
1267 struct xhci_ep_ctx
*ep_ctx
;
1268 int max_packet_size
;
1269 int hw_max_packet_size
;
1272 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1273 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1274 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1275 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1276 if (hw_max_packet_size
!= max_packet_size
) {
1277 xhci_dbg(xhci
, "Max Packet Size for ep 0 changed.\n");
1278 xhci_dbg(xhci
, "Max packet size in usb_device = %d\n",
1280 xhci_dbg(xhci
, "Max packet size in xHCI HW = %d\n",
1281 hw_max_packet_size
);
1282 xhci_dbg(xhci
, "Issuing evaluate context command.\n");
1284 /* Set up the modified control endpoint 0 */
1285 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1286 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1287 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1288 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1289 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1290 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1292 /* Set up the input context flags for the command */
1293 /* FIXME: This won't work if a non-default control endpoint
1294 * changes max packet sizes.
1296 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1297 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1298 ctrl_ctx
->drop_flags
= 0;
1300 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
1301 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
1302 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
1303 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
1305 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
1308 /* Clean up the input context for later use by bandwidth
1311 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1317 * non-error returns are a promise to giveback() the urb later
1318 * we drop ownership so next owner (or urb unlink) can get it
1320 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1322 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1323 struct xhci_td
*buffer
;
1324 unsigned long flags
;
1326 unsigned int slot_id
, ep_index
;
1327 struct urb_priv
*urb_priv
;
1330 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1331 true, true, __func__
) <= 0)
1334 slot_id
= urb
->dev
->slot_id
;
1335 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1337 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1338 if (!in_interrupt())
1339 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1344 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1345 size
= urb
->number_of_packets
;
1346 else if (usb_endpoint_is_bulk_out(&urb
->ep
->desc
) &&
1347 urb
->transfer_buffer_length
> 0 &&
1348 urb
->transfer_flags
& URB_ZERO_PACKET
&&
1349 !(urb
->transfer_buffer_length
% usb_endpoint_maxp(&urb
->ep
->desc
)))
1354 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1355 size
* sizeof(struct xhci_td
*), mem_flags
);
1359 buffer
= kzalloc(size
* sizeof(struct xhci_td
), mem_flags
);
1365 for (i
= 0; i
< size
; i
++) {
1366 urb_priv
->td
[i
] = buffer
;
1370 urb_priv
->length
= size
;
1371 urb_priv
->td_cnt
= 0;
1372 urb
->hcpriv
= urb_priv
;
1374 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1375 /* Check to see if the max packet size for the default control
1376 * endpoint changed during FS device enumeration
1378 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1379 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1382 xhci_urb_free_priv(xhci
, urb_priv
);
1388 /* We have a spinlock and interrupts disabled, so we must pass
1389 * atomic context to this function, which may allocate memory.
1391 spin_lock_irqsave(&xhci
->lock
, flags
);
1392 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1394 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1398 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1399 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
1400 spin_lock_irqsave(&xhci
->lock
, flags
);
1401 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1403 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1404 EP_GETTING_STREAMS
) {
1405 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1406 "is transitioning to using streams.\n");
1408 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1409 EP_GETTING_NO_STREAMS
) {
1410 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1411 "is transitioning to "
1412 "not having streams.\n");
1415 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1420 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1421 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
1422 spin_lock_irqsave(&xhci
->lock
, flags
);
1423 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1425 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1429 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1431 spin_lock_irqsave(&xhci
->lock
, flags
);
1432 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1434 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1438 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1443 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
1444 "non-responsive xHCI host.\n",
1445 urb
->ep
->desc
.bEndpointAddress
, urb
);
1448 xhci_urb_free_priv(xhci
, urb_priv
);
1450 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1454 /* Get the right ring for the given URB.
1455 * If the endpoint supports streams, boundary check the URB's stream ID.
1456 * If the endpoint doesn't support streams, return the singular endpoint ring.
1458 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
1461 unsigned int slot_id
;
1462 unsigned int ep_index
;
1463 unsigned int stream_id
;
1464 struct xhci_virt_ep
*ep
;
1466 slot_id
= urb
->dev
->slot_id
;
1467 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1468 stream_id
= urb
->stream_id
;
1469 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1470 /* Common case: no streams */
1471 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
1474 if (stream_id
== 0) {
1476 "WARN: Slot ID %u, ep index %u has streams, "
1477 "but URB has no stream ID.\n",
1482 if (stream_id
< ep
->stream_info
->num_streams
)
1483 return ep
->stream_info
->stream_rings
[stream_id
];
1486 "WARN: Slot ID %u, ep index %u has "
1487 "stream IDs 1 to %u allocated, "
1488 "but stream ID %u is requested.\n",
1490 ep
->stream_info
->num_streams
- 1,
1496 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1497 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1498 * should pick up where it left off in the TD, unless a Set Transfer Ring
1499 * Dequeue Pointer is issued.
1501 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1502 * the ring. Since the ring is a contiguous structure, they can't be physically
1503 * removed. Instead, there are two options:
1505 * 1) If the HC is in the middle of processing the URB to be canceled, we
1506 * simply move the ring's dequeue pointer past those TRBs using the Set
1507 * Transfer Ring Dequeue Pointer command. This will be the common case,
1508 * when drivers timeout on the last submitted URB and attempt to cancel.
1510 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1511 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1512 * HC will need to invalidate the any TRBs it has cached after the stop
1513 * endpoint command, as noted in the xHCI 0.95 errata.
1515 * 3) The TD may have completed by the time the Stop Endpoint Command
1516 * completes, so software needs to handle that case too.
1518 * This function should protect against the TD enqueueing code ringing the
1519 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1520 * It also needs to account for multiple cancellations on happening at the same
1521 * time for the same endpoint.
1523 * Note that this function can be called in any context, or so says
1524 * usb_hcd_unlink_urb()
1526 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1528 unsigned long flags
;
1531 struct xhci_hcd
*xhci
;
1532 struct urb_priv
*urb_priv
;
1534 unsigned int ep_index
;
1535 struct xhci_ring
*ep_ring
;
1536 struct xhci_virt_ep
*ep
;
1538 xhci
= hcd_to_xhci(hcd
);
1539 spin_lock_irqsave(&xhci
->lock
, flags
);
1540 /* Make sure the URB hasn't completed or been unlinked already */
1541 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1542 if (ret
|| !urb
->hcpriv
)
1544 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1545 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1546 xhci_dbg(xhci
, "HW died, freeing TD.\n");
1547 urb_priv
= urb
->hcpriv
;
1548 for (i
= urb_priv
->td_cnt
; i
< urb_priv
->length
; i
++) {
1549 td
= urb_priv
->td
[i
];
1550 if (!list_empty(&td
->td_list
))
1551 list_del_init(&td
->td_list
);
1552 if (!list_empty(&td
->cancelled_td_list
))
1553 list_del_init(&td
->cancelled_td_list
);
1556 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1557 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1558 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1559 xhci_urb_free_priv(xhci
, urb_priv
);
1562 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
1563 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1564 xhci_dbg(xhci
, "Ep 0x%x: URB %p to be canceled on "
1565 "non-responsive xHCI host.\n",
1566 urb
->ep
->desc
.bEndpointAddress
, urb
);
1567 /* Let the stop endpoint command watchdog timer (which set this
1568 * state) finish cleaning up the endpoint TD lists. We must
1569 * have caught it in the middle of dropping a lock and giving
1575 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1576 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
1577 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1583 urb_priv
= urb
->hcpriv
;
1584 i
= urb_priv
->td_cnt
;
1585 if (i
< urb_priv
->length
)
1586 xhci_dbg(xhci
, "Cancel URB %p, dev %s, ep 0x%x, "
1587 "starting at offset 0x%llx\n",
1588 urb
, urb
->dev
->devpath
,
1589 urb
->ep
->desc
.bEndpointAddress
,
1590 (unsigned long long) xhci_trb_virt_to_dma(
1591 urb_priv
->td
[i
]->start_seg
,
1592 urb_priv
->td
[i
]->first_trb
));
1594 for (; i
< urb_priv
->length
; i
++) {
1595 td
= urb_priv
->td
[i
];
1596 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1599 /* Queue a stop endpoint command, but only if this is
1600 * the first cancellation to be handled.
1602 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
1603 ep
->ep_state
|= EP_HALT_PENDING
;
1604 ep
->stop_cmds_pending
++;
1605 ep
->stop_cmd_timer
.expires
= jiffies
+
1606 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1607 add_timer(&ep
->stop_cmd_timer
);
1608 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
, 0);
1609 xhci_ring_cmd_db(xhci
);
1612 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1616 /* Drop an endpoint from a new bandwidth configuration for this device.
1617 * Only one call to this function is allowed per endpoint before
1618 * check_bandwidth() or reset_bandwidth() must be called.
1619 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1620 * add the endpoint to the schedule with possibly new parameters denoted by a
1621 * different endpoint descriptor in usb_host_endpoint.
1622 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1625 * The USB core will not allow URBs to be queued to an endpoint that is being
1626 * disabled, so there's no need for mutual exclusion to protect
1627 * the xhci->devs[slot_id] structure.
1629 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1630 struct usb_host_endpoint
*ep
)
1632 struct xhci_hcd
*xhci
;
1633 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1634 struct xhci_input_control_ctx
*ctrl_ctx
;
1635 struct xhci_slot_ctx
*slot_ctx
;
1636 unsigned int last_ctx
;
1637 unsigned int ep_index
;
1638 struct xhci_ep_ctx
*ep_ctx
;
1640 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1642 #ifdef CONFIG_MTK_XHCI
1643 struct sch_ep
*sch_ep
= NULL
;
1648 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1651 xhci
= hcd_to_xhci(hcd
);
1652 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1655 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1656 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1657 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1658 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1659 __func__
, drop_flag
);
1663 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1664 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1665 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1666 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1667 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1668 /* If the HC already knows the endpoint is disabled,
1669 * or the HCD has noted it is disabled, ignore this request
1671 if (((ep_ctx
->ep_info
& cpu_to_le32(EP_STATE_MASK
)) ==
1672 cpu_to_le32(EP_STATE_DISABLED
)) ||
1673 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1674 xhci_get_endpoint_flag(&ep
->desc
)) {
1675 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1680 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1681 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1683 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1684 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1686 last_ctx
= xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx
->add_flags
));
1687 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1688 /* Update the last valid endpoint context, if we deleted the last one */
1689 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) >
1690 LAST_CTX(last_ctx
)) {
1691 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1692 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1694 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1696 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1698 #ifdef CONFIG_MTK_XHCI
1699 slot_ctx
= xhci_get_slot_ctx(xhci
, xhci
->devs
[udev
->slot_id
]->out_ctx
);
1700 if((slot_ctx
->tt_info
& 0xff) > 0){
1706 if(usb_endpoint_xfer_int(&ep
->desc
)){
1707 ep_type
= USB_EP_INT
;
1709 else if(usb_endpoint_xfer_isoc(&ep
->desc
)){
1710 ep_type
= USB_EP_ISOC
;
1712 else if(usb_endpoint_xfer_bulk(&ep
->desc
)){
1713 ep_type
= USB_EP_BULK
;
1715 sch_ep
= mtk_xhci_scheduler_remove_ep(udev
->speed
, usb_endpoint_dir_in(&ep
->desc
)
1716 , isTT
, ep_type
, (mtk_u32
*)ep
);
1721 xhci_warn(xhci
, "[MTK]Doesn't find ep_sch instance when removing endpoint\n");
1725 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1726 (unsigned int) ep
->desc
.bEndpointAddress
,
1728 (unsigned int) new_drop_flags
,
1729 (unsigned int) new_add_flags
,
1730 (unsigned int) new_slot_info
);
1732 #if defined(CONFIG_MTK_XHCI) && defined(CONFIG_USB_MTK_DUALMODE)
1739 /* Add an endpoint to a new possible bandwidth configuration for this device.
1740 * Only one call to this function is allowed per endpoint before
1741 * check_bandwidth() or reset_bandwidth() must be called.
1742 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1743 * add the endpoint to the schedule with possibly new parameters denoted by a
1744 * different endpoint descriptor in usb_host_endpoint.
1745 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1748 * The USB core will not allow URBs to be queued to an endpoint until the
1749 * configuration or alt setting is installed in the device, so there's no need
1750 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1752 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1753 struct usb_host_endpoint
*ep
)
1755 struct xhci_hcd
*xhci
;
1756 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1757 unsigned int ep_index
;
1758 struct xhci_slot_ctx
*slot_ctx
;
1759 struct xhci_input_control_ctx
*ctrl_ctx
;
1761 unsigned int last_ctx
;
1762 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1763 struct xhci_virt_device
*virt_dev
;
1765 #ifdef CONFIG_MTK_XHCI
1766 struct xhci_ep_ctx
*in_ep_ctx
;
1767 struct sch_ep
*sch_ep
;
1776 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1778 /* So we won't queue a reset ep command for a root hub */
1782 xhci
= hcd_to_xhci(hcd
);
1783 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1786 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1787 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
1788 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1789 /* FIXME when we have to issue an evaluate endpoint command to
1790 * deal with ep0 max packet size changing once we get the
1793 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1794 __func__
, added_ctxs
);
1798 virt_dev
= xhci
->devs
[udev
->slot_id
];
1799 in_ctx
= virt_dev
->in_ctx
;
1800 out_ctx
= virt_dev
->out_ctx
;
1801 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1802 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1804 /* If this endpoint is already in use, and the upper layers are trying
1805 * to add it again without dropping it, reject the addition.
1807 if (virt_dev
->eps
[ep_index
].ring
&&
1808 !(le32_to_cpu(ctrl_ctx
->drop_flags
) &
1809 xhci_get_endpoint_flag(&ep
->desc
))) {
1810 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1811 "without dropping it.\n",
1812 (unsigned int) ep
->desc
.bEndpointAddress
);
1816 /* If the HCD has already noted the endpoint is enabled,
1817 * ignore this request.
1819 if (le32_to_cpu(ctrl_ctx
->add_flags
) &
1820 xhci_get_endpoint_flag(&ep
->desc
)) {
1821 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1827 * Configuration and alternate setting changes must be done in
1828 * process context, not interrupt context (or so documenation
1829 * for usb_set_interface() and usb_set_configuration() claim).
1831 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1832 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1833 __func__
, ep
->desc
.bEndpointAddress
);
1837 #ifdef CONFIG_MTK_XHCI
1838 in_ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1839 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
1841 if((slot_ctx
->tt_info
& 0xff) > 0){
1847 if(usb_endpoint_xfer_int(&ep
->desc
)){
1848 ep_type
= USB_EP_INT
;
1850 else if(usb_endpoint_xfer_isoc(&ep
->desc
)){
1851 ep_type
= USB_EP_ISOC
;
1853 else if(usb_endpoint_xfer_bulk(&ep
->desc
)){
1854 ep_type
= USB_EP_BULK
;
1856 if(udev
->speed
== USB_SPEED_FULL
|| udev
->speed
== USB_SPEED_HIGH
1857 || udev
->speed
== USB_SPEED_LOW
){
1858 maxp
= ep
->desc
.wMaxPacketSize
& 0x7FF;
1859 burst
= ep
->desc
.wMaxPacketSize
>> 11;
1862 else if(udev
->speed
== USB_SPEED_SUPER
){
1863 maxp
= ep
->desc
.wMaxPacketSize
& 0x7FF;
1864 burst
= ep
->ss_ep_comp
.bMaxBurst
;
1865 mult
= ep
->ss_ep_comp
.bmAttributes
& 0x3;
1867 interval
= (1 << ((in_ep_ctx
->ep_info
>> 16) & 0xff));
1868 sch_ep
= kmalloc(sizeof(struct sch_ep
), GFP_KERNEL
);
1869 if(mtk_xhci_scheduler_add_ep(udev
->speed
, usb_endpoint_dir_in(&ep
->desc
),
1870 isTT
, ep_type
, maxp
, interval
, burst
, mult
, (mtk_u32
*)ep
1871 , (mtk_u32
*)in_ep_ctx
, sch_ep
) != SCH_SUCCESS
){
1872 xhci_err(xhci
, "[MTK] not enough bandwidth\n");
1877 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1878 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1880 /* If xhci_endpoint_disable() was called for this endpoint, but the
1881 * xHC hasn't been notified yet through the check_bandwidth() call,
1882 * this re-adds a new state for the endpoint from the new endpoint
1883 * descriptors. We must drop and re-add this endpoint, so we leave the
1886 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1888 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1889 /* Update the last valid endpoint context, if we just added one past */
1890 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) <
1891 LAST_CTX(last_ctx
)) {
1892 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1893 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1895 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1897 /* Store the usb_device pointer for later use */
1900 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1901 (unsigned int) ep
->desc
.bEndpointAddress
,
1903 (unsigned int) new_drop_flags
,
1904 (unsigned int) new_add_flags
,
1905 (unsigned int) new_slot_info
);
1907 #if defined(CONFIG_MTK_XHCI) && defined(CONFIG_USB_MTK_DUALMODE)
1914 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1916 struct xhci_input_control_ctx
*ctrl_ctx
;
1917 struct xhci_ep_ctx
*ep_ctx
;
1918 struct xhci_slot_ctx
*slot_ctx
;
1921 /* When a device's add flag and drop flag are zero, any subsequent
1922 * configure endpoint command will leave that endpoint's state
1923 * untouched. Make sure we don't leave any old state in the input
1924 * endpoint contexts.
1926 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1927 ctrl_ctx
->drop_flags
= 0;
1928 ctrl_ctx
->add_flags
= 0;
1929 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1930 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1931 /* Endpoint 0 is always valid */
1932 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1933 for (i
= 1; i
< 31; ++i
) {
1934 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1935 ep_ctx
->ep_info
= 0;
1936 ep_ctx
->ep_info2
= 0;
1938 ep_ctx
->tx_info
= 0;
1942 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1943 struct usb_device
*udev
, u32
*cmd_status
)
1947 switch (*cmd_status
) {
1949 dev_warn(&udev
->dev
, "Not enough host controller resources "
1950 "for new device state.\n");
1952 /* FIXME: can we allocate more resources for the HC? */
1955 case COMP_2ND_BW_ERR
:
1956 dev_warn(&udev
->dev
, "Not enough bandwidth "
1957 "for new device state.\n");
1959 /* FIXME: can we go back to the old state? */
1962 /* the HCD set up something wrong */
1963 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1965 "and endpoint is not disabled.\n");
1969 dev_warn(&udev
->dev
, "ERROR: Incompatible device for endpoint "
1970 "configure command.\n");
1974 dev_dbg(&udev
->dev
, "Successful Endpoint Configure command\n");
1978 xhci_err(xhci
, "ERROR: unexpected command completion "
1979 "code 0x%x.\n", *cmd_status
);
1986 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1987 struct usb_device
*udev
, u32
*cmd_status
)
1990 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1992 switch (*cmd_status
) {
1994 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1995 "context command.\n");
1999 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
2000 "evaluate context command.\n");
2003 case COMP_CTX_STATE
:
2004 dev_warn(&udev
->dev
, "WARN: invalid context state for "
2005 "evaluate context command.\n");
2006 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
2010 dev_warn(&udev
->dev
, "ERROR: Incompatible device for evaluate "
2011 "context command.\n");
2015 /* Max Exit Latency too large error */
2016 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
2020 dev_dbg(&udev
->dev
, "Successful evaluate context command\n");
2024 xhci_err(xhci
, "ERROR: unexpected command completion "
2025 "code 0x%x.\n", *cmd_status
);
2032 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
2033 struct xhci_container_ctx
*in_ctx
)
2035 struct xhci_input_control_ctx
*ctrl_ctx
;
2036 u32 valid_add_flags
;
2037 u32 valid_drop_flags
;
2039 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2040 /* Ignore the slot flag (bit 0), and the default control endpoint flag
2041 * (bit 1). The default control endpoint is added during the Address
2042 * Device command and is never removed until the slot is disabled.
2044 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
2045 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
2047 /* Use hweight32 to count the number of ones in the add flags, or
2048 * number of endpoints added. Don't count endpoints that are changed
2049 * (both added and dropped).
2051 return hweight32(valid_add_flags
) -
2052 hweight32(valid_add_flags
& valid_drop_flags
);
2055 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
2056 struct xhci_container_ctx
*in_ctx
)
2058 struct xhci_input_control_ctx
*ctrl_ctx
;
2059 u32 valid_add_flags
;
2060 u32 valid_drop_flags
;
2062 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2063 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
2064 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
2066 return hweight32(valid_drop_flags
) -
2067 hweight32(valid_add_flags
& valid_drop_flags
);
2071 * We need to reserve the new number of endpoints before the configure endpoint
2072 * command completes. We can't subtract the dropped endpoints from the number
2073 * of active endpoints until the command completes because we can oversubscribe
2074 * the host in this case:
2076 * - the first configure endpoint command drops more endpoints than it adds
2077 * - a second configure endpoint command that adds more endpoints is queued
2078 * - the first configure endpoint command fails, so the config is unchanged
2079 * - the second command may succeed, even though there isn't enough resources
2081 * Must be called with xhci->lock held.
2083 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
2084 struct xhci_container_ctx
*in_ctx
)
2088 added_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
2089 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
2090 xhci_dbg(xhci
, "Not enough ep ctxs: "
2091 "%u active, need to add %u, limit is %u.\n",
2092 xhci
->num_active_eps
, added_eps
,
2093 xhci
->limit_active_eps
);
2096 xhci
->num_active_eps
+= added_eps
;
2097 xhci_dbg(xhci
, "Adding %u ep ctxs, %u now active.\n", added_eps
,
2098 xhci
->num_active_eps
);
2103 * The configure endpoint was failed by the xHC for some other reason, so we
2104 * need to revert the resources that failed configuration would have used.
2106 * Must be called with xhci->lock held.
2108 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
2109 struct xhci_container_ctx
*in_ctx
)
2113 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
2114 xhci
->num_active_eps
-= num_failed_eps
;
2115 xhci_dbg(xhci
, "Removing %u failed ep ctxs, %u now active.\n",
2117 xhci
->num_active_eps
);
2121 * Now that the command has completed, clean up the active endpoint count by
2122 * subtracting out the endpoints that were dropped (but not changed).
2124 * Must be called with xhci->lock held.
2126 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
2127 struct xhci_container_ctx
*in_ctx
)
2129 u32 num_dropped_eps
;
2131 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, in_ctx
);
2132 xhci
->num_active_eps
-= num_dropped_eps
;
2133 if (num_dropped_eps
)
2134 xhci_dbg(xhci
, "Removing %u dropped ep ctxs, %u now active.\n",
2136 xhci
->num_active_eps
);
2139 static unsigned int xhci_get_block_size(struct usb_device
*udev
)
2141 switch (udev
->speed
) {
2143 case USB_SPEED_FULL
:
2145 case USB_SPEED_HIGH
:
2147 case USB_SPEED_SUPER
:
2149 case USB_SPEED_UNKNOWN
:
2150 case USB_SPEED_WIRELESS
:
2152 /* Should never happen */
2158 xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
2160 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
2162 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
2167 /* If we are changing a LS/FS device under a HS hub,
2168 * make sure (if we are activating a new TT) that the HS bus has enough
2169 * bandwidth for this new TT.
2171 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
2172 struct xhci_virt_device
*virt_dev
,
2175 struct xhci_interval_bw_table
*bw_table
;
2176 struct xhci_tt_bw_info
*tt_info
;
2178 /* Find the bandwidth table for the root port this TT is attached to. */
2179 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
2180 tt_info
= virt_dev
->tt_info
;
2181 /* If this TT already had active endpoints, the bandwidth for this TT
2182 * has already been added. Removing all periodic endpoints (and thus
2183 * making the TT enactive) will only decrease the bandwidth used.
2187 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
2188 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
2192 /* Not sure why we would have no new active endpoints...
2194 * Maybe because of an Evaluate Context change for a hub update or a
2195 * control endpoint 0 max packet size change?
2196 * FIXME: skip the bandwidth calculation in that case.
2201 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
2202 struct xhci_virt_device
*virt_dev
)
2204 unsigned int bw_reserved
;
2206 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
2207 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
2210 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
2211 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
2218 * This algorithm is a very conservative estimate of the worst-case scheduling
2219 * scenario for any one interval. The hardware dynamically schedules the
2220 * packets, so we can't tell which microframe could be the limiting factor in
2221 * the bandwidth scheduling. This only takes into account periodic endpoints.
2223 * Obviously, we can't solve an NP complete problem to find the minimum worst
2224 * case scenario. Instead, we come up with an estimate that is no less than
2225 * the worst case bandwidth used for any one microframe, but may be an
2228 * We walk the requirements for each endpoint by interval, starting with the
2229 * smallest interval, and place packets in the schedule where there is only one
2230 * possible way to schedule packets for that interval. In order to simplify
2231 * this algorithm, we record the largest max packet size for each interval, and
2232 * assume all packets will be that size.
2234 * For interval 0, we obviously must schedule all packets for each interval.
2235 * The bandwidth for interval 0 is just the amount of data to be transmitted
2236 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2237 * the number of packets).
2239 * For interval 1, we have two possible microframes to schedule those packets
2240 * in. For this algorithm, if we can schedule the same number of packets for
2241 * each possible scheduling opportunity (each microframe), we will do so. The
2242 * remaining number of packets will be saved to be transmitted in the gaps in
2243 * the next interval's scheduling sequence.
2245 * As we move those remaining packets to be scheduled with interval 2 packets,
2246 * we have to double the number of remaining packets to transmit. This is
2247 * because the intervals are actually powers of 2, and we would be transmitting
2248 * the previous interval's packets twice in this interval. We also have to be
2249 * sure that when we look at the largest max packet size for this interval, we
2250 * also look at the largest max packet size for the remaining packets and take
2251 * the greater of the two.
2253 * The algorithm continues to evenly distribute packets in each scheduling
2254 * opportunity, and push the remaining packets out, until we get to the last
2255 * interval. Then those packets and their associated overhead are just added
2256 * to the bandwidth used.
2258 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
2259 struct xhci_virt_device
*virt_dev
,
2262 unsigned int bw_reserved
;
2263 unsigned int max_bandwidth
;
2264 unsigned int bw_used
;
2265 unsigned int block_size
;
2266 struct xhci_interval_bw_table
*bw_table
;
2267 unsigned int packet_size
= 0;
2268 unsigned int overhead
= 0;
2269 unsigned int packets_transmitted
= 0;
2270 unsigned int packets_remaining
= 0;
2273 if (virt_dev
->udev
->speed
== USB_SPEED_SUPER
)
2274 return xhci_check_ss_bw(xhci
, virt_dev
);
2276 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2277 max_bandwidth
= HS_BW_LIMIT
;
2278 /* Convert percent of bus BW reserved to blocks reserved */
2279 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
2281 max_bandwidth
= FS_BW_LIMIT
;
2282 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
2285 bw_table
= virt_dev
->bw_table
;
2286 /* We need to translate the max packet size and max ESIT payloads into
2287 * the units the hardware uses.
2289 block_size
= xhci_get_block_size(virt_dev
->udev
);
2291 /* If we are manipulating a LS/FS device under a HS hub, double check
2292 * that the HS bus has enough bandwidth if we are activing a new TT.
2294 if (virt_dev
->tt_info
) {
2295 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2296 virt_dev
->real_port
);
2297 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2298 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
2299 "newly activated TT.\n");
2302 xhci_dbg(xhci
, "Recalculating BW for TT slot %u port %u\n",
2303 virt_dev
->tt_info
->slot_id
,
2304 virt_dev
->tt_info
->ttport
);
2306 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2307 virt_dev
->real_port
);
2310 /* Add in how much bandwidth will be used for interval zero, or the
2311 * rounded max ESIT payload + number of packets * largest overhead.
2313 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
2314 bw_table
->interval_bw
[0].num_packets
*
2315 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
2317 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
2318 unsigned int bw_added
;
2319 unsigned int largest_mps
;
2320 unsigned int interval_overhead
;
2323 * How many packets could we transmit in this interval?
2324 * If packets didn't fit in the previous interval, we will need
2325 * to transmit that many packets twice within this interval.
2327 packets_remaining
= 2 * packets_remaining
+
2328 bw_table
->interval_bw
[i
].num_packets
;
2330 /* Find the largest max packet size of this or the previous
2333 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2336 struct xhci_virt_ep
*virt_ep
;
2337 struct list_head
*ep_entry
;
2339 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2340 virt_ep
= list_entry(ep_entry
,
2341 struct xhci_virt_ep
, bw_endpoint_list
);
2342 /* Convert to blocks, rounding up */
2343 largest_mps
= DIV_ROUND_UP(
2344 virt_ep
->bw_info
.max_packet_size
,
2347 if (largest_mps
> packet_size
)
2348 packet_size
= largest_mps
;
2350 /* Use the larger overhead of this or the previous interval. */
2351 interval_overhead
= xhci_get_largest_overhead(
2352 &bw_table
->interval_bw
[i
]);
2353 if (interval_overhead
> overhead
)
2354 overhead
= interval_overhead
;
2356 /* How many packets can we evenly distribute across
2357 * (1 << (i + 1)) possible scheduling opportunities?
2359 packets_transmitted
= packets_remaining
>> (i
+ 1);
2361 /* Add in the bandwidth used for those scheduled packets */
2362 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2364 /* How many packets do we have remaining to transmit? */
2365 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2367 /* What largest max packet size should those packets have? */
2368 /* If we've transmitted all packets, don't carry over the
2369 * largest packet size.
2371 if (packets_remaining
== 0) {
2374 } else if (packets_transmitted
> 0) {
2375 /* Otherwise if we do have remaining packets, and we've
2376 * scheduled some packets in this interval, take the
2377 * largest max packet size from endpoints with this
2380 packet_size
= largest_mps
;
2381 overhead
= interval_overhead
;
2383 /* Otherwise carry over packet_size and overhead from the last
2384 * time we had a remainder.
2386 bw_used
+= bw_added
;
2387 if (bw_used
> max_bandwidth
) {
2388 xhci_warn(xhci
, "Not enough bandwidth. "
2389 "Proposed: %u, Max: %u\n",
2390 bw_used
, max_bandwidth
);
2395 * Ok, we know we have some packets left over after even-handedly
2396 * scheduling interval 15. We don't know which microframes they will
2397 * fit into, so we over-schedule and say they will be scheduled every
2400 if (packets_remaining
> 0)
2401 bw_used
+= overhead
+ packet_size
;
2403 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2404 unsigned int port_index
= virt_dev
->real_port
- 1;
2406 /* OK, we're manipulating a HS device attached to a
2407 * root port bandwidth domain. Include the number of active TTs
2408 * in the bandwidth used.
2410 bw_used
+= TT_HS_OVERHEAD
*
2411 xhci
->rh_bw
[port_index
].num_active_tts
;
2414 xhci_dbg(xhci
, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2415 "Available: %u " "percent\n",
2416 bw_used
, max_bandwidth
, bw_reserved
,
2417 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2420 bw_used
+= bw_reserved
;
2421 if (bw_used
> max_bandwidth
) {
2422 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2423 bw_used
, max_bandwidth
);
2427 bw_table
->bw_used
= bw_used
;
2431 static bool xhci_is_async_ep(unsigned int ep_type
)
2433 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2434 ep_type
!= ISOC_IN_EP
&&
2435 ep_type
!= INT_IN_EP
);
2438 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2440 return (ep_type
== ISOC_IN_EP
|| ep_type
== INT_IN_EP
);
2443 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2445 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2447 if (ep_bw
->ep_interval
== 0)
2448 return SS_OVERHEAD_BURST
+
2449 (ep_bw
->mult
* ep_bw
->num_packets
*
2450 (SS_OVERHEAD
+ mps
));
2451 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2452 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2453 1 << ep_bw
->ep_interval
);
2457 void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2458 struct xhci_bw_info
*ep_bw
,
2459 struct xhci_interval_bw_table
*bw_table
,
2460 struct usb_device
*udev
,
2461 struct xhci_virt_ep
*virt_ep
,
2462 struct xhci_tt_bw_info
*tt_info
)
2464 struct xhci_interval_bw
*interval_bw
;
2465 int normalized_interval
;
2467 if (xhci_is_async_ep(ep_bw
->type
))
2470 if (udev
->speed
== USB_SPEED_SUPER
) {
2471 if (xhci_is_sync_in_ep(ep_bw
->type
))
2472 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2473 xhci_get_ss_bw_consumed(ep_bw
);
2475 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2476 xhci_get_ss_bw_consumed(ep_bw
);
2480 /* SuperSpeed endpoints never get added to intervals in the table, so
2481 * this check is only valid for HS/FS/LS devices.
2483 if (list_empty(&virt_ep
->bw_endpoint_list
))
2485 /* For LS/FS devices, we need to translate the interval expressed in
2486 * microframes to frames.
2488 if (udev
->speed
== USB_SPEED_HIGH
)
2489 normalized_interval
= ep_bw
->ep_interval
;
2491 normalized_interval
= ep_bw
->ep_interval
- 3;
2493 if (normalized_interval
== 0)
2494 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2495 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2496 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2497 switch (udev
->speed
) {
2499 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2501 case USB_SPEED_FULL
:
2502 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2504 case USB_SPEED_HIGH
:
2505 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2507 case USB_SPEED_SUPER
:
2508 case USB_SPEED_UNKNOWN
:
2509 case USB_SPEED_WIRELESS
:
2510 /* Should never happen because only LS/FS/HS endpoints will get
2511 * added to the endpoint list.
2516 tt_info
->active_eps
-= 1;
2517 list_del_init(&virt_ep
->bw_endpoint_list
);
2520 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2521 struct xhci_bw_info
*ep_bw
,
2522 struct xhci_interval_bw_table
*bw_table
,
2523 struct usb_device
*udev
,
2524 struct xhci_virt_ep
*virt_ep
,
2525 struct xhci_tt_bw_info
*tt_info
)
2527 struct xhci_interval_bw
*interval_bw
;
2528 struct xhci_virt_ep
*smaller_ep
;
2529 int normalized_interval
;
2531 if (xhci_is_async_ep(ep_bw
->type
))
2534 if (udev
->speed
== USB_SPEED_SUPER
) {
2535 if (xhci_is_sync_in_ep(ep_bw
->type
))
2536 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2537 xhci_get_ss_bw_consumed(ep_bw
);
2539 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2540 xhci_get_ss_bw_consumed(ep_bw
);
2544 /* For LS/FS devices, we need to translate the interval expressed in
2545 * microframes to frames.
2547 if (udev
->speed
== USB_SPEED_HIGH
)
2548 normalized_interval
= ep_bw
->ep_interval
;
2550 normalized_interval
= ep_bw
->ep_interval
- 3;
2552 if (normalized_interval
== 0)
2553 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2554 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2555 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2556 switch (udev
->speed
) {
2558 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2560 case USB_SPEED_FULL
:
2561 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2563 case USB_SPEED_HIGH
:
2564 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2566 case USB_SPEED_SUPER
:
2567 case USB_SPEED_UNKNOWN
:
2568 case USB_SPEED_WIRELESS
:
2569 /* Should never happen because only LS/FS/HS endpoints will get
2570 * added to the endpoint list.
2576 tt_info
->active_eps
+= 1;
2577 /* Insert the endpoint into the list, largest max packet size first. */
2578 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2580 if (ep_bw
->max_packet_size
>=
2581 smaller_ep
->bw_info
.max_packet_size
) {
2582 /* Add the new ep before the smaller endpoint */
2583 list_add_tail(&virt_ep
->bw_endpoint_list
,
2584 &smaller_ep
->bw_endpoint_list
);
2588 /* Add the new endpoint at the end of the list. */
2589 list_add_tail(&virt_ep
->bw_endpoint_list
,
2590 &interval_bw
->endpoints
);
2593 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2594 struct xhci_virt_device
*virt_dev
,
2597 struct xhci_root_port_bw_info
*rh_bw_info
;
2598 if (!virt_dev
->tt_info
)
2601 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2602 if (old_active_eps
== 0 &&
2603 virt_dev
->tt_info
->active_eps
!= 0) {
2604 rh_bw_info
->num_active_tts
+= 1;
2605 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2606 } else if (old_active_eps
!= 0 &&
2607 virt_dev
->tt_info
->active_eps
== 0) {
2608 rh_bw_info
->num_active_tts
-= 1;
2609 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2613 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2614 struct xhci_virt_device
*virt_dev
,
2615 struct xhci_container_ctx
*in_ctx
)
2617 struct xhci_bw_info ep_bw_info
[31];
2619 struct xhci_input_control_ctx
*ctrl_ctx
;
2620 int old_active_eps
= 0;
2622 if (virt_dev
->tt_info
)
2623 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2625 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2627 for (i
= 0; i
< 31; i
++) {
2628 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2631 /* Make a copy of the BW info in case we need to revert this */
2632 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2633 sizeof(ep_bw_info
[i
]));
2634 /* Drop the endpoint from the interval table if the endpoint is
2635 * being dropped or changed.
2637 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2638 xhci_drop_ep_from_interval_table(xhci
,
2639 &virt_dev
->eps
[i
].bw_info
,
2645 /* Overwrite the information stored in the endpoints' bw_info */
2646 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2647 for (i
= 0; i
< 31; i
++) {
2648 /* Add any changed or added endpoints to the interval table */
2649 if (EP_IS_ADDED(ctrl_ctx
, i
))
2650 xhci_add_ep_to_interval_table(xhci
,
2651 &virt_dev
->eps
[i
].bw_info
,
2658 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2659 /* Ok, this fits in the bandwidth we have.
2660 * Update the number of active TTs.
2662 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2666 /* We don't have enough bandwidth for this, revert the stored info. */
2667 for (i
= 0; i
< 31; i
++) {
2668 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2671 /* Drop the new copies of any added or changed endpoints from
2672 * the interval table.
2674 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2675 xhci_drop_ep_from_interval_table(xhci
,
2676 &virt_dev
->eps
[i
].bw_info
,
2682 /* Revert the endpoint back to its old information */
2683 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2684 sizeof(ep_bw_info
[i
]));
2685 /* Add any changed or dropped endpoints back into the table */
2686 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2687 xhci_add_ep_to_interval_table(xhci
,
2688 &virt_dev
->eps
[i
].bw_info
,
2698 /* Issue a configure endpoint command or evaluate context command
2699 * and wait for it to finish.
2701 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2702 struct usb_device
*udev
,
2703 struct xhci_command
*command
,
2704 bool ctx_change
, bool must_succeed
)
2708 unsigned long flags
;
2709 struct xhci_container_ctx
*in_ctx
;
2710 struct completion
*cmd_completion
;
2712 struct xhci_virt_device
*virt_dev
;
2713 union xhci_trb
*cmd_trb
;
2715 spin_lock_irqsave(&xhci
->lock
, flags
);
2716 virt_dev
= xhci
->devs
[udev
->slot_id
];
2719 in_ctx
= command
->in_ctx
;
2721 in_ctx
= virt_dev
->in_ctx
;
2723 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2724 xhci_reserve_host_resources(xhci
, in_ctx
)) {
2725 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2726 xhci_warn(xhci
, "Not enough host resources, "
2727 "active endpoint contexts = %u\n",
2728 xhci
->num_active_eps
);
2731 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2732 xhci_reserve_bandwidth(xhci
, virt_dev
, in_ctx
)) {
2733 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2734 xhci_free_host_resources(xhci
, in_ctx
);
2735 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2736 xhci_warn(xhci
, "Not enough bandwidth\n");
2741 cmd_completion
= command
->completion
;
2742 cmd_status
= &command
->status
;
2743 command
->command_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
2744 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
2746 cmd_completion
= &virt_dev
->cmd_completion
;
2747 cmd_status
= &virt_dev
->cmd_status
;
2749 init_completion(cmd_completion
);
2751 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
2753 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
2754 udev
->slot_id
, must_succeed
);
2756 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
2757 udev
->slot_id
, must_succeed
);
2760 list_del(&command
->cmd_list
);
2761 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2762 xhci_free_host_resources(xhci
, in_ctx
);
2763 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2764 xhci_dbg(xhci
, "FIXME allocate a new ring segment\n");
2767 xhci_ring_cmd_db(xhci
);
2768 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2770 /* Wait for the configure endpoint command to complete */
2771 timeleft
= wait_for_completion_interruptible_timeout(
2773 XHCI_CMD_DEFAULT_TIMEOUT
);
2774 if (timeleft
<= 0) {
2775 xhci_warn(xhci
, "%s while waiting for %s command\n",
2776 timeleft
== 0 ? "Timeout" : "Signal",
2778 "configure endpoint" :
2779 "evaluate context");
2780 /* cancel the configure endpoint command */
2781 ret
= xhci_cancel_cmd(xhci
, command
, cmd_trb
);
2788 ret
= xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
2790 ret
= xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
2792 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2793 spin_lock_irqsave(&xhci
->lock
, flags
);
2794 /* If the command failed, remove the reserved resources.
2795 * Otherwise, clean up the estimate to include dropped eps.
2798 xhci_free_host_resources(xhci
, in_ctx
);
2800 xhci_finish_resource_reservation(xhci
, in_ctx
);
2801 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2806 /* Called after one or more calls to xhci_add_endpoint() or
2807 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2808 * to call xhci_reset_bandwidth().
2810 * Since we are in the middle of changing either configuration or
2811 * installing a new alt setting, the USB core won't allow URBs to be
2812 * enqueued for any endpoint on the old config or interface. Nothing
2813 * else should be touching the xhci->devs[slot_id] structure, so we
2814 * don't need to take the xhci->lock for manipulating that.
2816 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2820 struct xhci_hcd
*xhci
;
2821 struct xhci_virt_device
*virt_dev
;
2822 struct xhci_input_control_ctx
*ctrl_ctx
;
2823 struct xhci_slot_ctx
*slot_ctx
;
2825 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2828 xhci
= hcd_to_xhci(hcd
);
2829 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
2832 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2833 virt_dev
= xhci
->devs
[udev
->slot_id
];
2835 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2836 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2837 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2838 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2839 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2841 /* Don't issue the command if there's no endpoints to update. */
2842 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2843 ctrl_ctx
->drop_flags
== 0)
2846 xhci_dbg(xhci
, "New Input Control Context:\n");
2847 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2848 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
2849 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2851 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
2854 /* Callee should call reset_bandwidth() */
2858 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
2859 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
2860 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2862 /* Free any rings that were dropped, but not changed. */
2863 for (i
= 1; i
< 31; ++i
) {
2864 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2865 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1))))
2866 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2868 xhci_zero_in_ctx(xhci
, virt_dev
);
2870 * Install any rings for completely new endpoints or changed endpoints,
2871 * and free or cache any old rings from changed endpoints.
2873 for (i
= 1; i
< 31; ++i
) {
2874 if (!virt_dev
->eps
[i
].new_ring
)
2876 /* Only cache or free the old ring if it exists.
2877 * It may not if this is the first add of an endpoint.
2879 if (virt_dev
->eps
[i
].ring
) {
2880 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2882 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2883 virt_dev
->eps
[i
].new_ring
= NULL
;
2889 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2891 struct xhci_hcd
*xhci
;
2892 struct xhci_virt_device
*virt_dev
;
2895 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2898 xhci
= hcd_to_xhci(hcd
);
2900 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2901 virt_dev
= xhci
->devs
[udev
->slot_id
];
2902 /* Free any rings allocated for added endpoints */
2903 for (i
= 0; i
< 31; ++i
) {
2904 if (virt_dev
->eps
[i
].new_ring
) {
2905 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2906 virt_dev
->eps
[i
].new_ring
= NULL
;
2909 xhci_zero_in_ctx(xhci
, virt_dev
);
2912 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2913 struct xhci_container_ctx
*in_ctx
,
2914 struct xhci_container_ctx
*out_ctx
,
2915 u32 add_flags
, u32 drop_flags
)
2917 struct xhci_input_control_ctx
*ctrl_ctx
;
2918 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2919 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2920 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2921 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2922 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2924 xhci_dbg(xhci
, "Input Context:\n");
2925 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
2928 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2929 unsigned int slot_id
, unsigned int ep_index
,
2930 struct xhci_dequeue_state
*deq_state
)
2932 struct xhci_container_ctx
*in_ctx
;
2933 struct xhci_ep_ctx
*ep_ctx
;
2937 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2938 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2939 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2940 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2941 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2942 deq_state
->new_deq_ptr
);
2944 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2945 "reset ep command\n");
2946 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2947 deq_state
->new_deq_seg
,
2948 deq_state
->new_deq_ptr
);
2951 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2953 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2954 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2955 xhci
->devs
[slot_id
]->out_ctx
, added_ctxs
, added_ctxs
);
2958 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
2959 struct usb_device
*udev
, unsigned int ep_index
)
2961 struct xhci_dequeue_state deq_state
;
2962 struct xhci_virt_ep
*ep
;
2964 xhci_dbg(xhci
, "Cleaning up stalled endpoint ring\n");
2965 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2966 /* We need to move the HW's dequeue pointer past this TD,
2967 * or it will attempt to resend it on the next doorbell ring.
2969 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2970 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
2973 /* HW with the reset endpoint quirk will use the saved dequeue state to
2974 * issue a configure endpoint command later.
2976 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2977 xhci_dbg(xhci
, "Queueing new dequeue state\n");
2978 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2979 ep_index
, ep
->stopped_stream
, &deq_state
);
2981 /* Better hope no one uses the input context between now and the
2982 * reset endpoint completion!
2983 * XXX: No idea how this hardware will react when stream rings
2986 xhci_dbg(xhci
, "Setting up input context for "
2987 "configure endpoint command\n");
2988 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2989 ep_index
, &deq_state
);
2993 /* Deal with stalled endpoints. The core should have sent the control message
2994 * to clear the halt condition. However, we need to make the xHCI hardware
2995 * reset its sequence number, since a device will expect a sequence number of
2996 * zero after the halt condition is cleared.
2997 * Context: in_interrupt
2999 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
3000 struct usb_host_endpoint
*ep
)
3002 struct xhci_hcd
*xhci
;
3003 struct usb_device
*udev
;
3004 unsigned int ep_index
;
3005 unsigned long flags
;
3007 struct xhci_virt_ep
*virt_ep
;
3009 xhci
= hcd_to_xhci(hcd
);
3010 udev
= (struct usb_device
*) ep
->hcpriv
;
3011 /* Called with a root hub endpoint (or an endpoint that wasn't added
3012 * with xhci_add_endpoint()
3016 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
3017 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
3018 if (!virt_ep
->stopped_td
) {
3019 xhci_dbg(xhci
, "Endpoint 0x%x not halted, refusing to reset.\n",
3020 ep
->desc
.bEndpointAddress
);
3023 if (usb_endpoint_xfer_control(&ep
->desc
)) {
3024 xhci_dbg(xhci
, "Control endpoint stall already handled.\n");
3028 xhci_dbg(xhci
, "Queueing reset endpoint command\n");
3029 spin_lock_irqsave(&xhci
->lock
, flags
);
3030 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
3032 * Can't change the ring dequeue pointer until it's transitioned to the
3033 * stopped state, which is only upon a successful reset endpoint
3034 * command. Better hope that last command worked!
3037 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
3038 kfree(virt_ep
->stopped_td
);
3039 xhci_ring_cmd_db(xhci
);
3041 virt_ep
->stopped_td
= NULL
;
3042 virt_ep
->stopped_trb
= NULL
;
3043 virt_ep
->stopped_stream
= 0;
3044 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3047 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
3050 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
3051 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
3052 unsigned int slot_id
)
3055 unsigned int ep_index
;
3056 unsigned int ep_state
;
3060 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
3063 if (ep
->ss_ep_comp
.bmAttributes
== 0) {
3064 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
3065 " descriptor for ep 0x%x does not support streams\n",
3066 ep
->desc
.bEndpointAddress
);
3070 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
3071 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3072 if (ep_state
& EP_HAS_STREAMS
||
3073 ep_state
& EP_GETTING_STREAMS
) {
3074 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
3075 "already has streams set up.\n",
3076 ep
->desc
.bEndpointAddress
);
3077 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
3078 "dynamic stream context array reallocation.\n");
3081 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
3082 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
3083 "endpoint 0x%x; URBs are pending.\n",
3084 ep
->desc
.bEndpointAddress
);
3090 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
3091 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
3093 unsigned int max_streams
;
3095 /* The stream context array size must be a power of two */
3096 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
3098 * Find out how many primary stream array entries the host controller
3099 * supports. Later we may use secondary stream arrays (similar to 2nd
3100 * level page entries), but that's an optional feature for xHCI host
3101 * controllers. xHCs must support at least 4 stream IDs.
3103 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
3104 if (*num_stream_ctxs
> max_streams
) {
3105 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
3107 *num_stream_ctxs
= max_streams
;
3108 *num_streams
= max_streams
;
3112 /* Returns an error code if one of the endpoint already has streams.
3113 * This does not change any data structures, it only checks and gathers
3116 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
3117 struct usb_device
*udev
,
3118 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3119 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
3121 unsigned int max_streams
;
3122 unsigned int endpoint_flag
;
3126 for (i
= 0; i
< num_eps
; i
++) {
3127 ret
= xhci_check_streams_endpoint(xhci
, udev
,
3128 eps
[i
], udev
->slot_id
);
3132 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
3133 if (max_streams
< (*num_streams
- 1)) {
3134 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
3135 eps
[i
]->desc
.bEndpointAddress
,
3137 *num_streams
= max_streams
+1;
3140 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3141 if (*changed_ep_bitmask
& endpoint_flag
)
3143 *changed_ep_bitmask
|= endpoint_flag
;
3148 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
3149 struct usb_device
*udev
,
3150 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
3152 u32 changed_ep_bitmask
= 0;
3153 unsigned int slot_id
;
3154 unsigned int ep_index
;
3155 unsigned int ep_state
;
3158 slot_id
= udev
->slot_id
;
3159 if (!xhci
->devs
[slot_id
])
3162 for (i
= 0; i
< num_eps
; i
++) {
3163 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3164 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3165 /* Are streams already being freed for the endpoint? */
3166 if (ep_state
& EP_GETTING_NO_STREAMS
) {
3167 xhci_warn(xhci
, "WARN Can't disable streams for "
3169 "streams are being disabled already.",
3170 eps
[i
]->desc
.bEndpointAddress
);
3173 /* Are there actually any streams to free? */
3174 if (!(ep_state
& EP_HAS_STREAMS
) &&
3175 !(ep_state
& EP_GETTING_STREAMS
)) {
3176 xhci_warn(xhci
, "WARN Can't disable streams for "
3178 "streams are already disabled!",
3179 eps
[i
]->desc
.bEndpointAddress
);
3180 xhci_warn(xhci
, "WARN xhci_free_streams() called "
3181 "with non-streams endpoint\n");
3184 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3186 return changed_ep_bitmask
;
3190 * The USB device drivers use this function (though the HCD interface in USB
3191 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3192 * coordinate mass storage command queueing across multiple endpoints (basically
3193 * a stream ID == a task ID).
3195 * Setting up streams involves allocating the same size stream context array
3196 * for each endpoint and issuing a configure endpoint command for all endpoints.
3198 * Don't allow the call to succeed if one endpoint only supports one stream
3199 * (which means it doesn't support streams at all).
3201 * Drivers may get less stream IDs than they asked for, if the host controller
3202 * hardware or endpoints claim they can't support the number of requested
3205 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3206 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3207 unsigned int num_streams
, gfp_t mem_flags
)
3210 struct xhci_hcd
*xhci
;
3211 struct xhci_virt_device
*vdev
;
3212 struct xhci_command
*config_cmd
;
3213 unsigned int ep_index
;
3214 unsigned int num_stream_ctxs
;
3215 unsigned long flags
;
3216 u32 changed_ep_bitmask
= 0;
3221 /* Add one to the number of streams requested to account for
3222 * stream 0 that is reserved for xHCI usage.
3225 xhci
= hcd_to_xhci(hcd
);
3226 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
3229 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3231 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
3235 /* Check to make sure all endpoints are not already configured for
3236 * streams. While we're at it, find the maximum number of streams that
3237 * all the endpoints will support and check for duplicate endpoints.
3239 spin_lock_irqsave(&xhci
->lock
, flags
);
3240 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
3241 num_eps
, &num_streams
, &changed_ep_bitmask
);
3243 xhci_free_command(xhci
, config_cmd
);
3244 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3247 if (num_streams
<= 1) {
3248 xhci_warn(xhci
, "WARN: endpoints can't handle "
3249 "more than one stream.\n");
3250 xhci_free_command(xhci
, config_cmd
);
3251 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3254 vdev
= xhci
->devs
[udev
->slot_id
];
3255 /* Mark each endpoint as being in transition, so
3256 * xhci_urb_enqueue() will reject all URBs.
3258 for (i
= 0; i
< num_eps
; i
++) {
3259 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3260 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
3262 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3264 /* Setup internal data structures and allocate HW data structures for
3265 * streams (but don't install the HW structures in the input context
3266 * until we're sure all memory allocation succeeded).
3268 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
3269 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
3270 num_stream_ctxs
, num_streams
);
3272 for (i
= 0; i
< num_eps
; i
++) {
3273 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3274 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
3276 num_streams
, mem_flags
);
3277 if (!vdev
->eps
[ep_index
].stream_info
)
3279 /* Set maxPstreams in endpoint context and update deq ptr to
3280 * point to stream context array. FIXME
3284 /* Set up the input context for a configure endpoint command. */
3285 for (i
= 0; i
< num_eps
; i
++) {
3286 struct xhci_ep_ctx
*ep_ctx
;
3288 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3289 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
3291 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
3292 vdev
->out_ctx
, ep_index
);
3293 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
3294 vdev
->eps
[ep_index
].stream_info
);
3296 /* Tell the HW to drop its old copy of the endpoint context info
3297 * and add the updated copy from the input context.
3299 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
3300 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3302 /* Issue and wait for the configure endpoint command */
3303 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
3306 /* xHC rejected the configure endpoint command for some reason, so we
3307 * leave the old ring intact and free our internal streams data
3313 spin_lock_irqsave(&xhci
->lock
, flags
);
3314 for (i
= 0; i
< num_eps
; i
++) {
3315 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3316 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3317 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
3318 udev
->slot_id
, ep_index
);
3319 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3321 xhci_free_command(xhci
, config_cmd
);
3322 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3324 /* Subtract 1 for stream 0, which drivers can't use */
3325 return num_streams
- 1;
3328 /* If it didn't work, free the streams! */
3329 for (i
= 0; i
< num_eps
; i
++) {
3330 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3331 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3332 vdev
->eps
[ep_index
].stream_info
= NULL
;
3333 /* FIXME Unset maxPstreams in endpoint context and
3334 * update deq ptr to point to normal string ring.
3336 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3337 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3338 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3340 xhci_free_command(xhci
, config_cmd
);
3344 /* Transition the endpoint from using streams to being a "normal" endpoint
3347 * Modify the endpoint context state, submit a configure endpoint command,
3348 * and free all endpoint rings for streams if that completes successfully.
3350 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3351 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3355 struct xhci_hcd
*xhci
;
3356 struct xhci_virt_device
*vdev
;
3357 struct xhci_command
*command
;
3358 unsigned int ep_index
;
3359 unsigned long flags
;
3360 u32 changed_ep_bitmask
;
3362 xhci
= hcd_to_xhci(hcd
);
3363 vdev
= xhci
->devs
[udev
->slot_id
];
3365 /* Set up a configure endpoint command to remove the streams rings */
3366 spin_lock_irqsave(&xhci
->lock
, flags
);
3367 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3368 udev
, eps
, num_eps
);
3369 if (changed_ep_bitmask
== 0) {
3370 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3374 /* Use the xhci_command structure from the first endpoint. We may have
3375 * allocated too many, but the driver may call xhci_free_streams() for
3376 * each endpoint it grouped into one call to xhci_alloc_streams().
3378 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3379 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3380 for (i
= 0; i
< num_eps
; i
++) {
3381 struct xhci_ep_ctx
*ep_ctx
;
3383 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3384 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3385 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3386 EP_GETTING_NO_STREAMS
;
3388 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3389 vdev
->out_ctx
, ep_index
);
3390 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
3391 &vdev
->eps
[ep_index
]);
3393 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3394 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3395 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3397 /* Issue and wait for the configure endpoint command,
3398 * which must succeed.
3400 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3403 /* xHC rejected the configure endpoint command for some reason, so we
3404 * leave the streams rings intact.
3409 spin_lock_irqsave(&xhci
->lock
, flags
);
3410 for (i
= 0; i
< num_eps
; i
++) {
3411 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3412 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3413 vdev
->eps
[ep_index
].stream_info
= NULL
;
3414 /* FIXME Unset maxPstreams in endpoint context and
3415 * update deq ptr to point to normal string ring.
3417 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3418 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3420 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3426 * Deletes endpoint resources for endpoints that were active before a Reset
3427 * Device command, or a Disable Slot command. The Reset Device command leaves
3428 * the control endpoint intact, whereas the Disable Slot command deletes it.
3430 * Must be called with xhci->lock held.
3432 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3433 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3436 unsigned int num_dropped_eps
= 0;
3437 unsigned int drop_flags
= 0;
3439 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3440 if (virt_dev
->eps
[i
].ring
) {
3441 drop_flags
|= 1 << i
;
3445 xhci
->num_active_eps
-= num_dropped_eps
;
3446 if (num_dropped_eps
)
3447 xhci_dbg(xhci
, "Dropped %u ep ctxs, flags = 0x%x, "
3449 num_dropped_eps
, drop_flags
,
3450 xhci
->num_active_eps
);
3454 * This submits a Reset Device Command, which will set the device state to 0,
3455 * set the device address to 0, and disable all the endpoints except the default
3456 * control endpoint. The USB core should come back and call
3457 * xhci_address_device(), and then re-set up the configuration. If this is
3458 * called because of a usb_reset_and_verify_device(), then the old alternate
3459 * settings will be re-installed through the normal bandwidth allocation
3462 * Wait for the Reset Device command to finish. Remove all structures
3463 * associated with the endpoints that were disabled. Clear the input device
3464 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3466 * If the virt_dev to be reset does not exist or does not match the udev,
3467 * it means the device is lost, possibly due to the xHC restore error and
3468 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3469 * re-allocate the device.
3471 int xhci_discover_or_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3474 unsigned long flags
;
3475 struct xhci_hcd
*xhci
;
3476 unsigned int slot_id
;
3477 struct xhci_virt_device
*virt_dev
;
3478 struct xhci_command
*reset_device_cmd
;
3480 int last_freed_endpoint
;
3481 struct xhci_slot_ctx
*slot_ctx
;
3482 int old_active_eps
= 0;
3484 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3487 xhci
= hcd_to_xhci(hcd
);
3488 slot_id
= udev
->slot_id
;
3489 virt_dev
= xhci
->devs
[slot_id
];
3491 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3492 "not exist. Re-allocate the device\n", slot_id
);
3493 ret
= xhci_alloc_dev(hcd
, udev
);
3500 if (virt_dev
->tt_info
)
3501 old_active_eps
= virt_dev
->tt_info
->active_eps
;
3503 if (virt_dev
->udev
!= udev
) {
3504 /* If the virt_dev and the udev does not match, this virt_dev
3505 * may belong to another udev.
3506 * Re-allocate the device.
3508 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3509 "not match the udev. Re-allocate the device\n",
3511 ret
= xhci_alloc_dev(hcd
, udev
);
3518 /* If device is not setup, there is no point in resetting it */
3519 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3520 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3521 SLOT_STATE_DISABLED
)
3524 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3525 /* Allocate the command structure that holds the struct completion.
3526 * Assume we're in process context, since the normal device reset
3527 * process has to wait for the device anyway. Storage devices are
3528 * reset as part of error handling, so use GFP_NOIO instead of
3531 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3532 if (!reset_device_cmd
) {
3533 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3537 /* Attempt to submit the Reset Device command to the command ring */
3538 spin_lock_irqsave(&xhci
->lock
, flags
);
3539 reset_device_cmd
->command_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3541 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
3542 ret
= xhci_queue_reset_device(xhci
, slot_id
);
3544 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3545 list_del(&reset_device_cmd
->cmd_list
);
3546 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3547 goto command_cleanup
;
3549 xhci_ring_cmd_db(xhci
);
3550 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3552 /* Wait for the Reset Device command to finish */
3553 timeleft
= wait_for_completion_interruptible_timeout(
3554 reset_device_cmd
->completion
,
3555 USB_CTRL_SET_TIMEOUT
);
3556 if (timeleft
<= 0) {
3557 xhci_warn(xhci
, "%s while waiting for reset device command\n",
3558 timeleft
== 0 ? "Timeout" : "Signal");
3559 spin_lock_irqsave(&xhci
->lock
, flags
);
3560 /* The timeout might have raced with the event ring handler, so
3561 * only delete from the list if the item isn't poisoned.
3563 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
3564 list_del(&reset_device_cmd
->cmd_list
);
3565 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3567 goto command_cleanup
;
3570 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3571 * unless we tried to reset a slot ID that wasn't enabled,
3572 * or the device wasn't in the addressed or configured state.
3574 ret
= reset_device_cmd
->status
;
3576 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
3577 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
3578 xhci_info(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3580 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3581 xhci_info(xhci
, "Not freeing device rings.\n");
3582 /* Don't treat this as an error. May change my mind later. */
3584 goto command_cleanup
;
3586 xhci_dbg(xhci
, "Successful reset device command.\n");
3589 if (xhci_is_vendor_info_code(xhci
, ret
))
3591 xhci_warn(xhci
, "Unknown completion code %u for "
3592 "reset device command.\n", ret
);
3594 goto command_cleanup
;
3597 /* Free up host controller endpoint resources */
3598 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3599 spin_lock_irqsave(&xhci
->lock
, flags
);
3600 /* Don't delete the default control endpoint resources */
3601 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3602 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3605 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3606 last_freed_endpoint
= 1;
3607 for (i
= 1; i
< 31; ++i
) {
3608 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3610 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3611 xhci_free_stream_info(xhci
, ep
->stream_info
);
3612 ep
->stream_info
= NULL
;
3613 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3617 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
3618 last_freed_endpoint
= i
;
3620 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3621 xhci_drop_ep_from_interval_table(xhci
,
3622 &virt_dev
->eps
[i
].bw_info
,
3627 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3629 /* If necessary, update the number of active TTs on this root port */
3630 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3632 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
3633 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
3637 xhci_free_command(xhci
, reset_device_cmd
);
3642 * At this point, the struct usb_device is about to go away, the device has
3643 * disconnected, and all traffic has been stopped and the endpoints have been
3644 * disabled. Free any HC data structures associated with that device.
3646 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3648 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3649 struct xhci_virt_device
*virt_dev
;
3650 #ifndef CONFIG_USB_DEFAULT_PERSIST
3651 struct device
*dev
= hcd
->self
.controller
;
3653 unsigned long flags
;
3657 #ifndef CONFIG_USB_DEFAULT_PERSIST
3659 * We called pm_runtime_get_noresume when the device was attached.
3660 * Decrement the counter here to allow controller to runtime suspend
3661 * if no devices remain.
3663 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3664 pm_runtime_put_noidle(dev
);
3667 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3668 /* If the host is halted due to driver unload, we still need to free the
3671 if (ret
<= 0 && ret
!= -ENODEV
)
3674 virt_dev
= xhci
->devs
[udev
->slot_id
];
3676 /* Stop any wayward timer functions (which may grab the lock) */
3677 for (i
= 0; i
< 31; ++i
) {
3678 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
3679 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3682 if (udev
->usb2_hw_lpm_enabled
) {
3683 xhci_set_usb2_hardware_lpm(hcd
, udev
, 0);
3684 udev
->usb2_hw_lpm_enabled
= 0;
3687 spin_lock_irqsave(&xhci
->lock
, flags
);
3688 /* Don't disable the slot if the host controller is dead. */
3689 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
3690 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3691 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3692 xhci_free_virt_device(xhci
, udev
->slot_id
);
3693 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3697 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
3698 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3699 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3702 xhci_ring_cmd_db(xhci
);
3703 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3705 * Event command completion handler will free any data structures
3706 * associated with the slot. XXX Can free sleep?
3711 * Checks if we have enough host controller resources for the default control
3714 * Must be called with xhci->lock held.
3716 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3718 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3719 xhci_dbg(xhci
, "Not enough ep ctxs: "
3720 "%u active, need to add 1, limit is %u.\n",
3721 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3724 xhci
->num_active_eps
+= 1;
3725 xhci_dbg(xhci
, "Adding 1 ep ctx, %u now active.\n",
3726 xhci
->num_active_eps
);
3732 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3733 * timed out, or allocating memory failed. Returns 1 on success.
3735 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3737 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3738 struct device
*dev
= hcd
->self
.controller
;
3739 unsigned long flags
;
3742 union xhci_trb
*cmd_trb
;
3744 spin_lock_irqsave(&xhci
->lock
, flags
);
3745 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3746 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
3748 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3749 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3752 xhci_ring_cmd_db(xhci
);
3753 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3755 /* XXX: how much time for xHC slot assignment? */
3756 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3757 XHCI_CMD_DEFAULT_TIMEOUT
);
3758 if (timeleft
<= 0) {
3759 xhci_warn(xhci
, "%s while waiting for a slot\n",
3760 timeleft
== 0 ? "Timeout" : "Signal");
3761 /* cancel the enable slot request */
3762 return xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3765 if (!xhci
->slot_id
) {
3766 xhci_err(xhci
, "Error while assigning device slot ID\n");
3770 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3771 spin_lock_irqsave(&xhci
->lock
, flags
);
3772 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3774 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3775 xhci_warn(xhci
, "Not enough host resources, "
3776 "active endpoint contexts = %u\n",
3777 xhci
->num_active_eps
);
3780 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3782 /* Use GFP_NOIO, since this function can be called from
3783 * xhci_discover_or_reset_device(), which may be called as part of
3784 * mass storage driver error handling.
3786 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_NOIO
)) {
3787 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3790 udev
->slot_id
= xhci
->slot_id
;
3792 #ifndef CONFIG_USB_DEFAULT_PERSIST
3794 * If resetting upon resume, we can't put the controller into runtime
3795 * suspend if there is a device attached.
3797 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3798 pm_runtime_get_noresume(dev
);
3801 /* Is this a LS or FS device under a HS hub? */
3802 /* Hub or peripherial? */
3806 /* Disable slot, if we can do it without mem alloc */
3807 spin_lock_irqsave(&xhci
->lock
, flags
);
3808 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
3809 xhci_ring_cmd_db(xhci
);
3810 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3815 * Issue an Address Device command (which will issue a SetAddress request to
3817 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3818 * we should only issue and wait on one address command at the same time.
3820 * We add one to the device address issued by the hardware because the USB core
3821 * uses address 1 for the root hubs (even though they're not really devices).
3823 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3825 unsigned long flags
;
3827 struct xhci_virt_device
*virt_dev
;
3829 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3830 struct xhci_slot_ctx
*slot_ctx
;
3831 struct xhci_input_control_ctx
*ctrl_ctx
;
3833 union xhci_trb
*cmd_trb
;
3835 if (!udev
->slot_id
) {
3836 xhci_dbg(xhci
, "Bad Slot ID %d\n", udev
->slot_id
);
3840 virt_dev
= xhci
->devs
[udev
->slot_id
];
3842 if (WARN_ON(!virt_dev
)) {
3844 * In plug/unplug torture test with an NEC controller,
3845 * a zero-dereference was observed once due to virt_dev = 0.
3846 * Print useful debug rather than crash if it is observed again!
3848 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3853 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3855 * If this is the first Set Address since device plug-in or
3856 * virt_device realloaction after a resume with an xHCI power loss,
3857 * then set up the slot context.
3859 if (!slot_ctx
->dev_info
)
3860 xhci_setup_addressable_virt_dev(xhci
, udev
);
3861 /* Otherwise, update the control endpoint ring enqueue pointer. */
3863 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3864 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
3865 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3866 ctrl_ctx
->drop_flags
= 0;
3868 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3869 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3871 spin_lock_irqsave(&xhci
->lock
, flags
);
3872 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3873 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
3876 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3877 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3880 xhci_ring_cmd_db(xhci
);
3881 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3883 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3884 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3885 XHCI_CMD_DEFAULT_TIMEOUT
);
3886 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3887 * the SetAddress() "recovery interval" required by USB and aborting the
3888 * command on a timeout.
3890 if (timeleft
<= 0) {
3891 xhci_warn(xhci
, "%s while waiting for address device command\n",
3892 timeleft
== 0 ? "Timeout" : "Signal");
3893 /* cancel the address device command */
3894 ret
= xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3900 switch (virt_dev
->cmd_status
) {
3901 case COMP_CTX_STATE
:
3903 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
3908 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
3912 dev_warn(&udev
->dev
, "ERROR: Incompatible device for address "
3913 "device command.\n");
3917 xhci_dbg(xhci
, "Successful Address Device command\n");
3920 xhci_err(xhci
, "ERROR: unexpected command completion "
3921 "code 0x%x.\n", virt_dev
->cmd_status
);
3922 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3923 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3930 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3931 xhci_dbg(xhci
, "Op regs DCBAA ptr = %#016llx\n", temp_64
);
3932 xhci_dbg(xhci
, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3934 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3935 (unsigned long long)
3936 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3937 xhci_dbg(xhci
, "Output Context DMA address = %#08llx\n",
3938 (unsigned long long)virt_dev
->out_ctx
->dma
);
3939 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3940 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3941 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3942 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3944 * USB core uses address 1 for the roothubs, so we add one to the
3945 * address given back to us by the HC.
3947 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3948 /* Use kernel assigned address for devices; store xHC assigned
3949 * address locally. */
3950 virt_dev
->address
= (le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
)
3952 /* Zero the input context control for later use */
3953 ctrl_ctx
->add_flags
= 0;
3954 ctrl_ctx
->drop_flags
= 0;
3956 xhci_dbg(xhci
, "Internal device address = %d\n", virt_dev
->address
);
3962 * Transfer the port index into real index in the HW port status
3963 * registers. Caculate offset between the port's PORTSC register
3964 * and port status base. Divide the number of per port register
3965 * to get the real index. The raw port number bases 1.
3967 int xhci_find_raw_port_number(struct usb_hcd
*hcd
, int port1
)
3969 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3970 __le32 __iomem
*base_addr
= &xhci
->op_regs
->port_status_base
;
3971 __le32 __iomem
*addr
;
3974 if (hcd
->speed
!= HCD_USB3
)
3975 addr
= xhci
->usb2_ports
[port1
- 1];
3977 addr
= xhci
->usb3_ports
[port1
- 1];
3979 raw_port
= (addr
- base_addr
)/NUM_PORT_REGS
+ 1;
3983 #ifdef CONFIG_PM_RUNTIME
3985 /* BESL to HIRD Encoding array for USB2 LPM */
3986 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3987 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3989 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3990 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
3991 struct usb_device
*udev
)
3993 int u2del
, besl
, besl_host
;
3994 int besl_device
= 0;
3997 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
3998 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4000 if (field
& USB_BESL_SUPPORT
) {
4001 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
4002 if (xhci_besl_encoding
[besl_host
] >= u2del
)
4005 /* Use baseline BESL value as default */
4006 if (field
& USB_BESL_BASELINE_VALID
)
4007 besl_device
= USB_GET_BESL_BASELINE(field
);
4008 else if (field
& USB_BESL_DEEP_VALID
)
4009 besl_device
= USB_GET_BESL_DEEP(field
);
4014 besl_host
= (u2del
- 51) / 75 + 1;
4017 besl
= besl_host
+ besl_device
;
4024 static int xhci_usb2_software_lpm_test(struct usb_hcd
*hcd
,
4025 struct usb_device
*udev
)
4027 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4028 struct dev_info
*dev_info
;
4029 __le32 __iomem
**port_array
;
4030 __le32 __iomem
*addr
, *pm_addr
;
4032 unsigned int port_num
;
4033 unsigned long flags
;
4037 if (hcd
->speed
== HCD_USB3
|| !xhci
->sw_lpm_support
||
4041 /* we only support lpm for non-hub device connected to root hub yet */
4042 if (!udev
->parent
|| udev
->parent
->parent
||
4043 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4046 spin_lock_irqsave(&xhci
->lock
, flags
);
4048 /* Look for devices in lpm_failed_devs list */
4049 dev_id
= le16_to_cpu(udev
->descriptor
.idVendor
) << 16 |
4050 le16_to_cpu(udev
->descriptor
.idProduct
);
4051 list_for_each_entry(dev_info
, &xhci
->lpm_failed_devs
, list
) {
4052 if (dev_info
->dev_id
== dev_id
) {
4058 port_array
= xhci
->usb2_ports
;
4059 port_num
= udev
->portnum
- 1;
4061 if (port_num
> HCS_MAX_PORTS(xhci
->hcs_params1
)) {
4062 xhci_dbg(xhci
, "invalid port number %d\n", udev
->portnum
);
4068 * Test USB 2.0 software LPM.
4069 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
4070 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
4071 * in the June 2011 errata release.
4073 xhci_dbg(xhci
, "test port %d software LPM\n", port_num
);
4075 * Set L1 Device Slot and HIRD/BESL.
4076 * Check device's USB 2.0 extension descriptor to determine whether
4077 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
4079 pm_addr
= port_array
[port_num
] + 1;
4080 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4081 temp
= PORT_L1DS(udev
->slot_id
) | PORT_HIRD(hird
);
4082 xhci_writel(xhci
, temp
, pm_addr
);
4084 /* Set port link state to U2(L1) */
4085 addr
= port_array
[port_num
];
4086 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U2
);
4089 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4091 spin_lock_irqsave(&xhci
->lock
, flags
);
4093 /* Check L1 Status */
4094 ret
= xhci_handshake(xhci
, pm_addr
,
4095 PORT_L1S_MASK
, PORT_L1S_SUCCESS
, 125);
4096 if (ret
!= -ETIMEDOUT
) {
4097 /* enter L1 successfully */
4098 temp
= xhci_readl(xhci
, addr
);
4099 xhci_dbg(xhci
, "port %d entered L1 state, port status 0x%x\n",
4103 temp
= xhci_readl(xhci
, pm_addr
);
4104 xhci_dbg(xhci
, "port %d software lpm failed, L1 status %d\n",
4105 port_num
, temp
& PORT_L1S_MASK
);
4109 /* Resume the port */
4110 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U0
);
4112 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4114 spin_lock_irqsave(&xhci
->lock
, flags
);
4117 xhci_test_and_clear_bit(xhci
, port_array
, port_num
, PORT_PLC
);
4119 /* Check PORTSC to make sure the device is in the right state */
4121 temp
= xhci_readl(xhci
, addr
);
4122 xhci_dbg(xhci
, "resumed port %d status 0x%x\n", port_num
, temp
);
4123 if (!(temp
& PORT_CONNECT
) || !(temp
& PORT_PE
) ||
4124 (temp
& PORT_PLS_MASK
) != XDEV_U0
) {
4125 xhci_dbg(xhci
, "port L1 resume fail\n");
4131 /* Insert dev to lpm_failed_devs list */
4132 xhci_warn(xhci
, "device LPM test failed, may disconnect and "
4134 dev_info
= kzalloc(sizeof(struct dev_info
), GFP_ATOMIC
);
4139 dev_info
->dev_id
= dev_id
;
4140 INIT_LIST_HEAD(&dev_info
->list
);
4141 list_add(&dev_info
->list
, &xhci
->lpm_failed_devs
);
4143 xhci_ring_device(xhci
, udev
->slot_id
);
4147 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4151 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4152 struct usb_device
*udev
, int enable
)
4154 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4155 __le32 __iomem
**port_array
;
4156 __le32 __iomem
*pm_addr
;
4158 unsigned int port_num
;
4159 unsigned long flags
;
4162 if (hcd
->speed
== HCD_USB3
|| !xhci
->hw_lpm_support
||
4166 if (!udev
->parent
|| udev
->parent
->parent
||
4167 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4170 if (udev
->usb2_hw_lpm_capable
!= 1)
4173 spin_lock_irqsave(&xhci
->lock
, flags
);
4175 port_array
= xhci
->usb2_ports
;
4176 port_num
= udev
->portnum
- 1;
4177 pm_addr
= port_array
[port_num
] + 1;
4178 temp
= xhci_readl(xhci
, pm_addr
);
4180 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
4181 enable
? "enable" : "disable", port_num
);
4183 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4186 temp
&= ~PORT_HIRD_MASK
;
4187 temp
|= PORT_HIRD(hird
) | PORT_RWE
;
4188 xhci_writel(xhci
, temp
, pm_addr
);
4189 temp
= xhci_readl(xhci
, pm_addr
);
4191 xhci_writel(xhci
, temp
, pm_addr
);
4193 temp
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
);
4194 xhci_writel(xhci
, temp
, pm_addr
);
4197 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4201 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4203 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4206 ret
= xhci_usb2_software_lpm_test(hcd
, udev
);
4208 xhci_dbg(xhci
, "software LPM test succeed\n");
4209 if (xhci
->hw_lpm_support
== 1) {
4210 udev
->usb2_hw_lpm_capable
= 1;
4211 ret
= xhci_set_usb2_hardware_lpm(hcd
, udev
, 1);
4213 udev
->usb2_hw_lpm_enabled
= 1;
4222 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4223 struct usb_device
*udev
, int enable
)
4228 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4233 #endif /* CONFIG_PM_RUNTIME */
4235 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4238 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4239 static unsigned long long xhci_service_interval_to_ns(
4240 struct usb_endpoint_descriptor
*desc
)
4242 return (1ULL << (desc
->bInterval
- 1)) * 125 * 1000;
4245 static u16
xhci_get_timeout_no_hub_lpm(struct usb_device
*udev
,
4246 enum usb3_link_state state
)
4248 unsigned long long sel
;
4249 unsigned long long pel
;
4250 unsigned int max_sel_pel
;
4255 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4256 sel
= DIV_ROUND_UP(udev
->u1_params
.sel
, 1000);
4257 pel
= DIV_ROUND_UP(udev
->u1_params
.pel
, 1000);
4258 max_sel_pel
= USB3_LPM_MAX_U1_SEL_PEL
;
4262 sel
= DIV_ROUND_UP(udev
->u2_params
.sel
, 1000);
4263 pel
= DIV_ROUND_UP(udev
->u2_params
.pel
, 1000);
4264 max_sel_pel
= USB3_LPM_MAX_U2_SEL_PEL
;
4268 dev_warn(&udev
->dev
, "%s: Can't get timeout for non-U1 or U2 state.\n",
4270 return USB3_LPM_DISABLED
;
4273 if (sel
<= max_sel_pel
&& pel
<= max_sel_pel
)
4274 return USB3_LPM_DEVICE_INITIATED
;
4276 if (sel
> max_sel_pel
)
4277 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4278 "due to long SEL %llu ms\n",
4281 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4282 "due to long PEL %llu\n ms",
4284 return USB3_LPM_DISABLED
;
4287 /* Returns the hub-encoded U1 timeout value.
4288 * The U1 timeout should be the maximum of the following values:
4289 * - For control endpoints, U1 system exit latency (SEL) * 3
4290 * - For bulk endpoints, U1 SEL * 5
4291 * - For interrupt endpoints:
4292 * - Notification EPs, U1 SEL * 3
4293 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4294 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4296 static u16
xhci_calculate_intel_u1_timeout(struct usb_device
*udev
,
4297 struct usb_endpoint_descriptor
*desc
)
4299 unsigned long long timeout_ns
;
4303 ep_type
= usb_endpoint_type(desc
);
4305 case USB_ENDPOINT_XFER_CONTROL
:
4306 timeout_ns
= udev
->u1_params
.sel
* 3;
4308 case USB_ENDPOINT_XFER_BULK
:
4309 timeout_ns
= udev
->u1_params
.sel
* 5;
4311 case USB_ENDPOINT_XFER_INT
:
4312 intr_type
= usb_endpoint_interrupt_type(desc
);
4313 if (intr_type
== USB_ENDPOINT_INTR_NOTIFICATION
) {
4314 timeout_ns
= udev
->u1_params
.sel
* 3;
4317 /* Otherwise the calculation is the same as isoc eps */
4318 case USB_ENDPOINT_XFER_ISOC
:
4319 timeout_ns
= xhci_service_interval_to_ns(desc
);
4320 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
* 105, 100);
4321 if (timeout_ns
< udev
->u1_params
.sel
* 2)
4322 timeout_ns
= udev
->u1_params
.sel
* 2;
4328 /* The U1 timeout is encoded in 1us intervals. */
4329 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 1000);
4330 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4331 if (timeout_ns
== USB3_LPM_DISABLED
)
4334 /* If the necessary timeout value is bigger than what we can set in the
4335 * USB 3.0 hub, we have to disable hub-initiated U1.
4337 if (timeout_ns
<= USB3_LPM_U1_MAX_TIMEOUT
)
4339 dev_dbg(&udev
->dev
, "Hub-initiated U1 disabled "
4340 "due to long timeout %llu ms\n", timeout_ns
);
4341 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U1
);
4344 /* Returns the hub-encoded U2 timeout value.
4345 * The U2 timeout should be the maximum of:
4346 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4347 * - largest bInterval of any active periodic endpoint (to avoid going
4348 * into lower power link states between intervals).
4349 * - the U2 Exit Latency of the device
4351 static u16
xhci_calculate_intel_u2_timeout(struct usb_device
*udev
,
4352 struct usb_endpoint_descriptor
*desc
)
4354 unsigned long long timeout_ns
;
4355 unsigned long long u2_del_ns
;
4357 timeout_ns
= 10 * 1000 * 1000;
4359 if ((usb_endpoint_xfer_int(desc
) || usb_endpoint_xfer_isoc(desc
)) &&
4360 (xhci_service_interval_to_ns(desc
) > timeout_ns
))
4361 timeout_ns
= xhci_service_interval_to_ns(desc
);
4363 u2_del_ns
= le16_to_cpu(udev
->bos
->ss_cap
->bU2DevExitLat
) * 1000ULL;
4364 if (u2_del_ns
> timeout_ns
)
4365 timeout_ns
= u2_del_ns
;
4367 /* The U2 timeout is encoded in 256us intervals */
4368 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 256 * 1000);
4369 /* If the necessary timeout value is bigger than what we can set in the
4370 * USB 3.0 hub, we have to disable hub-initiated U2.
4372 if (timeout_ns
<= USB3_LPM_U2_MAX_TIMEOUT
)
4374 dev_dbg(&udev
->dev
, "Hub-initiated U2 disabled "
4375 "due to long timeout %llu ms\n", timeout_ns
);
4376 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U2
);
4379 static u16
xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4380 struct usb_device
*udev
,
4381 struct usb_endpoint_descriptor
*desc
,
4382 enum usb3_link_state state
,
4385 if (state
== USB3_LPM_U1
) {
4386 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4387 return xhci_calculate_intel_u1_timeout(udev
, desc
);
4389 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4390 return xhci_calculate_intel_u2_timeout(udev
, desc
);
4393 return USB3_LPM_DISABLED
;
4396 static int xhci_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4397 struct usb_device
*udev
,
4398 struct usb_endpoint_descriptor
*desc
,
4399 enum usb3_link_state state
,
4404 alt_timeout
= xhci_call_host_update_timeout_for_endpoint(xhci
, udev
,
4405 desc
, state
, timeout
);
4407 /* If we found we can't enable hub-initiated LPM, or
4408 * the U1 or U2 exit latency was too high to allow
4409 * device-initiated LPM as well, just stop searching.
4411 if (alt_timeout
== USB3_LPM_DISABLED
||
4412 alt_timeout
== USB3_LPM_DEVICE_INITIATED
) {
4413 *timeout
= alt_timeout
;
4416 if (alt_timeout
> *timeout
)
4417 *timeout
= alt_timeout
;
4421 static int xhci_update_timeout_for_interface(struct xhci_hcd
*xhci
,
4422 struct usb_device
*udev
,
4423 struct usb_host_interface
*alt
,
4424 enum usb3_link_state state
,
4429 for (j
= 0; j
< alt
->desc
.bNumEndpoints
; j
++) {
4430 if (xhci_update_timeout_for_endpoint(xhci
, udev
,
4431 &alt
->endpoint
[j
].desc
, state
, timeout
))
4438 static int xhci_check_intel_tier_policy(struct usb_device
*udev
,
4439 enum usb3_link_state state
)
4441 struct usb_device
*parent
;
4442 unsigned int num_hubs
;
4444 if (state
== USB3_LPM_U2
)
4447 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4448 for (parent
= udev
->parent
, num_hubs
= 0; parent
->parent
;
4449 parent
= parent
->parent
)
4455 dev_dbg(&udev
->dev
, "Disabling U1 link state for device"
4456 " below second-tier hub.\n");
4457 dev_dbg(&udev
->dev
, "Plug device into first-tier hub "
4458 "to decrease power consumption.\n");
4462 static int xhci_check_tier_policy(struct xhci_hcd
*xhci
,
4463 struct usb_device
*udev
,
4464 enum usb3_link_state state
)
4466 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4467 return xhci_check_intel_tier_policy(udev
, state
);
4471 /* Returns the U1 or U2 timeout that should be enabled.
4472 * If the tier check or timeout setting functions return with a non-zero exit
4473 * code, that means the timeout value has been finalized and we shouldn't look
4474 * at any more endpoints.
4476 static u16
xhci_calculate_lpm_timeout(struct usb_hcd
*hcd
,
4477 struct usb_device
*udev
, enum usb3_link_state state
)
4479 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4480 struct usb_host_config
*config
;
4483 u16 timeout
= USB3_LPM_DISABLED
;
4485 if (state
== USB3_LPM_U1
)
4487 else if (state
== USB3_LPM_U2
)
4490 dev_warn(&udev
->dev
, "Can't enable unknown link state %i\n",
4495 if (xhci_check_tier_policy(xhci
, udev
, state
) < 0)
4498 /* Gather some information about the currently installed configuration
4499 * and alternate interface settings.
4501 if (xhci_update_timeout_for_endpoint(xhci
, udev
, &udev
->ep0
.desc
,
4505 config
= udev
->actconfig
;
4509 for (i
= 0; i
< USB_MAXINTERFACES
; i
++) {
4510 struct usb_driver
*driver
;
4511 struct usb_interface
*intf
= config
->interface
[i
];
4516 /* Check if any currently bound drivers want hub-initiated LPM
4519 if (intf
->dev
.driver
) {
4520 driver
= to_usb_driver(intf
->dev
.driver
);
4521 if (driver
&& driver
->disable_hub_initiated_lpm
) {
4522 dev_dbg(&udev
->dev
, "Hub-initiated %s disabled "
4523 "at request of driver %s\n",
4524 state_name
, driver
->name
);
4525 return xhci_get_timeout_no_hub_lpm(udev
, state
);
4529 /* Not sure how this could happen... */
4530 if (!intf
->cur_altsetting
)
4533 if (xhci_update_timeout_for_interface(xhci
, udev
,
4534 intf
->cur_altsetting
,
4542 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
4543 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
4545 static int xhci_change_max_exit_latency(struct xhci_hcd
*xhci
,
4546 struct usb_device
*udev
, u16 max_exit_latency
)
4548 struct xhci_virt_device
*virt_dev
;
4549 struct xhci_command
*command
;
4550 struct xhci_input_control_ctx
*ctrl_ctx
;
4551 struct xhci_slot_ctx
*slot_ctx
;
4552 unsigned long flags
;
4555 spin_lock_irqsave(&xhci
->lock
, flags
);
4557 virt_dev
= xhci
->devs
[udev
->slot_id
];
4560 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
4561 * xHC was re-initialized. Exit latency will be set later after
4562 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
4565 if (!virt_dev
|| max_exit_latency
== virt_dev
->current_mel
) {
4566 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4570 /* Attempt to issue an Evaluate Context command to change the MEL. */
4571 command
= xhci
->lpm_command
;
4572 xhci_slot_copy(xhci
, command
->in_ctx
, virt_dev
->out_ctx
);
4573 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4575 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
4576 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4577 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
4578 slot_ctx
->dev_info2
&= cpu_to_le32(~((u32
) MAX_EXIT
));
4579 slot_ctx
->dev_info2
|= cpu_to_le32(max_exit_latency
);
4581 xhci_dbg(xhci
, "Set up evaluate context for LPM MEL change.\n");
4582 xhci_dbg(xhci
, "Slot %u Input Context:\n", udev
->slot_id
);
4583 xhci_dbg_ctx(xhci
, command
->in_ctx
, 0);
4585 /* Issue and wait for the evaluate context command. */
4586 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
4588 xhci_dbg(xhci
, "Slot %u Output Context:\n", udev
->slot_id
);
4589 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 0);
4592 spin_lock_irqsave(&xhci
->lock
, flags
);
4593 virt_dev
->current_mel
= max_exit_latency
;
4594 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4599 static int calculate_max_exit_latency(struct usb_device
*udev
,
4600 enum usb3_link_state state_changed
,
4601 u16 hub_encoded_timeout
)
4603 unsigned long long u1_mel_us
= 0;
4604 unsigned long long u2_mel_us
= 0;
4605 unsigned long long mel_us
= 0;
4611 disabling_u1
= (state_changed
== USB3_LPM_U1
&&
4612 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4613 disabling_u2
= (state_changed
== USB3_LPM_U2
&&
4614 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4616 enabling_u1
= (state_changed
== USB3_LPM_U1
&&
4617 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4618 enabling_u2
= (state_changed
== USB3_LPM_U2
&&
4619 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4621 /* If U1 was already enabled and we're not disabling it,
4622 * or we're going to enable U1, account for the U1 max exit latency.
4624 if ((udev
->u1_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u1
) ||
4626 u1_mel_us
= DIV_ROUND_UP(udev
->u1_params
.mel
, 1000);
4627 if ((udev
->u2_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u2
) ||
4629 u2_mel_us
= DIV_ROUND_UP(udev
->u2_params
.mel
, 1000);
4631 if (u1_mel_us
> u2_mel_us
)
4635 /* xHCI host controller max exit latency field is only 16 bits wide. */
4636 if (mel_us
> MAX_EXIT
) {
4637 dev_warn(&udev
->dev
, "Link PM max exit latency of %lluus "
4638 "is too big.\n", mel_us
);
4644 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4645 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4646 struct usb_device
*udev
, enum usb3_link_state state
)
4648 struct xhci_hcd
*xhci
;
4649 u16 hub_encoded_timeout
;
4653 xhci
= hcd_to_xhci(hcd
);
4654 /* The LPM timeout values are pretty host-controller specific, so don't
4655 * enable hub-initiated timeouts unless the vendor has provided
4656 * information about their timeout algorithm.
4658 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4659 !xhci
->devs
[udev
->slot_id
])
4660 return USB3_LPM_DISABLED
;
4662 hub_encoded_timeout
= xhci_calculate_lpm_timeout(hcd
, udev
, state
);
4663 mel
= calculate_max_exit_latency(udev
, state
, hub_encoded_timeout
);
4665 /* Max Exit Latency is too big, disable LPM. */
4666 hub_encoded_timeout
= USB3_LPM_DISABLED
;
4670 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4673 return hub_encoded_timeout
;
4676 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4677 struct usb_device
*udev
, enum usb3_link_state state
)
4679 struct xhci_hcd
*xhci
;
4683 xhci
= hcd_to_xhci(hcd
);
4684 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4685 !xhci
->devs
[udev
->slot_id
])
4688 mel
= calculate_max_exit_latency(udev
, state
, USB3_LPM_DISABLED
);
4689 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4694 #else /* CONFIG_PM */
4696 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4697 struct usb_device
*udev
, enum usb3_link_state state
)
4699 return USB3_LPM_DISABLED
;
4702 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4703 struct usb_device
*udev
, enum usb3_link_state state
)
4707 #endif /* CONFIG_PM */
4709 /*-------------------------------------------------------------------------*/
4711 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4712 * internal data structures for the device.
4714 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
4715 struct usb_tt
*tt
, gfp_t mem_flags
)
4717 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4718 struct xhci_virt_device
*vdev
;
4719 struct xhci_command
*config_cmd
;
4720 struct xhci_input_control_ctx
*ctrl_ctx
;
4721 struct xhci_slot_ctx
*slot_ctx
;
4722 unsigned long flags
;
4723 unsigned think_time
;
4726 /* Ignore root hubs */
4730 vdev
= xhci
->devs
[hdev
->slot_id
];
4732 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
4735 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
4737 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
4741 spin_lock_irqsave(&xhci
->lock
, flags
);
4742 if (hdev
->speed
== USB_SPEED_HIGH
&&
4743 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
4744 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
4745 xhci_free_command(xhci
, config_cmd
);
4746 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4750 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
4751 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
4752 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4753 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
4754 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
4756 * refer to section 6.2.2: MTT should be 0 for full speed hub,
4757 * but it may be already set to 1 when setup an xHCI virtual
4758 * device, so clear it anyway.
4761 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
4762 else if (hdev
->speed
== USB_SPEED_FULL
)
4763 slot_ctx
->dev_info
&= cpu_to_le32(~DEV_MTT
);
4765 if (xhci
->hci_version
> 0x95) {
4766 xhci_dbg(xhci
, "xHCI version %x needs hub "
4767 "TT think time and number of ports\n",
4768 (unsigned int) xhci
->hci_version
);
4769 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
4770 /* Set TT think time - convert from ns to FS bit times.
4771 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4772 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4774 * xHCI 1.0: this field shall be 0 if the device is not a
4777 think_time
= tt
->think_time
;
4778 if (think_time
!= 0)
4779 think_time
= (think_time
/ 666) - 1;
4780 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
4781 slot_ctx
->tt_info
|=
4782 cpu_to_le32(TT_THINK_TIME(think_time
));
4784 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
4785 "TT think time or number of ports\n",
4786 (unsigned int) xhci
->hci_version
);
4788 slot_ctx
->dev_state
= 0;
4789 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4791 xhci_dbg(xhci
, "Set up %s for hub device.\n",
4792 (xhci
->hci_version
> 0x95) ?
4793 "configure endpoint" : "evaluate context");
4794 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
4795 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
4797 /* Issue and wait for the configure endpoint or
4798 * evaluate context command.
4800 if (xhci
->hci_version
> 0x95)
4801 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4804 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4807 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
4808 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
4810 xhci_free_command(xhci
, config_cmd
);
4814 int xhci_get_frame(struct usb_hcd
*hcd
)
4816 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4817 /* EHCI mods by the periodic size. Why? */
4818 return xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
) >> 3;
4821 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
4823 struct xhci_hcd
*xhci
;
4824 struct device
*dev
= hcd
->self
.controller
;
4828 /* Accept arbitrarily long scatter-gather lists */
4829 hcd
->self
.sg_tablesize
= ~0;
4830 /* XHCI controllers don't stop the ep queue on short packets :| */
4831 hcd
->self
.no_stop_on_short
= 1;
4833 if (usb_hcd_is_primary_hcd(hcd
)) {
4834 xhci
= kzalloc(sizeof(struct xhci_hcd
), GFP_KERNEL
);
4837 *((struct xhci_hcd
**) hcd
->hcd_priv
) = xhci
;
4838 xhci
->main_hcd
= hcd
;
4839 /* Mark the first roothub as being USB 2.0.
4840 * The xHCI driver will register the USB 3.0 roothub.
4842 hcd
->speed
= HCD_USB2
;
4843 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
4845 * USB 2.0 roothub under xHCI has an integrated TT,
4846 * (rate matching hub) as opposed to having an OHCI/UHCI
4847 * companion controller.
4851 /* xHCI private pointer was set in xhci_pci_probe for the second
4852 * registered roothub.
4854 xhci
= hcd_to_xhci(hcd
);
4855 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4856 if (HCC_64BIT_ADDR(temp
)) {
4857 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4858 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4860 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4865 #ifdef CONFIG_MTK_XHCI
4866 retval
= mtk_xhci_ip_init(hcd
, xhci
);
4871 xhci
->cap_regs
= hcd
->regs
;
4872 xhci
->op_regs
= hcd
->regs
+
4873 HC_LENGTH(xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
));
4874 xhci
->run_regs
= hcd
->regs
+
4875 (xhci_readl(xhci
, &xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4876 /* Cache read-only capability registers */
4877 xhci
->hcs_params1
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params1
);
4878 xhci
->hcs_params2
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params2
);
4879 xhci
->hcs_params3
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params3
);
4880 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
);
4881 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4882 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4883 xhci_print_registers(xhci
);
4885 get_quirks(dev
, xhci
);
4887 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4888 * success event after a short transfer. This quirk will ignore such
4891 if (xhci
->hci_version
> 0x96)
4892 xhci
->quirks
|= XHCI_SPURIOUS_SUCCESS
;
4894 /* Make sure the HC is halted. */
4895 retval
= xhci_halt(xhci
);
4899 xhci_dbg(xhci
, "Resetting HCD\n");
4900 /* Reset the internal HC memory state and registers. */
4901 retval
= xhci_reset(xhci
);
4904 xhci_dbg(xhci
, "Reset complete\n");
4906 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4907 if (HCC_64BIT_ADDR(temp
)) {
4908 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4909 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4911 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4914 xhci_dbg(xhci
, "Calling HCD init\n");
4915 /* Initialize HCD and host controller data structures. */
4916 retval
= xhci_init(hcd
);
4919 xhci_dbg(xhci
, "Called HCD init\n");
4921 printk("%s(%d): do mtk_xhci_set\n", __func__
, __LINE__
);
4929 MODULE_DESCRIPTION(DRIVER_DESC
);
4930 MODULE_AUTHOR(DRIVER_AUTHOR
);
4931 MODULE_LICENSE("GPL");
4933 #ifdef CONFIG_USBIF_COMPLIANCE
4934 #ifndef CONFIG_USB_MTK_DUALMODE
4935 static int xhci_hcd_driver_init(void)
4939 retval
= xhci_register_pci();
4941 printk(KERN_DEBUG
"Problem registering PCI driver.");
4945 #ifdef CONFIG_MTK_XHCI
4949 retval
= xhci_register_plat();
4951 printk(KERN_DEBUG
"Problem registering platform driver.");
4955 #ifdef CONFIG_MTK_XHCI
4956 retval
= xhci_attrs_init();
4958 printk(KERN_DEBUG
"Problem creating xhci attributes.");
4962 mtk_xhci_wakelock_init();
4966 * Check the compiler generated sizes of structures that must be laid
4967 * out in specific ways for hardware access.
4969 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
4970 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
4971 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
4972 /* xhci_device_control has eight fields, and also
4973 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4975 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
4976 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
4977 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
4978 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
4979 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
4980 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4981 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
4984 #ifdef CONFIG_MTK_XHCI
4986 xhci_unregister_plat();
4989 xhci_unregister_pci();
4993 static void xhci_hcd_driver_cleanup(void)
4995 xhci_unregister_pci();
4996 xhci_unregister_plat();
5000 static int xhci_hcd_driver_init(void)
5002 // init in mt_devs.c
5003 mtk_xhci_eint_iddig_init();
5004 mtk_xhci_switch_init();
5005 //mtk_xhci_wakelock_init();
5009 static void xhci_hcd_driver_cleanup(void)
5011 mtk_xhci_eint_iddig_deinit() ;
5016 static int mu3h_normal_driver_on
= 0 ;
5018 static int xhci_mu3h_proc_show(struct seq_file
*seq
, void *v
)
5020 seq_printf(seq
, "xhci_mu3h_proc_show, mu3h is %d (on:1, off:0)\n", mu3h_normal_driver_on
);
5024 static int xhci_mu3h_proc_open(struct inode
*inode
, struct file
*file
)
5026 return single_open(file
, xhci_mu3h_proc_show
, inode
->i_private
);
5029 static ssize_t
xhci_mu3h_proc_write(struct file
*file
, const char __user
*buf
, size_t length
, loff_t
*ppos
)
5035 if (length
>= sizeof(msg
)) {
5036 printk( "xhci_mu3h_proc_write length error, the error len is %d\n", (unsigned int)length
);
5039 if (copy_from_user(msg
, buf
, length
))
5044 printk("xhci_mu3h_proc_write: %s, current driver on/off: %d\n", msg
, mu3h_normal_driver_on
);
5046 if ((msg
[0] == '1') && (mu3h_normal_driver_on
== 0)){
5047 xhci_hcd_driver_init() ;
5048 mu3h_normal_driver_on
= 1 ;
5049 printk("registe mu3h driver : m3h xhci driver\n");
5050 }else if ((msg
[0] == '0') && (mu3h_normal_driver_on
== 1)){
5051 xhci_hcd_driver_cleanup();
5052 mu3h_normal_driver_on
= 0 ;
5053 printk("unregiste m3h xhci driver.\n");
5055 printk("xhci_mu3h_proc_write write faile !\n");
5060 static const struct file_operations mu3h_proc_fops
= {
5061 .owner
= THIS_MODULE
,
5062 .open
= xhci_mu3h_proc_open
,
5063 .write
= xhci_mu3h_proc_write
,
5065 .llseek
= seq_lseek
,
5069 static int __init
xhci_hcd_init(void)
5071 struct proc_dir_entry
*prEntry
;
5073 printk(KERN_DEBUG
"xhci_hcd_init");
5075 // set xhci up at boot up
5076 xhci_hcd_driver_init() ;
5077 mtk_xhci_wakelock_init();
5078 mu3h_normal_driver_on
= 1;
5081 prEntry
= proc_create("mu3h_driver_init", 0666, NULL
, &mu3h_proc_fops
);
5084 printk("create the mu3h init proc OK!\n") ;
5086 printk("[ERROR] create the mu3h init proc FAIL\n") ;
5089 #ifdef CONFIG_MTK_XHCI
5091 if (!misc_register(&mu3h_uevent_device
)){
5092 printk("create the mu3h_uevent_device uevent device OK!\n") ;
5095 printk("[ERROR] create the mu3h_uevent_device uevent device fail\n") ;
5103 module_init(xhci_hcd_init
);
5105 static void __exit
xhci_hcd_cleanup(void)
5107 #ifdef CONFIG_MTK_XHCI
5108 misc_deregister(&mu3h_uevent_device
);
5110 printk(KERN_DEBUG
"xhci_hcd_cleanup");
5112 module_exit(xhci_hcd_cleanup
);
5115 #ifndef CONFIG_USB_MTK_DUALMODE
5116 static int __init
xhci_hcd_init(void)
5123 retval
= xhci_register_pci();
5125 printk(KERN_DEBUG
"Problem registering PCI driver.");
5128 retval
= xhci_register_plat();
5130 printk(KERN_DEBUG
"Problem registering platform driver.");
5134 #ifdef CONFIG_MTK_XHCI
5135 retval
= xhci_attrs_init();
5137 printk(KERN_DEBUG
"Problem creating xhci attributes.");
5141 mtk_xhci_wakelock_init();
5145 * Check the compiler generated sizes of structures that must be laid
5146 * out in specific ways for hardware access.
5148 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
5149 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
5150 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
5151 /* xhci_device_control has eight fields, and also
5152 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5154 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
5155 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
5156 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
5157 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
5158 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
5159 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5160 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
5164 #ifdef CONFIG_MTK_XHCI
5166 xhci_unregister_plat();
5169 xhci_unregister_pci();
5172 module_init(xhci_hcd_init
);
5174 static void __exit
xhci_hcd_cleanup(void)
5176 xhci_unregister_pci();
5177 xhci_unregister_plat();
5180 module_exit(xhci_hcd_cleanup
);
5182 static int __init
xhci_hcd_init(void)
5184 mtk_xhci_eint_iddig_init();
5185 mtk_xhci_switch_init();
5186 mtk_xhci_wakelock_init();
5189 module_init(xhci_hcd_init
);
5191 static void __exit
xhci_hcd_cleanup(void)
5194 module_exit(xhci_hcd_cleanup
);