arch/arm64/include/asm/cputype.h

   1 /*
   2  * Copyright (C) 2012 ARM Ltd.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #ifndef __ASM_CPUTYPE_H
  17 #define __ASM_CPUTYPE_H
  18
  19 #define INVALID_HWID            ULONG_MAX
  20
  21 #define MPIDR_SMP_BITMASK (0x3 << 30)
  22 #define MPIDR_SMP_VALUE (0x2 << 30)
  23
  24 #define MPIDR_MT_BITMASK (0x1 << 24)
  25
  26 #define MPIDR_HWID_BITMASK      0xff00ffffff
  27
  28 #define MPIDR_INVALID (~MPIDR_HWID_BITMASK)
  29
  30 #define MPIDR_LEVEL_BITS_SHIFT  3
  31 #define MPIDR_LEVEL_BITS        (1 << MPIDR_LEVEL_BITS_SHIFT)
  32 #define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1)
  33
  34 #define MPIDR_LEVEL_SHIFT(level) \
  35         (((1 << level) >> 1) << MPIDR_LEVEL_BITS_SHIFT)
  36
  37 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \
  38         ((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)
  39
  40 #define read_cpuid(reg) ({                                              \
  41         u64 __val;                                                      \
  42         asm("mrs        %0, " #reg : "=r" (__val));                     \
  43         __val;                                                          \
  44 })
  45
  46 #define ARM_CPU_IMP_ARM         0x41
  47 #define ARM_CPU_IMP_APM         0x50
  48
  49 #define ARM_CPU_PART_AEM_V8     0xD0F0
  50 #define ARM_CPU_PART_FOUNDATION 0xD000
  51 #define ARM_CPU_PART_CORTEX_A53 0xD030
  52 #define ARM_CPU_PART_CORTEX_A57 0xD070
  53
  54 #define APM_CPU_PART_POTENZA    0x0000
  55
  56 #ifndef __ASSEMBLY__
  57
  58 /*
  59  * The CPU ID never changes at run time, so we might as well tell the
  60  * compiler that it's constant.  Use this function to read the CPU ID
  61  * rather than directly reading processor_id or read_cpuid() directly.
  62  */
  63 static inline u32 __attribute_const__ read_cpuid_id(void)
  64 {
  65         return read_cpuid(MIDR_EL1);
  66 }
  67
  68 static inline u64 __attribute_const__ read_cpuid_mpidr(void)
  69 {
  70         return read_cpuid(MPIDR_EL1);
  71 }
  72
  73 static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
  74 {
  75         return (read_cpuid_id() & 0xFF000000) >> 24;
  76 }
  77
  78 static inline unsigned int __attribute_const__ read_cpuid_part_number(void)
  79 {
  80         return (read_cpuid_id() & 0xFFF0);
  81 }
  82
  83 static inline u32 __attribute_const__ read_cpuid_cachetype(void)
  84 {
  85         return read_cpuid(CTR_EL0);
  86 }
  87
  88 #endif /* __ASSEMBLY__ */
  89
  90 #endif