Merge tag 'v3.10.55' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-mt8127 / tpw8127_c_mlc / core / board-custom.h
1 #ifndef __ARCH_ARM_MACH_MT6575_CUSTOM_BOARD_H
2 #define __ARCH_ARM_MACH_MT6575_CUSTOM_BOARD_H
3
4 #include <generated/autoconf.h>
5
6 /*=======================================================================*/
7 /* MT6575 SD */
8 /*=======================================================================*/
9 //#define CFG_DEV_MSDC0
10 #define CFG_DEV_MSDC1
11 //#define CFG_DEV_MSDC2
12 //#define CFG_DEV_MSDC3
13 //#define CFG_DEV_MSDC4
14 #if defined(CONFIG_MTK_COMBO) || defined(CONFIG_MTK_COMBO_MODULE)
15 /*
16 SDIO slot index number used by connectivity combo chip:
17 0: invalid (used by memory card)
18 1: MSDC1
19 2: MSDC2
20 */
21 #define CONFIG_MTK_WCN_CMB_SDIO_SLOT (3) /* MSDC3 */
22 #else
23 #undef CONFIG_MTK_WCN_CMB_SDIO_SLOT
24 #endif
25 /*For MT6582 platform we disable COMBO SDIO SLOT defination*/
26 #undef CONFIG_MTK_WCN_CMB_SDIO_SLOT
27
28 #if 0 /* FIXME. */
29 /*=======================================================================*/
30 /* MT6575 UART */
31 /*=======================================================================*/
32 #define CFG_DEV_UART1
33 #define CFG_DEV_UART2
34 #define CFG_DEV_UART3
35 #define CFG_DEV_UART4
36
37 #define CFG_UART_PORTS (4)
38
39 /*=======================================================================*/
40 /* MT6575 I2C */
41 /*=======================================================================*/
42 #define CFG_DEV_I2C
43 //#define CFG_I2C_HIGH_SPEED_MODE
44 //#define CFG_I2C_DMA_MODE
45
46 /*=======================================================================*/
47 /* MT6575 ADB */
48 /*=======================================================================*/
49 #define ADB_SERIAL "E1K"
50
51 #endif
52
53 /*=======================================================================*/
54 /* MT6575 NAND FLASH */
55 /*=======================================================================*/
56 #if 0
57 #define RAMDOM_READ 1<<0
58 #define CACHE_READ 1<<1
59 /*******************************************************************************
60 * NFI & ECC Configuration
61 *******************************************************************************/
62 typedef struct
63 {
64 u16 id; //deviceid+menuid
65 u8 addr_cycle;
66 u8 iowidth;
67 u16 totalsize;
68 u16 blocksize;
69 u16 pagesize;
70 u32 timmingsetting;
71 char devciename[14];
72 u32 advancedmode; //
73 }flashdev_info,*pflashdev_info;
74
75 static const flashdev_info g_FlashTable[]={
76 //micro
77 {0xAA2C, 5, 8, 256, 128, 2048, 0x01113, "MT29F2G08ABD", 0},
78 {0xB12C, 4, 16, 128, 128, 2048, 0x01113, "MT29F1G16ABC", 0},
79 {0xBA2C, 5, 16, 256, 128, 2048, 0x01113, "MT29F2G16ABD", 0},
80 {0xAC2C, 5, 8, 512, 128, 2048, 0x01113, "MT29F4G08ABC", 0},
81 {0xBC2C, 5, 16, 512, 128, 2048, 0x44333, "MT29F4G16ABD", 0},
82 //samsung
83 {0xBAEC, 5, 16, 256, 128, 2048, 0x01123, "K522H1GACE", 0},
84 {0xBCEC, 5, 16, 512, 128, 2048, 0x01123, "K524G2GACB", 0},
85 {0xDAEC, 5, 8, 256, 128, 2048, 0x33222, "K9F2G08U0A", RAMDOM_READ},
86 {0xF1EC, 4, 8, 128, 128, 2048, 0x01123, "K9F1G08U0A", RAMDOM_READ},
87 {0xAAEC, 5, 8, 256, 128, 2048, 0x01123, "K9F2G08R0A", 0},
88 //hynix
89 {0xD3AD, 5, 8, 1024, 256, 2048, 0x44333, "HY27UT088G2A", 0},
90 {0xA1AD, 4, 8, 128, 128, 2048, 0x01123, "H8BCSOPJOMCP", 0},
91 {0xBCAD, 5, 16, 512, 128, 2048, 0x01123, "H8BCSOUNOMCR", 0},
92 {0xBAAD, 5, 16, 256, 128, 2048, 0x01123, "H8BCSOSNOMCR", 0},
93 //toshiba
94 {0x9598, 5, 16, 816, 128, 2048, 0x00113, "TY9C000000CMG", 0},
95 {0x9498, 5, 16, 375, 128, 2048, 0x00113, "TY9C000000CMG", 0},
96 {0xC198, 4, 16, 128, 128, 2048, 0x44333, "TC58NWGOS8C", 0},
97 {0xBA98, 5, 16, 256, 128, 2048, 0x02113, "TC58NYG1S8C", 0},
98 //st-micro
99 {0xBA20, 5, 16, 256, 128, 2048, 0x01123, "ND02CGR4B2DI6", 0},
100
101 // elpida
102 {0xBC20, 5, 16, 512, 128, 2048, 0x01123, "04GR4B2DDI6", 0},
103 {0x0000, 0, 0, 0, 0, 0, 0, "xxxxxxxxxxxxx", 0}
104 };
105 #endif
106
107
108 #define NFI_DEFAULT_ACCESS_TIMING (0x44333)
109
110 //uboot only support 1 cs
111 #define NFI_CS_NUM (2)
112 #define NFI_DEFAULT_CS (0)
113
114 #define USE_AHB_MODE (1)
115
116 #define PLATFORM_EVB (1)
117
118 #endif /* __ARCH_ARM_MACH_MT6575_CUSTOM_BOARD_H */
119