arch/arm/mach-mt8127/pixi3_10/lcm/inc/lcm_drv.h

   1 #ifndef __LCM_DRV_H__
   2 #define __LCM_DRV_H__
   3
   4
   5 // ---------------------------------------------------------------------------
   6
   7 #ifndef ARY_SIZE
   8 #define ARY_SIZE(x) (sizeof((x)) / sizeof((x[0])))
   9 #endif
  10
  11 // ---------------------------------------------------------------------------
  12
  13 /* common enumerations */
  14
  15 typedef enum
  16 {
  17     LCM_TYPE_DBI = 0,
  18     LCM_TYPE_DPI,
  19     LCM_TYPE_DSI
  20 } LCM_TYPE;
  21
  22
  23 typedef enum
  24 {
  25     LCM_CTRL_NONE = 0,
  26     LCM_CTRL_SERIAL_DBI,
  27     LCM_CTRL_PARALLEL_DBI,
  28     LCM_CTRL_GPIO
  29 } LCM_CTRL;
  30
  31
  32 typedef enum
  33 {
  34     LCM_POLARITY_RISING  = 0,
  35     LCM_POLARITY_FALLING = 1
  36 } LCM_POLARITY;
  37
  38
  39 typedef enum
  40 {
  41     LCM_CLOCK_PHASE_0  = 0,
  42     LCM_CLOCK_PHASE_90 = 1
  43 } LCM_CLOCK_PHASE;
  44
  45
  46 typedef enum
  47 {
  48     LCM_COLOR_ORDER_RGB = 0,
  49     LCM_COLOR_ORDER_BGR = 1
  50 } LCM_COLOR_ORDER;
  51
  52
  53 typedef enum
  54 {
  55    LCM_DRIVING_CURRENT_DEFAULT,
  56    LCM_DRIVING_CURRENT_8MA       = (1 << 0),
  57    LCM_DRIVING_CURRENT_4MA       = (1 << 1),
  58    LCM_DRIVING_CURRENT_2MA       = (1 << 2),
  59    LCM_DRIVING_CURRENT_SLEW_CNTL = (1 << 3),
  60    LCM_DRIVING_CURRENT_6575_4MA  = (1 << 4),
  61    LCM_DRIVING_CURRENT_6575_8MA  = (3 << 4),
  62    LCM_DRIVING_CURRENT_6575_12MA  = (2 << 4),
  63    LCM_DRIVING_CURRENT_6575_16MA  = (4 << 4),
  64    LCM_DRIVING_CURRENT_6MA,
  65    LCM_DRIVING_CURRENT_12MA,
  66    LCM_DRIVING_CURRENT_16MA
  67 } LCM_DRIVING_CURRENT;
  68
  69 typedef enum{
  70         LCM_INTERFACE_NOTDEFINED = 0,
  71         LCM_INTERFACE_DSI0,
  72         LCM_INTERFACE_DSI1,
  73         LCM_INTERFACE_DSI_DUAL,
  74         LCM_INTERFACE_DPI0,
  75         LCM_INTERFACE_DPI1,
  76         LCM_INTERFACE_DBI0
  77 }LCM_INTERFACE_ID;
  78
  79 typedef enum{
  80         LCM_IOCTL_NULL = 0,
  81 }LCM_IOCTL;
  82
  83 /* DBI related enumerations */
  84
  85 typedef enum
  86 {
  87     LCM_DBI_CLOCK_FREQ_104M = 0,
  88     LCM_DBI_CLOCK_FREQ_52M,
  89     LCM_DBI_CLOCK_FREQ_26M,
  90     LCM_DBI_CLOCK_FREQ_13M,
  91     LCM_DBI_CLOCK_FREQ_7M
  92 } LCM_DBI_CLOCK_FREQ;
  93
  94
  95 typedef enum
  96 {
  97     LCM_DBI_DATA_WIDTH_8BITS  = 0,
  98     LCM_DBI_DATA_WIDTH_9BITS  = 1,
  99     LCM_DBI_DATA_WIDTH_16BITS = 2,
 100     LCM_DBI_DATA_WIDTH_18BITS = 3,
 101     LCM_DBI_DATA_WIDTH_24BITS = 4,
 102     LCM_DBI_DATA_WIDTH_32BITS = 5
 103 } LCM_DBI_DATA_WIDTH;
 104
 105
 106 typedef enum
 107 {
 108     LCM_DBI_CPU_WRITE_8_BITS  = 8,
 109     LCM_DBI_CPU_WRITE_16_BITS = 16,
 110     LCM_DBI_CPU_WRITE_32_BITS = 32,
 111 } LCM_DBI_CPU_WRITE_BITS;
 112
 113
 114 typedef enum
 115 {
 116     LCM_DBI_FORMAT_RGB332 = 0,
 117     LCM_DBI_FORMAT_RGB444 = 1,
 118     LCM_DBI_FORMAT_RGB565 = 2,
 119     LCM_DBI_FORMAT_RGB666 = 3,
 120     LCM_DBI_FORMAT_RGB888 = 4
 121 } LCM_DBI_FORMAT;
 122
 123
 124 typedef enum
 125 {
 126     LCM_DBI_TRANS_SEQ_MSB_FIRST = 0,
 127     LCM_DBI_TRANS_SEQ_LSB_FIRST = 1
 128 } LCM_DBI_TRANS_SEQ;
 129
 130
 131 typedef enum
 132 {
 133     LCM_DBI_PADDING_ON_LSB = 0,
 134     LCM_DBI_PADDING_ON_MSB = 1
 135 } LCM_DBI_PADDING;
 136
 137
 138 typedef enum
 139 {
 140     LCM_DBI_TE_MODE_DISABLED       = 0,
 141     LCM_DBI_TE_MODE_VSYNC_ONLY     = 1,
 142     LCM_DBI_TE_MODE_VSYNC_OR_HSYNC = 2,
 143 } LCM_DBI_TE_MODE;
 144
 145
 146 typedef enum
 147 {
 148     LCM_DBI_TE_VS_WIDTH_CNT_DIV_8  = 0,
 149     LCM_DBI_TE_VS_WIDTH_CNT_DIV_16 = 1,
 150     LCM_DBI_TE_VS_WIDTH_CNT_DIV_32 = 2,
 151     LCM_DBI_TE_VS_WIDTH_CNT_DIV_64 = 3,
 152 } LCM_DBI_TE_VS_WIDTH_CNT_DIV;
 153
 154
 155 /* DPI related enumerations */
 156
 157 typedef enum
 158 {
 159     LCM_DPI_FORMAT_RGB565 = 0,
 160     LCM_DPI_FORMAT_RGB666 = 1,
 161     LCM_DPI_FORMAT_RGB888 = 2
 162 } LCM_DPI_FORMAT;
 163
 164 typedef enum
 165 {
 166     LCM_SERIAL_CLOCK_FREQ_104M = 0,
 167     LCM_SERIAL_CLOCK_FREQ_26M,
 168     LCM_SERIAL_CLOCK_FREQ_52M
 169 } LCM_SERIAL_CLOCK_FREQ;
 170
 171 typedef enum
 172 {
 173     LCM_SERIAL_CLOCK_DIV_2 = 0,
 174     LCM_SERIAL_CLOCK_DIV_4 = 1,
 175     LCM_SERIAL_CLOCK_DIV_8 = 2,
 176     LCM_SERIAL_CLOCK_DIV_16 = 3,
 177 } LCM_SERIAL_CLOCK_DIV;
 178
 179
 180 /* DSI related enumerations */
 181
 182 typedef enum
 183 {
 184     CMD_MODE = 0,
 185     SYNC_PULSE_VDO_MODE = 1,
 186     SYNC_EVENT_VDO_MODE = 2,
 187     BURST_VDO_MODE = 3
 188 } LCM_DSI_MODE_CON;
 189
 190
 191 typedef enum
 192 {
 193     LCM_ONE_LANE = 1,
 194     LCM_TWO_LANE = 2,
 195     LCM_THREE_LANE = 3,
 196     LCM_FOUR_LANE = 4,
 197 } LCM_LANE_NUM;
 198
 199
 200 typedef enum
 201 {
 202     LCM_DSI_FORMAT_RGB565 = 0,
 203     LCM_DSI_FORMAT_RGB666 = 1,
 204     LCM_DSI_FORMAT_RGB888 = 2
 205 } LCM_DSI_FORMAT;
 206
 207
 208 typedef enum
 209 {
 210     LCM_DSI_TRANS_SEQ_MSB_FIRST = 0,
 211     LCM_DSI_TRANS_SEQ_LSB_FIRST = 1
 212 } LCM_DSI_TRANS_SEQ;
 213
 214
 215 typedef enum
 216 {
 217     LCM_DSI_PADDING_ON_LSB = 0,
 218     LCM_DSI_PADDING_ON_MSB = 1
 219 } LCM_DSI_PADDING;
 220
 221
 222 typedef enum
 223 {
 224     LCM_PACKED_PS_16BIT_RGB565=0,
 225     LCM_LOOSELY_PS_18BIT_RGB666=1,
 226     LCM_PACKED_PS_24BIT_RGB888=2,
 227     LCM_PACKED_PS_18BIT_RGB666=3
 228 } LCM_PS_TYPE;
 229
 230 typedef enum
 231 {
 232         LCM_DSI_6589_PLL_CLOCK_NULL       = 0,
 233     LCM_DSI_6589_PLL_CLOCK_201_5  = 1,
 234     LCM_DSI_6589_PLL_CLOCK_208    = 2,
 235     LCM_DSI_6589_PLL_CLOCK_214_5  = 3,
 236     LCM_DSI_6589_PLL_CLOCK_221    = 4,
 237     LCM_DSI_6589_PLL_CLOCK_227_5  = 5,
 238         LCM_DSI_6589_PLL_CLOCK_234        = 6,
 239     LCM_DSI_6589_PLL_CLOCK_240_5  = 7,
 240     LCM_DSI_6589_PLL_CLOCK_247    = 8,
 241     LCM_DSI_6589_PLL_CLOCK_253_5  = 9,
 242     LCM_DSI_6589_PLL_CLOCK_260    = 10,
 243     LCM_DSI_6589_PLL_CLOCK_266_5  = 11,
 244         LCM_DSI_6589_PLL_CLOCK_273        = 12,
 245     LCM_DSI_6589_PLL_CLOCK_279_5  = 13,
 246     LCM_DSI_6589_PLL_CLOCK_286    = 14,
 247     LCM_DSI_6589_PLL_CLOCK_292_5  = 15,
 248     LCM_DSI_6589_PLL_CLOCK_299    = 16,
 249     LCM_DSI_6589_PLL_CLOCK_305_5  = 17,
 250         LCM_DSI_6589_PLL_CLOCK_312        = 18,
 251     LCM_DSI_6589_PLL_CLOCK_318_5  = 19,
 252     LCM_DSI_6589_PLL_CLOCK_325    = 20,
 253     LCM_DSI_6589_PLL_CLOCK_331_5  = 21,
 254     LCM_DSI_6589_PLL_CLOCK_338    = 22,
 255     LCM_DSI_6589_PLL_CLOCK_344_5  = 23,
 256         LCM_DSI_6589_PLL_CLOCK_351        = 24,
 257     LCM_DSI_6589_PLL_CLOCK_357_5  = 25,
 258     LCM_DSI_6589_PLL_CLOCK_364    = 26,
 259     LCM_DSI_6589_PLL_CLOCK_370_5  = 27,
 260     LCM_DSI_6589_PLL_CLOCK_377    = 28,
 261     LCM_DSI_6589_PLL_CLOCK_383_5  = 29,
 262         LCM_DSI_6589_PLL_CLOCK_390        = 30,
 263     LCM_DSI_6589_PLL_CLOCK_396_5  = 31,
 264     LCM_DSI_6589_PLL_CLOCK_403    = 32,
 265     LCM_DSI_6589_PLL_CLOCK_409_5  = 33,
 266     LCM_DSI_6589_PLL_CLOCK_416    = 34,
 267     LCM_DSI_6589_PLL_CLOCK_422_5  = 35,
 268         LCM_DSI_6589_PLL_CLOCK_429        = 36,
 269     LCM_DSI_6589_PLL_CLOCK_435_5  = 37,
 270     LCM_DSI_6589_PLL_CLOCK_442    = 38,
 271     LCM_DSI_6589_PLL_CLOCK_448_5  = 39,
 272     LCM_DSI_6589_PLL_CLOCK_455    = 40,
 273     LCM_DSI_6589_PLL_CLOCK_461_5  = 41,
 274         LCM_DSI_6589_PLL_CLOCK_468        = 42,
 275     LCM_DSI_6589_PLL_CLOCK_474_5  = 43,
 276     LCM_DSI_6589_PLL_CLOCK_481    = 44,
 277     LCM_DSI_6589_PLL_CLOCK_487_5  = 45,
 278     LCM_DSI_6589_PLL_CLOCK_494    = 46,
 279     LCM_DSI_6589_PLL_CLOCK_500_5  = 47,
 280         LCM_DSI_6589_PLL_CLOCK_507        = 48,
 281     LCM_DSI_6589_PLL_CLOCK_513_5  = 49,
 282         LCM_DSI_6589_PLL_CLOCK_520        = 50,
 283 } LCM_DSI_PLL_CLOCK;
 284
 285 // ---------------------------------------------------------------------------
 286
 287 typedef struct
 288 {
 289     LCM_COLOR_ORDER color_order;
 290     LCM_DBI_TRANS_SEQ trans_seq;
 291     LCM_DBI_PADDING padding;
 292     LCM_DBI_FORMAT format;
 293     LCM_DBI_DATA_WIDTH width;
 294 } LCM_DBI_DATA_FORMAT;
 295
 296
 297 typedef struct
 298 {
 299     LCM_POLARITY cs_polarity;
 300     LCM_POLARITY clk_polarity;
 301     LCM_CLOCK_PHASE clk_phase;
 302     unsigned int is_non_dbi_mode;
 303
 304     LCM_SERIAL_CLOCK_FREQ clock_base;
 305     LCM_SERIAL_CLOCK_DIV  clock_div;
 306 ////////////////////////////////////MT6575 added params, and if lcm driver is for 6575, only care these below params
 307     unsigned int css;
 308     unsigned int csh;
 309     unsigned int rd_1st;
 310     unsigned int rd_2nd;
 311     unsigned int wr_1st;
 312     unsigned int wr_2nd;
 313
 314     unsigned int sif_3wire;
 315     unsigned int sif_sdi;
 316     LCM_POLARITY sif_1st_pol;
 317     LCM_POLARITY sif_sck_def;
 318     unsigned int sif_div2;
 319     unsigned int sif_hw_cs;
 320 ////////////////////////////////////
 321 } LCM_DBI_SERIAL_PARAMS;
 322
 323
 324 typedef struct
 325 {
 326     /* timing parameters */
 327     unsigned int write_setup;
 328     unsigned int write_hold;
 329     unsigned int write_wait;
 330     unsigned int read_setup;
 331     unsigned int read_hold;
 332     unsigned int read_latency;
 333     unsigned int wait_period;
 334     /*only for 6575*/
 335     unsigned int cs_high_width;
 336 } LCM_DBI_PARALLEL_PARAMS;
 337
 338
 339 typedef struct
 340 {
 341     LCM_COLOR_ORDER color_order;
 342     LCM_DSI_TRANS_SEQ trans_seq;
 343     LCM_DSI_PADDING padding;
 344     LCM_DSI_FORMAT format;
 345 } LCM_DSI_DATA_FORMAT;
 346
 347
 348 // ---------------------------------------------------------------------------
 349
 350 typedef struct
 351 {
 352     /* common parameters for serial & parallel interface */
 353     unsigned int port;
 354     LCM_DBI_CLOCK_FREQ     clock_freq;
 355     LCM_DBI_DATA_WIDTH     data_width;
 356     LCM_DBI_DATA_FORMAT    data_format;
 357     LCM_DBI_CPU_WRITE_BITS cpu_write_bits;
 358     LCM_DRIVING_CURRENT    io_driving_current;
 359     LCM_DRIVING_CURRENT    msb_io_driving_current;
 360
 361     /* tearing control */
 362     LCM_DBI_TE_MODE              te_mode;
 363     LCM_POLARITY                 te_edge_polarity;
 364     unsigned int                 te_hs_delay_cnt;
 365     unsigned int                 te_vs_width_cnt;
 366     LCM_DBI_TE_VS_WIDTH_CNT_DIV  te_vs_width_cnt_div;
 367
 368     /* particular parameters for serial & parallel interface */
 369     LCM_DBI_SERIAL_PARAMS serial;
 370     LCM_DBI_PARALLEL_PARAMS parallel;
 371 } LCM_DBI_PARAMS;
 372
 373
 374 typedef struct
 375 {
 376     /*
 377         Pixel Clock Frequency = 26MHz * mipi_pll_clk_div1
 378                                       / (mipi_pll_clk_ref + 1)
 379                                       / (2 * mipi_pll_clk_div2)
 380                                       / dpi_clk_div
 381     */
 382     unsigned int mipi_pll_clk_ref;   // 0..1
 383     unsigned int mipi_pll_clk_div1;  // 0..63
 384     unsigned int mipi_pll_clk_div2;  // 0..15
 385     unsigned int mipi_pll_clk_fbk_div;  //PCLK=> 8: 26MHz, 10: 35MHz, 12: 40MHz
 386     unsigned int dpi_clk_div;        // 2..32
 387     unsigned int dpi_clk_duty;       // (dpi_clk_div - 1) .. 31
 388     unsigned int PLL_CLOCK;
 389     unsigned int dpi_clock;
 390     unsigned int ssc_disable;
 391     unsigned int ssc_range;
 392
 393     unsigned int width;
 394     unsigned int height;
 395     unsigned int bg_width;
 396     unsigned int bg_height;
 397
 398     /* polarity parameters */
 399     LCM_POLARITY clk_pol;
 400     LCM_POLARITY de_pol;
 401     LCM_POLARITY vsync_pol;
 402     LCM_POLARITY hsync_pol;
 403
 404     /* timing parameters */
 405     unsigned int hsync_pulse_width;
 406     unsigned int hsync_back_porch;
 407     unsigned int hsync_front_porch;
 408     unsigned int vsync_pulse_width;
 409     unsigned int vsync_back_porch;
 410     unsigned int vsync_front_porch;
 411
 412     /* output format parameters */
 413     LCM_DPI_FORMAT format;
 414     LCM_COLOR_ORDER rgb_order;
 415     unsigned int is_serial_output;
 416     unsigned int i2x_en;
 417     unsigned int i2x_edge;
 418     unsigned int embsync;
 419         unsigned int lvds_tx_en;
 420     /* intermediate buffers parameters */
 421     unsigned int intermediat_buffer_num; // 2..3
 422
 423     /* iopad parameters */
 424     LCM_DRIVING_CURRENT io_driving_current;
 425     LCM_DRIVING_CURRENT lsb_io_driving_current;
 426
 427 } LCM_DPI_PARAMS;
 428
 429
 430 // ---------------------------------------------------------------------------
 431
 432 typedef struct
 433 {
 434     LCM_DSI_MODE_CON    mode;
 435     unsigned int                DSI_WMEM_CONTI;
 436     unsigned int                DSI_RMEM_CONTI;
 437     unsigned int                VC_NUM;
 438
 439     LCM_LANE_NUM                LANE_NUM;
 440     LCM_DSI_DATA_FORMAT data_format;
 441
 442     /* intermediate buffers parameters */
 443     unsigned int                intermediat_buffer_num; // 2..3
 444
 445     LCM_PS_TYPE                 PS;
 446     unsigned int                word_count;
 447
 448     unsigned int                packet_size;
 449
 450     unsigned int                vertical_sync_active;
 451     unsigned int                vertical_backporch;
 452     unsigned int                vertical_frontporch;
 453     unsigned int                vertical_active_line;
 454
 455     unsigned int                horizontal_sync_active;
 456     unsigned int                horizontal_backporch;
 457     unsigned int                horizontal_frontporch;
 458     unsigned int                horizontal_blanking_pixel;
 459     unsigned int                horizontal_active_pixel;
 460     unsigned int                horizontal_bllp;
 461
 462     unsigned int                line_byte;
 463     unsigned int                horizontal_sync_active_byte;
 464     unsigned int                horizontal_backporch_byte;
 465     unsigned int                horizontal_frontporch_byte;
 466     unsigned int                rgb_byte;
 467
 468     unsigned int                horizontal_sync_active_word_count;
 469     unsigned int                horizontal_backporch_word_count;
 470     unsigned int                horizontal_frontporch_word_count;
 471
 472     unsigned char               HS_TRAIL;
 473     unsigned char               HS_ZERO;
 474     unsigned char               HS_PRPR;
 475     unsigned char               LPX;
 476
 477     unsigned char               TA_SACK;
 478     unsigned char               TA_GET;
 479     unsigned char               TA_SURE;
 480     unsigned char               TA_GO;
 481
 482     unsigned char               CLK_TRAIL;
 483     unsigned char               CLK_ZERO;
 484     unsigned char               LPX_WAIT;
 485     unsigned char               CONT_DET;
 486
 487     unsigned char               CLK_HS_PRPR;
 488     unsigned char               CLK_HS_POST;
 489     unsigned char       DA_HS_EXIT;
 490     unsigned char       CLK_HS_EXIT;
 491
 492     unsigned int                pll_select;
 493     unsigned int                pll_div1;
 494     unsigned int                pll_div2;
 495     unsigned int        fbk_div;
 496     unsigned int                fbk_sel;
 497     unsigned int                rg_bir;
 498     unsigned int                rg_bic;
 499     unsigned int                rg_bp;
 500     unsigned int                PLL_CLOCK;
 501     unsigned int                dsi_clock;
 502     unsigned int                ssc_disable;
 503     unsigned int                ssc_range;
 504     unsigned int                compatibility_for_nvk;
 505     unsigned int                cont_clock;
 506     unsigned int                ufoe_enable;
 507
 508     unsigned int                lcm_int_te_monitor;
 509     unsigned int                lcm_int_te_period;
 510
 511     unsigned int                lcm_ext_te_monitor;
 512     unsigned int                lcm_ext_te_enable;
 513
 514     unsigned int                noncont_clock;
 515     unsigned int                noncont_clock_period;
 516
 517 } LCM_DSI_PARAMS;
 518
 519 // ---------------------------------------------------------------------------
 520
 521 typedef struct
 522 {
 523     LCM_TYPE type;
 524     LCM_CTRL ctrl;  //! how to control LCM registers
 525     LCM_INTERFACE_ID lcm_if;
 526         LCM_INTERFACE_ID lcm_cmd_if;
 527     /* common parameters */
 528     unsigned int width;
 529     unsigned int height;
 530     unsigned int io_select_mode; //DBI or DPI should select IO mode according to chip spec
 531
 532     /* particular parameters */
 533     LCM_DBI_PARAMS dbi;
 534     LCM_DPI_PARAMS dpi;
 535     LCM_DSI_PARAMS dsi;
 536     unsigned int physical_width;
 537     unsigned int physical_height;
 538         unsigned int od_table_size;
 539         void *od_table;
 540 } LCM_PARAMS;
 541
 542
 543 // ---------------------------------------------------------------------------
 544
 545 #define REGFLAG_ESCAPE_ID               (0x00)
 546 #define REGFLAG_DELAY_MS_V3             (0xFF)
 547
 548 typedef struct {
 549     unsigned char id;
 550     unsigned char cmd;
 551     unsigned char count;
 552     unsigned char para_list[128];
 553 } LCM_setting_table_V3;
 554
 555 typedef struct
 556 {
 557     void (*set_reset_pin)(unsigned int value);
 558     void (*set_chip_select)(unsigned int value);
 559     int  (*set_gpio_out)(unsigned int gpio, unsigned int value);
 560
 561     void (*udelay)(unsigned int us);
 562     void (*mdelay)(unsigned int ms);
 563
 564     void (*send_cmd)(unsigned int cmd);
 565     void (*send_data)(unsigned int data);
 566     unsigned int (*read_data)(void);
 567
 568     void (*dsi_set_cmdq_V3)(LCM_setting_table_V3 *para_list, unsigned int size, unsigned char force_update);
 569     void (*dsi_set_cmdq_V2)(unsigned cmd, unsigned char count, unsigned char *para_list, unsigned char force_update);
 570     void (*dsi_set_cmdq)(unsigned int *pdata, unsigned int queue_size, unsigned char force_update);
 571     void (*dsi_write_cmd)(unsigned int cmd);
 572     void (*dsi_write_regs)(unsigned int addr, unsigned int *para, unsigned int nums);
 573     unsigned int (*dsi_read_reg)(void);
 574     unsigned int (*dsi_dcs_read_lcm_reg)(unsigned char cmd);
 575     unsigned int (*dsi_dcs_read_lcm_reg_v2)(unsigned char cmd, unsigned char *buffer, unsigned char buffer_size);
 576     void (*wait_transfer_done)(void);
 577
 578     /** FIXME: GPIO mode should not be configured in lcm driver
 579                REMOVE ME after GPIO customization is done
 580     */
 581     int (*set_gpio_mode)(unsigned int pin, unsigned int mode);
 582     int (*set_gpio_dir)(unsigned int pin, unsigned int dir);
 583     int (*set_gpio_pull_enable)(unsigned int pin, unsigned char pull_en);
 584
 585 } LCM_UTIL_FUNCS;
 586 typedef enum
 587 {
 588         LCM_DRV_IOCTL_ENABLE_CMD_MODE = 0x100,
 589 }LCM_DRV_IOCTL_CMD;
 590
 591 typedef struct
 592 {
 593     const char* name;
 594     void (*set_util_funcs)(const LCM_UTIL_FUNCS *util);
 595     void (*get_params)(LCM_PARAMS *params);
 596
 597     void (*init)(void);
 598     void (*suspend)(void);
 599     void (*resume)(void);
 600
 601     // for power-on sequence refinement
 602     void (*init_power)(void);
 603     void (*suspend_power)(void);
 604     void (*resume_power)(void);
 605
 606     void (*update)(unsigned int x, unsigned int y, unsigned int width, unsigned int height);
 607     unsigned int (*compare_id)(void);
 608
 609     ///////////////////////////CABC backlight related function
 610     void (*set_backlight)(unsigned int level);
 611     void (*set_pwm)(unsigned int divider);
 612     unsigned int (*get_pwm)(unsigned int divider);
 613     void (*set_backlight_mode)(unsigned int mode);
 614     ///////////////////////////
 615
 616     /////////////ESD_RECOVERY//////////////////////
 617     unsigned int (*esd_check)(void);
 618     unsigned int  (*esd_recover)(void);
 619     unsigned int (*check_status)(void);
 620     unsigned int (*ata_check)(unsigned char *buffer);
 621         void (*read_fb)(unsigned char *buffer);
 622     int (*ioctl)(LCM_DRV_IOCTL_CMD cmd, unsigned int data);
 623     /////////////////////////////////////////////////
 624 } LCM_DRIVER;
 625
 626
 627 // ---------------------------------------------------------------------------
 628 //  LCM Driver Functions
 629 // ---------------------------------------------------------------------------
 630
 631 const LCM_DRIVER* LCM_GetDriver(void);
 632 unsigned char which_lcd_module_triple(void);
 633
 634 #endif // __LCM_DRV_H__