5 // ---------------------------------------------------------------------------
8 #define ARY_SIZE(x) (sizeof((x)) / sizeof((x[0])))
11 // ---------------------------------------------------------------------------
13 /* common enumerations */
27 LCM_CTRL_PARALLEL_DBI
,
34 LCM_POLARITY_RISING
= 0,
35 LCM_POLARITY_FALLING
= 1
41 LCM_CLOCK_PHASE_0
= 0,
42 LCM_CLOCK_PHASE_90
= 1
48 LCM_COLOR_ORDER_RGB
= 0,
49 LCM_COLOR_ORDER_BGR
= 1
55 LCM_DRIVING_CURRENT_DEFAULT
,
56 LCM_DRIVING_CURRENT_8MA
= (1 << 0),
57 LCM_DRIVING_CURRENT_4MA
= (1 << 1),
58 LCM_DRIVING_CURRENT_2MA
= (1 << 2),
59 LCM_DRIVING_CURRENT_SLEW_CNTL
= (1 << 3),
60 LCM_DRIVING_CURRENT_6575_4MA
= (1 << 4),
61 LCM_DRIVING_CURRENT_6575_8MA
= (3 << 4),
62 LCM_DRIVING_CURRENT_6575_12MA
= (2 << 4),
63 LCM_DRIVING_CURRENT_6575_16MA
= (4 << 4),
64 LCM_DRIVING_CURRENT_6MA
,
65 LCM_DRIVING_CURRENT_12MA
,
66 LCM_DRIVING_CURRENT_16MA
67 } LCM_DRIVING_CURRENT
;
70 LCM_INTERFACE_NOTDEFINED
= 0,
73 LCM_INTERFACE_DSI_DUAL
,
83 /* DBI related enumerations */
87 LCM_DBI_CLOCK_FREQ_104M
= 0,
88 LCM_DBI_CLOCK_FREQ_52M
,
89 LCM_DBI_CLOCK_FREQ_26M
,
90 LCM_DBI_CLOCK_FREQ_13M
,
97 LCM_DBI_DATA_WIDTH_8BITS
= 0,
98 LCM_DBI_DATA_WIDTH_9BITS
= 1,
99 LCM_DBI_DATA_WIDTH_16BITS
= 2,
100 LCM_DBI_DATA_WIDTH_18BITS
= 3,
101 LCM_DBI_DATA_WIDTH_24BITS
= 4,
102 LCM_DBI_DATA_WIDTH_32BITS
= 5
103 } LCM_DBI_DATA_WIDTH
;
108 LCM_DBI_CPU_WRITE_8_BITS
= 8,
109 LCM_DBI_CPU_WRITE_16_BITS
= 16,
110 LCM_DBI_CPU_WRITE_32_BITS
= 32,
111 } LCM_DBI_CPU_WRITE_BITS
;
116 LCM_DBI_FORMAT_RGB332
= 0,
117 LCM_DBI_FORMAT_RGB444
= 1,
118 LCM_DBI_FORMAT_RGB565
= 2,
119 LCM_DBI_FORMAT_RGB666
= 3,
120 LCM_DBI_FORMAT_RGB888
= 4
126 LCM_DBI_TRANS_SEQ_MSB_FIRST
= 0,
127 LCM_DBI_TRANS_SEQ_LSB_FIRST
= 1
133 LCM_DBI_PADDING_ON_LSB
= 0,
134 LCM_DBI_PADDING_ON_MSB
= 1
140 LCM_DBI_TE_MODE_DISABLED
= 0,
141 LCM_DBI_TE_MODE_VSYNC_ONLY
= 1,
142 LCM_DBI_TE_MODE_VSYNC_OR_HSYNC
= 2,
148 LCM_DBI_TE_VS_WIDTH_CNT_DIV_8
= 0,
149 LCM_DBI_TE_VS_WIDTH_CNT_DIV_16
= 1,
150 LCM_DBI_TE_VS_WIDTH_CNT_DIV_32
= 2,
151 LCM_DBI_TE_VS_WIDTH_CNT_DIV_64
= 3,
152 } LCM_DBI_TE_VS_WIDTH_CNT_DIV
;
155 /* DPI related enumerations */
159 LCM_DPI_FORMAT_RGB565
= 0,
160 LCM_DPI_FORMAT_RGB666
= 1,
161 LCM_DPI_FORMAT_RGB888
= 2
166 LCM_SERIAL_CLOCK_FREQ_104M
= 0,
167 LCM_SERIAL_CLOCK_FREQ_26M
,
168 LCM_SERIAL_CLOCK_FREQ_52M
169 } LCM_SERIAL_CLOCK_FREQ
;
173 LCM_SERIAL_CLOCK_DIV_2
= 0,
174 LCM_SERIAL_CLOCK_DIV_4
= 1,
175 LCM_SERIAL_CLOCK_DIV_8
= 2,
176 LCM_SERIAL_CLOCK_DIV_16
= 3,
177 } LCM_SERIAL_CLOCK_DIV
;
180 /* DSI related enumerations */
185 SYNC_PULSE_VDO_MODE
= 1,
186 SYNC_EVENT_VDO_MODE
= 2,
202 LCM_DSI_FORMAT_RGB565
= 0,
203 LCM_DSI_FORMAT_RGB666
= 1,
204 LCM_DSI_FORMAT_RGB888
= 2
210 LCM_DSI_TRANS_SEQ_MSB_FIRST
= 0,
211 LCM_DSI_TRANS_SEQ_LSB_FIRST
= 1
217 LCM_DSI_PADDING_ON_LSB
= 0,
218 LCM_DSI_PADDING_ON_MSB
= 1
224 LCM_PACKED_PS_16BIT_RGB565
=0,
225 LCM_LOOSELY_PS_18BIT_RGB666
=1,
226 LCM_PACKED_PS_24BIT_RGB888
=2,
227 LCM_PACKED_PS_18BIT_RGB666
=3
232 LCM_DSI_6589_PLL_CLOCK_NULL
= 0,
233 LCM_DSI_6589_PLL_CLOCK_201_5
= 1,
234 LCM_DSI_6589_PLL_CLOCK_208
= 2,
235 LCM_DSI_6589_PLL_CLOCK_214_5
= 3,
236 LCM_DSI_6589_PLL_CLOCK_221
= 4,
237 LCM_DSI_6589_PLL_CLOCK_227_5
= 5,
238 LCM_DSI_6589_PLL_CLOCK_234
= 6,
239 LCM_DSI_6589_PLL_CLOCK_240_5
= 7,
240 LCM_DSI_6589_PLL_CLOCK_247
= 8,
241 LCM_DSI_6589_PLL_CLOCK_253_5
= 9,
242 LCM_DSI_6589_PLL_CLOCK_260
= 10,
243 LCM_DSI_6589_PLL_CLOCK_266_5
= 11,
244 LCM_DSI_6589_PLL_CLOCK_273
= 12,
245 LCM_DSI_6589_PLL_CLOCK_279_5
= 13,
246 LCM_DSI_6589_PLL_CLOCK_286
= 14,
247 LCM_DSI_6589_PLL_CLOCK_292_5
= 15,
248 LCM_DSI_6589_PLL_CLOCK_299
= 16,
249 LCM_DSI_6589_PLL_CLOCK_305_5
= 17,
250 LCM_DSI_6589_PLL_CLOCK_312
= 18,
251 LCM_DSI_6589_PLL_CLOCK_318_5
= 19,
252 LCM_DSI_6589_PLL_CLOCK_325
= 20,
253 LCM_DSI_6589_PLL_CLOCK_331_5
= 21,
254 LCM_DSI_6589_PLL_CLOCK_338
= 22,
255 LCM_DSI_6589_PLL_CLOCK_344_5
= 23,
256 LCM_DSI_6589_PLL_CLOCK_351
= 24,
257 LCM_DSI_6589_PLL_CLOCK_357_5
= 25,
258 LCM_DSI_6589_PLL_CLOCK_364
= 26,
259 LCM_DSI_6589_PLL_CLOCK_370_5
= 27,
260 LCM_DSI_6589_PLL_CLOCK_377
= 28,
261 LCM_DSI_6589_PLL_CLOCK_383_5
= 29,
262 LCM_DSI_6589_PLL_CLOCK_390
= 30,
263 LCM_DSI_6589_PLL_CLOCK_396_5
= 31,
264 LCM_DSI_6589_PLL_CLOCK_403
= 32,
265 LCM_DSI_6589_PLL_CLOCK_409_5
= 33,
266 LCM_DSI_6589_PLL_CLOCK_416
= 34,
267 LCM_DSI_6589_PLL_CLOCK_422_5
= 35,
268 LCM_DSI_6589_PLL_CLOCK_429
= 36,
269 LCM_DSI_6589_PLL_CLOCK_435_5
= 37,
270 LCM_DSI_6589_PLL_CLOCK_442
= 38,
271 LCM_DSI_6589_PLL_CLOCK_448_5
= 39,
272 LCM_DSI_6589_PLL_CLOCK_455
= 40,
273 LCM_DSI_6589_PLL_CLOCK_461_5
= 41,
274 LCM_DSI_6589_PLL_CLOCK_468
= 42,
275 LCM_DSI_6589_PLL_CLOCK_474_5
= 43,
276 LCM_DSI_6589_PLL_CLOCK_481
= 44,
277 LCM_DSI_6589_PLL_CLOCK_487_5
= 45,
278 LCM_DSI_6589_PLL_CLOCK_494
= 46,
279 LCM_DSI_6589_PLL_CLOCK_500_5
= 47,
280 LCM_DSI_6589_PLL_CLOCK_507
= 48,
281 LCM_DSI_6589_PLL_CLOCK_513_5
= 49,
282 LCM_DSI_6589_PLL_CLOCK_520
= 50,
285 // ---------------------------------------------------------------------------
289 LCM_COLOR_ORDER color_order
;
290 LCM_DBI_TRANS_SEQ trans_seq
;
291 LCM_DBI_PADDING padding
;
292 LCM_DBI_FORMAT format
;
293 LCM_DBI_DATA_WIDTH width
;
294 } LCM_DBI_DATA_FORMAT
;
299 LCM_POLARITY cs_polarity
;
300 LCM_POLARITY clk_polarity
;
301 LCM_CLOCK_PHASE clk_phase
;
302 unsigned int is_non_dbi_mode
;
304 LCM_SERIAL_CLOCK_FREQ clock_base
;
305 LCM_SERIAL_CLOCK_DIV clock_div
;
306 ////////////////////////////////////MT6575 added params, and if lcm driver is for 6575, only care these below params
314 unsigned int sif_3wire
;
315 unsigned int sif_sdi
;
316 LCM_POLARITY sif_1st_pol
;
317 LCM_POLARITY sif_sck_def
;
318 unsigned int sif_div2
;
319 unsigned int sif_hw_cs
;
320 ////////////////////////////////////
321 } LCM_DBI_SERIAL_PARAMS
;
326 /* timing parameters */
327 unsigned int write_setup
;
328 unsigned int write_hold
;
329 unsigned int write_wait
;
330 unsigned int read_setup
;
331 unsigned int read_hold
;
332 unsigned int read_latency
;
333 unsigned int wait_period
;
335 unsigned int cs_high_width
;
336 } LCM_DBI_PARALLEL_PARAMS
;
341 LCM_COLOR_ORDER color_order
;
342 LCM_DSI_TRANS_SEQ trans_seq
;
343 LCM_DSI_PADDING padding
;
344 LCM_DSI_FORMAT format
;
345 } LCM_DSI_DATA_FORMAT
;
348 // ---------------------------------------------------------------------------
352 /* common parameters for serial & parallel interface */
354 LCM_DBI_CLOCK_FREQ clock_freq
;
355 LCM_DBI_DATA_WIDTH data_width
;
356 LCM_DBI_DATA_FORMAT data_format
;
357 LCM_DBI_CPU_WRITE_BITS cpu_write_bits
;
358 LCM_DRIVING_CURRENT io_driving_current
;
359 LCM_DRIVING_CURRENT msb_io_driving_current
;
361 /* tearing control */
362 LCM_DBI_TE_MODE te_mode
;
363 LCM_POLARITY te_edge_polarity
;
364 unsigned int te_hs_delay_cnt
;
365 unsigned int te_vs_width_cnt
;
366 LCM_DBI_TE_VS_WIDTH_CNT_DIV te_vs_width_cnt_div
;
368 /* particular parameters for serial & parallel interface */
369 LCM_DBI_SERIAL_PARAMS serial
;
370 LCM_DBI_PARALLEL_PARAMS parallel
;
377 Pixel Clock Frequency = 26MHz * mipi_pll_clk_div1
378 / (mipi_pll_clk_ref + 1)
379 / (2 * mipi_pll_clk_div2)
382 unsigned int mipi_pll_clk_ref
; // 0..1
383 unsigned int mipi_pll_clk_div1
; // 0..63
384 unsigned int mipi_pll_clk_div2
; // 0..15
385 unsigned int mipi_pll_clk_fbk_div
; //PCLK=> 8: 26MHz, 10: 35MHz, 12: 40MHz
386 unsigned int dpi_clk_div
; // 2..32
387 unsigned int dpi_clk_duty
; // (dpi_clk_div - 1) .. 31
388 unsigned int PLL_CLOCK
;
389 unsigned int dpi_clock
;
390 unsigned int ssc_disable
;
391 unsigned int ssc_range
;
395 unsigned int bg_width
;
396 unsigned int bg_height
;
398 /* polarity parameters */
399 LCM_POLARITY clk_pol
;
401 LCM_POLARITY vsync_pol
;
402 LCM_POLARITY hsync_pol
;
404 /* timing parameters */
405 unsigned int hsync_pulse_width
;
406 unsigned int hsync_back_porch
;
407 unsigned int hsync_front_porch
;
408 unsigned int vsync_pulse_width
;
409 unsigned int vsync_back_porch
;
410 unsigned int vsync_front_porch
;
412 /* output format parameters */
413 LCM_DPI_FORMAT format
;
414 LCM_COLOR_ORDER rgb_order
;
415 unsigned int is_serial_output
;
417 unsigned int i2x_edge
;
418 unsigned int embsync
;
419 unsigned int lvds_tx_en
;
420 /* intermediate buffers parameters */
421 unsigned int intermediat_buffer_num
; // 2..3
423 /* iopad parameters */
424 LCM_DRIVING_CURRENT io_driving_current
;
425 LCM_DRIVING_CURRENT lsb_io_driving_current
;
430 // ---------------------------------------------------------------------------
434 LCM_DSI_MODE_CON mode
;
435 unsigned int DSI_WMEM_CONTI
;
436 unsigned int DSI_RMEM_CONTI
;
439 LCM_LANE_NUM LANE_NUM
;
440 LCM_DSI_DATA_FORMAT data_format
;
442 /* intermediate buffers parameters */
443 unsigned int intermediat_buffer_num
; // 2..3
446 unsigned int word_count
;
448 unsigned int packet_size
;
450 unsigned int vertical_sync_active
;
451 unsigned int vertical_backporch
;
452 unsigned int vertical_frontporch
;
453 unsigned int vertical_active_line
;
455 unsigned int horizontal_sync_active
;
456 unsigned int horizontal_backporch
;
457 unsigned int horizontal_frontporch
;
458 unsigned int horizontal_blanking_pixel
;
459 unsigned int horizontal_active_pixel
;
460 unsigned int horizontal_bllp
;
462 unsigned int line_byte
;
463 unsigned int horizontal_sync_active_byte
;
464 unsigned int horizontal_backporch_byte
;
465 unsigned int horizontal_frontporch_byte
;
466 unsigned int rgb_byte
;
468 unsigned int horizontal_sync_active_word_count
;
469 unsigned int horizontal_backporch_word_count
;
470 unsigned int horizontal_frontporch_word_count
;
472 unsigned char HS_TRAIL
;
473 unsigned char HS_ZERO
;
474 unsigned char HS_PRPR
;
477 unsigned char TA_SACK
;
478 unsigned char TA_GET
;
479 unsigned char TA_SURE
;
482 unsigned char CLK_TRAIL
;
483 unsigned char CLK_ZERO
;
484 unsigned char LPX_WAIT
;
485 unsigned char CONT_DET
;
487 unsigned char CLK_HS_PRPR
;
488 unsigned char CLK_HS_POST
;
489 unsigned char DA_HS_EXIT
;
490 unsigned char CLK_HS_EXIT
;
492 unsigned int pll_select
;
493 unsigned int pll_div1
;
494 unsigned int pll_div2
;
495 unsigned int fbk_div
;
496 unsigned int fbk_sel
;
500 unsigned int PLL_CLOCK
;
501 unsigned int dsi_clock
;
502 unsigned int ssc_disable
;
503 unsigned int ssc_range
;
504 unsigned int compatibility_for_nvk
;
505 unsigned int cont_clock
;
506 unsigned int ufoe_enable
;
508 unsigned int lcm_int_te_monitor
;
509 unsigned int lcm_int_te_period
;
511 unsigned int lcm_ext_te_monitor
;
512 unsigned int lcm_ext_te_enable
;
514 unsigned int noncont_clock
;
515 unsigned int noncont_clock_period
;
519 // ---------------------------------------------------------------------------
524 LCM_CTRL ctrl
; //! how to control LCM registers
525 LCM_INTERFACE_ID lcm_if
;
526 LCM_INTERFACE_ID lcm_cmd_if
;
527 /* common parameters */
530 unsigned int io_select_mode
; //DBI or DPI should select IO mode according to chip spec
532 /* particular parameters */
536 unsigned int physical_width
;
537 unsigned int physical_height
;
538 unsigned int od_table_size
;
543 // ---------------------------------------------------------------------------
545 #define REGFLAG_ESCAPE_ID (0x00)
546 #define REGFLAG_DELAY_MS_V3 (0xFF)
552 unsigned char para_list
[128];
553 } LCM_setting_table_V3
;
557 void (*set_reset_pin
)(unsigned int value
);
558 void (*set_chip_select
)(unsigned int value
);
559 int (*set_gpio_out
)(unsigned int gpio
, unsigned int value
);
561 void (*udelay
)(unsigned int us
);
562 void (*mdelay
)(unsigned int ms
);
564 void (*send_cmd
)(unsigned int cmd
);
565 void (*send_data
)(unsigned int data
);
566 unsigned int (*read_data
)(void);
568 void (*dsi_set_cmdq_V3
)(LCM_setting_table_V3
*para_list
, unsigned int size
, unsigned char force_update
);
569 void (*dsi_set_cmdq_V2
)(unsigned cmd
, unsigned char count
, unsigned char *para_list
, unsigned char force_update
);
570 void (*dsi_set_cmdq
)(unsigned int *pdata
, unsigned int queue_size
, unsigned char force_update
);
571 void (*dsi_write_cmd
)(unsigned int cmd
);
572 void (*dsi_write_regs
)(unsigned int addr
, unsigned int *para
, unsigned int nums
);
573 unsigned int (*dsi_read_reg
)(void);
574 unsigned int (*dsi_dcs_read_lcm_reg
)(unsigned char cmd
);
575 unsigned int (*dsi_dcs_read_lcm_reg_v2
)(unsigned char cmd
, unsigned char *buffer
, unsigned char buffer_size
);
576 void (*wait_transfer_done
)(void);
578 /** FIXME: GPIO mode should not be configured in lcm driver
579 REMOVE ME after GPIO customization is done
581 int (*set_gpio_mode
)(unsigned int pin
, unsigned int mode
);
582 int (*set_gpio_dir
)(unsigned int pin
, unsigned int dir
);
583 int (*set_gpio_pull_enable
)(unsigned int pin
, unsigned char pull_en
);
588 LCM_DRV_IOCTL_ENABLE_CMD_MODE
= 0x100,
594 void (*set_util_funcs
)(const LCM_UTIL_FUNCS
*util
);
595 void (*get_params
)(LCM_PARAMS
*params
);
598 void (*suspend
)(void);
599 void (*resume
)(void);
601 // for power-on sequence refinement
602 void (*init_power
)(void);
603 void (*suspend_power
)(void);
604 void (*resume_power
)(void);
606 void (*update
)(unsigned int x
, unsigned int y
, unsigned int width
, unsigned int height
);
607 unsigned int (*compare_id
)(void);
609 ///////////////////////////CABC backlight related function
610 void (*set_backlight
)(unsigned int level
);
611 void (*set_pwm
)(unsigned int divider
);
612 unsigned int (*get_pwm
)(unsigned int divider
);
613 void (*set_backlight_mode
)(unsigned int mode
);
614 ///////////////////////////
616 /////////////ESD_RECOVERY//////////////////////
617 unsigned int (*esd_check
)(void);
618 unsigned int (*esd_recover
)(void);
619 unsigned int (*check_status
)(void);
620 unsigned int (*ata_check
)(unsigned char *buffer
);
621 void (*read_fb
)(unsigned char *buffer
);
622 int (*ioctl
)(LCM_DRV_IOCTL_CMD cmd
, unsigned int data
);
623 /////////////////////////////////////////////////
627 // ---------------------------------------------------------------------------
628 // LCM Driver Functions
629 // ---------------------------------------------------------------------------
631 const LCM_DRIVER
* LCM_GetDriver(void);
632 unsigned char which_lcd_module_triple(void);
634 #endif // __LCM_DRV_H__