1 #include <mach/hardware.h>
2 #include <linux/version.h>
4 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)
5 #include <asm/hardware/gic.h>
7 #include <linux/irqchip/arm-gic.h>
10 #include "mt_reg_base.h"
13 /* leave disable_fiq as an empty macro */
17 .macro get_irqnr_preamble, base, tmp
18 ldr \base, =GIC_CPU_BASE
21 .macro arch_ret_to_user, tmp1, tmp2
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 #if defined(CONFIG_FIQ) && !defined(CONFIG_MTK_IN_HOUSE_TEE_SUPPORT)
26 ldr \irqstat, [\base, #GIC_CPU_AIAR] /* bits 12-10 = src CPU, 9-0 = int # */
28 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
31 bic \irqnr, \irqstat, #0x1c00
33 /* if (irqnr >= NR_IRQS) return NO_IRQ (0) */
38 /* if (irqnr >= 27) return HAVE_IRQ (1) */
43 /* if (irqnr == FIQ_DBG_SGI) return HAVE_IRQ (1) */
44 cmp \irqnr, #FIQ_DBG_SGI
48 /* otherwise, return NO_IRQ (0) */
56 .macro test_for_ipi, irqnr, irqstat, base, tmp
57 bic \irqnr, \irqstat, #0x1c00
59 #if defined(CONFIG_FIQ) && !defined(CONFIG_MTK_IN_HOUSE_TEE_SUPPORT)
60 strcc \irqstat, [\base, #GIC_CPU_AEOI]
62 strcc \irqstat, [\base, #GIC_CPU_EOI]
67 .macro test_for_ltirq, irqnr, irqstat, base, tmp
68 bic \irqnr, \irqstat, #0x1c00
72 #if defined(CONFIG_FIQ) && !defined(CONFIG_MTK_IN_HOUSE_TEE_SUPPORT)
73 streq \irqstat, [\base, #GIC_CPU_AEOI]
75 streq \irqstat, [\base, #GIC_CPU_EOI]
79 .macro test_for_wdtirq, irqnr, irqstat, base, tmp
80 bic \irqnr, \irqstat, #0x1c00
84 #if defined(CONFIG_FIQ) && !defined(CONFIG_MTK_IN_HOUSE_TEE_SUPPORT)
85 streq \irqstat, [\base, #GIC_CPU_AEOI]
87 streq \irqstat, [\base, #GIC_CPU_EOI]