1 #ifndef __ASM_ARCH_DMA_H
2 #define __ASM_ARCH_DMA_H
4 #define MAX_DMA_ADDRESS (0xFFFFFFFF)
5 #define MAX_DMA_CHANNELS (0)
7 #endif /* !__ASM_ARCH_DMA_H */
12 /* define DMA channels */
15 P_DMA_AP_HIF
, P_DMA_MD_HIF
,
16 P_DMA_SIM1
, P_DMA_SIM2
,
18 P_DMA_UART1_TX
, P_DMA_UART1_RX
,
19 P_DMA_UART2_TX
, P_DMA_UART2_RX
,
20 P_DMA_UART3_TX
, P_DMA_UART3_RX
,
23 /* define DMA error code */
26 DMA_ERR_INVALID_CH
= 2,
28 DMA_ERR_NO_FREE_CH
= 4,
29 DMA_ERR_INV_CONFIG
= 5,
32 /* define DMA ISR callback function's prototype */
33 typedef void (*DMA_ISR_CALLBACK
)(void *);
49 REMAINING_LENGTH
= 0, /* not valid for virtual FIFO */
50 VF_READPTR
, /* only valid for virtual FIFO */
51 VF_WRITEPTR
, /* only valid for virtual FIFO */
52 VF_FFCNT
, /* only valid for virtual FIFO */
53 VF_ALERT
, /* only valid for virtual FIFO */
54 VF_EMPTY
, /* only valid for virtual FIFO */
55 VF_FULL
, /* only valid for virtual FIFO */
74 /* define GDMA configurations */
91 void (*isr_cb
)(void *);
96 #define DMA_CON_BURST_SINGLE (0x00000000)
97 #define DMA_CON_BURST_2BEAT (0x00010000)
98 #define DMA_CON_BURST_3BEAT (0x00020000)
99 #define DMA_CON_BURST_4BEAT (0x00030000)
100 #define DMA_CON_BURST_5BEAT (0x00040000)
101 #define DMA_CON_BURST_6BEAT (0x00050000)
102 #define DMA_CON_BURST_7BEAT (0x00060000)
103 #define DMA_CON_BURST_8BEAT (0x00070000)
106 /* keep for backward compatibility only */
107 #define DMA_CON_SIZE_BYTE (0x00000000)
108 #define DMA_CON_SIZE_SHORT (0x00000001)
109 #define DMA_CON_SIZE_LONG (0x00000002)
111 extern void mt_reset_gdma_conf(const unsigned int iChannel
);
113 extern int mt_config_gdma(int channel
, struct mt_gdma_conf
*config
, DMA_CONF_FLAG flag
);
114 extern int mt_free_gdma(int channel
);
115 extern int mt_req_gdma(DMA_CHAN chan
);
116 extern int mt_start_gdma(int channel
);
117 extern int mt_polling_gdma(int channel
, unsigned long timeout
);
118 extern int mt_stop_gdma(int channel
);
119 extern int mt_dump_gdma(int channel
);
120 extern int mt_warm_reset_gdma(int channel
);
121 extern int mt_hard_reset_gdma(int channel
);
122 extern int mt_reset_gdma(int channel
);
123 extern void mt_dma_running_status(void);
124 /* This channel is used for APDMA Dummy READ.
125 in MT6592 this channel will be used by Frequency hopping all the time
126 .Owner: Chieh-Jay Liu
128 #define DFS_APDMA_CHANNEL 0
129 #endif /* !__MT_DMA_H__ */