arch/arm/mach-mt8127/include/mach/board.h

   1 #ifndef __ARCH_ARM_MACH_BOARD_H
   2 #define __ARCH_ARM_MACH_BOARD_H
   3
   4 #include <generated/autoconf.h>
   5 #include <linux/pm.h>
   6 //#include <mach/mt6575.h>
   7 #include <board-custom.h>
   8
   9 typedef void (*sdio_irq_handler_t)(void*);  /* external irq handler */
  10 typedef void (*pm_callback_t)(pm_message_t state, void *data);
  11
  12 #define MSDC_CD_PIN_EN      (1 << 0)  /* card detection pin is wired   */
  13 #define MSDC_WP_PIN_EN      (1 << 1)  /* write protection pin is wired */
  14 #define MSDC_RST_PIN_EN     (1 << 2)  /* emmc reset pin is wired       */
  15 #define MSDC_SDIO_IRQ       (1 << 3)  /* use internal sdio irq (bus)   */
  16 #define MSDC_EXT_SDIO_IRQ   (1 << 4)  /* use external sdio irq         */
  17 #define MSDC_REMOVABLE      (1 << 5)  /* removable slot                */
  18 #define MSDC_SYS_SUSPEND    (1 << 6)  /* suspended by system           */
  19 #define MSDC_HIGHSPEED      (1 << 7)  /* high-speed mode support       */
  20 #define MSDC_UHS1           (1 << 8)  /* uhs-1 mode support            */
  21 #define MSDC_DDR            (1 << 9)  /* ddr mode support              */
  22 #define MSDC_INTERNAL_CLK   (1 << 11)  /* Force Internal clock */
  23 #define MSDC_SD_NEED_POWER  (1 << 31) /* for Yecon board, need SD power always on!! or cannot recognize the sd card*/
  24
  25 #define MSDC_SMPL_RISING    (0)
  26 #define MSDC_SMPL_FALLING   (1)
  27
  28 #define MSDC_CMD_PIN        (0)
  29 #define MSDC_DAT_PIN        (1)
  30 #define MSDC_CD_PIN         (2)
  31 #define MSDC_WP_PIN         (3)
  32 #define MSDC_RST_PIN        (4)
  33
  34 #define MSDC_DATA1_INT      1
  35 enum {
  36     MSDC_CLKSRC_200MHZ = 0
  37 };
  38 #define MSDC_BOOT_EN (1)
  39 #define MSDC_CD_HIGH (1)
  40 #define MSDC_CD_LOW  (0)
  41 enum {
  42     MSDC_EMMC = 0,
  43     MSDC_SD   = 1,
  44     MSDC_SDIO = 2
  45 };
  46
  47 struct msdc_hw {
  48     unsigned char  clk_src;          /* host clock source */
  49     unsigned char  cmd_edge;         /* command latch edge */
  50     unsigned char  rdata_edge;        /* read data latch edge */
  51         unsigned char  wdata_edge;        /* write data latch edge */
  52     unsigned char  clk_drv;          /* clock pad driving */
  53     unsigned char  cmd_drv;          /* command pad driving */
  54     unsigned char  dat_drv;          /* data pad driving */
  55         unsigned char  clk_drv_sd_18;          /* clock pad driving for SD card at 1.8v sdr104 mode */
  56     unsigned char  cmd_drv_sd_18;          /* command pad driving for SD card at 1.8v sdr104 mode */
  57     unsigned char  dat_drv_sd_18;          /* data pad driving for SD card at 1.8v sdr104 mode */
  58         unsigned char  clk_drv_sd_18_sdr50;    /* clock pad driving for SD card at 1.8v sdr50 mode */
  59     unsigned char  cmd_drv_sd_18_sdr50;    /* command pad driving for SD card at 1.8v sdr50 mode */
  60     unsigned char  dat_drv_sd_18_sdr50;    /* data pad driving for SD card at 1.8v sdr50 mode */
  61         unsigned char  clk_drv_sd_18_ddr50;    /* clock pad driving for SD card at 1.8v ddr50 mode */
  62     unsigned char  cmd_drv_sd_18_ddr50;    /* command pad driving for SD card at 1.8v ddr50 mode */
  63     unsigned char  dat_drv_sd_18_ddr50;    /* data pad driving for SD card at 1.8v ddr50 mode */
  64     unsigned long  flags;            /* hardware capability flags */
  65     unsigned long  data_pins;        /* data pins */
  66     unsigned long  data_offset;      /* data address offset */
  67
  68     unsigned char  ddlsel;    // data line delay line fine tune selecion
  69         unsigned char  rdsplsel;  // read: data line rising or falling latch fine tune selection
  70         unsigned char  wdsplsel;  // write: data line rising or falling latch fine tune selection
  71
  72         unsigned char  dat0rddly; //read; range: 0~31
  73         unsigned char  dat1rddly; //read; range: 0~31
  74         unsigned char  dat2rddly; //read; range: 0~31
  75         unsigned char  dat3rddly; //read; range: 0~31
  76         unsigned char  dat4rddly; //read; range: 0~31
  77         unsigned char  dat5rddly; //read; range: 0~31
  78         unsigned char  dat6rddly; //read; range: 0~31
  79         unsigned char  dat7rddly; //read; range: 0~31
  80         unsigned char  datwrddly; //write; range: 0~31
  81         unsigned char  cmdrrddly; //cmd; range: 0~31
  82         unsigned char  cmdrddly; //cmd; range: 0~31
  83
  84         unsigned long  host_function;    /* define host function*/
  85         bool               boot;                         /* define boot host*/
  86         bool               cd_level;             /* card detection level*/
  87     /* config gpio pull mode */
  88     void (*config_gpio_pin)(int type, int pull);
  89
  90     /* external power control for card */
  91     void (*ext_power_on)(void);
  92     void (*ext_power_off)(void);
  93
  94     /* external sdio irq operations */
  95     void (*request_sdio_eirq)(sdio_irq_handler_t sdio_irq_handler, void *data);
  96     void (*enable_sdio_eirq)(void);
  97     void (*disable_sdio_eirq)(void);
  98
  99     /* external cd irq operations */
 100     void (*request_cd_eirq)(sdio_irq_handler_t cd_irq_handler, void *data);
 101     void (*enable_cd_eirq)(void);
 102     void (*disable_cd_eirq)(void);
 103     int  (*get_cd_status)(void);
 104
 105     /* power management callback for external module */
 106     void (*register_pm)(pm_callback_t pm_cb, void *data);
 107 };
 108
 109 extern struct msdc_hw msdc0_hw;
 110 extern struct msdc_hw msdc1_hw;
 111 extern struct msdc_hw msdc2_hw;
 112 extern struct msdc_hw msdc3_hw;
 113
 114 /*GPS driver*/
 115 #define GPS_FLAG_FORCE_OFF  0x0001
 116 struct mt3326_gps_hardware {
 117     int (*ext_power_on)(int);
 118     int (*ext_power_off)(int);
 119 };
 120 extern struct mt3326_gps_hardware mt3326_gps_hw;
 121
 122 /* NAND driver */
 123 struct mtk_nand_host_hw {
 124     unsigned int nfi_bus_width;             /* NFI_BUS_WIDTH */
 125         unsigned int nfi_access_timing;         /* NFI_ACCESS_TIMING */
 126         unsigned int nfi_cs_num;                        /* NFI_CS_NUM */
 127         unsigned int nand_sec_size;                     /* NAND_SECTOR_SIZE */
 128         unsigned int nand_sec_shift;            /* NAND_SECTOR_SHIFT */
 129         unsigned int nand_ecc_size;
 130         unsigned int nand_ecc_bytes;
 131         unsigned int nand_ecc_mode;
 132 };
 133 extern struct mtk_nand_host_hw mtk_nand_hw;
 134
 135 #endif /* __ARCH_ARM_MACH_BOARD_H */
 136