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import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-mt8127 / eint.c
1 #include <linux/kernel.h>
2 #include <linux/interrupt.h>
3 #include <linux/wakelock.h>
4 #include <linux/module.h>
5 #include <linux/device.h>
6 #include <linux/platform_device.h>
7 #include <linux/timer.h>
8 #include <asm/delay.h>
9 #include <mach/mt_reg_base.h>
10 #include <mach/eint.h>
11 #include <mach/eint_drv.h>
12 #include <mach/irqs.h>
13 #include <mach/sync_write.h>
14
15 #define EINT_DEBUG 0
16 #if(EINT_DEBUG == 1)
17 #define dbgmsg printk
18 #else
19 #define dbgmsg(...)
20 #endif
21
22 #define MD_EINT
23 #define EINT_TEST
24 //#define DEINT_SUPPORT
25
26 #ifdef MD_EINT
27 #include <cust_eint.h>
28 //#include <cust_eint_md1.h>
29 //#include <cust_eint_md2.h>
30
31 typedef enum
32 {
33 SIM_HOT_PLUG_EINT_NUMBER,
34 SIM_HOT_PLUG_EINT_DEBOUNCETIME,
35 SIM_HOT_PLUG_EINT_POLARITY,
36 SIM_HOT_PLUG_EINT_SENSITIVITY,
37 SIM_HOT_PLUG_EINT_SOCKETTYPE,
38 }sim_hot_plug_eint_queryType;
39
40 typedef enum
41 {
42 ERR_SIM_HOT_PLUG_NULL_POINTER=-13,
43 ERR_SIM_HOT_PLUG_QUERY_TYPE,
44 ERR_SIM_HOT_PLUG_QUERY_STRING,
45 }sim_hot_plug_eint_queryErr;
46 #endif
47
48 #define EINT_TEST_LATENCY (0)
49
50 #define EINT_USE_PRECISE_HRTIMER (1)
51 #if EINT_USE_PRECISE_HRTIMER
52 #include <linux/ktime.h>
53 #include <linux/hrtimer.h>
54
55 typedef struct
56 {
57 struct hrtimer rTimer;
58 unsigned int eint_num;
59 } EINT_HR_TIMER_T;
60
61 #define EINT_JUDGE_ST_IN_TIMER_CB (1)
62 #else
63 #define EINT_JUDGE_ST_IN_TIMER_CB (1)
64 #endif
65
66 typedef struct
67 {
68 void (*eint_func[EINT_MAX_CHANNEL]) (void);
69 unsigned int eint_auto_umask[EINT_MAX_CHANNEL];
70 /*is_deb_en: 1 means enable, 0 means disable */
71 unsigned int is_deb_en[EINT_MAX_CHANNEL];
72 unsigned int deb_time[EINT_MAX_CHANNEL];
73 #if defined(EINT_TEST)
74 unsigned int softisr_called[EINT_MAX_CHANNEL];
75 #endif
76
77 #if EINT_USE_PRECISE_HRTIMER
78 EINT_HR_TIMER_T eint_sw_deb_hr_timer[EINT_MAX_CHANNEL];
79 #else
80 struct timer_list eint_sw_deb_timer[EINT_MAX_CHANNEL];
81 #endif
82 } eint_func;
83
84 static eint_func EINT_FUNC;
85
86 #ifdef DEINT_SUPPORT
87 /*
88 typedef struct
89 {
90 void (*deint_func[DEINT_MAX_CHANNEL]) (void);
91 }deint_func;
92
93 static deint_func DEINT_FUNC;
94 */
95 #endif
96
97 static const unsigned int EINT_IRQ = MT_EINT_IRQ_ID;
98 struct wake_lock EINT_suspend_lock;
99 static unsigned int cur_eint_num;
100 static DEFINE_SPINLOCK(eint_lock);
101
102 /*
103 * mt_eint_get_mask: To get the eint mask
104 * @eint_num: the EINT number to get
105 */
106 static unsigned int mt_eint_get_mask(unsigned int eint_num)
107 {
108 unsigned int base;
109 unsigned int st;
110 unsigned int bit = 1 << (eint_num % 32);
111
112 if (eint_num < EINT_AP_MAXNUMBER) {
113 base = (eint_num / 32) * 4 + EINT_MASK_BASE;
114 } else {
115 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
116 return 0;
117 }
118
119 st = readl(IOMEM(base));
120 if (st & bit) {
121 st = 1; //masked
122 } else {
123 st = 0; //unmasked
124 }
125
126 return st;
127 }
128
129 #if 0
130 void mt_eint_mask_all(void)
131 {
132 unsigned int base;
133 unsigned int val = 0xFFFFFFFF, ap_cnt = (EINT_MAX_CHANNEL / 32), i;
134 if (EINT_MAX_CHANNEL % 32)
135 ap_cnt++;
136 dbgmsg("[EINT] cnt:%d\n", ap_cnt);
137
138 base = EINT_MASK_SET_BASE;
139 for (i = 0; i < ap_cnt; i++) {
140 writel(val, IOMEM(base + (i * 4)));
141 dbgmsg("[EINT] mask addr:%x = %x\n", EINT_MASK_BASE + (i * 4),
142 readl(IOMEM(EINT_MASK_BASE + (i * 4))));
143 }
144 }
145
146 /*
147 * mt_eint_unmask_all: Mask the specified EINT number.
148 */
149 void mt_eint_unmask_all(void)
150 {
151 unsigned int base;
152 unsigned int val = 0xFFFFFFFF, ap_cnt = (EINT_MAX_CHANNEL / 32), i;
153 if (EINT_MAX_CHANNEL % 32)
154 ap_cnt++;
155 dbgmsg("[EINT] cnt:%d\n", ap_cnt);
156
157 base = EINT_MASK_CLR_BASE;
158 for (i = 0; i < ap_cnt; i++) {
159 writel(val, IOMEM(base + (i * 4)));
160 dbgmsg("[EINT] unmask addr:%x = %x\n", EINT_MASK_BASE + (i * 4),
161 readl(IOMEM(EINT_MASK_BASE + (i * 4))));
162 }
163 }
164
165 /*
166 * mt_eint_get_soft: To get the eint mask
167 * @eint_num: the EINT number to get
168 */
169 unsigned int mt_eint_get_soft(unsigned int eint_num)
170 {
171 unsigned int base;
172 unsigned int st;
173
174 if (eint_num < EINT_AP_MAXNUMBER) {
175 base = (eint_num / 32) * 4 + EINT_SOFT_BASE;
176 } else {
177 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
178 return 0;
179 }
180 st = readl(IOMEM(base));
181
182 return st;
183 }
184 #endif
185
186 #if 0
187 /*
188 * mt_eint_emu_set: Trigger the specified EINT number.
189 * @eint_num: EINT number to set
190 */
191 void mt_eint_emu_set(unsigned int eint_num)
192 {
193 unsigned int base = 0;
194 unsigned int bit = 1 << (eint_num % 32);
195 unsigned int value = 0;
196
197 if (eint_num < EINT_AP_MAXNUMBER) {
198 base = (eint_num / 32) * 4 + EINT_EMUL_BASE;
199 } else {
200 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
201 return;
202 }
203 value = readl(IOMEM(base));
204 value = bit | value;
205 writel(value, IOMEM(base));
206 value = readl(IOMEM(base));
207
208 dbgmsg("[EINT] emul set addr:%x = %x, bit=%x\n", base, value, bit);
209
210
211 }
212
213 /*
214 * mt_eint_emu_clr: Trigger the specified EINT number.
215 * @eint_num: EINT number to clr
216 */
217 void mt_eint_emu_clr(unsigned int eint_num)
218 {
219 unsigned int base = 0;
220 unsigned int bit = 1 << (eint_num % 32);
221 unsigned int value = 0;
222
223 if (eint_num < EINT_AP_MAXNUMBER) {
224 base = (eint_num / 32) * 4 + EINT_EMUL_BASE;
225 } else {
226 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
227 return;
228 }
229 value = readl(IOMEM(base));
230 value = (~bit) & value;
231 writel(value, IOMEM(base));
232 value = readl(IOMEM(base));
233
234 dbgmsg("[EINT] emul clr addr:%x = %x, bit=%x\n", base, value, bit);
235
236 }
237
238 /*
239 * eint_send_pulse: Trigger the specified EINT number.
240 * @eint_num: EINT number to send
241 */
242 inline void mt_eint_send_pulse(unsigned int eint_num)
243 {
244 unsigned int base_set = (eint_num / 32) * 4 + EINT_SOFT_SET_BASE;
245 unsigned int base_clr = (eint_num / 32) * 4 + EINT_SOFT_CLR_BASE;
246 unsigned int bit = 1 << (eint_num % 32);
247 if (eint_num < EINT_AP_MAXNUMBER) {
248 base_set = (eint_num / 32) * 4 + EINT_SOFT_SET_BASE;
249 base_clr = (eint_num / 32) * 4 + EINT_SOFT_CLR_BASE;
250 } else {
251 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
252 return;
253 }
254
255 writel(bit, IOMEM(base_set));
256 writel(bit, IOMEM(base_clr));
257 }
258 #endif
259
260 #if defined(EINT_TEST)
261 /*
262 * mt_eint_soft_set: Trigger the specified EINT number.
263 * @eint_num: EINT number to set
264 */
265 void mt_eint_soft_set(unsigned int eint_num)
266 {
267
268 unsigned int base;
269 unsigned int bit = 1 << (eint_num % 32);
270
271 if (eint_num < EINT_AP_MAXNUMBER) {
272 base = (eint_num / 32) * 4 + EINT_SOFT_SET_BASE;
273 } else {
274 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
275 return;
276 }
277 writel(bit, IOMEM(base));
278
279 dbgmsg("[EINT] soft set addr:%x = %x\n", base, bit);
280
281 }
282
283 /*
284 * mt_eint_soft_clr: Unmask the specified EINT number.
285 * @eint_num: EINT number to clear
286 */
287 static void mt_eint_soft_clr(unsigned int eint_num)
288 {
289 unsigned int base;
290 unsigned int bit = 1 << (eint_num % 32);
291
292 if (eint_num < EINT_AP_MAXNUMBER) {
293 base = (eint_num / 32) * 4 + EINT_SOFT_CLR_BASE;
294 } else {
295 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
296 return;
297 }
298 writel(bit, IOMEM(base));
299
300 dbgmsg("[EINT] soft clr addr:%x = %x\n", base, bit);
301
302 }
303 #endif
304
305 /*
306 * mt_eint_mask: Mask the specified EINT number.
307 * @eint_num: EINT number to mask
308 */
309 void mt_eint_mask(unsigned int eint_num)
310 {
311 unsigned int base;
312 unsigned int bit = 1 << (eint_num % 32);
313
314 if (eint_num < EINT_AP_MAXNUMBER) {
315 base = (eint_num / 32) * 4 + EINT_MASK_SET_BASE;
316 } else {
317 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
318 return;
319 }
320 mt65xx_reg_sync_writel(bit, base);
321
322 dbgmsg("[EINT] mask addr:%x = %x\n", base, bit);
323 }
324
325 /*
326 * mt_eint_unmask: Unmask the specified EINT number.
327 * @eint_num: EINT number to unmask
328 */
329 void mt_eint_unmask(unsigned int eint_num)
330 {
331 unsigned int base;
332 unsigned int bit = 1 << (eint_num % 32);
333
334 if (eint_num < EINT_AP_MAXNUMBER) {
335 base = (eint_num / 32) * 4 + EINT_MASK_CLR_BASE;
336 } else {
337 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
338 return;
339 }
340 mt65xx_reg_sync_writel(bit, base);
341
342 dbgmsg("[EINT] unmask addr:%x = %x\n", base, bit);
343 }
344
345 /*
346 * mt_eint_set_polarity: Set the polarity for the EINT number.
347 * @eint_num: EINT number to set
348 * @pol: polarity to set
349 */
350 void mt_eint_set_polarity(unsigned int eint_num, unsigned int pol)
351 {
352 unsigned int count;
353 unsigned int base;
354 unsigned int bit = 1 << (eint_num % 32);
355
356 if (pol == MT_EINT_POL_NEG) {
357 if (eint_num < EINT_AP_MAXNUMBER) {
358 base = (eint_num / 32) * 4 + EINT_POL_CLR_BASE;
359 } else {
360 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
361 return;
362 }
363 } else {
364 if (eint_num < EINT_AP_MAXNUMBER) {
365 base = (eint_num / 32) * 4 + EINT_POL_SET_BASE;
366 } else {
367 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
368 return;
369 }
370 }
371 mt65xx_reg_sync_writel(bit, base);
372
373 for (count = 0; count < 250; count++) ;
374
375 if (eint_num < EINT_AP_MAXNUMBER) {
376 base = (eint_num / 32) * 4 + EINT_INTACK_BASE;
377 } else {
378 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
379 return;
380 }
381 mt65xx_reg_sync_writel(bit, base);
382 dbgmsg("[EINT] %s :%x, bit: %x\n", __func__, base, bit);
383 }
384
385 /*
386 * mt_eint_get_polarity: Set the polarity for the EINT number.
387 * @eint_num: EINT number to get
388 * Return: polarity type
389 */
390 unsigned int mt_eint_get_polarity(unsigned int eint_num)
391 {
392 unsigned int val;
393 unsigned int base;
394 unsigned int bit = 1 << (eint_num % 32);
395 unsigned int pol;
396
397 if (eint_num < EINT_AP_MAXNUMBER) {
398 base = (eint_num / 32) * 4 + EINT_POL_BASE;
399 } else {
400 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
401 return 0;
402 }
403 val = readl(IOMEM(base));
404
405 dbgmsg("[EINT] %s :%x, bit:%x, val:%x\n", __func__, base, bit, val);
406 if (val & bit) {
407 pol = MT_EINT_POL_POS;
408 } else {
409 pol = MT_EINT_POL_NEG;
410 }
411 return pol;
412 }
413
414 /*
415 * mt_eint_set_sens: Set the sensitivity for the EINT number.
416 * @eint_num: EINT number to set
417 * @sens: sensitivity to set
418 * Always return 0.
419 */
420 unsigned int mt_eint_set_sens(unsigned int eint_num, unsigned int sens)
421 {
422 unsigned int base;
423 unsigned int bit = 1 << (eint_num % 32);
424
425 if (sens == MT_EDGE_SENSITIVE) {
426 if (eint_num < EINT_AP_MAXNUMBER) {
427 base = (eint_num / 32) * 4 + EINT_SENS_CLR_BASE;
428 } else {
429 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
430 return 0;
431 }
432 } else if (sens == MT_LEVEL_SENSITIVE) {
433 if (eint_num < EINT_AP_MAXNUMBER) {
434 base = (eint_num / 32) * 4 + EINT_SENS_SET_BASE;
435 } else {
436 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
437 return 0;
438 }
439 } else {
440 printk("%s invalid sensitivity value\n", __func__);
441 return 0;
442 }
443 mt65xx_reg_sync_writel(bit, base);
444 dbgmsg("[EINT] %s :%x, bit: %x\n", __func__, base, bit);
445 return 0;
446 }
447
448 /*
449 * mt_eint_get_sens: To get the eint sens
450 * @eint_num: the EINT number to get
451 */
452 static unsigned int mt_eint_get_sens(unsigned int eint_num)
453 {
454 unsigned int base, sens;
455 unsigned int bit = 1 << (eint_num % 32), st;
456
457 if (eint_num < EINT_AP_MAXNUMBER) {
458 base = (eint_num / 32) * 4 + EINT_SENS_BASE;
459 } else {
460 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
461 return 0;
462 }
463 st = readl(IOMEM(base));
464 if (st & bit) {
465 sens = MT_LEVEL_SENSITIVE;
466 } else {
467 sens = MT_EDGE_SENSITIVE;
468 }
469 return sens;
470 }
471
472 /*
473 * mt_eint_ack: To ack the interrupt
474 * @eint_num: the EINT number to set
475 */
476 static unsigned int mt_eint_ack(unsigned int eint_num)
477 {
478 unsigned int base;
479 unsigned int bit = 1 << (eint_num % 32);
480
481 #if EINT_TEST_LATENCY
482 printk("Test latency, eint %d ack\n", eint_num);
483 #endif
484
485 if (eint_num < EINT_AP_MAXNUMBER) {
486 base = (eint_num / 32) * 4 + EINT_INTACK_BASE;
487 } else {
488 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
489 return 0;
490 }
491 mt65xx_reg_sync_writel(bit, base);
492
493 dbgmsg("[EINT] %s :%x, bit: %x\n", __func__, base, bit);
494 return 0;
495 }
496
497 /*
498 * mt_eint_read_status: To read the interrupt status
499 * @eint_num: the EINT number to set
500 */
501 static unsigned int mt_eint_read_status(unsigned int eint_num)
502 {
503 unsigned int base;
504 unsigned int st;
505 unsigned int bit = 1 << (eint_num % 32);
506
507 if (eint_num < EINT_AP_MAXNUMBER) {
508 base = (eint_num / 32) * 4 + EINT_STA_BASE;
509 } else {
510 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
511 return 0;
512 }
513 st = readl(IOMEM(base));
514
515 return (st & bit);
516 }
517
518 /*
519 * mt_eint_get_status: To get the interrupt status
520 * @eint_num: the EINT number to get
521 */
522 static unsigned int mt_eint_get_status(unsigned int eint_num)
523 {
524 unsigned int base;
525 unsigned int st;
526
527 if (eint_num < EINT_AP_MAXNUMBER) {
528 base = (eint_num / 32) * 4 + EINT_STA_BASE;
529 } else {
530 dbgmsg("Error in %s [EINT] num:%d is larger than EINT_AP_MAXNUMBER\n", __func__, eint_num);
531 return 0;
532 }
533
534 st = readl(IOMEM(base));
535 return st;
536 }
537
538 /*
539 * mt_eint_en_hw_debounce: To enable hw debounce
540 * @eint_num: the EINT number to set
541 */
542 static void mt_eint_en_hw_debounce(unsigned int eint_num)
543 {
544 unsigned int base, bit;
545 base = (eint_num / 4) * 4 + EINT_DBNC_SET_BASE;
546 bit = (EINT_DBNC_SET_EN << EINT_DBNC_SET_EN_BITS) << ((eint_num % 4) * 8);
547 writel(bit, IOMEM(base));
548 EINT_FUNC.is_deb_en[eint_num] = 1;
549 }
550
551 /*
552 * mt_eint_dis_hw_debounce: To disable hw debounce
553 * @eint_num: the EINT number to set
554 */
555 static void mt_eint_dis_hw_debounce(unsigned int eint_num)
556 {
557 unsigned int clr_base, bit;
558 clr_base = (eint_num / 4) * 4 + EINT_DBNC_CLR_BASE;
559 bit = (EINT_DBNC_CLR_EN << EINT_DBNC_CLR_EN_BITS) << ((eint_num % 4) * 8);
560 writel(bit, IOMEM(clr_base));
561 EINT_FUNC.is_deb_en[eint_num] = 0;
562 }
563
564 /*
565 * mt_eint_dis_sw_debounce: To set EINT_FUNC.is_deb_en[eint_num] disable
566 * @eint_num: the EINT number to set
567 */
568 static void mt_eint_dis_sw_debounce(unsigned int eint_num)
569 {
570 if(eint_num < EINT_MAX_CHANNEL)
571 EINT_FUNC.is_deb_en[eint_num] = 0;
572 }
573
574 /*
575 * mt_eint_en_sw_debounce: To set EINT_FUNC.is_deb_en[eint_num] enable
576 * @eint_num: the EINT number to set
577 */
578 static void mt_eint_en_sw_debounce(unsigned int eint_num)
579 {
580 if(eint_num < EINT_MAX_CHANNEL)
581 EINT_FUNC.is_deb_en[eint_num] = 1;
582 }
583
584 /*
585 * mt_can_en_debounce: Check the EINT number is able to enable debounce or not
586 * @eint_num: the EINT number to set
587 */
588 static unsigned int mt_can_en_debounce(unsigned int eint_num)
589 {
590 unsigned int sens = mt_eint_get_sens(eint_num);
591 /* debounce: debounce time is not 0 && it is not edge sensitive */
592 if (EINT_FUNC.deb_time[eint_num] != 0 && sens != MT_EDGE_SENSITIVE)
593 return 1;
594 else {
595 dbgmsg
596 ("Can't enable debounce of eint_num:%d, deb_time:%d, sens:%d\n",
597 eint_num, EINT_FUNC.deb_time[eint_num], sens);
598 return 0;
599 }
600 }
601
602 /*
603 * mt_eint_set_hw_debounce: Set the de-bounce time for the specified EINT number.
604 * @eint_num: EINT number to acknowledge
605 * @ms: the de-bounce time to set (in miliseconds)
606 */
607 void mt_eint_set_hw_debounce(unsigned int eint_num, unsigned int ms)
608 {
609 unsigned int dbnc, base, bit, clr_bit, clr_base, rst, unmask = 0;
610
611 base = (eint_num / 4) * 4 + EINT_DBNC_SET_BASE;
612 clr_base = (eint_num / 4) * 4 + EINT_DBNC_CLR_BASE;
613 EINT_FUNC.deb_time[eint_num] = ms;
614
615 /*
616 * Don't enable debounce once debounce time is 0 or
617 * its type is edge sensitive.
618 */
619 if (!mt_can_en_debounce(eint_num)) {
620 dbgmsg("Can't enable debounce of eint_num:%d in %s\n", eint_num,
621 __func__);
622 return;
623 }
624
625 if (ms == 0) {
626 dbnc = 0;
627 dbgmsg("ms should not be 0. eint_num:%d in %s\n", eint_num,
628 __func__);
629 } else if (ms <= 1) {
630 dbnc = 1;
631 } else if (ms <= 16) {
632 dbnc = 2;
633 } else if (ms <= 32) {
634 dbnc = 3;
635 } else if (ms <= 64) {
636 dbnc = 4;
637 } else if (ms <= 128) {
638 dbnc = 5;
639 } else if (ms <= 256) {
640 dbnc = 6;
641 } else {
642 dbnc = 7;
643 }
644
645 /* setp 1: mask the EINT */
646 if(!mt_eint_get_mask(eint_num)) {
647 mt_eint_mask(eint_num);
648 unmask = 1;
649 }
650 /* step 2: Check hw debouce number to decide which type should be used */
651 if (eint_num >= MAX_HW_DEBOUNCE_CNT)
652 mt_eint_en_sw_debounce(eint_num);
653 else {
654 /* step 2.1: set hw debounce flag*/
655 EINT_FUNC.is_deb_en[eint_num] = 1;
656
657 /* step 2.2: disable hw debounce */
658 clr_bit = 0xFF << ((eint_num % 4) * 8);
659 mt65xx_reg_sync_writel(clr_bit, clr_base);
660
661 /* step 2.3: set new debounce value */
662 bit =
663 ((dbnc << EINT_DBNC_SET_DBNC_BITS) |
664 (EINT_DBNC_SET_EN << EINT_DBNC_SET_EN_BITS)) <<
665 ((eint_num % 4) * 8);
666 mt65xx_reg_sync_writel(bit, base);
667
668 /* step 2.4: Delay a while (more than 2T) to wait for hw debounce enable work correctly */
669 udelay(500);
670
671 /* step 2.5: Reset hw debounce counter to avoid unexpected interrupt */
672 rst = (EINT_DBNC_RST_BIT << EINT_DBNC_SET_RST_BITS) <<
673 ((eint_num % 4) * 8);
674 mt65xx_reg_sync_writel(rst, base);
675
676 /* step 2.6: Delay a while (more than 2T) to wait for hw debounce counter reset work correctly */
677 udelay(500);
678 }
679 /* step 3: unmask the EINT */
680 if(unmask == 1)
681 mt_eint_unmask(eint_num);
682 }
683
684 /*
685 * eint_do_tasklet: EINT tasklet function.
686 * @unused: not use.
687 */
688 static void eint_do_tasklet(unsigned long unused)
689 {
690 wake_lock_timeout(&EINT_suspend_lock, HZ / 2);
691 }
692
693 DECLARE_TASKLET(eint_tasklet, eint_do_tasklet, 0);
694
695 /*
696 * mt_eint_timer_event_handler: EINT sw debounce handler
697 * @eint_num: the EINT number and use unsigned long to prevent
698 * compile warning of timer usage.
699 */
700 static void mt_eint_timer_event_handler(unsigned long eint_num)
701 {
702 unsigned int status;
703 unsigned long flags;
704
705 /* disable interrupt for core 0 and it will run on core 0 only */
706 local_irq_save(flags);
707
708 #if EINT_JUDGE_ST_IN_TIMER_CB
709 #if EINT_TEST_LATENCY
710 printk("Test latency, eint %d, st:0x%x, jif:0x%x, 1\n", eint_num, status, jiffies);
711 #endif
712
713 mt_eint_unmask(eint_num);
714 status = mt_eint_read_status(eint_num);
715
716 #if EINT_TEST_LATENCY
717 printk("Test latency, eint %d, st:0x%x, jif:0x%x, 2\n", eint_num, status, jiffies);
718 #endif
719
720 dbgmsg("EINT Module - EINT_STA = 0x%x, in %s\n", status, __func__);
721
722 #if 0 //EINT_TEST_LATENCY
723 if (24 == eint_num)
724 {
725 printk("Test latency, eint 24, sel:0x%x, 1\n", mt_get_gpio_pull_select(2));
726
727 if (0 == mt_get_gpio_pull_select(2))
728 {
729 mt_set_gpio_pull_select(2, GPIO_PULL_UP);
730 }
731 else
732 {
733 mt_set_gpio_pull_select(2, GPIO_PULL_DOWN);
734 }
735
736 printk("Test latency, eint 24, sel:0x%x, 2\n", mt_get_gpio_pull_select(2));
737 }
738 #endif
739
740 if (status) {
741 mt_eint_mask(eint_num);
742
743 #if EINT_TEST_LATENCY
744 printk("Test latency, eint %d, get st:0x%x\n", eint_num, status);
745 #endif
746
747 if (EINT_FUNC.eint_func[eint_num])
748 EINT_FUNC.eint_func[eint_num] ();
749 mt_eint_ack(eint_num);
750 }
751 #else
752 #if EINT_TEST_LATENCY
753 printk("Test latency, eint %d, get st:0x%x\n", eint_num, status);
754 #endif
755
756 if (EINT_FUNC.eint_func[eint_num])
757 EINT_FUNC.eint_func[eint_num] ();
758
759 mt_eint_ack(eint_num);
760 #endif
761
762 local_irq_restore(flags);
763 if (EINT_FUNC.eint_auto_umask[eint_num])
764 mt_eint_unmask(eint_num);
765 }
766
767 #if EINT_USE_PRECISE_HRTIMER
768 static enum hrtimer_restart mt_eint_hr_timer_event_handler(struct hrtimer *eint_timer)
769 {
770 //todo:
771 EINT_HR_TIMER_T *prEintHrTimer = NULL;
772
773 prEintHrTimer = container_of(eint_timer, EINT_HR_TIMER_T, rTimer);
774
775 if (prEintHrTimer->eint_num >= EINT_MAX_CHANNEL)
776 {
777 printk("Fatal error !!!!!!!!!!!!!! \n");
778 return HRTIMER_NORESTART;
779 }
780
781 #if EINT_TEST_LATENCY
782 printk("eint %d hr timer 0x%x receive callback\n", prEintHrTimer->eint_num, prEintHrTimer);
783 #endif
784
785 mt_eint_timer_event_handler(prEintHrTimer->eint_num);
786
787 #if EINT_TEST_LATENCY
788 printk("eint %d handler done\n", prEintHrTimer->eint_num);
789 #endif
790
791 //spin_lock(&eint_lock);
792 prEintHrTimer->eint_num = EINT_MAX_CHANNEL;
793 //spin_unlock(&eint_lock);
794
795 return HRTIMER_NORESTART;
796 }
797 #endif
798
799 /*
800 * mt_eint_set_timer_event: To set a timer event for sw debounce.
801 * @eint_num: the EINT number to set
802 */
803 static void mt_eint_set_timer_event(unsigned int eint_num)
804 {
805 #if EINT_USE_PRECISE_HRTIMER
806 if (eint_num >= EINT_MAX_CHANNEL)
807 {
808 printk("Error !!!!!!!!!!!!!! \n");
809 return;
810 }
811
812 //if (EINT_FUNC.deb_time[eint_num] == 1)
813 {
814 struct hrtimer *prHrTimer = &EINT_FUNC.eint_sw_deb_hr_timer[eint_num].rTimer;
815 ktime_t ktime;
816
817 #if EINT_TEST_LATENCY
818 printk("eint %d set timer 0x%x\n", eint_num, prHrTimer);
819 #endif
820
821 //spin_lock(&eint_lock);
822 if (EINT_MAX_CHANNEL == EINT_FUNC.eint_sw_deb_hr_timer[eint_num].eint_num)
823 {
824 EINT_FUNC.eint_sw_deb_hr_timer[eint_num].eint_num = eint_num;
825 }
826 else
827 {
828 #if EINT_TEST_LATENCY
829 printk("eint %d set timer 0x%x with eint num %d, but already set before !!!!!!\n", eint_num, prHrTimer, EINT_FUNC.eint_sw_deb_hr_timer[eint_num].eint_num);
830 #endif
831
832 //spin_unlock(&eint_lock);
833 return;
834 }
835 //spin_unlock(&eint_lock);
836
837 ktime = ktime_set(0, EINT_FUNC.deb_time[eint_num] * NSEC_PER_MSEC);
838 hrtimer_init(prHrTimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
839
840 prHrTimer->function = mt_eint_hr_timer_event_handler;
841 hrtimer_start(prHrTimer, ktime, HRTIMER_MODE_REL);
842 }
843 //else
844 #else
845 {
846 struct timer_list *eint_timer = &EINT_FUNC.eint_sw_deb_timer[eint_num];
847 /* assign this handler to execute on core 0 */
848 int cpu = 0;
849
850 /* register timer for this sw debounce eint */
851 eint_timer->expires =
852 jiffies + msecs_to_jiffies(EINT_FUNC.deb_time[eint_num]);
853
854 printk("Test latency, deb time:0x%x, jif:0x%x, expires:0x%x, HZ:0x%x\n", EINT_FUNC.deb_time[eint_num], jiffies, eint_timer->expires, HZ);
855
856 dbgmsg("EINT Module - expires:%llu, jiffies:%llu, deb_in_jiffies:%llu, ", eint_timer->expires, jiffies, msecs_to_jiffies(EINT_FUNC.deb_time[eint_num]));
857 dbgmsg("deb:%d, in %s\n", EINT_FUNC.deb_time[eint_num], __func__);
858
859 eint_timer->data = eint_num;
860 eint_timer->function = &mt_eint_timer_event_handler;
861 init_timer(eint_timer);
862 add_timer_on(eint_timer, cpu);
863 }
864 #endif
865 }
866
867 #if EINT_TEST_LATENCY
868 unsigned int _uTrigBeforeTimer = 0;
869 #include <mach/mt_gpio.h>
870 #endif
871
872 /*
873 * mt_eint_isr: EINT interrupt service routine.
874 * @irq: EINT IRQ number
875 * @dev_id:
876 * Return IRQ returned code.
877 */
878 static irqreturn_t mt_eint_isr(int irq, void *dev_id)
879 {
880 unsigned int index, rst, base;
881 unsigned int status = 0;
882 unsigned int status_check;
883 unsigned int reg_base,offset;
884
885 /*
886 * NoteXXX: Need to get the wake up for 0.5 seconds when an EINT intr tirggers.
887 * This is used to prevent system from suspend such that other drivers
888 * or applications can have enough time to obtain their own wake lock.
889 * (This information is gotten from the power management owner.)
890 */
891
892 tasklet_schedule(&eint_tasklet);
893 dbgmsg("EINT Module - %s ISR Start\n", __func__);
894 //printk("EINT acitve: %s, acitve status: %d\n", mt_irq_is_active(EINT_IRQ) ? "yes" : "no", mt_irq_is_active(EINT_IRQ));
895
896 for (reg_base = 0; reg_base < EINT_MAX_CHANNEL; reg_base+=32) {
897 /* read status register every 32 interrupts */
898 status = mt_eint_get_status(reg_base);
899 if(status){
900 dbgmsg("EINT Module - index:%d,EINT_STA = 0x%x\n",
901 reg_base, status);
902 }
903 else{
904 continue;
905 }
906 for(offset = 0; offset < 32; offset++){
907 index = reg_base + offset;
908 if (index >= EINT_MAX_CHANNEL) break;
909
910 status_check = status & (1 << (index % 32));
911 if (status_check) {
912 dbgmsg("Got eint:%d\n",index);
913 mt_eint_mask(index);
914
915 if ((EINT_FUNC.is_deb_en[index] == 1) &&
916 (index >= MAX_HW_DEBOUNCE_CNT)) {
917
918 #if EINT_TEST_LATENCY
919 if (24 == index)
920 {
921 printk("Test latency, 3, dir:0x%x, mode:0x%x, en:0x%x, sel:0x%x\n", mt_get_gpio_dir(2), mt_get_gpio_mode(2), mt_get_gpio_pull_enable(2), mt_get_gpio_pull_select(2));
922
923 if (1 == _uTrigBeforeTimer)
924 {
925 if (0 == mt_get_gpio_pull_select(2))
926 {
927 mt_set_gpio_pull_select(2, GPIO_PULL_UP);
928 }
929 else
930 {
931 mt_set_gpio_pull_select(2, GPIO_PULL_DOWN);
932 }
933 }
934
935 printk("Test latency, 4, dir:0x%x, mode:0x%x, en:0x%x, sel:0x%x\n", mt_get_gpio_dir(2), mt_get_gpio_mode(2), mt_get_gpio_pull_enable(2), mt_get_gpio_pull_select(2));
936 }
937 #endif
938
939 /* if its debounce is enable and it is a sw debounce */
940 mt_eint_set_timer_event(index);
941 } else {
942 /* HW debounce or no use debounce */
943 if (EINT_FUNC.eint_func[index]) {
944 EINT_FUNC.eint_func[index] ();
945 }
946 mt_eint_ack(index);
947 #if 1 /* Don't need to use reset ? */
948 /* reset debounce counter */
949 base = (index / 4) * 4 + EINT_DBNC_SET_BASE;
950 rst =
951 (EINT_DBNC_RST_BIT << EINT_DBNC_SET_RST_BITS) <<
952 ((index % 4) * 8);
953 mt65xx_reg_sync_writel(rst, base);
954 #endif
955 #if(EINT_DEBUG == 1)
956 status = mt_eint_get_status(index);
957 dbgmsg
958 ("EINT Module - EINT_STA after ack = 0x%x\n",
959 status);
960 #endif
961 if (EINT_FUNC.eint_auto_umask[index]) {
962 mt_eint_unmask(index);
963 }
964 }
965 }
966 }
967 }
968
969 dbgmsg("EINT Module - %s ISR END\n", __func__);
970 return IRQ_HANDLED;
971 }
972
973 static int mt_eint_max_channel(void)
974 {
975 return EINT_MAX_CHANNEL;
976 }
977
978 /*
979 * mt_eint_dis_debounce: To disable debounce.
980 * @eint_num: the EINT number to disable
981 */
982 static void mt_eint_dis_debounce(unsigned int eint_num)
983 {
984 /* This function is used to disable debounce whether hw or sw */
985 if (eint_num < MAX_HW_DEBOUNCE_CNT)
986 mt_eint_dis_hw_debounce(eint_num);
987 else
988 mt_eint_dis_sw_debounce(eint_num);
989 }
990
991 /*
992 * mt_eint_registration: register a EINT.
993 * @eint_num: the EINT number to register
994 * @flag: the interrupt line behaviour to select
995 * @EINT_FUNC_PTR: the ISR callback function
996 * @is_auto_unmask: the indication flag of auto unmasking after ISR callback is processed
997 */
998 void mt_eint_registration(unsigned int eint_num, unsigned int flag,
999 void (EINT_FUNC_PTR) (void), unsigned int is_auto_umask)
1000 {
1001 if (eint_num < EINT_MAX_CHANNEL) {
1002 printk("eint register for %d\n", eint_num);
1003 spin_lock(&eint_lock);
1004 mt_eint_mask(eint_num);
1005
1006 if (flag & (EINTF_TRIGGER_RISING | EINTF_TRIGGER_FALLING)) {
1007 mt_eint_set_polarity(eint_num, (flag & EINTF_TRIGGER_FALLING) ? MT_EINT_POL_NEG : MT_EINT_POL_POS);
1008 mt_eint_set_sens(eint_num, MT_EDGE_SENSITIVE);
1009 } else if (flag & (EINTF_TRIGGER_HIGH | EINTF_TRIGGER_LOW)) {
1010 mt_eint_set_polarity(eint_num, (flag & EINTF_TRIGGER_LOW) ? MT_EINT_POL_NEG : MT_EINT_POL_POS);
1011 mt_eint_set_sens(eint_num, MT_LEVEL_SENSITIVE);
1012 } else {
1013 printk("[EINT]: Wrong EINT Pol/Sens Setting 0x%x\n", flag);
1014 spin_unlock(&eint_lock);
1015 return ;
1016 }
1017
1018 EINT_FUNC.eint_func[eint_num] = EINT_FUNC_PTR;
1019 spin_unlock(&eint_lock);
1020 EINT_FUNC.eint_auto_umask[eint_num] = is_auto_umask;
1021 mt_eint_ack(eint_num);
1022 mt_eint_unmask(eint_num);
1023 } else {
1024 printk("[EINT]: Wrong EINT Number %d\n", eint_num);
1025 }
1026 }
1027
1028
1029 #ifdef DEINT_SUPPORT
1030 /*
1031 static irqreturn_t mt_deint_isr(int irq, void *dev_id)
1032 {
1033 int deint_num = irq - MT_EINT_DIRECT0_IRQ_ID;
1034 printk("IRQ = %d\n", irq);
1035 if (deint_num < 0) {
1036 printk(KERN_ERR "DEINT IRQ Number %d IS NOT VALID!! \n", deint_num);
1037 }
1038
1039 if (DEINT_FUNC.deint_func[deint_num]) {
1040 DEINT_FUNC.deint_func[deint_num]();
1041 }else
1042 printk("NULL EINT POINTER\n");
1043
1044
1045 printk("EXIT DEINT ISR\n");
1046 return IRQ_HANDLED;
1047 }
1048 */
1049
1050 /*
1051 * mt_deint_registration: register a DEINT.
1052 * @eint_num: the DEINT number to register
1053 * @flag: the interrupt line behaviour to select
1054 * @DEINT_FUNC_PTR: the ISR callback function
1055 * THIS FUNCTION IS INTERNAL USE ONLY, DON'T EXPORT
1056 *
1057 * NOTE: this function is not exported to our customer for now
1058 * but if we want to export it in the future, we must let them know that
1059 * DEINT should register its ISR with prototype same as ordinal ISR
1060 * unlike EINT's void (*func) (void)
1061 */
1062
1063 static void mt_deint_registration(unsigned int deint_num, unsigned int flag,
1064 //void (DEINT_FUNC_PTR) (void))
1065 irqreturn_t (DEINT_FUNC_PTR) (int, void *))
1066 {
1067 int num = deint_num;
1068 if (deint_num < DEINT_MAX_CHANNEL) {
1069
1070 // deint and eint numbers are not linear mapping
1071 if(deint_num > 11)
1072 num = deint_num + 2;
1073 /*
1074 if(!mt_eint_get_mask(num)) {
1075 printk("[Wrong DEint-%d] has been registered as EINT pin.!!! \n", deint_num);
1076 return ;
1077 }
1078 */
1079
1080 spin_lock(&eint_lock);
1081 if(EINT_FUNC.eint_func[num] != NULL){
1082 printk("[Wrong DEint-%d] has been registered as EINT pin.!!! \n", deint_num);
1083 spin_unlock(&eint_lock);
1084 return;
1085 }
1086 spin_unlock(&eint_lock);
1087
1088 mt_eint_mask(num);
1089
1090 if (flag & (EINTF_TRIGGER_RISING | EINTF_TRIGGER_FALLING)) {
1091 mt_eint_set_polarity(num, (flag & EINTF_TRIGGER_FALLING) ? MT_EINT_POL_NEG : MT_EINT_POL_POS);
1092 mt_eint_set_sens(num, MT_EDGE_SENSITIVE);
1093 } else if (flag & (EINTF_TRIGGER_HIGH | EINTF_TRIGGER_LOW)) {
1094 mt_eint_set_polarity(num, (flag & EINTF_TRIGGER_LOW) ? MT_EINT_POL_NEG : MT_EINT_POL_POS);
1095 mt_eint_set_sens(num, MT_LEVEL_SENSITIVE);
1096 } else {
1097 printk("[DEINT]: Wrong DEINT Pol/Sens Setting 0x%x\n", flag);
1098 return ;
1099 }
1100
1101 //DEINT_FUNC.deint_func[deint_num] = DEINT_FUNC_PTR;
1102
1103 /* direct EINT IRQs registration */
1104 //if (request_irq(MT_EINT_DIRECT0_IRQ_ID + deint_num, mt_deint_isr, IRQF_TRIGGER_HIGH, "DEINT", NULL )) {
1105 if (request_irq(MT_EINT_DIRECT0_IRQ_ID + deint_num, DEINT_FUNC_PTR, IRQF_TRIGGER_HIGH, "DEINT", NULL )) {
1106 printk(KERN_ERR "DEINT IRQ LINE NOT AVAILABLE!!\n");
1107 }
1108
1109 } else {
1110 printk("[DEINT]: Wrong DEINT Number %d\n", deint_num);
1111 }
1112 }
1113 #endif
1114
1115 static unsigned int mt_eint_get_debounce_cnt(unsigned int cur_eint_num)
1116 {
1117 unsigned int dbnc, deb, base;
1118 base = (cur_eint_num / 4) * 4 + EINT_DBNC_BASE;
1119
1120 if (cur_eint_num >= MAX_HW_DEBOUNCE_CNT)
1121 deb = EINT_FUNC.deb_time[cur_eint_num];
1122 else {
1123 dbnc = readl(IOMEM(base));
1124 dbnc = ((dbnc >> EINT_DBNC_SET_DBNC_BITS) >> ((cur_eint_num % 4) * 8) & EINT_DBNC);
1125
1126 switch (dbnc) {
1127 case 0:
1128 deb = 0; /* 0.5 actually, but we don't allow user to set. */
1129 dbgmsg(KERN_CRIT"ms should not be 0. eint_num:%d in %s\n",
1130 cur_eint_num, __func__);
1131 break;
1132 case 1:
1133 deb = 1;
1134 break;
1135 case 2:
1136 deb = 16;
1137 break;
1138 case 3:
1139 deb = 32;
1140 break;
1141 case 4:
1142 deb = 64;
1143 break;
1144 case 5:
1145 deb = 128;
1146 break;
1147 case 6:
1148 deb = 256;
1149 break;
1150 case 7:
1151 deb = 512;
1152 break;
1153 default:
1154 deb = 0;
1155 printk("invalid deb time in the EIN_CON register, dbnc:%d, deb:%d\n", dbnc, deb);
1156 break;
1157 }
1158 }
1159
1160 return deb;
1161 }
1162
1163 static int mt_eint_is_debounce_en(unsigned int cur_eint_num)
1164 {
1165 unsigned int base, val, en;
1166 if (cur_eint_num < MAX_HW_DEBOUNCE_CNT) {
1167 base = (cur_eint_num / 4) * 4 + EINT_DBNC_BASE;
1168 val = readl(IOMEM(base));
1169 val = val >> ((cur_eint_num % 4) * 8);
1170 if (val & EINT_DBNC_EN_BIT) {
1171 en = 1;
1172 } else {
1173 en = 0;
1174 }
1175 } else {
1176 en = EINT_FUNC.is_deb_en[cur_eint_num];
1177 }
1178
1179 return en;
1180 }
1181
1182 static void mt_eint_enable_debounce(unsigned int cur_eint_num)
1183 {
1184 mt_eint_mask(cur_eint_num);
1185 if (cur_eint_num < MAX_HW_DEBOUNCE_CNT) {
1186 /* HW debounce */
1187 mt_eint_en_hw_debounce(cur_eint_num);
1188 } else {
1189 /* SW debounce */
1190 mt_eint_en_sw_debounce(cur_eint_num);
1191 }
1192 mt_eint_unmask(cur_eint_num);
1193 }
1194
1195 static void mt_eint_disable_debounce(unsigned int cur_eint_num)
1196 {
1197 mt_eint_mask(cur_eint_num);
1198 if (cur_eint_num < MAX_HW_DEBOUNCE_CNT) {
1199 /* HW debounce */
1200 mt_eint_dis_hw_debounce(cur_eint_num);
1201 } else {
1202 /* SW debounce */
1203 mt_eint_dis_sw_debounce(cur_eint_num);
1204 }
1205 mt_eint_unmask(cur_eint_num);
1206 }
1207
1208 #if defined(EINT_TEST)
1209 static ssize_t cur_eint_soft_set_show(struct device_driver *driver, char *buf)
1210 {
1211 unsigned int ret = EINT_FUNC.softisr_called[cur_eint_num];
1212 /* reset to 0 for the next testing. */
1213 EINT_FUNC.softisr_called[cur_eint_num] = 0;
1214 return snprintf(buf, PAGE_SIZE, "%d\n", ret);
1215 }
1216 /*
1217 * set 1 to trigger and set 0 to clr this interrupt
1218 */
1219 static ssize_t cur_eint_soft_set_store(struct device_driver *driver, const char *buf, size_t count)
1220 {
1221 char *p = (char *)buf;
1222 unsigned int num;
1223
1224 num = simple_strtoul(p, &p, 10);
1225 if (num == 1) {
1226 #if 0 //defined(CONFIG_MT6582_FPGA)||defined(CONFIG_MT6589_FPGA)
1227 mt_eint_emu_set(cur_eint_num);
1228 #else
1229 mt_eint_soft_set(cur_eint_num);
1230 #endif
1231 } else if (num == 0) {
1232 #if 0 //defined(CONFIG_MT6582_FPGA)||defined(CONFIG_MT6589_FPGA)
1233 mt_eint_emu_clr(cur_eint_num);
1234 #else
1235 mt_eint_soft_clr(cur_eint_num);
1236 #endif
1237 } else {
1238 printk("invalid number:%d it should be 1 to trigger interrupt or 0 to clr.\n", num);
1239 }
1240
1241 return count;
1242 }
1243 DRIVER_ATTR(current_eint_soft_set, 0664, cur_eint_soft_set_show, cur_eint_soft_set_store);
1244 static void mt_eint_soft_isr(void)
1245 {
1246 EINT_FUNC.softisr_called[cur_eint_num] = 1;
1247 dbgmsg("in mt_eint_soft_isr\n");
1248 #if 0 //defined(CONFIG_MT6582_FPGA)||defined(CONFIG_MT6589_FPGA)
1249 mt_eint_emu_clr(cur_eint_num);
1250 #else
1251 mt_eint_soft_clr(cur_eint_num);
1252 #endif
1253 return;
1254 }
1255 static ssize_t cur_eint_reg_isr_show(struct device_driver *driver, char *buf)
1256 {
1257 /* if ISR has been registered return 1
1258 * else return 0
1259 */
1260 unsigned int sens, pol, deb, autounmask, base, dbnc;
1261 base = (cur_eint_num / 4) * 4 + EINT_DBNC_BASE;
1262 sens = mt_eint_get_sens(cur_eint_num);
1263 pol = mt_eint_get_polarity(cur_eint_num);
1264 autounmask = EINT_FUNC.eint_auto_umask[cur_eint_num];
1265
1266 if (cur_eint_num >= MAX_HW_DEBOUNCE_CNT)
1267 deb = EINT_FUNC.deb_time[cur_eint_num];
1268 else {
1269 dbnc = readl(IOMEM(base));
1270 dbnc = ((dbnc >> EINT_DBNC_SET_DBNC_BITS) >> ((cur_eint_num % 4) * 8) & EINT_DBNC);
1271
1272 switch (dbnc) {
1273 case 0:
1274 deb = 0;/* 0.5 actually, but we don't allow user to set. */
1275 dbgmsg("ms should not be 0. eint_num:%d in %s\n",
1276 cur_eint_num, __func__);
1277 break;
1278 case 1:
1279 deb = 1;
1280 break;
1281 case 2:
1282 deb = 16;
1283 break;
1284 case 3:
1285 deb = 32;
1286 break;
1287 case 4:
1288 deb = 64;
1289 break;
1290 case 5:
1291 deb = 128;
1292 break;
1293 case 6:
1294 deb = 256;
1295 break;
1296 case 7:
1297 deb = 512;
1298 break;
1299 default:
1300 deb = 0;
1301 printk("invalid deb time in the EIN_CON register, dbnc:%d, deb:%d\n", dbnc, deb);
1302 break;
1303 }
1304 }
1305 dbgmsg("sens:%d, pol:%d, deb:%d, isr:%p, autounmask:%d\n", sens, pol, deb, EINT_FUNC.eint_func[cur_eint_num], autounmask);
1306 return snprintf(buf, PAGE_SIZE, "%d\n", deb);
1307 }
1308 static ssize_t cur_eint_reg_isr_store(struct device_driver *driver,
1309 const char *buf, size_t count)
1310 {
1311 /* Get eint number */
1312 char *p = (char *)buf;
1313 unsigned int num;
1314 num = simple_strtoul(p, &p, 10);
1315 if (num != 1) {
1316 //dbgmsg("Unregister soft isr\n");
1317 printk("Unregister soft isr\n");
1318 mt_eint_mask(cur_eint_num);
1319 } else {
1320 /* register its ISR: mt_eint_soft_isr */
1321 /* level, high, deb time: 64ms, not auto unmask */
1322 mt_eint_set_sens(cur_eint_num, MT_LEVEL_SENSITIVE);
1323 mt_eint_set_hw_debounce(cur_eint_num, EINT_FUNC.deb_time[cur_eint_num] );
1324 mt_eint_registration(cur_eint_num, EINTF_TRIGGER_HIGH, mt_eint_soft_isr, 0);
1325 }
1326 return count;
1327 }
1328 DRIVER_ATTR(current_eint_reg_isr, 0644, cur_eint_reg_isr_show, cur_eint_reg_isr_store);
1329 #endif /*!EINT_TEST */
1330
1331 /*
1332 * mt_eint_setdomain0: set all eint_num to domain 0.
1333 */
1334 static void mt_eint_setdomain0(void)
1335 {
1336 unsigned int base;
1337 unsigned int val = 0xFFFFFFFF, ap_cnt = (EINT_MAX_CHANNEL / 32), i;
1338 if (EINT_MAX_CHANNEL % 32)
1339 ap_cnt++;
1340 dbgmsg("[EINT] cnt:%d\n", ap_cnt);
1341
1342 base = EINT_D0_EN_BASE;
1343 for (i = 0; i < ap_cnt; i++) {
1344 mt65xx_reg_sync_writel(val, base + (i * 4));
1345 dbgmsg("[EINT] domain addr:%x = %x\n", base, readl(IOMEM(base)));
1346 }
1347 }
1348
1349 #ifdef MD_EINT
1350 typedef struct{
1351 char name[24];
1352 int eint_num;
1353 int eint_deb;
1354 int eint_pol;
1355 int eint_sens;
1356 int socket_type;
1357 }MD_SIM_HOTPLUG_INFO;
1358
1359 #define MD_SIM_MAX 16
1360 MD_SIM_HOTPLUG_INFO md_sim_info[MD_SIM_MAX];
1361 unsigned int md_sim_counter = 0;
1362
1363 int get_eint_attribute(char *name, unsigned int name_len, unsigned int type, char *result, unsigned int *len)
1364 {
1365 int i;
1366 int ret = 0;
1367 int *sim_info = (int *)result;
1368 printk("in %s\n",__func__);
1369 //printk("[EINT]CUST_EINT_MD1_CNT:%d,CUST_EINT_MD2_CNT:%d\n",CUST_EINT_MD1_CNT,CUST_EINT_MD2_CNT);
1370 //printk("[EINT]CUST_EINT_MD1_CNT:%d",CUST_EINT_MD1_CNT);
1371 printk("query info: name:%s, type:%d, len:%d\n", name,type,name_len);
1372 if (len == NULL || name == NULL || result == NULL)
1373 return ERR_SIM_HOT_PLUG_NULL_POINTER;
1374
1375 for (i = 0; i < md_sim_counter; i++){
1376 printk("compare string:%s\n", md_sim_info[i].name);
1377 if (!strncmp(name, md_sim_info[i].name, name_len))
1378 {
1379 switch(type)
1380 {
1381 case SIM_HOT_PLUG_EINT_NUMBER:
1382 *len = sizeof(md_sim_info[i].eint_num);
1383 memcpy(sim_info, &md_sim_info[i].eint_num, *len);
1384 printk("[EINT]eint_num:%d\n", md_sim_info[i].eint_num);
1385 break;
1386
1387 case SIM_HOT_PLUG_EINT_DEBOUNCETIME:
1388 *len = sizeof(md_sim_info[i].eint_deb);
1389 memcpy(sim_info, &md_sim_info[i].eint_deb, *len);
1390 printk("[EINT]eint_deb:%d\n", md_sim_info[i].eint_deb);
1391 break;
1392
1393 case SIM_HOT_PLUG_EINT_POLARITY:
1394 *len = sizeof(md_sim_info[i].eint_pol);
1395 memcpy(sim_info, &md_sim_info[i].eint_pol, *len);
1396 printk("[EINT]eint_pol:%d\n", md_sim_info[i].eint_pol);
1397 break;
1398
1399 case SIM_HOT_PLUG_EINT_SENSITIVITY:
1400 *len = sizeof(md_sim_info[i].eint_sens);
1401 memcpy(sim_info, &md_sim_info[i].eint_sens, *len);
1402 printk("[EINT]eint_sens:%d\n", md_sim_info[i].eint_sens);
1403 break;
1404
1405 case SIM_HOT_PLUG_EINT_SOCKETTYPE:
1406 *len = sizeof(md_sim_info[i].socket_type);
1407 memcpy(sim_info, &md_sim_info[i].socket_type, *len);
1408 printk("[EINT]socket_type:%d\n", md_sim_info[i].socket_type);
1409 break;
1410
1411 default:
1412 ret = ERR_SIM_HOT_PLUG_QUERY_TYPE;
1413 *len = sizeof(int);
1414 memset(sim_info, 0xff, *len);
1415 break;
1416 }
1417 return ret;
1418 }
1419 }
1420
1421 *len = sizeof(int);
1422 memset(sim_info, 0xff, *len);
1423
1424 return ERR_SIM_HOT_PLUG_QUERY_STRING;
1425 }
1426 int get_type(char *name)
1427 {
1428
1429 int type1 = 0x0;
1430 int type2 = 0x0;
1431 #if defined(MTK_SIM1_SOCKET_TYPE) || defined(MTK_SIM2_SOCKET_TYPE)
1432 char *p;
1433 #endif
1434
1435 #ifdef MTK_SIM1_SOCKET_TYPE
1436 p = (char *)MTK_SIM1_SOCKET_TYPE;
1437 type1 = simple_strtoul(p, &p, 10);
1438 #endif
1439 #ifdef MTK_SIM2_SOCKET_TYPE
1440 p = (char *)MTK_SIM2_SOCKET_TYPE;
1441 type2 = simple_strtoul(p, &p, 10);
1442 #endif
1443 if (!strncmp(name, "MD1_SIM1_HOT_PLUG_EINT", strlen("MD1_SIM1_HOT_PLUG_EINT")))
1444 return type1;
1445 else if (!strncmp(name, "MD1_SIM1_HOT_PLUG_EINT", strlen("MD1_SIM1_HOT_PLUG_EINT")))
1446 return type1;
1447 else if (!strncmp(name, "MD2_SIM2_HOT_PLUG_EINT", strlen("MD2_SIM2_HOT_PLUG_EINT")))
1448 return type2;
1449 else if (!strncmp(name, "MD2_SIM2_HOT_PLUG_EINT", strlen("MD2_SIM2_HOT_PLUG_EINT")))
1450 return type2;
1451 else
1452 return 0;
1453 }
1454 #endif
1455
1456 static void setup_MD_eint(void)
1457 {
1458 #ifdef MD_EINT
1459 //printk("[EINT]CUST_EINT_MD1_CNT:%d,CUST_EINT_MD2_CNT:%d\n",CUST_EINT_MD1_CNT,CUST_EINT_MD2_CNT);
1460 //printk("[EINT]CUST_EINT_MD1_CNT:%d",CUST_EINT_MD1_CNT);
1461
1462 #if defined(CUST_EINT_MD1_0_NAME)
1463 sprintf(md_sim_info[md_sim_counter].name, CUST_EINT_MD1_0_NAME);
1464 md_sim_info[md_sim_counter].eint_num = CUST_EINT_MD1_0_NUM;
1465 md_sim_info[md_sim_counter].eint_pol= CUST_EINT_MD1_0_POLARITY;
1466 md_sim_info[md_sim_counter].eint_sens = CUST_EINT_MD1_0_SENSITIVE;
1467 md_sim_info[md_sim_counter].socket_type = get_type(md_sim_info[md_sim_counter].name);
1468 md_sim_info[md_sim_counter].eint_deb = CUST_EINT_MD1_0_DEBOUNCE_CN;
1469 printk("[EINT] MD1 name = %s\n", md_sim_info[md_sim_counter].name);
1470 printk("[EINT] MD1 type = %d\n", md_sim_info[md_sim_counter].socket_type);
1471 md_sim_counter++;
1472 #endif
1473 #if defined(CUST_EINT_MD1_1_NAME)
1474 sprintf(md_sim_info[md_sim_counter].name, CUST_EINT_MD1_1_NAME);
1475 md_sim_info[md_sim_counter].eint_num = CUST_EINT_MD1_1_NUM;
1476 md_sim_info[md_sim_counter].eint_pol= CUST_EINT_MD1_1_POLARITY;
1477 md_sim_info[md_sim_counter].eint_sens = CUST_EINT_MD1_1_SENSITIVE;
1478 md_sim_info[md_sim_counter].socket_type = get_type(md_sim_info[md_sim_counter].name);
1479 md_sim_info[md_sim_counter].eint_deb = CUST_EINT_MD1_1_DEBOUNCE_CN;
1480 printk("[EINT] MD1 name = %s\n", md_sim_info[md_sim_counter].name);
1481 printk("[EINT] MD1 type = %d\n", md_sim_info[md_sim_counter].socket_type);
1482 md_sim_counter++;
1483 #endif
1484 #if defined(CUST_EINT_MD1_2_NAME)
1485 sprintf(md_sim_info[md_sim_counter].name, CUST_EINT_MD1_2_NAME);
1486 md_sim_info[md_sim_counter].eint_num = CUST_EINT_MD1_2_NUM;
1487 md_sim_info[md_sim_counter].eint_pol= CUST_EINT_MD1_2_POLARITY;
1488 md_sim_info[md_sim_counter].eint_sens = CUST_EINT_MD1_2_SENSITIVE;
1489 md_sim_info[md_sim_counter].socket_type = get_type(md_sim_info[md_sim_counter].name);
1490 md_sim_info[md_sim_counter].eint_deb = CUST_EINT_MD1_2_DEBOUNCE_CN;
1491 printk("[EINT] MD1 name = %s\n", md_sim_info[md_sim_counter].name);
1492 printk("[EINT] MD1 type = %d\n", md_sim_info[md_sim_counter].socket_type);
1493 md_sim_counter++;
1494 #endif
1495 #if defined(CUST_EINT_MD1_3_NAME)
1496 sprintf(md_sim_info[md_sim_counter].name, CUST_EINT_MD1_3_NAME);
1497 md_sim_info[md_sim_counter].eint_num = CUST_EINT_MD1_3_NUM;
1498 md_sim_info[md_sim_counter].eint_pol= CUST_EINT_MD1_3_POLARITY;
1499 md_sim_info[md_sim_counter].eint_sens = CUST_EINT_MD1_3_SENSITIVE;
1500 md_sim_info[md_sim_counter].socket_type = get_type(md_sim_info[md_sim_counter].name);
1501 md_sim_info[md_sim_counter].eint_deb = CUST_EINT_MD1_3_DEBOUNCE_CN;
1502 printk("[EINT] MD1 name = %s\n", md_sim_info[md_sim_counter].name);
1503 printk("[EINT] MD1 type = %d\n", md_sim_info[md_sim_counter].socket_type);
1504 md_sim_counter++;
1505 #endif
1506 #if defined(CUST_EINT_MD1_4_NAME)
1507 sprintf(md_sim_info[md_sim_counter].name, CUST_EINT_MD1_4_NAME);
1508 md_sim_info[md_sim_counter].eint_num = CUST_EINT_MD1_4_NUM;
1509 md_sim_info[md_sim_counter].eint_pol= CUST_EINT_MD1_4_POLARITY;
1510 md_sim_info[md_sim_counter].eint_sens = CUST_EINT_MD1_4_SENSITIVE;
1511 md_sim_info[md_sim_counter].socket_type = get_type(md_sim_info[md_sim_counter].name);
1512 md_sim_info[md_sim_counter].eint_deb = CUST_EINT_MD1_4_DEBOUNCE_CN;
1513 printk("[EINT] MD1 name = %s\n", md_sim_info[md_sim_counter].name);
1514 printk("[EINT] MD1 type = %d\n", md_sim_info[md_sim_counter].socket_type);
1515 md_sim_counter++;
1516 #endif
1517
1518 #if defined(CUST_EINT_MD2_0_NAME)
1519 sprintf(md_sim_info[md_sim_counter].name, CUST_EINT_MD2_0_NAME);
1520 md_sim_info[md_sim_counter].eint_num = CUST_EINT_MD2_0_NUM;
1521 md_sim_info[md_sim_counter].eint_pol= CUST_EINT_MD2_0_POLARITY;
1522 md_sim_info[md_sim_counter].eint_sens = CUST_EINT_MD2_0_SENSITIVE;
1523 md_sim_info[md_sim_counter].socket_type = get_type(md_sim_info[md_sim_counter].name);
1524 md_sim_info[md_sim_counter].eint_deb = CUST_EINT_MD2_0_DEBOUNCE_CN;
1525 printk("[EINT] MD2 name = %s\n", md_sim_info[md_sim_counter].name);
1526 printk("[EINT] MD2 type = %d\n", md_sim_info[md_sim_counter].socket_type);
1527 md_sim_counter++;
1528 #endif
1529 #if defined(CUST_EINT_MD2_1_NAME)
1530 sprintf(md_sim_info[md_sim_counter].name, CUST_EINT_MD2_1_NAME);
1531 md_sim_info[md_sim_counter].eint_num = CUST_EINT_MD2_1_NUM;
1532 md_sim_info[md_sim_counter].eint_pol= CUST_EINT_MD2_1_POLARITY;
1533 md_sim_info[md_sim_counter].eint_sens = CUST_EINT_MD2_1_SENSITIVE;
1534 md_sim_info[md_sim_counter].socket_type = get_type(md_sim_info[md_sim_counter].name);
1535 md_sim_info[md_sim_counter].eint_deb = CUST_EINT_MD2_1_DEBOUNCE_CN;
1536 printk("[EINT] MD2 name = %s\n", md_sim_info[md_sim_counter].name);
1537 printk("[EINT] MD2 type = %d\n", md_sim_info[md_sim_counter].socket_type);
1538 md_sim_counter++;
1539 #endif
1540 #if defined(CUST_EINT_MD2_2_NAME)
1541 sprintf(md_sim_info[md_sim_counter].name, CUST_EINT_MD2_2_NAME);
1542 md_sim_info[md_sim_counter].eint_num = CUST_EINT_MD2_2_NUM;
1543 md_sim_info[md_sim_counter].eint_pol= CUST_EINT_MD2_2_POLARITY;
1544 md_sim_info[md_sim_counter].eint_sens = CUST_EINT_MD2_2_SENSITIVE;
1545 md_sim_info[md_sim_counter].socket_type = get_type(md_sim_info[md_sim_counter].name);
1546 md_sim_info[md_sim_counter].eint_deb = CUST_EINT_MD2_2_DEBOUNCE_CN;
1547 dbgmsg("[EINT] MD2 name = %s\n", md_sim_info[md_sim_counter].name);
1548 dbgmsg("[EINT] MD2 type = %d\n", md_sim_info[md_sim_counter].socket_type);
1549 md_sim_counter++;
1550 #endif
1551 #if defined(CUST_EINT_MD2_3_NAME)
1552 sprintf(md_sim_info[md_sim_counter].name, CUST_EINT_MD2_3_NAME);
1553 md_sim_info[md_sim_counter].eint_num = CUST_EINT_MD2_3_NUM;
1554 md_sim_info[md_sim_counter].eint_pol= CUST_EINT_MD2_3_POLARITY;
1555 md_sim_info[md_sim_counter].eint_sens = CUST_EINT_MD2_3_SENSITIVE;
1556 md_sim_info[md_sim_counter].socket_type = get_type(md_sim_info[md_sim_counter].name);
1557 md_sim_info[md_sim_counter].eint_deb = CUST_EINT_MD2_3_DEBOUNCE_CN;
1558 printk("[EINT] MD2 name = %s\n", md_sim_info[md_sim_counter].name);
1559 printk("[EINT] MD2 type = %d\n", md_sim_info[md_sim_counter].socket_type);
1560 md_sim_counter++;
1561 #endif
1562 #if defined(CUST_EINT_MD2_4_NAME)
1563 sprintf(md_sim_info[md_sim_counter].name, CUST_EINT_MD2_4_NAME);
1564 md_sim_info[md_sim_counter].eint_num = CUST_EINT_MD2_4_NUM;
1565 md_sim_info[md_sim_counter].eint_pol= CUST_EINT_MD2_4_POLARITY;
1566 md_sim_info[md_sim_counter].eint_sens = CUST_EINT_MD2_4_SENSITIVE;
1567 md_sim_info[md_sim_counter].socket_type = get_type(md_sim_info[md_sim_counter].name);
1568 md_sim_info[md_sim_counter].eint_deb = CUST_EINT_MD2_4_DEBOUNCE_CN;
1569 printk("[EINT] MD2 name = %s\n", md_sim_info[md_sim_counter].name);
1570 printk("[EINT] MD2 type = %d\n", md_sim_info[md_sim_counter].socket_type);
1571 md_sim_counter++;
1572 #endif
1573 #endif //MD_EINT
1574 }
1575
1576 #if 0
1577 void mt_eint_test()
1578 {
1579 int cur_eint_num = 200;
1580 int sens = 1;
1581 int pol = 1;
1582 int is_en_db = 0;
1583 int is_auto_umask = 0;
1584
1585 mt_eint_mask(cur_eint_num);
1586 mt_eint_set_polarity(cur_eint_num, pol);
1587 mt_eint_set_sens(cur_eint_num, sens);
1588 mt_eint_registration(cur_eint_num, EINTF_TRIGGER_HIGH, mt_eint_soft_isr, is_auto_umask);
1589 mt_eint_unmask(cur_eint_num);
1590 mt_eint_emu_set(cur_eint_num);
1591 }
1592 #endif
1593
1594 /*
1595 * mt_eint_print_status: Print the EINT status register.
1596 */
1597 void mt_eint_print_status(void)
1598 {
1599 unsigned int status,index;
1600 unsigned int offset,reg_base,status_check;
1601 printk(KERN_DEBUG"EINT_STA:");
1602 for (reg_base = 0; reg_base < EINT_MAX_CHANNEL; reg_base+=32) {
1603 /* read status register every 32 interrupts */
1604 status = mt_eint_get_status(reg_base);
1605 if(status){
1606 //dbgmsg(KERN_DEBUG"EINT Module - index:%d,EINT_STA = 0x%x\n",
1607 // reg_base, status);
1608 }
1609 else{
1610 continue;
1611 }
1612 for(offset = 0; offset < 32; offset++){
1613 index = reg_base + offset;
1614 if (index >= EINT_MAX_CHANNEL) break;
1615
1616 status_check = status & (1 << offset);
1617 if (status_check)
1618 printk(KERN_DEBUG" %d",index);
1619 }
1620
1621 }
1622 printk(KERN_DEBUG"\n");
1623 }
1624 #ifdef DEINT_SUPPORT
1625 void mt_eint_test(void)
1626
1627 {
1628 printk("test for eint re-registration\n");
1629 }
1630
1631 static irqreturn_t mt_deint_test_isr(int irq, void *dev_id)
1632 {
1633 printk("test for deint isr\n");
1634 //mt_irq_is_active(irq);
1635 }
1636 #endif
1637
1638 /*
1639 * mt_eint_init: initialize EINT driver.
1640 * Always return 0.
1641 */
1642 static int __init mt_eint_init(void)
1643 {
1644 unsigned int i;
1645 struct mt_eint_driver *eint_drv;
1646
1647 /* assign to domain 0 for AP */
1648 mt_eint_setdomain0();
1649
1650 wake_lock_init(&EINT_suspend_lock, WAKE_LOCK_SUSPEND, "EINT wakelock");
1651
1652 setup_MD_eint();
1653 for (i = 0; i < EINT_MAX_CHANNEL; i++) {
1654 EINT_FUNC.eint_func[i] = NULL;
1655 EINT_FUNC.is_deb_en[i] = 0;
1656 EINT_FUNC.deb_time[i] = 0;
1657 #if EINT_USE_PRECISE_HRTIMER
1658 EINT_FUNC.eint_sw_deb_hr_timer[i].eint_num = EINT_MAX_CHANNEL; //init for unused
1659 #if EINT_TEST_LATENCY
1660 if (24 == i)
1661 {
1662 printk(KERN_ERR "EINT init, eint 24 timer: 0x%x\n", &(EINT_FUNC.eint_sw_deb_hr_timer[i]));
1663 }
1664 #endif
1665 #else
1666 EINT_FUNC.eint_sw_deb_timer[i].expires = 0;
1667 EINT_FUNC.eint_sw_deb_timer[i].data = 0;
1668 EINT_FUNC.eint_sw_deb_timer[i].function = NULL;
1669 #endif
1670 #if defined(EINT_TEST)
1671 EINT_FUNC.softisr_called[i] = 0;
1672 #endif
1673 }
1674
1675 if (request_irq(EINT_IRQ, mt_eint_isr, IRQF_TRIGGER_HIGH, "EINT", NULL)) {
1676 printk(KERN_ERR "EINT IRQ LINE NOT AVAILABLE!!\n");
1677 }
1678
1679 /* register EINT driver */
1680 eint_drv = get_mt_eint_drv();
1681 eint_drv->eint_max_channel = mt_eint_max_channel;
1682 eint_drv->enable = mt_eint_unmask;
1683 eint_drv->disable = mt_eint_mask;
1684 eint_drv->is_disable = mt_eint_get_mask;
1685 eint_drv->get_sens = mt_eint_get_sens;
1686 eint_drv->set_sens = mt_eint_set_sens;
1687 eint_drv->get_polarity = mt_eint_get_polarity;
1688 eint_drv->set_polarity = mt_eint_set_polarity;
1689 eint_drv->get_debounce_cnt = mt_eint_get_debounce_cnt;
1690 eint_drv->set_debounce_cnt = mt_eint_set_hw_debounce;
1691 eint_drv->is_debounce_en = mt_eint_is_debounce_en;
1692 eint_drv->enable_debounce = mt_eint_enable_debounce;
1693 eint_drv->disable_debounce = mt_eint_disable_debounce;
1694
1695 /* Test */
1696 //mt_eint_registration(11, EINTF_TRIGGER_LOW, mt_eint_test, true);
1697 //mt_deint_registration(11, EINTF_TRIGGER_HIGH, mt_deint_test_isr);
1698
1699 return 0;
1700 }
1701 #if 0
1702 void mt_eint_dump_status(unsigned int eint)
1703 {
1704 if (eint >= EINT_MAX_CHANNEL)
1705 return;
1706 printk("[EINT] eint:%d,mask:%x,pol:%x,deb:%x,sens:%x\n",eint,mt_eint_get_mask(eint),mt_eint_get_polarity(eint),mt_eint_get_debounce_cnt(eint),mt_eint_get_sens(eint));
1707 }
1708 #endif
1709
1710 arch_initcall(mt_eint_init);
1711
1712 EXPORT_SYMBOL(mt_eint_dis_debounce);
1713 EXPORT_SYMBOL(mt_eint_registration);
1714 EXPORT_SYMBOL(mt_eint_set_hw_debounce);
1715 EXPORT_SYMBOL(mt_eint_set_polarity);
1716 EXPORT_SYMBOL(mt_eint_set_sens);
1717 EXPORT_SYMBOL(mt_eint_mask);
1718 EXPORT_SYMBOL(mt_eint_unmask);
1719 EXPORT_SYMBOL(mt_eint_print_status);
1720
1721 #if defined(EINT_TEST)
1722 EXPORT_SYMBOL(mt_eint_soft_set);
1723 #endif
kernel source for telekom puls (alcatel/mediatek)