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Merge tag 'for-linus-v3.10-rc5' of git://oss.sgi.com/xfs/xfs
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / wm9090.c
CommitLineData
39b8eab7
MB		 1/*
2 * ALSA SoC WM9090 driver
3 *
656baaeb 4 * Copyright 2009-12 Wolfson Microelectronics
39b8eab7
MB		 5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 */
22
23#include <linux/module.h>
24#include <linux/errno.h>
25#include <linux/device.h>
26#include <linux/i2c.h>
27#include <linux/delay.h>
ec2c0fec 28#include <linux/regmap.h>
39b8eab7
MB		 29#include <linux/slab.h>
30#include <sound/initval.h>
31#include <sound/soc.h>
39b8eab7
MB		 32#include <sound/tlv.h>
33#include <sound/wm9090.h>
34
35#include "wm9090.h"
36
ec2c0fec
MB		 37static const struct reg_default wm9090_reg_defaults[] = {
38 { 1, 0x0006 }, /* R1 - Power Management (1) */
39 { 2, 0x6000 }, /* R2 - Power Management (2) */
40 { 3, 0x0000 }, /* R3 - Power Management (3) */
41 { 6, 0x01C0 }, /* R6 - Clocking 1 */
42 { 22, 0x0003 }, /* R22 - IN1 Line Control */
43 { 23, 0x0003 }, /* R23 - IN2 Line Control */
44 { 24, 0x0083 }, /* R24 - IN1 Line Input A Volume */
45 { 25, 0x0083 }, /* R25 - IN1 Line Input B Volume */
46 { 26, 0x0083 }, /* R26 - IN2 Line Input A Volume */
47 { 27, 0x0083 }, /* R27 - IN2 Line Input B Volume */
48 { 28, 0x002D }, /* R28 - Left Output Volume */
49 { 29, 0x002D }, /* R29 - Right Output Volume */
50 { 34, 0x0100 }, /* R34 - SPKMIXL Attenuation */
51 { 35, 0x0010 }, /* R36 - SPKOUT Mixers */
52 { 37, 0x0140 }, /* R37 - ClassD3 */
53 { 38, 0x0039 }, /* R38 - Speaker Volume Left */
54 { 45, 0x0000 }, /* R45 - Output Mixer1 */
55 { 46, 0x0000 }, /* R46 - Output Mixer2 */
56 { 47, 0x0100 }, /* R47 - Output Mixer3 */
57 { 48, 0x0100 }, /* R48 - Output Mixer4 */
58 { 54, 0x0000 }, /* R54 - Speaker Mixer */
59 { 57, 0x000D }, /* R57 - AntiPOP2 */
60 { 70, 0x0000 }, /* R70 - Write Sequencer 0 */
61 { 71, 0x0000 }, /* R71 - Write Sequencer 1 */
62 { 72, 0x0000 }, /* R72 - Write Sequencer 2 */
63 { 73, 0x0000 }, /* R73 - Write Sequencer 3 */
64 { 74, 0x0000 }, /* R74 - Write Sequencer 4 */
65 { 75, 0x0000 }, /* R75 - Write Sequencer 5 */
66 { 76, 0x1F25 }, /* R76 - Charge Pump 1 */
67 { 85, 0x054A }, /* R85 - DC Servo 1 */
68 { 87, 0x0000 }, /* R87 - DC Servo 3 */
69 { 96, 0x0100 }, /* R96 - Analogue HP 0 */
70 { 98, 0x8640 }, /* R98 - AGC Control 0 */
71 { 99, 0xC000 }, /* R99 - AGC Control 1 */
72 { 100, 0x0200 }, /* R100 - AGC Control 2 */
39b8eab7
MB		 73};
74
75/* This struct is used to save the context */
76struct wm9090_priv {
39b8eab7 77 struct wm9090_platform_data pdata;
ec2c0fec 78 struct regmap *regmap;
39b8eab7
MB		 79};
80
ec2c0fec 81static bool wm9090_volatile(struct device *dev, unsigned int reg)
39b8eab7
MB		 82{
83 switch (reg) {
84 case WM9090_SOFTWARE_RESET:
85 case WM9090_DC_SERVO_0:
86 case WM9090_DC_SERVO_READBACK_0:
87 case WM9090_DC_SERVO_READBACK_1:
88 case WM9090_DC_SERVO_READBACK_2:
ec2c0fec 89 return true;
39b8eab7
MB		 90
91 default:
ec2c0fec
MB		 92 return false;
93 }
94}
95
96static bool wm9090_readable(struct device *dev, unsigned int reg)
97{
98 switch (reg) {
99 case WM9090_SOFTWARE_RESET:
100 case WM9090_POWER_MANAGEMENT_1:
101 case WM9090_POWER_MANAGEMENT_2:
102 case WM9090_POWER_MANAGEMENT_3:
103 case WM9090_CLOCKING_1:
104 case WM9090_IN1_LINE_CONTROL:
105 case WM9090_IN2_LINE_CONTROL:
106 case WM9090_IN1_LINE_INPUT_A_VOLUME:
107 case WM9090_IN1_LINE_INPUT_B_VOLUME:
108 case WM9090_IN2_LINE_INPUT_A_VOLUME:
109 case WM9090_IN2_LINE_INPUT_B_VOLUME:
110 case WM9090_LEFT_OUTPUT_VOLUME:
111 case WM9090_RIGHT_OUTPUT_VOLUME:
112 case WM9090_SPKMIXL_ATTENUATION:
113 case WM9090_SPKOUT_MIXERS:
114 case WM9090_CLASSD3:
115 case WM9090_SPEAKER_VOLUME_LEFT:
116 case WM9090_OUTPUT_MIXER1:
117 case WM9090_OUTPUT_MIXER2:
118 case WM9090_OUTPUT_MIXER3:
119 case WM9090_OUTPUT_MIXER4:
120 case WM9090_SPEAKER_MIXER:
121 case WM9090_ANTIPOP2:
122 case WM9090_WRITE_SEQUENCER_0:
123 case WM9090_WRITE_SEQUENCER_1:
124 case WM9090_WRITE_SEQUENCER_2:
125 case WM9090_WRITE_SEQUENCER_3:
126 case WM9090_WRITE_SEQUENCER_4:
127 case WM9090_WRITE_SEQUENCER_5:
128 case WM9090_CHARGE_PUMP_1:
129 case WM9090_DC_SERVO_0:
130 case WM9090_DC_SERVO_1:
131 case WM9090_DC_SERVO_3:
132 case WM9090_DC_SERVO_READBACK_0:
133 case WM9090_DC_SERVO_READBACK_1:
134 case WM9090_DC_SERVO_READBACK_2:
135 case WM9090_ANALOGUE_HP_0:
136 case WM9090_AGC_CONTROL_0:
137 case WM9090_AGC_CONTROL_1:
138 case WM9090_AGC_CONTROL_2:
139 return true;
140
141 default:
142 return false;
39b8eab7
MB		 143 }
144}
145
146static void wait_for_dc_servo(struct snd_soc_codec *codec)
147{
148 unsigned int reg;
149 int count = 0;
150
151 dev_dbg(codec->dev, "Waiting for DC servo...\n");
152 do {
153 count++;
154 msleep(1);
155 reg = snd_soc_read(codec, WM9090_DC_SERVO_READBACK_0);
156 dev_dbg(codec->dev, "DC servo status: %x\n", reg);
157 } while ((reg & WM9090_DCS_CAL_COMPLETE_MASK)
158 != WM9090_DCS_CAL_COMPLETE_MASK && count < 1000);
159
160 if ((reg & WM9090_DCS_CAL_COMPLETE_MASK)
161 != WM9090_DCS_CAL_COMPLETE_MASK)
162 dev_err(codec->dev, "Timed out waiting for DC Servo\n");
163}
164
165static const unsigned int in_tlv[] = {
a1320fee 166 TLV_DB_RANGE_HEAD(3),
39b8eab7
MB		 167 0, 0, TLV_DB_SCALE_ITEM(-600, 0, 0),
168 1, 3, TLV_DB_SCALE_ITEM(-350, 350, 0),
169 4, 6, TLV_DB_SCALE_ITEM(600, 600, 0),
170};
171static const unsigned int mix_tlv[] = {
a1320fee 172 TLV_DB_RANGE_HEAD(2),
39b8eab7
MB		 173 0, 2, TLV_DB_SCALE_ITEM(-1200, 300, 0),
174 3, 3, TLV_DB_SCALE_ITEM(0, 0, 0),
175};
176static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0);
177static const unsigned int spkboost_tlv[] = {
a1320fee 178 TLV_DB_RANGE_HEAD(2),
39b8eab7
MB		 179 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
180 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
181};
182
183static const struct snd_kcontrol_new wm9090_controls[] = {
184SOC_SINGLE_TLV("IN1A Volume", WM9090_IN1_LINE_INPUT_A_VOLUME, 0, 6, 0,
185 in_tlv),
186SOC_SINGLE("IN1A Switch", WM9090_IN1_LINE_INPUT_A_VOLUME, 7, 1, 1),
187SOC_SINGLE("IN1A ZC Switch", WM9090_IN1_LINE_INPUT_A_VOLUME, 6, 1, 0),
188
189SOC_SINGLE_TLV("IN2A Volume", WM9090_IN2_LINE_INPUT_A_VOLUME, 0, 6, 0,
190 in_tlv),
191SOC_SINGLE("IN2A Switch", WM9090_IN2_LINE_INPUT_A_VOLUME, 7, 1, 1),
192SOC_SINGLE("IN2A ZC Switch", WM9090_IN2_LINE_INPUT_A_VOLUME, 6, 1, 0),
193
194SOC_SINGLE("MIXOUTL Switch", WM9090_OUTPUT_MIXER3, 8, 1, 1),
195SOC_SINGLE_TLV("MIXOUTL IN1A Volume", WM9090_OUTPUT_MIXER3, 6, 3, 1,
196 mix_tlv),
197SOC_SINGLE_TLV("MIXOUTL IN2A Volume", WM9090_OUTPUT_MIXER3, 2, 3, 1,
198 mix_tlv),
199
200SOC_SINGLE("MIXOUTR Switch", WM9090_OUTPUT_MIXER4, 8, 1, 1),
201SOC_SINGLE_TLV("MIXOUTR IN1A Volume", WM9090_OUTPUT_MIXER4, 6, 3, 1,
202 mix_tlv),
203SOC_SINGLE_TLV("MIXOUTR IN2A Volume", WM9090_OUTPUT_MIXER4, 2, 3, 1,
204 mix_tlv),
205
206SOC_SINGLE("SPKMIX Switch", WM9090_SPKMIXL_ATTENUATION, 8, 1, 1),
207SOC_SINGLE_TLV("SPKMIX IN1A Volume", WM9090_SPKMIXL_ATTENUATION, 6, 3, 1,
208 mix_tlv),
209SOC_SINGLE_TLV("SPKMIX IN2A Volume", WM9090_SPKMIXL_ATTENUATION, 2, 3, 1,
210 mix_tlv),
211
212SOC_DOUBLE_R_TLV("Headphone Volume", WM9090_LEFT_OUTPUT_VOLUME,
213 WM9090_RIGHT_OUTPUT_VOLUME, 0, 63, 0, out_tlv),
214SOC_DOUBLE_R("Headphone Switch", WM9090_LEFT_OUTPUT_VOLUME,
215 WM9090_RIGHT_OUTPUT_VOLUME, 6, 1, 1),
216SOC_DOUBLE_R("Headphone ZC Switch", WM9090_LEFT_OUTPUT_VOLUME,
217 WM9090_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
218
219SOC_SINGLE_TLV("Speaker Volume", WM9090_SPEAKER_VOLUME_LEFT, 0, 63, 0,
220 out_tlv),
221SOC_SINGLE("Speaker Switch", WM9090_SPEAKER_VOLUME_LEFT, 6, 1, 1),
222SOC_SINGLE("Speaker ZC Switch", WM9090_SPEAKER_VOLUME_LEFT, 7, 1, 0),
223SOC_SINGLE_TLV("Speaker Boost Volume", WM9090_CLASSD3, 3, 7, 0, spkboost_tlv),
224};
225
226static const struct snd_kcontrol_new wm9090_in1_se_controls[] = {
227SOC_SINGLE_TLV("IN1B Volume", WM9090_IN1_LINE_INPUT_B_VOLUME, 0, 6, 0,
228 in_tlv),
229SOC_SINGLE("IN1B Switch", WM9090_IN1_LINE_INPUT_B_VOLUME, 7, 1, 1),
230SOC_SINGLE("IN1B ZC Switch", WM9090_IN1_LINE_INPUT_B_VOLUME, 6, 1, 0),
231
232SOC_SINGLE_TLV("SPKMIX IN1B Volume", WM9090_SPKMIXL_ATTENUATION, 4, 3, 1,
233 mix_tlv),
234SOC_SINGLE_TLV("MIXOUTL IN1B Volume", WM9090_OUTPUT_MIXER3, 4, 3, 1,
235 mix_tlv),
236SOC_SINGLE_TLV("MIXOUTR IN1B Volume", WM9090_OUTPUT_MIXER4, 4, 3, 1,
237 mix_tlv),
238};
239
240static const struct snd_kcontrol_new wm9090_in2_se_controls[] = {
241SOC_SINGLE_TLV("IN2B Volume", WM9090_IN2_LINE_INPUT_B_VOLUME, 0, 6, 0,
242 in_tlv),
243SOC_SINGLE("IN2B Switch", WM9090_IN2_LINE_INPUT_B_VOLUME, 7, 1, 1),
244SOC_SINGLE("IN2B ZC Switch", WM9090_IN2_LINE_INPUT_B_VOLUME, 6, 1, 0),
245
246SOC_SINGLE_TLV("SPKMIX IN2B Volume", WM9090_SPKMIXL_ATTENUATION, 0, 3, 1,
247 mix_tlv),
248SOC_SINGLE_TLV("MIXOUTL IN2B Volume", WM9090_OUTPUT_MIXER3, 0, 3, 1,
249 mix_tlv),
250SOC_SINGLE_TLV("MIXOUTR IN2B Volume", WM9090_OUTPUT_MIXER4, 0, 3, 1,
251 mix_tlv),
252};
253
254static int hp_ev(struct snd_soc_dapm_widget *w,
255 struct snd_kcontrol *kcontrol, int event)
256{
257 struct snd_soc_codec *codec = w->codec;
258 unsigned int reg = snd_soc_read(codec, WM9090_ANALOGUE_HP_0);
259
260 switch (event) {
261 case SND_SOC_DAPM_POST_PMU:
262 snd_soc_update_bits(codec, WM9090_CHARGE_PUMP_1,
263 WM9090_CP_ENA, WM9090_CP_ENA);
264
265 msleep(5);
266
267 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
268 WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA,
269 WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA);
270
271 reg |= WM9090_HPOUT1L_DLY | WM9090_HPOUT1R_DLY;
272 snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg);
273
274 /* Start the DC servo. We don't currently use the
275 * ability to save the state since we don't have full
276 * control of the analogue paths and they can change
277 * DC offsets; see the WM8904 driver for an example of
278 * doing so.
279 */
280 snd_soc_write(codec, WM9090_DC_SERVO_0,
281 WM9090_DCS_ENA_CHAN_0 |
282 WM9090_DCS_ENA_CHAN_1 |
283 WM9090_DCS_TRIG_STARTUP_1 |
284 WM9090_DCS_TRIG_STARTUP_0);
285 wait_for_dc_servo(codec);
286
287 reg |= WM9090_HPOUT1R_OUTP | WM9090_HPOUT1R_RMV_SHORT |
288 WM9090_HPOUT1L_OUTP | WM9090_HPOUT1L_RMV_SHORT;
289 snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg);
290 break;
291
292 case SND_SOC_DAPM_PRE_PMD:
293 reg &= ~(WM9090_HPOUT1L_RMV_SHORT |
294 WM9090_HPOUT1L_DLY |
295 WM9090_HPOUT1L_OUTP |
296 WM9090_HPOUT1R_RMV_SHORT |
297 WM9090_HPOUT1R_DLY |
298 WM9090_HPOUT1R_OUTP);
299
300 snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg);
301
302 snd_soc_write(codec, WM9090_DC_SERVO_0, 0);
303
304 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
305 WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA,
306 0);
307
308 snd_soc_update_bits(codec, WM9090_CHARGE_PUMP_1,
309 WM9090_CP_ENA, 0);
310 break;
311 }
312
313 return 0;
314}
315
316static const struct snd_kcontrol_new spkmix[] = {
317SOC_DAPM_SINGLE("IN1A Switch", WM9090_SPEAKER_MIXER, 6, 1, 0),
318SOC_DAPM_SINGLE("IN1B Switch", WM9090_SPEAKER_MIXER, 4, 1, 0),
319SOC_DAPM_SINGLE("IN2A Switch", WM9090_SPEAKER_MIXER, 2, 1, 0),
320SOC_DAPM_SINGLE("IN2B Switch", WM9090_SPEAKER_MIXER, 0, 1, 0),
321};
322
323static const struct snd_kcontrol_new spkout[] = {
324SOC_DAPM_SINGLE("Mixer Switch", WM9090_SPKOUT_MIXERS, 4, 1, 0),
325};
326
327static const struct snd_kcontrol_new mixoutl[] = {
328SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_MIXER1, 6, 1, 0),
329SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_MIXER1, 4, 1, 0),
330SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_MIXER1, 2, 1, 0),
331SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_MIXER1, 0, 1, 0),
332};
333
334static const struct snd_kcontrol_new mixoutr[] = {
335SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_MIXER2, 6, 1, 0),
336SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_MIXER2, 4, 1, 0),
337SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_MIXER2, 2, 1, 0),
338SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_MIXER2, 0, 1, 0),
339};
340
341static const struct snd_soc_dapm_widget wm9090_dapm_widgets[] = {
342SND_SOC_DAPM_INPUT("IN1+"),
343SND_SOC_DAPM_INPUT("IN1-"),
344SND_SOC_DAPM_INPUT("IN2+"),
345SND_SOC_DAPM_INPUT("IN2-"),
346
347SND_SOC_DAPM_SUPPLY("OSC", WM9090_POWER_MANAGEMENT_1, 3, 0, NULL, 0),
348
349SND_SOC_DAPM_PGA("IN1A PGA", WM9090_POWER_MANAGEMENT_2, 7, 0, NULL, 0),
350SND_SOC_DAPM_PGA("IN1B PGA", WM9090_POWER_MANAGEMENT_2, 6, 0, NULL, 0),
351SND_SOC_DAPM_PGA("IN2A PGA", WM9090_POWER_MANAGEMENT_2, 5, 0, NULL, 0),
352SND_SOC_DAPM_PGA("IN2B PGA", WM9090_POWER_MANAGEMENT_2, 4, 0, NULL, 0),
353
354SND_SOC_DAPM_MIXER("SPKMIX", WM9090_POWER_MANAGEMENT_3, 3, 0,
355 spkmix, ARRAY_SIZE(spkmix)),
356SND_SOC_DAPM_MIXER("MIXOUTL", WM9090_POWER_MANAGEMENT_3, 5, 0,
357 mixoutl, ARRAY_SIZE(mixoutl)),
358SND_SOC_DAPM_MIXER("MIXOUTR", WM9090_POWER_MANAGEMENT_3, 4, 0,
359 mixoutr, ARRAY_SIZE(mixoutr)),
360
361SND_SOC_DAPM_PGA_E("HP PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
362 hp_ev, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
363
364SND_SOC_DAPM_PGA("SPKPGA", WM9090_POWER_MANAGEMENT_3, 8, 0, NULL, 0),
365SND_SOC_DAPM_MIXER("SPKOUT", WM9090_POWER_MANAGEMENT_1, 12, 0,
366 spkout, ARRAY_SIZE(spkout)),
367
368SND_SOC_DAPM_OUTPUT("HPR"),
369SND_SOC_DAPM_OUTPUT("HPL"),
370SND_SOC_DAPM_OUTPUT("Speaker"),
371};
372
373static const struct snd_soc_dapm_route audio_map[] = {
374 { "IN1A PGA", NULL, "IN1+" },
375 { "IN2A PGA", NULL, "IN2+" },
376
377 { "SPKMIX", "IN1A Switch", "IN1A PGA" },
378 { "SPKMIX", "IN2A Switch", "IN2A PGA" },
379
380 { "MIXOUTL", "IN1A Switch", "IN1A PGA" },
381 { "MIXOUTL", "IN2A Switch", "IN2A PGA" },
382
383 { "MIXOUTR", "IN1A Switch", "IN1A PGA" },
384 { "MIXOUTR", "IN2A Switch", "IN2A PGA" },
385
386 { "HP PGA", NULL, "OSC" },
387 { "HP PGA", NULL, "MIXOUTL" },
388 { "HP PGA", NULL, "MIXOUTR" },
389
390 { "HPL", NULL, "HP PGA" },
391 { "HPR", NULL, "HP PGA" },
392
393 { "SPKPGA", NULL, "OSC" },
394 { "SPKPGA", NULL, "SPKMIX" },
395
396 { "SPKOUT", "Mixer Switch", "SPKPGA" },
397
398 { "Speaker", NULL, "SPKOUT" },
399};
400
401static const struct snd_soc_dapm_route audio_map_in1_se[] = {
402 { "IN1B PGA", NULL, "IN1-" },
403
404 { "SPKMIX", "IN1B Switch", "IN1B PGA" },
405 { "MIXOUTL", "IN1B Switch", "IN1B PGA" },
406 { "MIXOUTR", "IN1B Switch", "IN1B PGA" },
407};
408
409static const struct snd_soc_dapm_route audio_map_in1_diff[] = {
410 { "IN1A PGA", NULL, "IN1-" },
411};
412
413static const struct snd_soc_dapm_route audio_map_in2_se[] = {
414 { "IN2B PGA", NULL, "IN2-" },
415
416 { "SPKMIX", "IN2B Switch", "IN2B PGA" },
417 { "MIXOUTL", "IN2B Switch", "IN2B PGA" },
418 { "MIXOUTR", "IN2B Switch", "IN2B PGA" },
419};
420
421static const struct snd_soc_dapm_route audio_map_in2_diff[] = {
422 { "IN2A PGA", NULL, "IN2-" },
423};
424
425static int wm9090_add_controls(struct snd_soc_codec *codec)
426{
427 struct wm9090_priv *wm9090 = snd_soc_codec_get_drvdata(codec);
ce6120cc 428 struct snd_soc_dapm_context *dapm = &codec->dapm;
39b8eab7
MB		 429 int i;
430
ce6120cc 431 snd_soc_dapm_new_controls(dapm, wm9090_dapm_widgets,
39b8eab7
MB		 432 ARRAY_SIZE(wm9090_dapm_widgets));
433
ce6120cc 434 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
39b8eab7 435
022658be 436 snd_soc_add_codec_controls(codec, wm9090_controls,
39b8eab7
MB		 437 ARRAY_SIZE(wm9090_controls));
438
439 if (wm9090->pdata.lin1_diff) {
ce6120cc 440 snd_soc_dapm_add_routes(dapm, audio_map_in1_diff,
39b8eab7
MB		 441 ARRAY_SIZE(audio_map_in1_diff));
442 } else {
ce6120cc 443 snd_soc_dapm_add_routes(dapm, audio_map_in1_se,
39b8eab7 444 ARRAY_SIZE(audio_map_in1_se));
022658be 445 snd_soc_add_codec_controls(codec, wm9090_in1_se_controls,
39b8eab7
MB		 446 ARRAY_SIZE(wm9090_in1_se_controls));
447 }
448
449 if (wm9090->pdata.lin2_diff) {
ce6120cc 450 snd_soc_dapm_add_routes(dapm, audio_map_in2_diff,
39b8eab7
MB		 451 ARRAY_SIZE(audio_map_in2_diff));
452 } else {
ce6120cc 453 snd_soc_dapm_add_routes(dapm, audio_map_in2_se,
39b8eab7 454 ARRAY_SIZE(audio_map_in2_se));
022658be 455 snd_soc_add_codec_controls(codec, wm9090_in2_se_controls,
39b8eab7
MB		 456 ARRAY_SIZE(wm9090_in2_se_controls));
457 }
458
459 if (wm9090->pdata.agc_ena) {
460 for (i = 0; i < ARRAY_SIZE(wm9090->pdata.agc); i++)
461 snd_soc_write(codec, WM9090_AGC_CONTROL_0 + i,
462 wm9090->pdata.agc[i]);
463 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_3,
464 WM9090_AGC_ENA, WM9090_AGC_ENA);
465 } else {
466 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_3,
467 WM9090_AGC_ENA, 0);
468 }
469
470 return 0;
471
472}
473
474/*
475 * The machine driver should call this from their set_bias_level; if there
476 * isn't one then this can just be set as the set_bias_level function.
477 */
478static int wm9090_set_bias_level(struct snd_soc_codec *codec,
479 enum snd_soc_bias_level level)
480{
ec2c0fec 481 struct wm9090_priv *wm9090 = snd_soc_codec_get_drvdata(codec);
39b8eab7
MB		 482
483 switch (level) {
484 case SND_SOC_BIAS_ON:
485 break;
486
487 case SND_SOC_BIAS_PREPARE:
488 snd_soc_update_bits(codec, WM9090_ANTIPOP2, WM9090_VMID_ENA,
489 WM9090_VMID_ENA);
490 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
491 WM9090_BIAS_ENA |
492 WM9090_VMID_RES_MASK,
493 WM9090_BIAS_ENA |
494 1 << WM9090_VMID_RES_SHIFT);
495 msleep(1); /* Probably an overestimate */
496 break;
497
498 case SND_SOC_BIAS_STANDBY:
ce6120cc 499 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
39b8eab7 500 /* Restore the register cache */
ec2c0fec 501 regcache_sync(wm9090->regmap);
39b8eab7
MB		 502 }
503
504 /* We keep VMID off during standby since the combination of
505 * ground referenced outputs and class D speaker mean that
506 * latency is not an issue.
507 */
508 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
509 WM9090_BIAS_ENA | WM9090_VMID_RES_MASK, 0);
510 snd_soc_update_bits(codec, WM9090_ANTIPOP2,
511 WM9090_VMID_ENA, 0);
512 break;
513
514 case SND_SOC_BIAS_OFF:
515 break;
516 }
517
ce6120cc 518 codec->dapm.bias_level = level;
39b8eab7
MB		 519
520 return 0;
521}
522
f0fba2ad 523static int wm9090_probe(struct snd_soc_codec *codec)
39b8eab7 524{
ec2c0fec 525 struct wm9090_priv *wm9090 = dev_get_drvdata(codec->dev);
f0fba2ad 526 int ret;
39b8eab7 527
ec2c0fec
MB		 528 codec->control_data = wm9090->regmap;
529 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
f0fba2ad
LG		 530 if (ret != 0) {
531 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
532 return ret;
39b8eab7
MB		 533 }
534
f0fba2ad
LG		 535 /* Configure some defaults; they will be written out when we
536 * bring the bias up.
537 */
a1b3b5ee
MB		 538 snd_soc_update_bits(codec, WM9090_IN1_LINE_INPUT_A_VOLUME,
539 WM9090_IN1_VU | WM9090_IN1A_ZC,
540 WM9090_IN1_VU | WM9090_IN1A_ZC);
541 snd_soc_update_bits(codec, WM9090_IN1_LINE_INPUT_B_VOLUME,
542 WM9090_IN1_VU | WM9090_IN1B_ZC,
543 WM9090_IN1_VU | WM9090_IN1B_ZC);
544 snd_soc_update_bits(codec, WM9090_IN2_LINE_INPUT_A_VOLUME,
545 WM9090_IN2_VU | WM9090_IN2A_ZC,
546 WM9090_IN2_VU | WM9090_IN2A_ZC);
547 snd_soc_update_bits(codec, WM9090_IN2_LINE_INPUT_B_VOLUME,
548 WM9090_IN2_VU | WM9090_IN2B_ZC,
549 WM9090_IN2_VU | WM9090_IN2B_ZC);
550 snd_soc_update_bits(codec, WM9090_SPEAKER_VOLUME_LEFT,
551 WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC,
552 WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC);
553 snd_soc_update_bits(codec, WM9090_LEFT_OUTPUT_VOLUME,
554 WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC,
555 WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC);
556 snd_soc_update_bits(codec, WM9090_RIGHT_OUTPUT_VOLUME,
557 WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC,
558 WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC);
559
560 snd_soc_update_bits(codec, WM9090_CLOCKING_1,
561 WM9090_TOCLK_ENA, WM9090_TOCLK_ENA);
f0fba2ad
LG		 562
563 wm9090_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
564
39b8eab7
MB		 565 wm9090_add_controls(codec);
566
567 return 0;
39b8eab7
MB		 568}
569
570#ifdef CONFIG_PM
84b315ee 571static int wm9090_suspend(struct snd_soc_codec *codec)
39b8eab7 572{
39b8eab7
MB		 573 wm9090_set_bias_level(codec, SND_SOC_BIAS_OFF);
574
575 return 0;
576}
577
f0fba2ad 578static int wm9090_resume(struct snd_soc_codec *codec)
39b8eab7 579{
39b8eab7
MB		 580 wm9090_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
581
582 return 0;
583}
584#else
585#define wm9090_suspend NULL
586#define wm9090_resume NULL
587#endif
588
f0fba2ad 589static int wm9090_remove(struct snd_soc_codec *codec)
39b8eab7 590{
f0fba2ad 591 wm9090_set_bias_level(codec, SND_SOC_BIAS_OFF);
39b8eab7
MB		 592
593 return 0;
594}
595
f0fba2ad 596static struct snd_soc_codec_driver soc_codec_dev_wm9090 = {
39b8eab7
MB		 597 .probe = wm9090_probe,
598 .remove = wm9090_remove,
599 .suspend = wm9090_suspend,
600 .resume = wm9090_resume,
f0fba2ad 601 .set_bias_level = wm9090_set_bias_level,
39b8eab7 602};
39b8eab7 603
ec2c0fec
MB		 604static const struct regmap_config wm9090_regmap = {
605 .reg_bits = 8,
606 .val_bits = 16,
607
608 .max_register = WM9090_MAX_REGISTER,
609 .volatile_reg = wm9090_volatile,
610 .readable_reg = wm9090_readable,
611
612 .cache_type = REGCACHE_RBTREE,
613 .reg_defaults = wm9090_reg_defaults,
614 .num_reg_defaults = ARRAY_SIZE(wm9090_reg_defaults),
615};
616
617
39b8eab7
MB		 618static int wm9090_i2c_probe(struct i2c_client *i2c,
619 const struct i2c_device_id *id)
620{
621 struct wm9090_priv *wm9090;
391d9e4e 622 unsigned int reg;
39b8eab7
MB		 623 int ret;
624
455b91bf 625 wm9090 = devm_kzalloc(&i2c->dev, sizeof(*wm9090), GFP_KERNEL);
39b8eab7
MB		 626 if (wm9090 == NULL) {
627 dev_err(&i2c->dev, "Can not allocate memory\n");
628 return -ENOMEM;
629 }
39b8eab7 630
be7eaf53 631 wm9090->regmap = devm_regmap_init_i2c(i2c, &wm9090_regmap);
ec2c0fec
MB		 632 if (IS_ERR(wm9090->regmap)) {
633 ret = PTR_ERR(wm9090->regmap);
634 dev_err(&i2c->dev, "Failed to allocate regmap: %d\n", ret);
635 return ret;
636 }
637
391d9e4e
MB		 638 ret = regmap_read(wm9090->regmap, WM9090_SOFTWARE_RESET, &reg);
639 if (ret < 0)
be7eaf53
SK		 640 return ret;
641
391d9e4e 642 if (reg != 0x9093) {
905b4195 643 dev_err(&i2c->dev, "Device is not a WM9090, ID=%x\n", reg);
be7eaf53 644 return -ENODEV;
391d9e4e
MB		 645 }
646
647 ret = regmap_write(wm9090->regmap, WM9090_SOFTWARE_RESET, 0);
648 if (ret < 0)
be7eaf53 649 return ret;
391d9e4e 650
39b8eab7
MB		 651 if (i2c->dev.platform_data)
652 memcpy(&wm9090->pdata, i2c->dev.platform_data,
653 sizeof(wm9090->pdata));
654
39b8eab7
MB		 655 i2c_set_clientdata(i2c, wm9090);
656
f0fba2ad
LG		 657 ret = snd_soc_register_codec(&i2c->dev,
658 &soc_codec_dev_wm9090, NULL, 0);
ec2c0fec
MB		 659 if (ret != 0) {
660 dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
be7eaf53 661 return ret;
ec2c0fec
MB		 662 }
663
664 return 0;
39b8eab7
MB		 665}
666
7a79e94e 667static int wm9090_i2c_remove(struct i2c_client *i2c)
39b8eab7 668{
f0fba2ad 669 snd_soc_unregister_codec(&i2c->dev);
39b8eab7
MB		 670 return 0;
671}
672
673static const struct i2c_device_id wm9090_id[] = {
674 { "wm9090", 0 },
644f1ff4 675 { "wm9093", 0 },
39b8eab7
MB		 676 { }
677};
678MODULE_DEVICE_TABLE(i2c, wm9090_id);
679
680static struct i2c_driver wm9090_i2c_driver = {
681 .driver = {
091edccf 682 .name = "wm9090",
39b8eab7
MB		 683 .owner = THIS_MODULE,
684 },
685 .probe = wm9090_i2c_probe,
7a79e94e 686 .remove = wm9090_i2c_remove,
39b8eab7
MB		 687 .id_table = wm9090_id,
688};
689
96124c29 690module_i2c_driver(wm9090_i2c_driver);
39b8eab7
MB		 691
692MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
693MODULE_DESCRIPTION("WM9090 ASoC driver");
694MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)