[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / wm8523.c

/*
 * wm8523.c  --  WM8523 ALSA SoC Audio driver
 *
 * Copyright 2009 Wolfson Microelectronics plc
 *
 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
 *
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/initval.h>
#include <sound/tlv.h>

#include "wm8523.h"

static struct snd_soc_codec *wm8523_codec;
struct snd_soc_codec_device soc_codec_dev_wm8523;

#define WM8523_NUM_SUPPLIES 2
static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
	"AVDD",
	"LINEVDD",
};

#define WM8523_NUM_RATES 7

/* codec private data */
struct wm8523_priv {
	struct snd_soc_codec codec;
	u16 reg_cache[WM8523_REGISTER_COUNT];
	struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
	unsigned int sysclk;
	unsigned int rate_constraint_list[WM8523_NUM_RATES];
	struct snd_pcm_hw_constraint_list rate_constraint;
};

static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
	0x8523,     /* R0 - DEVICE_ID */
	0x0001,     /* R1 - REVISION */
	0x0000,     /* R2 - PSCTRL1 */
	0x1812,     /* R3 - AIF_CTRL1 */
	0x0000,     /* R4 - AIF_CTRL2 */
	0x0001,     /* R5 - DAC_CTRL3 */
	0x0190,     /* R6 - DAC_GAINL */
	0x0190,     /* R7 - DAC_GAINR */
	0x0000,     /* R8 - ZERO_DETECT */
};

static int wm8523_volatile_register(unsigned int reg)
{
	switch (reg) {
	case WM8523_DEVICE_ID:
	case WM8523_REVISION:
		return 1;
	default:
		return 0;
	}
}

static int wm8523_reset(struct snd_soc_codec *codec)
{
	return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
}

static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);

static const char *wm8523_zd_count_text[] = {
	"1024",
	"2048",
};

static const struct soc_enum wm8523_zc_count =
	SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);

static const struct snd_kcontrol_new wm8523_snd_controls[] = {
SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
		 0, 448, 0, dac_tlv),
SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
SOC_ENUM("Zero Detect Count", wm8523_zc_count),
};

static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
};

static const struct snd_soc_dapm_route intercon[] = {
	{ "LINEVOUTL", NULL, "DAC" },
	{ "LINEVOUTR", NULL, "DAC" },
};

static int wm8523_add_widgets(struct snd_soc_codec *codec)
{
	snd_soc_dapm_new_controls(codec, wm8523_dapm_widgets,
				  ARRAY_SIZE(wm8523_dapm_widgets));

	snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));

	return 0;
}

static struct {
	int value;
	int ratio;
} lrclk_ratios[WM8523_NUM_RATES] = {
	{ 1, 128 },
	{ 2, 192 },
	{ 3, 256 },
	{ 4, 384 },
	{ 5, 512 },
	{ 6, 768 },
	{ 7, 1152 },
};

static int wm8523_startup(struct snd_pcm_substream *substream,
			  struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	struct wm8523_priv *wm8523 = codec->private_data;

	/* The set of sample rates that can be supported depends on the
	 * MCLK supplied to the CODEC - enforce this.
	 */
	if (!wm8523->sysclk) {
		dev_err(codec->dev,
			"No MCLK configured, call set_sysclk() on init\n");
		return -EINVAL;
	}

	return 0;
	snd_pcm_hw_constraint_list(substream->runtime, 0,
				   SNDRV_PCM_HW_PARAM_RATE,
				   &wm8523->rate_constraint);

	return 0;
}

static int wm8523_hw_params(struct snd_pcm_substream *substream,
			    struct snd_pcm_hw_params *params,
			    struct snd_soc_dai *dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_device *socdev = rtd->socdev;
	struct snd_soc_codec *codec = socdev->card->codec;
	struct wm8523_priv *wm8523 = codec->private_data;
	int i;
	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
	u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);

	/* Find a supported LRCLK ratio */
	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
		if (wm8523->sysclk / params_rate(params) ==
		    lrclk_ratios[i].ratio)
			break;
	}

	/* Should never happen, should be handled by constraints */
	if (i == ARRAY_SIZE(lrclk_ratios)) {
		dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
			wm8523->sysclk / params_rate(params));
		return -EINVAL;
	}

	aifctrl2 &= ~WM8523_SR_MASK;
	aifctrl2 |= lrclk_ratios[i].value;

	aifctrl1 &= ~WM8523_WL_MASK;
	switch (params_format(params)) {
	case SNDRV_PCM_FORMAT_S16_LE:
		break;
	case SNDRV_PCM_FORMAT_S20_3LE:
		aifctrl1 |= 0x8;
		break;
	case SNDRV_PCM_FORMAT_S24_LE:
		aifctrl1 |= 0x10;
		break;
	case SNDRV_PCM_FORMAT_S32_LE:
		aifctrl1 |= 0x18;
		break;
	}

	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
	snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);

	return 0;
}

static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
		int clk_id, unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	struct wm8523_priv *wm8523 = codec->private_data;
	unsigned int val;
	int i;

	wm8523->sysclk = freq;

	wm8523->rate_constraint.count = 0;
	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
		val = freq / lrclk_ratios[i].ratio;
		/* Check that it's a standard rate since core can't
		 * cope with others and having the odd rates confuses
		 * constraint matching.
		 */
		switch (val) {
		case 8000:
		case 11025:
		case 16000:
		case 22050:
		case 32000:
		case 44100:
		case 48000:
		case 64000:
		case 88200:
		case 96000:
		case 176400:
		case 192000:
			dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
				val);
			wm8523->rate_constraint_list[i] = val;
			wm8523->rate_constraint.count++;
			break;
		default:
			dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
				val);
		}
	}

	/* Need at least one supported rate... */
	if (wm8523->rate_constraint.count == 0)
		return -EINVAL;

	return 0;
}


static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
		unsigned int fmt)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);

	aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
		      WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM:
		aifctrl1 |= WM8523_AIF_MSTR;
		break;
	case SND_SOC_DAIFMT_CBS_CFS:
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:
		aifctrl1 |= 0x0002;
		break;
	case SND_SOC_DAIFMT_RIGHT_J:
		break;
	case SND_SOC_DAIFMT_LEFT_J:
		aifctrl1 |= 0x0001;
		break;
	case SND_SOC_DAIFMT_DSP_A:
		aifctrl1 |= 0x0003;
		break;
	case SND_SOC_DAIFMT_DSP_B:
		aifctrl1 |= 0x0023;
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	case SND_SOC_DAIFMT_NB_NF:
		break;
	case SND_SOC_DAIFMT_IB_IF:
		aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
		break;
	case SND_SOC_DAIFMT_IB_NF:
		aifctrl1 |= WM8523_BCLK_INV;
		break;
	case SND_SOC_DAIFMT_NB_IF:
		aifctrl1 |= WM8523_LRCLK_INV;
		break;
	default:
		return -EINVAL;
	}

	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);

	return 0;
}

static int wm8523_set_bias_level(struct snd_soc_codec *codec,
				 enum snd_soc_bias_level level)
{
	struct wm8523_priv *wm8523 = codec->private_data;
	int ret, i;

	switch (level) {
	case SND_SOC_BIAS_ON:
		break;

	case SND_SOC_BIAS_PREPARE:
		/* Full power on */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 3);
		break;

	case SND_SOC_BIAS_STANDBY:
		if (codec->bias_level == SND_SOC_BIAS_OFF) {
			ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
						    wm8523->supplies);
			if (ret != 0) {
				dev_err(codec->dev,
					"Failed to enable supplies: %d\n",
					ret);
				return ret;
			}

			/* Initial power up */
			snd_soc_update_bits(codec, WM8523_PSCTRL1,
					    WM8523_SYS_ENA_MASK, 1);

			/* Sync back default/cached values */
			for (i = WM8523_AIF_CTRL1;
			     i < WM8523_MAX_REGISTER; i++)
				snd_soc_write(codec, i, wm8523->reg_cache[i]);


			msleep(100);
		}

		/* Power up to mute */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 2);

		break;

	case SND_SOC_BIAS_OFF:
		/* The chip runs through the power down sequence for us. */
		snd_soc_update_bits(codec, WM8523_PSCTRL1,
				    WM8523_SYS_ENA_MASK, 0);
		msleep(100);

		regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
				       wm8523->supplies);
		break;
	}
	codec->bias_level = level;
	return 0;
}

#define WM8523_RATES SNDRV_PCM_RATE_8000_192000

#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)

static struct snd_soc_dai_ops wm8523_dai_ops = {
	.startup	= wm8523_startup,
	.hw_params	= wm8523_hw_params,
	.set_sysclk	= wm8523_set_dai_sysclk,
	.set_fmt	= wm8523_set_dai_fmt,
};

struct snd_soc_dai wm8523_dai = {
	.name = "WM8523",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 2,  /* Mono modes not yet supported */
		.channels_max = 2,
		.rates = WM8523_RATES,
		.formats = WM8523_FORMATS,
	},
	.ops = &wm8523_dai_ops,
};
EXPORT_SYMBOL_GPL(wm8523_dai);

#ifdef CONFIG_PM
static int wm8523_suspend(struct platform_device *pdev, pm_message_t state)
{
	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
	struct snd_soc_codec *codec = socdev->card->codec;

	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	return 0;
}

static int wm8523_resume(struct platform_device *pdev)
{
	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
	struct snd_soc_codec *codec = socdev->card->codec;

	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);

	return 0;
}
#else
#define wm8523_suspend NULL
#define wm8523_resume NULL
#endif

static int wm8523_probe(struct platform_device *pdev)
{
	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
	struct snd_soc_codec *codec;
	int ret = 0;

	if (wm8523_codec == NULL) {
		dev_err(&pdev->dev, "Codec device not registered\n");
		return -ENODEV;
	}

	socdev->card->codec = wm8523_codec;
	codec = wm8523_codec;

	/* register pcms */
	ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
	if (ret < 0) {
		dev_err(codec->dev, "failed to create pcms: %d\n", ret);
		goto pcm_err;
	}

	snd_soc_add_controls(codec, wm8523_snd_controls,
			     ARRAY_SIZE(wm8523_snd_controls));
	wm8523_add_widgets(codec);

	return ret;

pcm_err:
	return ret;
}

static int wm8523_remove(struct platform_device *pdev)
{
	struct snd_soc_device *socdev = platform_get_drvdata(pdev);

	snd_soc_free_pcms(socdev);
	snd_soc_dapm_free(socdev);

	return 0;
}

struct snd_soc_codec_device soc_codec_dev_wm8523 = {
	.probe = 	wm8523_probe,
	.remove = 	wm8523_remove,
	.suspend = 	wm8523_suspend,
	.resume =	wm8523_resume,
};
EXPORT_SYMBOL_GPL(soc_codec_dev_wm8523);

static int wm8523_register(struct wm8523_priv *wm8523,
			   enum snd_soc_control_type control)
{
	int ret;
	struct snd_soc_codec *codec = &wm8523->codec;
	int i;

	if (wm8523_codec) {
		dev_err(codec->dev, "Another WM8523 is registered\n");
		return -EINVAL;
	}

	mutex_init(&codec->mutex);
	INIT_LIST_HEAD(&codec->dapm_widgets);
	INIT_LIST_HEAD(&codec->dapm_paths);

	codec->private_data = wm8523;
	codec->name = "WM8523";
	codec->owner = THIS_MODULE;
	codec->bias_level = SND_SOC_BIAS_OFF;
	codec->set_bias_level = wm8523_set_bias_level;
	codec->dai = &wm8523_dai;
	codec->num_dai = 1;
	codec->reg_cache_size = WM8523_REGISTER_COUNT;
	codec->reg_cache = &wm8523->reg_cache;
	codec->volatile_register = wm8523_volatile_register;

	wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
	wm8523->rate_constraint.count =
		ARRAY_SIZE(wm8523->rate_constraint_list);

	memcpy(codec->reg_cache, wm8523_reg, sizeof(wm8523_reg));

	ret = snd_soc_codec_set_cache_io(codec, 8, 16, control);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
		goto err;
	}

	for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
		wm8523->supplies[i].supply = wm8523_supply_names[i];

	ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
				 wm8523->supplies);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
		goto err;
	}

	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
				    wm8523->supplies);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
		goto err_get;
	}

	ret = snd_soc_read(codec, WM8523_DEVICE_ID);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to read ID register\n");
		goto err_enable;
	}
	if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
		dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
		ret = -EINVAL;
		goto err_enable;
	}

	ret = snd_soc_read(codec, WM8523_REVISION);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to read revision register\n");
		goto err_enable;
	}
	dev_info(codec->dev, "revision %c\n",
		 (ret & WM8523_CHIP_REV_MASK) + 'A');

	ret = wm8523_reset(codec);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to issue reset\n");
		goto err_enable;
	}

	wm8523_dai.dev = codec->dev;

	/* Change some default settings - latch VU and enable ZC */
	wm8523->reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU;
	wm8523->reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC;

	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);

	/* Bias level configuration will have done an extra enable */
	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);

	wm8523_codec = codec;

	ret = snd_soc_register_codec(codec);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to register codec: %d\n", ret);
		return ret;
	}

	ret = snd_soc_register_dai(&wm8523_dai);
	if (ret != 0) {
		dev_err(codec->dev, "Failed to register DAI: %d\n", ret);
		snd_soc_unregister_codec(codec);
		return ret;
	}

	return 0;

err_enable:
	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
err_get:
	regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
err:
	kfree(wm8523);
	return ret;
}

static void wm8523_unregister(struct wm8523_priv *wm8523)
{
	wm8523_set_bias_level(&wm8523->codec, SND_SOC_BIAS_OFF);
	regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	snd_soc_unregister_dai(&wm8523_dai);
	snd_soc_unregister_codec(&wm8523->codec);
	kfree(wm8523);
	wm8523_codec = NULL;
}

#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
				      const struct i2c_device_id *id)
{
	struct wm8523_priv *wm8523;
	struct snd_soc_codec *codec;

	wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
	if (wm8523 == NULL)
		return -ENOMEM;

	codec = &wm8523->codec;
	codec->hw_write = (hw_write_t)i2c_master_send;

	i2c_set_clientdata(i2c, wm8523);
	codec->control_data = i2c;

	codec->dev = &i2c->dev;

	return wm8523_register(wm8523, SND_SOC_I2C);
}

static __devexit int wm8523_i2c_remove(struct i2c_client *client)
{
	struct wm8523_priv *wm8523 = i2c_get_clientdata(client);
	wm8523_unregister(wm8523);
	return 0;
}

static const struct i2c_device_id wm8523_i2c_id[] = {
	{ "wm8523", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);

static struct i2c_driver wm8523_i2c_driver = {
	.driver = {
		.name = "WM8523",
		.owner = THIS_MODULE,
	},
	.probe =    wm8523_i2c_probe,
	.remove =   __devexit_p(wm8523_i2c_remove),
	.id_table = wm8523_i2c_id,
};
#endif

static int __init wm8523_modinit(void)
{
	int ret;
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	ret = i2c_add_driver(&wm8523_i2c_driver);
	if (ret != 0) {
		printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
		       ret);
	}
#endif
	return 0;
}
module_init(wm8523_modinit);

static void __exit wm8523_exit(void)
{
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	i2c_del_driver(&wm8523_i2c_driver);
#endif
}
module_exit(wm8523_exit);

MODULE_DESCRIPTION("ASoC WM8523 driver");
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
1dcf98ff MB	1	/*
	2	* wm8523.c -- WM8523 ALSA SoC Audio driver
	3	*
	4	* Copyright 2009 Wolfson Microelectronics plc
	5	*
	6	* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
	7	*
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/module.h>
	15	#include <linux/moduleparam.h>
	16	#include <linux/init.h>
	17	#include <linux/delay.h>
	18	#include <linux/pm.h>
	19	#include <linux/i2c.h>
	20	#include <linux/platform_device.h>
	21	#include <linux/regulator/consumer.h>
5a0e3ad6	22	#include <linux/slab.h>
1dcf98ff MB	23	#include <sound/core.h>
	24	#include <sound/pcm.h>
	25	#include <sound/pcm_params.h>
	26	#include <sound/soc.h>
	27	#include <sound/soc-dapm.h>
	28	#include <sound/initval.h>
	29	#include <sound/tlv.h>
	30
	31	#include "wm8523.h"
	32
	33	static struct snd_soc_codec *wm8523_codec;
	34	struct snd_soc_codec_device soc_codec_dev_wm8523;
	35
	36	#define WM8523_NUM_SUPPLIES 2
	37	static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
	38	"AVDD",
	39	"LINEVDD",
	40	};
	41
	42	#define WM8523_NUM_RATES 7
	43
	44	/* codec private data */
	45	struct wm8523_priv {
	46	struct snd_soc_codec codec;
	47	u16 reg_cache[WM8523_REGISTER_COUNT];
	48	struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
	49	unsigned int sysclk;
	50	unsigned int rate_constraint_list[WM8523_NUM_RATES];
	51	struct snd_pcm_hw_constraint_list rate_constraint;
	52	};
	53
	54	static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
	55	0x8523, /* R0 - DEVICE_ID */
	56	0x0001, /* R1 - REVISION */
	57	0x0000, /* R2 - PSCTRL1 */
	58	0x1812, /* R3 - AIF_CTRL1 */
	59	0x0000, /* R4 - AIF_CTRL2 */
	60	0x0001, /* R5 - DAC_CTRL3 */
	61	0x0190, /* R6 - DAC_GAINL */
	62	0x0190, /* R7 - DAC_GAINR */
	63	0x0000, /* R8 - ZERO_DETECT */
	64	};
	65
8d50e447	66	static int wm8523_volatile_register(unsigned int reg)
1dcf98ff MB	67	{
	68	switch (reg) {
	69	case WM8523_DEVICE_ID:
	70	case WM8523_REVISION:
	71	return 1;
	72	default:
	73	return 0;
	74	}
	75	}
	76
1dcf98ff MB	77	static int wm8523_reset(struct snd_soc_codec *codec)
1dcf98ff MB	78	{
8d50e447	79	return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
1dcf98ff MB	80	}
	81
	82	static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
	83
	84	static const char *wm8523_zd_count_text[] = {
	85	"1024",
	86	"2048",
	87	};
	88
	89	static const struct soc_enum wm8523_zc_count =
	90	SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
	91
	92	static const struct snd_kcontrol_new wm8523_snd_controls[] = {
	93	SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
	94	0, 448, 0, dac_tlv),
	95	SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
	96	SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
	97	SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
	98	SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
	99	SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
	100	SOC_ENUM("Zero Detect Count", wm8523_zc_count),
	101	};
	102
	103	static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
	104	SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
	105	SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
	106	SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
	107	};
	108
	109	static const struct snd_soc_dapm_route intercon[] = {
	110	{ "LINEVOUTL", NULL, "DAC" },
	111	{ "LINEVOUTR", NULL, "DAC" },
	112	};
	113
	114	static int wm8523_add_widgets(struct snd_soc_codec *codec)
	115	{
	116	snd_soc_dapm_new_controls(codec, wm8523_dapm_widgets,
	117	ARRAY_SIZE(wm8523_dapm_widgets));
	118
	119	snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
	120
1dcf98ff MB	121	return 0;
	122	}
	123
	124	static struct {
	125	int value;
	126	int ratio;
	127	} lrclk_ratios[WM8523_NUM_RATES] = {
	128	{ 1, 128 },
	129	{ 2, 192 },
	130	{ 3, 256 },
	131	{ 4, 384 },
	132	{ 5, 512 },
	133	{ 6, 768 },
	134	{ 7, 1152 },
	135	};
	136
	137	static int wm8523_startup(struct snd_pcm_substream *substream,
	138	struct snd_soc_dai *dai)
	139	{
	140	struct snd_soc_codec *codec = dai->codec;
	141	struct wm8523_priv *wm8523 = codec->private_data;
	142
	143	/* The set of sample rates that can be supported depends on the
	144	* MCLK supplied to the CODEC - enforce this.
	145	*/
	146	if (!wm8523->sysclk) {
	147	dev_err(codec->dev,
	148	"No MCLK configured, call set_sysclk() on init\n");
	149	return -EINVAL;
	150	}
	151
	152	return 0;
	153	snd_pcm_hw_constraint_list(substream->runtime, 0,
	154	SNDRV_PCM_HW_PARAM_RATE,
	155	&wm8523->rate_constraint);
	156
	157	return 0;
	158	}
	159
	160	static int wm8523_hw_params(struct snd_pcm_substream *substream,
	161	struct snd_pcm_hw_params *params,
	162	struct snd_soc_dai *dai)
	163	{
	164	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	165	struct snd_soc_device *socdev = rtd->socdev;
	166	struct snd_soc_codec *codec = socdev->card->codec;
	167	struct wm8523_priv *wm8523 = codec->private_data;
	168	int i;
8d50e447 MB	169	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
8d50e447 MB	170	u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
1dcf98ff MB	171
	172	/* Find a supported LRCLK ratio */
	173	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
	174	if (wm8523->sysclk / params_rate(params) ==
	175	lrclk_ratios[i].ratio)
	176	break;
	177	}
	178
	179	/* Should never happen, should be handled by constraints */
	180	if (i == ARRAY_SIZE(lrclk_ratios)) {
	181	dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
	182	wm8523->sysclk / params_rate(params));
	183	return -EINVAL;
	184	}
	185
	186	aifctrl2 &= ~WM8523_SR_MASK;
	187	aifctrl2 \|= lrclk_ratios[i].value;
	188
	189	aifctrl1 &= ~WM8523_WL_MASK;
	190	switch (params_format(params)) {
	191	case SNDRV_PCM_FORMAT_S16_LE:
	192	break;
	193	case SNDRV_PCM_FORMAT_S20_3LE:
	194	aifctrl1 \|= 0x8;
	195	break;
	196	case SNDRV_PCM_FORMAT_S24_LE:
	197	aifctrl1 \|= 0x10;
	198	break;
	199	case SNDRV_PCM_FORMAT_S32_LE:
	200	aifctrl1 \|= 0x18;
	201	break;
	202	}
	203
8d50e447 MB	204	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
8d50e447 MB	205	snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
1dcf98ff MB	206
	207	return 0;
	208	}
	209
	210	static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
	211	int clk_id, unsigned int freq, int dir)
	212	{
	213	struct snd_soc_codec *codec = codec_dai->codec;
	214	struct wm8523_priv *wm8523 = codec->private_data;
	215	unsigned int val;
	216	int i;
	217
	218	wm8523->sysclk = freq;
	219
	220	wm8523->rate_constraint.count = 0;
	221	for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
	222	val = freq / lrclk_ratios[i].ratio;
	223	/* Check that it's a standard rate since core can't
	224	* cope with others and having the odd rates confuses
	225	* constraint matching.
	226	*/
	227	switch (val) {
	228	case 8000:
	229	case 11025:
	230	case 16000:
	231	case 22050:
	232	case 32000:
	233	case 44100:
	234	case 48000:
	235	case 64000:
	236	case 88200:
	237	case 96000:
	238	case 176400:
	239	case 192000:
	240	dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
	241	val);
	242	wm8523->rate_constraint_list[i] = val;
	243	wm8523->rate_constraint.count++;
	244	break;
	245	default:
	246	dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
	247	val);
	248	}
	249	}
	250
	251	/* Need at least one supported rate... */
	252	if (wm8523->rate_constraint.count == 0)
	253	return -EINVAL;
	254
	255	return 0;
	256	}
	257
	258
	259	static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
	260	unsigned int fmt)
	261	{
	262	struct snd_soc_codec *codec = codec_dai->codec;
8d50e447	263	u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
1dcf98ff MB	264
	265	aifctrl1 &= ~(WM8523_BCLK_INV_MASK \| WM8523_LRCLK_INV_MASK \|
	266	WM8523_FMT_MASK \| WM8523_AIF_MSTR_MASK);
	267
	268	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	269	case SND_SOC_DAIFMT_CBM_CFM:
	270	aifctrl1 \|= WM8523_AIF_MSTR;
	271	break;
	272	case SND_SOC_DAIFMT_CBS_CFS:
	273	break;
	274	default:
	275	return -EINVAL;
	276	}
	277
	278	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	279	case SND_SOC_DAIFMT_I2S:
	280	aifctrl1 \|= 0x0002;
	281	break;
	282	case SND_SOC_DAIFMT_RIGHT_J:
	283	break;
	284	case SND_SOC_DAIFMT_LEFT_J:
	285	aifctrl1 \|= 0x0001;
	286	break;
	287	case SND_SOC_DAIFMT_DSP_A:
	288	aifctrl1 \|= 0x0003;
	289	break;
	290	case SND_SOC_DAIFMT_DSP_B:
	291	aifctrl1 \|= 0x0023;
	292	break;
	293	default:
	294	return -EINVAL;
	295	}
	296
	297	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	298	case SND_SOC_DAIFMT_NB_NF:
	299	break;
	300	case SND_SOC_DAIFMT_IB_IF:
	301	aifctrl1 \|= WM8523_BCLK_INV \| WM8523_LRCLK_INV;
	302	break;
	303	case SND_SOC_DAIFMT_IB_NF:
	304	aifctrl1 \|= WM8523_BCLK_INV;
	305	break;
	306	case SND_SOC_DAIFMT_NB_IF:
	307	aifctrl1 \|= WM8523_LRCLK_INV;
	308	break;
	309	default:
	310	return -EINVAL;
	311	}
	312
8d50e447	313	snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
1dcf98ff MB	314
	315	return 0;
	316	}
	317
	318	static int wm8523_set_bias_level(struct snd_soc_codec *codec,
	319	enum snd_soc_bias_level level)
	320	{
	321	struct wm8523_priv *wm8523 = codec->private_data;
	322	int ret, i;
	323
	324	switch (level) {
	325	case SND_SOC_BIAS_ON:
	326	break;
	327
	328	case SND_SOC_BIAS_PREPARE:
	329	/* Full power on */
	330	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	331	WM8523_SYS_ENA_MASK, 3);
	332	break;
	333
	334	case SND_SOC_BIAS_STANDBY:
	335	if (codec->bias_level == SND_SOC_BIAS_OFF) {
	336	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
	337	wm8523->supplies);
	338	if (ret != 0) {
	339	dev_err(codec->dev,
	340	"Failed to enable supplies: %d\n",
	341	ret);
	342	return ret;
	343	}
	344
	345	/* Initial power up */
	346	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	347	WM8523_SYS_ENA_MASK, 1);
	348
	349	/* Sync back default/cached values */
	350	for (i = WM8523_AIF_CTRL1;
	351	i < WM8523_MAX_REGISTER; i++)
8d50e447	352	snd_soc_write(codec, i, wm8523->reg_cache[i]);
1dcf98ff MB	353
	354
	355	msleep(100);
	356	}
	357
	358	/* Power up to mute */
	359	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	360	WM8523_SYS_ENA_MASK, 2);
	361
	362	break;
	363
	364	case SND_SOC_BIAS_OFF:
	365	/* The chip runs through the power down sequence for us. */
	366	snd_soc_update_bits(codec, WM8523_PSCTRL1,
	367	WM8523_SYS_ENA_MASK, 0);
	368	msleep(100);
	369
	370	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
	371	wm8523->supplies);
	372	break;
	373	}
	374	codec->bias_level = level;
	375	return 0;
	376	}
	377
	378	#define WM8523_RATES SNDRV_PCM_RATE_8000_192000
	379
	380	#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE \| SNDRV_PCM_FMTBIT_S20_3LE \|\
	381	SNDRV_PCM_FMTBIT_S24_LE \| SNDRV_PCM_FMTBIT_S32_LE)
	382
	383	static struct snd_soc_dai_ops wm8523_dai_ops = {
	384	.startup = wm8523_startup,
	385	.hw_params = wm8523_hw_params,
	386	.set_sysclk = wm8523_set_dai_sysclk,
	387	.set_fmt = wm8523_set_dai_fmt,
	388	};
	389
	390	struct snd_soc_dai wm8523_dai = {
	391	.name = "WM8523",
	392	.playback = {
	393	.stream_name = "Playback",
	394	.channels_min = 2, /* Mono modes not yet supported */
	395	.channels_max = 2,
	396	.rates = WM8523_RATES,
	397	.formats = WM8523_FORMATS,
	398	},
	399	.ops = &wm8523_dai_ops,
	400	};
	401	EXPORT_SYMBOL_GPL(wm8523_dai);
	402
	403	#ifdef CONFIG_PM
	404	static int wm8523_suspend(struct platform_device *pdev, pm_message_t state)
	405	{
	406	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
	407	struct snd_soc_codec *codec = socdev->card->codec;
	408
	409	wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
	410	return 0;
	411	}
	412
	413	static int wm8523_resume(struct platform_device *pdev)
	414	{
	415	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
	416	struct snd_soc_codec *codec = socdev->card->codec;
417
418	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
419
420	return 0;
421	}
422	#else
423	#define wm8523_suspend NULL
424	#define wm8523_resume NULL
425	#endif
426
427	static int wm8523_probe(struct platform_device *pdev)
428	{
429	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
430	struct snd_soc_codec *codec;
431	int ret = 0;
432
433	if (wm8523_codec == NULL) {
434	dev_err(&pdev->dev, "Codec device not registered\n");
435	return -ENODEV;
436	}
437
438	socdev->card->codec = wm8523_codec;
439	codec = wm8523_codec;
440
441	/* register pcms */
442	ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
443	if (ret < 0) {
444	dev_err(codec->dev, "failed to create pcms: %d\n", ret);
445	goto pcm_err;
446	}
447
448	snd_soc_add_controls(codec, wm8523_snd_controls,
449	ARRAY_SIZE(wm8523_snd_controls));
450	wm8523_add_widgets(codec);
1dcf98ff MB	451
	452	return ret;
	453
1dcf98ff MB	454	pcm_err:
	455	return ret;
	456	}
	457
	458	static int wm8523_remove(struct platform_device *pdev)
	459	{
	460	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
	461
	462	snd_soc_free_pcms(socdev);
	463	snd_soc_dapm_free(socdev);
	464
	465	return 0;
	466	}
	467
	468	struct snd_soc_codec_device soc_codec_dev_wm8523 = {
	469	.probe = wm8523_probe,
	470	.remove = wm8523_remove,
	471	.suspend = wm8523_suspend,
	472	.resume = wm8523_resume,
	473	};
	474	EXPORT_SYMBOL_GPL(soc_codec_dev_wm8523);
	475
8d50e447 MB	476	static int wm8523_register(struct wm8523_priv *wm8523,
8d50e447 MB	477	enum snd_soc_control_type control)
1dcf98ff MB	478	{
	479	int ret;
	480	struct snd_soc_codec *codec = &wm8523->codec;
	481	int i;
	482
	483	if (wm8523_codec) {
	484	dev_err(codec->dev, "Another WM8523 is registered\n");
	485	return -EINVAL;
	486	}
	487
	488	mutex_init(&codec->mutex);
	489	INIT_LIST_HEAD(&codec->dapm_widgets);
	490	INIT_LIST_HEAD(&codec->dapm_paths);
	491
	492	codec->private_data = wm8523;
	493	codec->name = "WM8523";
	494	codec->owner = THIS_MODULE;
1dcf98ff MB	495	codec->bias_level = SND_SOC_BIAS_OFF;
	496	codec->set_bias_level = wm8523_set_bias_level;
	497	codec->dai = &wm8523_dai;
	498	codec->num_dai = 1;
	499	codec->reg_cache_size = WM8523_REGISTER_COUNT;
	500	codec->reg_cache = &wm8523->reg_cache;
8d50e447	501	codec->volatile_register = wm8523_volatile_register;
1dcf98ff MB	502
	503	wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
	504	wm8523->rate_constraint.count =
	505	ARRAY_SIZE(wm8523->rate_constraint_list);
	506
	507	memcpy(codec->reg_cache, wm8523_reg, sizeof(wm8523_reg));
	508
8d50e447 MB	509	ret = snd_soc_codec_set_cache_io(codec, 8, 16, control);
	510	if (ret != 0) {
	511	dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
	512	goto err;
	513	}
	514
1dcf98ff MB	515	for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
	516	wm8523->supplies[i].supply = wm8523_supply_names[i];
	517
	518	ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
	519	wm8523->supplies);
	520	if (ret != 0) {
	521	dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
	522	goto err;
	523	}
	524
	525	ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
	526	wm8523->supplies);
	527	if (ret != 0) {
	528	dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
	529	goto err_get;
	530	}
	531
8d50e447	532	ret = snd_soc_read(codec, WM8523_DEVICE_ID);
1dcf98ff MB	533	if (ret < 0) {
	534	dev_err(codec->dev, "Failed to read ID register\n");
	535	goto err_enable;
	536	}
	537	if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
	538	dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
	539	ret = -EINVAL;
	540	goto err_enable;
	541	}
	542
8d50e447	543	ret = snd_soc_read(codec, WM8523_REVISION);
1dcf98ff MB	544	if (ret < 0) {
	545	dev_err(codec->dev, "Failed to read revision register\n");
	546	goto err_enable;
	547	}
	548	dev_info(codec->dev, "revision %c\n",
	549	(ret & WM8523_CHIP_REV_MASK) + 'A');
	550
	551	ret = wm8523_reset(codec);
	552	if (ret < 0) {
	553	dev_err(codec->dev, "Failed to issue reset\n");
	554	goto err_enable;
	555	}
	556
	557	wm8523_dai.dev = codec->dev;
	558
	559	/* Change some default settings - latch VU and enable ZC */
	560	wm8523->reg_cache[WM8523_DAC_GAINR] \|= WM8523_DACR_VU;
	561	wm8523->reg_cache[WM8523_DAC_CTRL3] \|= WM8523_ZC;
	562
	563	wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	564
	565	/* Bias level configuration will have done an extra enable */
	566	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	567
	568	wm8523_codec = codec;
	569
	570	ret = snd_soc_register_codec(codec);
	571	if (ret != 0) {
	572	dev_err(codec->dev, "Failed to register codec: %d\n", ret);
	573	return ret;
	574	}
	575
	576	ret = snd_soc_register_dai(&wm8523_dai);
	577	if (ret != 0) {
	578	dev_err(codec->dev, "Failed to register DAI: %d\n", ret);
	579	snd_soc_unregister_codec(codec);
	580	return ret;
	581	}
	582
	583	return 0;
	584
	585	err_enable:
	586	regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	587	err_get:
	588	regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	589	err:
	590	kfree(wm8523);
	591	return ret;
	592	}
	593
	594	static void wm8523_unregister(struct wm8523_priv *wm8523)
	595	{
	596	wm8523_set_bias_level(&wm8523->codec, SND_SOC_BIAS_OFF);
	597	regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
	598	snd_soc_unregister_dai(&wm8523_dai);
	599	snd_soc_unregister_codec(&wm8523->codec);
	600	kfree(wm8523);
	601	wm8523_codec = NULL;
	602	}
	603
	604	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	605	static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
	606	const struct i2c_device_id *id)
	607	{
608	struct wm8523_priv *wm8523;
609	struct snd_soc_codec *codec;
610
611	wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
612	if (wm8523 == NULL)
613	return -ENOMEM;
614
615	codec = &wm8523->codec;
616	codec->hw_write = (hw_write_t)i2c_master_send;
617
618	i2c_set_clientdata(i2c, wm8523);
619	codec->control_data = i2c;
620
621	codec->dev = &i2c->dev;
622
8d50e447	623	return wm8523_register(wm8523, SND_SOC_I2C);
1dcf98ff MB	624	}
	625
	626	static __devexit int wm8523_i2c_remove(struct i2c_client *client)
	627	{
	628	struct wm8523_priv *wm8523 = i2c_get_clientdata(client);
	629	wm8523_unregister(wm8523);
	630	return 0;
	631	}
	632
1dcf98ff MB	633	static const struct i2c_device_id wm8523_i2c_id[] = {
	634	{ "wm8523", 0 },
	635	{ }
	636	};
	637	MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
	638
	639	static struct i2c_driver wm8523_i2c_driver = {
	640	.driver = {
	641	.name = "WM8523",
	642	.owner = THIS_MODULE,
	643	},
	644	.probe = wm8523_i2c_probe,
	645	.remove = __devexit_p(wm8523_i2c_remove),
1dcf98ff MB	646	.id_table = wm8523_i2c_id,
	647	};
	648	#endif
	649
	650	static int __init wm8523_modinit(void)
	651	{
	652	int ret;
	653	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	654	ret = i2c_add_driver(&wm8523_i2c_driver);
	655	if (ret != 0) {
	656	printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
	657	ret);
	658	}
	659	#endif
	660	return 0;
	661	}
	662	module_init(wm8523_modinit);
	663
	664	static void __exit wm8523_exit(void)
	665	{
	666	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	667	i2c_del_driver(&wm8523_i2c_driver);
	668	#endif
	669	}
	670	module_exit(wm8523_exit);
	671
	672	MODULE_DESCRIPTION("ASoC WM8523 driver");
	673	MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
	674	MODULE_LICENSE("GPL");