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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / wm8510.c
CommitLineData
5d421516
MB		 1/*
2 * wm8510.c -- WM8510 ALSA Soc Audio driver
3 *
4 * Copyright 2006 Wolfson Microelectronics PLC.
5 *
d331124d 6 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
5d421516
MB		 7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
5e357952 20#include <linux/spi/spi.h>
5a0e3ad6 21#include <linux/slab.h>
0a422e1a 22#include <linux/of_device.h>
e643049d 23#include <linux/regmap.h>
5d421516
MB		 24#include <sound/core.h>
25#include <sound/pcm.h>
26#include <sound/pcm_params.h>
27#include <sound/soc.h>
5d421516
MB		 28#include <sound/initval.h>
29
30#include "wm8510.h"
31
5d421516
MB		 32/*
33 * wm8510 register cache
34 * We can't read the WM8510 register space when we are
35 * using 2 wire for device control, so we cache them instead.
36 */
e643049d
MB		 37static const struct reg_default wm8510_reg_defaults[] = {
38 { 1, 0x0000 },
39 { 2, 0x0000 },
40 { 3, 0x0000 },
41 { 4, 0x0050 },
42 { 5, 0x0000 },
43 { 6, 0x0140 },
44 { 7, 0x0000 },
45 { 8, 0x0000 },
46 { 9, 0x0000 },
47 { 10, 0x0000 },
48 { 11, 0x00ff },
49 { 12, 0x0000 },
50 { 13, 0x0000 },
51 { 14, 0x0100 },
52 { 15, 0x00ff },
53 { 16, 0x0000 },
54 { 17, 0x0000 },
55 { 18, 0x012c },
56 { 19, 0x002c },
57 { 20, 0x002c },
58 { 21, 0x002c },
59 { 22, 0x002c },
60 { 23, 0x0000 },
61 { 24, 0x0032 },
62 { 25, 0x0000 },
63 { 26, 0x0000 },
64 { 27, 0x0000 },
65 { 28, 0x0000 },
66 { 29, 0x0000 },
67 { 30, 0x0000 },
68 { 31, 0x0000 },
69 { 32, 0x0038 },
70 { 33, 0x000b },
71 { 34, 0x0032 },
72 { 35, 0x0000 },
73 { 36, 0x0008 },
74 { 37, 0x000c },
75 { 38, 0x0093 },
76 { 39, 0x00e9 },
77 { 40, 0x0000 },
78 { 41, 0x0000 },
79 { 42, 0x0000 },
80 { 43, 0x0000 },
81 { 44, 0x0003 },
82 { 45, 0x0010 },
83 { 46, 0x0000 },
84 { 47, 0x0000 },
85 { 48, 0x0000 },
86 { 49, 0x0002 },
87 { 50, 0x0001 },
88 { 51, 0x0000 },
89 { 52, 0x0000 },
90 { 53, 0x0000 },
91 { 54, 0x0039 },
92 { 55, 0x0000 },
93 { 56, 0x0001 },
5d421516
MB		 94};
95
e643049d
MB		 96static bool wm8510_volatile(struct device *dev, unsigned int reg)
97{
98 switch (reg) {
99 case WM8510_RESET:
100 return true;
101 default:
102 return false;
103 }
104}
105
09af98b0
MB		 106#define WM8510_POWER1_BIASEN 0x08
107#define WM8510_POWER1_BUFIOEN 0x10
108
17a52fd6 109#define wm8510_reset(c) snd_soc_write(c, WM8510_RESET, 0)
5d421516 110
f0fba2ad
LG		 111/* codec private data */
112struct wm8510_priv {
e643049d 113 struct regmap *regmap;
f0fba2ad
LG		 114};
115
5d421516
MB		 116static const char *wm8510_companding[] = { "Off", "NC", "u-law", "A-law" };
117static const char *wm8510_deemp[] = { "None", "32kHz", "44.1kHz", "48kHz" };
118static const char *wm8510_alc[] = { "ALC", "Limiter" };
119
120static const struct soc_enum wm8510_enum[] = {
121 SOC_ENUM_SINGLE(WM8510_COMP, 1, 4, wm8510_companding), /* adc */
122 SOC_ENUM_SINGLE(WM8510_COMP, 3, 4, wm8510_companding), /* dac */
123 SOC_ENUM_SINGLE(WM8510_DAC, 4, 4, wm8510_deemp),
124 SOC_ENUM_SINGLE(WM8510_ALC3, 8, 2, wm8510_alc),
125};
126
127static const struct snd_kcontrol_new wm8510_snd_controls[] = {
128
129SOC_SINGLE("Digital Loopback Switch", WM8510_COMP, 0, 1, 0),
130
131SOC_ENUM("DAC Companding", wm8510_enum[1]),
132SOC_ENUM("ADC Companding", wm8510_enum[0]),
133
134SOC_ENUM("Playback De-emphasis", wm8510_enum[2]),
135SOC_SINGLE("DAC Inversion Switch", WM8510_DAC, 0, 1, 0),
136
137SOC_SINGLE("Master Playback Volume", WM8510_DACVOL, 0, 127, 0),
138
139SOC_SINGLE("High Pass Filter Switch", WM8510_ADC, 8, 1, 0),
140SOC_SINGLE("High Pass Cut Off", WM8510_ADC, 4, 7, 0),
141SOC_SINGLE("ADC Inversion Switch", WM8510_COMP, 0, 1, 0),
142
143SOC_SINGLE("Capture Volume", WM8510_ADCVOL, 0, 127, 0),
144
145SOC_SINGLE("DAC Playback Limiter Switch", WM8510_DACLIM1, 8, 1, 0),
146SOC_SINGLE("DAC Playback Limiter Decay", WM8510_DACLIM1, 4, 15, 0),
147SOC_SINGLE("DAC Playback Limiter Attack", WM8510_DACLIM1, 0, 15, 0),
148
149SOC_SINGLE("DAC Playback Limiter Threshold", WM8510_DACLIM2, 4, 7, 0),
150SOC_SINGLE("DAC Playback Limiter Boost", WM8510_DACLIM2, 0, 15, 0),
151
152SOC_SINGLE("ALC Enable Switch", WM8510_ALC1, 8, 1, 0),
153SOC_SINGLE("ALC Capture Max Gain", WM8510_ALC1, 3, 7, 0),
154SOC_SINGLE("ALC Capture Min Gain", WM8510_ALC1, 0, 7, 0),
155
156SOC_SINGLE("ALC Capture ZC Switch", WM8510_ALC2, 8, 1, 0),
157SOC_SINGLE("ALC Capture Hold", WM8510_ALC2, 4, 7, 0),
158SOC_SINGLE("ALC Capture Target", WM8510_ALC2, 0, 15, 0),
159
160SOC_ENUM("ALC Capture Mode", wm8510_enum[3]),
161SOC_SINGLE("ALC Capture Decay", WM8510_ALC3, 4, 15, 0),
162SOC_SINGLE("ALC Capture Attack", WM8510_ALC3, 0, 15, 0),
163
164SOC_SINGLE("ALC Capture Noise Gate Switch", WM8510_NGATE, 3, 1, 0),
165SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8510_NGATE, 0, 7, 0),
166
167SOC_SINGLE("Capture PGA ZC Switch", WM8510_INPPGA, 7, 1, 0),
168SOC_SINGLE("Capture PGA Volume", WM8510_INPPGA, 0, 63, 0),
169
170SOC_SINGLE("Speaker Playback ZC Switch", WM8510_SPKVOL, 7, 1, 0),
171SOC_SINGLE("Speaker Playback Switch", WM8510_SPKVOL, 6, 1, 1),
172SOC_SINGLE("Speaker Playback Volume", WM8510_SPKVOL, 0, 63, 0),
173SOC_SINGLE("Speaker Boost", WM8510_OUTPUT, 2, 1, 0),
174
175SOC_SINGLE("Capture Boost(+20dB)", WM8510_ADCBOOST, 8, 1, 0),
176SOC_SINGLE("Mono Playback Switch", WM8510_MONOMIX, 6, 1, 1),
177};
178
5d421516
MB		 179/* Speaker Output Mixer */
180static const struct snd_kcontrol_new wm8510_speaker_mixer_controls[] = {
181SOC_DAPM_SINGLE("Line Bypass Switch", WM8510_SPKMIX, 1, 1, 0),
182SOC_DAPM_SINGLE("Aux Playback Switch", WM8510_SPKMIX, 5, 1, 0),
183SOC_DAPM_SINGLE("PCM Playback Switch", WM8510_SPKMIX, 0, 1, 0),
184};
185
186/* Mono Output Mixer */
187static const struct snd_kcontrol_new wm8510_mono_mixer_controls[] = {
188SOC_DAPM_SINGLE("Line Bypass Switch", WM8510_MONOMIX, 1, 1, 0),
189SOC_DAPM_SINGLE("Aux Playback Switch", WM8510_MONOMIX, 2, 1, 0),
190SOC_DAPM_SINGLE("PCM Playback Switch", WM8510_MONOMIX, 0, 1, 0),
191};
192
193static const struct snd_kcontrol_new wm8510_boost_controls[] = {
8ae23ec3 194SOC_DAPM_SINGLE("Mic PGA Switch", WM8510_INPPGA, 6, 1, 1),
5d421516
MB		 195SOC_DAPM_SINGLE("Aux Volume", WM8510_ADCBOOST, 0, 7, 0),
196SOC_DAPM_SINGLE("Mic Volume", WM8510_ADCBOOST, 4, 7, 0),
197};
198
199static const struct snd_kcontrol_new wm8510_micpga_controls[] = {
200SOC_DAPM_SINGLE("MICP Switch", WM8510_INPUT, 0, 1, 0),
201SOC_DAPM_SINGLE("MICN Switch", WM8510_INPUT, 1, 1, 0),
202SOC_DAPM_SINGLE("AUX Switch", WM8510_INPUT, 2, 1, 0),
203};
204
205static const struct snd_soc_dapm_widget wm8510_dapm_widgets[] = {
206SND_SOC_DAPM_MIXER("Speaker Mixer", WM8510_POWER3, 2, 0,
207 &wm8510_speaker_mixer_controls[0],
208 ARRAY_SIZE(wm8510_speaker_mixer_controls)),
209SND_SOC_DAPM_MIXER("Mono Mixer", WM8510_POWER3, 3, 0,
210 &wm8510_mono_mixer_controls[0],
211 ARRAY_SIZE(wm8510_mono_mixer_controls)),
212SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8510_POWER3, 0, 0),
213SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8510_POWER2, 0, 0),
214SND_SOC_DAPM_PGA("Aux Input", WM8510_POWER1, 6, 0, NULL, 0),
215SND_SOC_DAPM_PGA("SpkN Out", WM8510_POWER3, 5, 0, NULL, 0),
216SND_SOC_DAPM_PGA("SpkP Out", WM8510_POWER3, 6, 0, NULL, 0),
217SND_SOC_DAPM_PGA("Mono Out", WM8510_POWER3, 7, 0, NULL, 0),
218
2b5f34c5
MB		 219SND_SOC_DAPM_MIXER("Mic PGA", WM8510_POWER2, 2, 0,
220 &wm8510_micpga_controls[0],
221 ARRAY_SIZE(wm8510_micpga_controls)),
5d421516
MB		 222SND_SOC_DAPM_MIXER("Boost Mixer", WM8510_POWER2, 4, 0,
223 &wm8510_boost_controls[0],
224 ARRAY_SIZE(wm8510_boost_controls)),
225
226SND_SOC_DAPM_MICBIAS("Mic Bias", WM8510_POWER1, 4, 0),
227
228SND_SOC_DAPM_INPUT("MICN"),
229SND_SOC_DAPM_INPUT("MICP"),
230SND_SOC_DAPM_INPUT("AUX"),
231SND_SOC_DAPM_OUTPUT("MONOOUT"),
232SND_SOC_DAPM_OUTPUT("SPKOUTP"),
233SND_SOC_DAPM_OUTPUT("SPKOUTN"),
234};
235
b6709f3b 236static const struct snd_soc_dapm_route wm8510_dapm_routes[] = {
5d421516
MB		 237 /* Mono output mixer */
238 {"Mono Mixer", "PCM Playback Switch", "DAC"},
239 {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
240 {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
241
242 /* Speaker output mixer */
243 {"Speaker Mixer", "PCM Playback Switch", "DAC"},
244 {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
245 {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
246
247 /* Outputs */
248 {"Mono Out", NULL, "Mono Mixer"},
249 {"MONOOUT", NULL, "Mono Out"},
250 {"SpkN Out", NULL, "Speaker Mixer"},
251 {"SpkP Out", NULL, "Speaker Mixer"},
252 {"SPKOUTN", NULL, "SpkN Out"},
253 {"SPKOUTP", NULL, "SpkP Out"},
254
255 /* Microphone PGA */
256 {"Mic PGA", "MICN Switch", "MICN"},
257 {"Mic PGA", "MICP Switch", "MICP"},
258 { "Mic PGA", "AUX Switch", "Aux Input" },
259
260 /* Boost Mixer */
261 {"Boost Mixer", "Mic PGA Switch", "Mic PGA"},
262 {"Boost Mixer", "Mic Volume", "MICP"},
263 {"Boost Mixer", "Aux Volume", "Aux Input"},
264
265 {"ADC", NULL, "Boost Mixer"},
266};
267
5d421516
MB		 268struct pll_ {
269 unsigned int pre_div:4; /* prescale - 1 */
270 unsigned int n:4;
271 unsigned int k;
272};
273
274static struct pll_ pll_div;
275
276/* The size in bits of the pll divide multiplied by 10
277 * to allow rounding later */
278#define FIXED_PLL_SIZE ((1 << 24) * 10)
279
280static void pll_factors(unsigned int target, unsigned int source)
281{
282 unsigned long long Kpart;
283 unsigned int K, Ndiv, Nmod;
284
285 Ndiv = target / source;
286 if (Ndiv < 6) {
287 source >>= 1;
288 pll_div.pre_div = 1;
289 Ndiv = target / source;
290 } else
291 pll_div.pre_div = 0;
292
293 if ((Ndiv < 6) || (Ndiv > 12))
294 printk(KERN_WARNING
449bd54d 295 "WM8510 N value %u outwith recommended range!d\n",
5d421516
MB		 296 Ndiv);
297
298 pll_div.n = Ndiv;
299 Nmod = target % source;
300 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
301
302 do_div(Kpart, source);
303
304 K = Kpart & 0xFFFFFFFF;
305
306 /* Check if we need to round */
307 if ((K % 10) >= 5)
308 K += 5;
309
310 /* Move down to proper range now rounding is done */
311 K /= 10;
312
313 pll_div.k = K;
314}
315
85488037
MB		 316static int wm8510_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
317 int source, unsigned int freq_in, unsigned int freq_out)
5d421516
MB		 318{
319 struct snd_soc_codec *codec = codec_dai->codec;
320 u16 reg;
321
322 if (freq_in == 0 || freq_out == 0) {
323 /* Clock CODEC directly from MCLK */
17a52fd6
MB		 324 reg = snd_soc_read(codec, WM8510_CLOCK);
325 snd_soc_write(codec, WM8510_CLOCK, reg & 0x0ff);
5d421516
MB		 326
327 /* Turn off PLL */
17a52fd6
MB		 328 reg = snd_soc_read(codec, WM8510_POWER1);
329 snd_soc_write(codec, WM8510_POWER1, reg & 0x1df);
5d421516
MB		 330 return 0;
331 }
332
86027ae7 333 pll_factors(freq_out*4, freq_in);
5d421516 334
17a52fd6
MB		 335 snd_soc_write(codec, WM8510_PLLN, (pll_div.pre_div << 4) | pll_div.n);
336 snd_soc_write(codec, WM8510_PLLK1, pll_div.k >> 18);
337 snd_soc_write(codec, WM8510_PLLK2, (pll_div.k >> 9) & 0x1ff);
338 snd_soc_write(codec, WM8510_PLLK3, pll_div.k & 0x1ff);
339 reg = snd_soc_read(codec, WM8510_POWER1);
340 snd_soc_write(codec, WM8510_POWER1, reg | 0x020);
5d421516
MB		 341
342 /* Run CODEC from PLL instead of MCLK */
17a52fd6
MB		 343 reg = snd_soc_read(codec, WM8510_CLOCK);
344 snd_soc_write(codec, WM8510_CLOCK, reg | 0x100);
5d421516
MB		 345
346 return 0;
347}
348
349/*
350 * Configure WM8510 clock dividers.
351 */
e550e17f 352static int wm8510_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
5d421516
MB		 353 int div_id, int div)
354{
355 struct snd_soc_codec *codec = codec_dai->codec;
356 u16 reg;
357
358 switch (div_id) {
359 case WM8510_OPCLKDIV:
17a52fd6
MB		 360 reg = snd_soc_read(codec, WM8510_GPIO) & 0x1cf;
361 snd_soc_write(codec, WM8510_GPIO, reg | div);
5d421516
MB		 362 break;
363 case WM8510_MCLKDIV:
17a52fd6
MB		 364 reg = snd_soc_read(codec, WM8510_CLOCK) & 0x11f;
365 snd_soc_write(codec, WM8510_CLOCK, reg | div);
5d421516
MB		 366 break;
367 case WM8510_ADCCLK:
17a52fd6
MB		 368 reg = snd_soc_read(codec, WM8510_ADC) & 0x1f7;
369 snd_soc_write(codec, WM8510_ADC, reg | div);
5d421516
MB		 370 break;
371 case WM8510_DACCLK:
17a52fd6
MB		 372 reg = snd_soc_read(codec, WM8510_DAC) & 0x1f7;
373 snd_soc_write(codec, WM8510_DAC, reg | div);
5d421516
MB		 374 break;
375 case WM8510_BCLKDIV:
17a52fd6
MB		 376 reg = snd_soc_read(codec, WM8510_CLOCK) & 0x1e3;
377 snd_soc_write(codec, WM8510_CLOCK, reg | div);
5d421516
MB		 378 break;
379 default:
380 return -EINVAL;
381 }
382
383 return 0;
384}
385
e550e17f 386static int wm8510_set_dai_fmt(struct snd_soc_dai *codec_dai,
5d421516
MB		 387 unsigned int fmt)
388{
389 struct snd_soc_codec *codec = codec_dai->codec;
390 u16 iface = 0;
17a52fd6 391 u16 clk = snd_soc_read(codec, WM8510_CLOCK) & 0x1fe;
5d421516
MB		 392
393 /* set master/slave audio interface */
394 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
395 case SND_SOC_DAIFMT_CBM_CFM:
396 clk |= 0x0001;
397 break;
398 case SND_SOC_DAIFMT_CBS_CFS:
399 break;
400 default:
401 return -EINVAL;
402 }
403
404 /* interface format */
405 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
406 case SND_SOC_DAIFMT_I2S:
407 iface |= 0x0010;
408 break;
409 case SND_SOC_DAIFMT_RIGHT_J:
410 break;
411 case SND_SOC_DAIFMT_LEFT_J:
412 iface |= 0x0008;
413 break;
414 case SND_SOC_DAIFMT_DSP_A:
415 iface |= 0x00018;
416 break;
417 default:
418 return -EINVAL;
419 }
420
421 /* clock inversion */
422 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
423 case SND_SOC_DAIFMT_NB_NF:
424 break;
425 case SND_SOC_DAIFMT_IB_IF:
426 iface |= 0x0180;
427 break;
428 case SND_SOC_DAIFMT_IB_NF:
429 iface |= 0x0100;
430 break;
431 case SND_SOC_DAIFMT_NB_IF:
432 iface |= 0x0080;
433 break;
434 default:
435 return -EINVAL;
436 }
437
17a52fd6
MB		 438 snd_soc_write(codec, WM8510_IFACE, iface);
439 snd_soc_write(codec, WM8510_CLOCK, clk);
5d421516
MB		 440 return 0;
441}
442
443static int wm8510_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 444 struct snd_pcm_hw_params *params,
445 struct snd_soc_dai *dai)
5d421516 446{
e6968a17 447 struct snd_soc_codec *codec = dai->codec;
17a52fd6
MB		 448 u16 iface = snd_soc_read(codec, WM8510_IFACE) & 0x19f;
449 u16 adn = snd_soc_read(codec, WM8510_ADD) & 0x1f1;
5d421516
MB		 450
451 /* bit size */
452 switch (params_format(params)) {
453 case SNDRV_PCM_FORMAT_S16_LE:
454 break;
455 case SNDRV_PCM_FORMAT_S20_3LE:
456 iface |= 0x0020;
457 break;
458 case SNDRV_PCM_FORMAT_S24_LE:
459 iface |= 0x0040;
460 break;
461 case SNDRV_PCM_FORMAT_S32_LE:
462 iface |= 0x0060;
463 break;
464 }
465
466 /* filter coefficient */
467 switch (params_rate(params)) {
b3172f22 468 case 8000:
5d421516
MB		 469 adn |= 0x5 << 1;
470 break;
b3172f22 471 case 11025:
5d421516
MB		 472 adn |= 0x4 << 1;
473 break;
b3172f22 474 case 16000:
5d421516
MB		 475 adn |= 0x3 << 1;
476 break;
b3172f22 477 case 22050:
5d421516
MB		 478 adn |= 0x2 << 1;
479 break;
b3172f22 480 case 32000:
5d421516
MB		 481 adn |= 0x1 << 1;
482 break;
b3172f22
GL		 483 case 44100:
484 case 48000:
5d421516
MB		 485 break;
486 }
487
17a52fd6
MB		 488 snd_soc_write(codec, WM8510_IFACE, iface);
489 snd_soc_write(codec, WM8510_ADD, adn);
5d421516
MB		 490 return 0;
491}
492
e550e17f 493static int wm8510_mute(struct snd_soc_dai *dai, int mute)
5d421516
MB		 494{
495 struct snd_soc_codec *codec = dai->codec;
17a52fd6 496 u16 mute_reg = snd_soc_read(codec, WM8510_DAC) & 0xffbf;
5d421516
MB		 497
498 if (mute)
17a52fd6 499 snd_soc_write(codec, WM8510_DAC, mute_reg | 0x40);
5d421516 500 else
17a52fd6 501 snd_soc_write(codec, WM8510_DAC, mute_reg);
5d421516
MB		 502 return 0;
503}
504
505/* liam need to make this lower power with dapm */
506static int wm8510_set_bias_level(struct snd_soc_codec *codec,
507 enum snd_soc_bias_level level)
508{
e643049d 509 struct wm8510_priv *wm8510 = snd_soc_codec_get_drvdata(codec);
17a52fd6 510 u16 power1 = snd_soc_read(codec, WM8510_POWER1) & ~0x3;
5d421516
MB		 511
512 switch (level) {
513 case SND_SOC_BIAS_ON:
5d421516 514 case SND_SOC_BIAS_PREPARE:
09af98b0 515 power1 |= 0x1; /* VMID 50k */
17a52fd6 516 snd_soc_write(codec, WM8510_POWER1, power1);
09af98b0
MB		 517 break;
518
5d421516 519 case SND_SOC_BIAS_STANDBY:
09af98b0
MB		 520 power1 |= WM8510_POWER1_BIASEN | WM8510_POWER1_BUFIOEN;
521
ce6120cc 522 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
e643049d 523 regcache_sync(wm8510->regmap);
94f17e9c 524
09af98b0 525 /* Initial cap charge at VMID 5k */
17a52fd6 526 snd_soc_write(codec, WM8510_POWER1, power1 | 0x3);
09af98b0
MB		 527 mdelay(100);
528 }
529
530 power1 |= 0x2; /* VMID 500k */
17a52fd6 531 snd_soc_write(codec, WM8510_POWER1, power1);
5d421516 532 break;
09af98b0 533
5d421516 534 case SND_SOC_BIAS_OFF:
17a52fd6
MB		 535 snd_soc_write(codec, WM8510_POWER1, 0);
536 snd_soc_write(codec, WM8510_POWER2, 0);
537 snd_soc_write(codec, WM8510_POWER3, 0);
5d421516
MB		 538 break;
539 }
09af98b0 540
ce6120cc 541 codec->dapm.bias_level = level;
5d421516
MB		 542 return 0;
543}
544
545#define WM8510_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
546 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
547 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
548
549#define WM8510_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
550 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
551
85e7652d 552static const struct snd_soc_dai_ops wm8510_dai_ops = {
6335d055
EM		 553 .hw_params = wm8510_pcm_hw_params,
554 .digital_mute = wm8510_mute,
555 .set_fmt = wm8510_set_dai_fmt,
556 .set_clkdiv = wm8510_set_dai_clkdiv,
557 .set_pll = wm8510_set_dai_pll,
558};
559
f0fba2ad
LG		 560static struct snd_soc_dai_driver wm8510_dai = {
561 .name = "wm8510-hifi",
5d421516
MB		 562 .playback = {
563 .stream_name = "Playback",
564 .channels_min = 2,
565 .channels_max = 2,
566 .rates = WM8510_RATES,
567 .formats = WM8510_FORMATS,},
568 .capture = {
569 .stream_name = "Capture",
570 .channels_min = 2,
571 .channels_max = 2,
572 .rates = WM8510_RATES,
573 .formats = WM8510_FORMATS,},
6335d055 574 .ops = &wm8510_dai_ops,
cc369cf5 575 .symmetric_rates = 1,
5d421516 576};
5d421516 577
84b315ee 578static int wm8510_suspend(struct snd_soc_codec *codec)
5d421516 579{
5d421516
MB		 580 wm8510_set_bias_level(codec, SND_SOC_BIAS_OFF);
581 return 0;
582}
583
f0fba2ad 584static int wm8510_resume(struct snd_soc_codec *codec)
5d421516 585{
5d421516 586 wm8510_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
5d421516
MB		 587 return 0;
588}
589
f0fba2ad 590static int wm8510_probe(struct snd_soc_codec *codec)
5d421516 591{
f0fba2ad 592 int ret;
5d421516 593
e643049d 594 ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
17a52fd6 595 if (ret < 0) {
f0fba2ad
LG		 596 printk(KERN_ERR "wm8510: failed to set cache I/O: %d\n", ret);
597 return ret;
17a52fd6
MB		 598 }
599
5d421516
MB		 600 wm8510_reset(codec);
601
5d421516
MB		 602 /* power on device */
603 wm8510_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
fe3e78e0 604
5d421516 605 return ret;
5d421516
MB		 606}
607
f0fba2ad
LG		 608/* power down chip */
609static int wm8510_remove(struct snd_soc_codec *codec)
5d421516 610{
f0fba2ad 611 wm8510_set_bias_level(codec, SND_SOC_BIAS_OFF);
5d421516
MB		 612 return 0;
613}
614
f0fba2ad
LG		 615static struct snd_soc_codec_driver soc_codec_dev_wm8510 = {
616 .probe = wm8510_probe,
617 .remove = wm8510_remove,
618 .suspend = wm8510_suspend,
619 .resume = wm8510_resume,
620 .set_bias_level = wm8510_set_bias_level,
b6709f3b
MB		 621
622 .controls = wm8510_snd_controls,
623 .num_controls = ARRAY_SIZE(wm8510_snd_controls),
624 .dapm_widgets = wm8510_dapm_widgets,
625 .num_dapm_widgets = ARRAY_SIZE(wm8510_dapm_widgets),
626 .dapm_routes = wm8510_dapm_routes,
627 .num_dapm_routes = ARRAY_SIZE(wm8510_dapm_routes),
5d421516
MB		 628};
629
0a422e1a
MB		 630static const struct of_device_id wm8510_of_match[] = {
631 { .compatible = "wlf,wm8510" },
632 { },
633};
634
e643049d
MB		 635static const struct regmap_config wm8510_regmap = {
636 .reg_bits = 7,
637 .val_bits = 9,
638 .max_register = WM8510_MONOMIX,
639
640 .reg_defaults = wm8510_reg_defaults,
641 .num_reg_defaults = ARRAY_SIZE(wm8510_reg_defaults),
642 .cache_type = REGCACHE_RBTREE,
643
644 .volatile_reg = wm8510_volatile,
645};
646
5e357952 647#if defined(CONFIG_SPI_MASTER)
7a79e94e 648static int wm8510_spi_probe(struct spi_device *spi)
5e357952 649{
f0fba2ad 650 struct wm8510_priv *wm8510;
5e357952
MB		 651 int ret;
652
3217b0f5
MB		 653 wm8510 = devm_kzalloc(&spi->dev, sizeof(struct wm8510_priv),
654 GFP_KERNEL);
f0fba2ad
LG		 655 if (wm8510 == NULL)
656 return -ENOMEM;
657
e643049d
MB		 658 wm8510->regmap = devm_regmap_init_spi(spi, &wm8510_regmap);
659 if (IS_ERR(wm8510->regmap))
660 return PTR_ERR(wm8510->regmap);
661
f0fba2ad 662 spi_set_drvdata(spi, wm8510);
5e357952 663
f0fba2ad
LG		 664 ret = snd_soc_register_codec(&spi->dev,
665 &soc_codec_dev_wm8510, &wm8510_dai, 1);
3217b0f5 666
5e357952
MB		 667 return ret;
668}
669
7a79e94e 670static int wm8510_spi_remove(struct spi_device *spi)
5e357952 671{
f0fba2ad 672 snd_soc_unregister_codec(&spi->dev);
5e357952
MB		 673 return 0;
674}
675
676static struct spi_driver wm8510_spi_driver = {
677 .driver = {
678 .name = "wm8510",
5e357952 679 .owner = THIS_MODULE,
0a422e1a 680 .of_match_table = wm8510_of_match,
5e357952
MB		 681 },
682 .probe = wm8510_spi_probe,
7a79e94e 683 .remove = wm8510_spi_remove,
5e357952 684};
5e357952
MB		 685#endif /* CONFIG_SPI_MASTER */
686
f0fba2ad 687#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
7a79e94e
BP		 688static int wm8510_i2c_probe(struct i2c_client *i2c,
689 const struct i2c_device_id *id)
5d421516 690{
f0fba2ad
LG		 691 struct wm8510_priv *wm8510;
692 int ret;
5d421516 693
3217b0f5
MB		 694 wm8510 = devm_kzalloc(&i2c->dev, sizeof(struct wm8510_priv),
695 GFP_KERNEL);
f0fba2ad 696 if (wm8510 == NULL)
5d421516
MB		 697 return -ENOMEM;
698
e643049d
MB		 699 wm8510->regmap = devm_regmap_init_i2c(i2c, &wm8510_regmap);
700 if (IS_ERR(wm8510->regmap))
701 return PTR_ERR(wm8510->regmap);
702
f0fba2ad 703 i2c_set_clientdata(i2c, wm8510);
5d421516 704
f0fba2ad
LG		 705 ret = snd_soc_register_codec(&i2c->dev,
706 &soc_codec_dev_wm8510, &wm8510_dai, 1);
3217b0f5 707
5d421516
MB		 708 return ret;
709}
710
7a79e94e 711static int wm8510_i2c_remove(struct i2c_client *client)
5d421516 712{
f0fba2ad 713 snd_soc_unregister_codec(&client->dev);
5d421516
MB		 714 return 0;
715}
716
f0fba2ad
LG		 717static const struct i2c_device_id wm8510_i2c_id[] = {
718 { "wm8510", 0 },
719 { }
720};
721MODULE_DEVICE_TABLE(i2c, wm8510_i2c_id);
722
723static struct i2c_driver wm8510_i2c_driver = {
724 .driver = {
091edccf 725 .name = "wm8510",
f0fba2ad 726 .owner = THIS_MODULE,
0a422e1a 727 .of_match_table = wm8510_of_match,
f0fba2ad
LG		 728 },
729 .probe = wm8510_i2c_probe,
7a79e94e 730 .remove = wm8510_i2c_remove,
f0fba2ad 731 .id_table = wm8510_i2c_id,
5d421516 732};
f0fba2ad 733#endif
5d421516 734
c9b3a40f 735static int __init wm8510_modinit(void)
64089b84 736{
f0fba2ad
LG		 737 int ret = 0;
738#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
739 ret = i2c_add_driver(&wm8510_i2c_driver);
740 if (ret != 0) {
741 printk(KERN_ERR "Failed to register WM8510 I2C driver: %d\n",
742 ret);
743 }
744#endif
745#if defined(CONFIG_SPI_MASTER)
746 ret = spi_register_driver(&wm8510_spi_driver);
747 if (ret != 0) {
748 printk(KERN_ERR "Failed to register WM8510 SPI driver: %d\n",
749 ret);
750 }
751#endif
752 return ret;
64089b84
MB		 753}
754module_init(wm8510_modinit);
755
756static void __exit wm8510_exit(void)
757{
f0fba2ad
LG		 758#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
759 i2c_del_driver(&wm8510_i2c_driver);
760#endif
761#if defined(CONFIG_SPI_MASTER)
762 spi_unregister_driver(&wm8510_spi_driver);
763#endif
64089b84
MB		 764}
765module_exit(wm8510_exit);
766
5d421516
MB		 767MODULE_DESCRIPTION("ASoC WM8510 driver");
768MODULE_AUTHOR("Liam Girdwood");
769MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)