include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / cs4270.c
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1/*
2 * CS4270 ALSA SoC (ASoC) codec driver
3 *
4 * Author: Timur Tabi <timur@freescale.com>
5 *
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6 * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
7 * under the terms of the GNU General Public License version 2. This
8 * program is licensed "as is" without any warranty of any kind, whether
9 * express or implied.
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10 *
11 * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
12 *
13 * Current features/limitations:
14 *
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15 * - Software mode is supported. Stand-alone mode is not supported.
16 * - Only I2C is supported, not SPI
17 * - Support for master and slave mode
18 * - The machine driver's 'startup' function must call
19 * cs4270_set_dai_sysclk() with the value of MCLK.
20 * - Only I2S and left-justified modes are supported
5e7c0344 21 * - Power management is supported
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22 */
23
24#include <linux/module.h>
25#include <linux/platform_device.h>
5a0e3ad6 26#include <linux/slab.h>
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27#include <sound/core.h>
28#include <sound/soc.h>
29#include <sound/initval.h>
30#include <linux/i2c.h>
5e7c0344 31#include <linux/delay.h>
ffbfd336 32#include <linux/regulator/consumer.h>
b0c813ce 33
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34#include "cs4270.h"
35
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36/*
37 * The codec isn't really big-endian or little-endian, since the I2S
38 * interface requires data to be sent serially with the MSbit first.
39 * However, to support BE and LE I2S devices, we specify both here. That
40 * way, ALSA will always match the bit patterns.
41 */
42#define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
43 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
44 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
45 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
46 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
47 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
48
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49/* CS4270 registers addresses */
50#define CS4270_CHIPID 0x01 /* Chip ID */
51#define CS4270_PWRCTL 0x02 /* Power Control */
52#define CS4270_MODE 0x03 /* Mode Control */
53#define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
54#define CS4270_TRANS 0x05 /* Transition Control */
55#define CS4270_MUTE 0x06 /* Mute Control */
56#define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
57#define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
58
59#define CS4270_FIRSTREG 0x01
60#define CS4270_LASTREG 0x08
61#define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
80ab8817 62#define CS4270_I2C_INCR 0x80
9dbd627b 63
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64/* Bit masks for the CS4270 registers */
65#define CS4270_CHIPID_ID 0xF0
66#define CS4270_CHIPID_REV 0x0F
67#define CS4270_PWRCTL_FREEZE 0x80
68#define CS4270_PWRCTL_PDN_ADC 0x20
69#define CS4270_PWRCTL_PDN_DAC 0x02
70#define CS4270_PWRCTL_PDN 0x01
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71#define CS4270_PWRCTL_PDN_ALL \
72 (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
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73#define CS4270_MODE_SPEED_MASK 0x30
74#define CS4270_MODE_1X 0x00
75#define CS4270_MODE_2X 0x10
76#define CS4270_MODE_4X 0x20
77#define CS4270_MODE_SLAVE 0x30
78#define CS4270_MODE_DIV_MASK 0x0E
79#define CS4270_MODE_DIV1 0x00
80#define CS4270_MODE_DIV15 0x02
81#define CS4270_MODE_DIV2 0x04
82#define CS4270_MODE_DIV3 0x06
83#define CS4270_MODE_DIV4 0x08
84#define CS4270_MODE_POPGUARD 0x01
85#define CS4270_FORMAT_FREEZE_A 0x80
86#define CS4270_FORMAT_FREEZE_B 0x40
87#define CS4270_FORMAT_LOOPBACK 0x20
88#define CS4270_FORMAT_DAC_MASK 0x18
89#define CS4270_FORMAT_DAC_LJ 0x00
90#define CS4270_FORMAT_DAC_I2S 0x08
91#define CS4270_FORMAT_DAC_RJ16 0x18
92#define CS4270_FORMAT_DAC_RJ24 0x10
93#define CS4270_FORMAT_ADC_MASK 0x01
94#define CS4270_FORMAT_ADC_LJ 0x00
95#define CS4270_FORMAT_ADC_I2S 0x01
96#define CS4270_TRANS_ONE_VOL 0x80
97#define CS4270_TRANS_SOFT 0x40
98#define CS4270_TRANS_ZERO 0x20
99#define CS4270_TRANS_INV_ADC_A 0x08
100#define CS4270_TRANS_INV_ADC_B 0x10
101#define CS4270_TRANS_INV_DAC_A 0x02
102#define CS4270_TRANS_INV_DAC_B 0x04
103#define CS4270_TRANS_DEEMPH 0x01
104#define CS4270_MUTE_AUTO 0x20
105#define CS4270_MUTE_ADC_A 0x08
106#define CS4270_MUTE_ADC_B 0x10
107#define CS4270_MUTE_POLARITY 0x04
108#define CS4270_MUTE_DAC_A 0x01
109#define CS4270_MUTE_DAC_B 0x02
110
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111static const char *supply_names[] = {
112 "va", "vd", "vlc"
113};
114
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115/* Private data for the CS4270 */
116struct cs4270_private {
117 struct snd_soc_codec codec;
118 u8 reg_cache[CS4270_NUMREGS];
119 unsigned int mclk; /* Input frequency of the MCLK pin */
120 unsigned int mode; /* The mode (I2S or left-justified) */
4eae080d 121 unsigned int slave_mode;
1a4ba05e 122 unsigned int manual_mute;
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123
124 /* power domain regulators */
125 struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
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126};
127
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128/**
129 * struct cs4270_mode_ratios - clock ratio tables
130 * @ratio: the ratio of MCLK to the sample rate
131 * @speed_mode: the Speed Mode bits to set in the Mode Control register for
132 * this ratio
133 * @mclk: the Ratio Select bits to set in the Mode Control register for this
134 * ratio
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135 *
136 * The data for this chart is taken from Table 5 of the CS4270 reference
137 * manual.
138 *
139 * This table is used to determine how to program the Mode Control register.
140 * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
141 * rates the CS4270 currently supports.
142 *
ff7bf02f 143 * @speed_mode is the corresponding bit pattern to be written to the
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144 * MODE bits of the Mode Control Register
145 *
ff7bf02f 146 * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
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147 * the Mode Control Register.
148 *
149 * In situations where a single ratio is represented by multiple speed
150 * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
151 * double-speed instead of quad-speed. However, the CS4270 errata states
ff7bf02f 152 * that divide-By-1.5 can cause failures, so we avoid that mode where
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153 * possible.
154 *
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155 * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
156 * work if Vd is 3.3V. If this effects you, select the
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157 * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
158 * never select any sample rates that require divide-by-1.5.
159 */
ff7bf02f 160struct cs4270_mode_ratios {
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161 unsigned int ratio;
162 u8 speed_mode;
163 u8 mclk;
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164};
165
d9fb7fbd 166static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
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167 {64, CS4270_MODE_4X, CS4270_MODE_DIV1},
168#ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
169 {96, CS4270_MODE_4X, CS4270_MODE_DIV15},
170#endif
171 {128, CS4270_MODE_2X, CS4270_MODE_DIV1},
172 {192, CS4270_MODE_4X, CS4270_MODE_DIV3},
173 {256, CS4270_MODE_1X, CS4270_MODE_DIV1},
174 {384, CS4270_MODE_2X, CS4270_MODE_DIV3},
175 {512, CS4270_MODE_1X, CS4270_MODE_DIV2},
176 {768, CS4270_MODE_1X, CS4270_MODE_DIV3},
177 {1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
178};
179
180/* The number of MCLK/LRCK ratios supported by the CS4270 */
181#define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
9dbd627b 182
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183/**
184 * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
185 * @codec_dai: the codec DAI
186 * @clk_id: the clock ID (ignored)
187 * @freq: the MCLK input frequency
188 * @dir: the clock direction (ignored)
9dbd627b 189 *
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190 * This function is used to tell the codec driver what the input MCLK
191 * frequency is.
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192 *
193 * The value of MCLK is used to determine which sample rates are supported
194 * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
ff7bf02f 195 * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
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196 *
197 * This function calculates the nine ratios and determines which ones match
198 * a standard sample rate. If there's a match, then it is added to the list
ff7bf02f 199 * of supported sample rates.
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200 *
201 * This function must be called by the machine driver's 'startup' function,
202 * otherwise the list of supported sample rates will not be available in
203 * time for ALSA.
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204 *
205 * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
206 * theoretically possible sample rates to be enabled. Call it again with a
207 * proper value set one the external clock is set (most probably you would do
208 * that from a machine's driver 'hw_param' hook.
9dbd627b 209 */
e550e17f 210static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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211 int clk_id, unsigned int freq, int dir)
212{
213 struct snd_soc_codec *codec = codec_dai->codec;
214 struct cs4270_private *cs4270 = codec->private_data;
215 unsigned int rates = 0;
216 unsigned int rate_min = -1;
217 unsigned int rate_max = 0;
218 unsigned int i;
219
220 cs4270->mclk = freq;
221
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222 if (cs4270->mclk) {
223 for (i = 0; i < NUM_MCLK_RATIOS; i++) {
224 unsigned int rate = freq / cs4270_mode_ratios[i].ratio;
225 rates |= snd_pcm_rate_to_rate_bit(rate);
226 if (rate < rate_min)
227 rate_min = rate;
228 if (rate > rate_max)
229 rate_max = rate;
230 }
231 /* FIXME: soc should support a rate list */
232 rates &= ~SNDRV_PCM_RATE_KNOT;
9dbd627b 233
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234 if (!rates) {
235 dev_err(codec->dev, "could not find a valid sample rate\n");
236 return -EINVAL;
237 }
238 } else {
239 /* enable all possible rates */
240 rates = SNDRV_PCM_RATE_8000_192000;
241 rate_min = 8000;
242 rate_max = 192000;
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243 }
244
245 codec_dai->playback.rates = rates;
246 codec_dai->playback.rate_min = rate_min;
247 codec_dai->playback.rate_max = rate_max;
248
249 codec_dai->capture.rates = rates;
250 codec_dai->capture.rate_min = rate_min;
251 codec_dai->capture.rate_max = rate_max;
252
253 return 0;
254}
255
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256/**
257 * cs4270_set_dai_fmt - configure the codec for the selected audio format
258 * @codec_dai: the codec DAI
259 * @format: a SND_SOC_DAIFMT_x value indicating the data format
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260 *
261 * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
262 * codec accordingly.
263 *
264 * Currently, this function only supports SND_SOC_DAIFMT_I2S and
265 * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
266 * data for playback only, but ASoC currently does not support different
267 * formats for playback vs. record.
268 */
e550e17f 269static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
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270 unsigned int format)
271{
272 struct snd_soc_codec *codec = codec_dai->codec;
273 struct cs4270_private *cs4270 = codec->private_data;
274 int ret = 0;
275
4eae080d 276 /* set DAI format */
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277 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
278 case SND_SOC_DAIFMT_I2S:
279 case SND_SOC_DAIFMT_LEFT_J:
280 cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
281 break;
282 default:
a6c255e0 283 dev_err(codec->dev, "invalid dai format\n");
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284 ret = -EINVAL;
285 }
286
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287 /* set master/slave audio interface */
288 switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
289 case SND_SOC_DAIFMT_CBS_CFS:
290 cs4270->slave_mode = 1;
291 break;
292 case SND_SOC_DAIFMT_CBM_CFM:
293 cs4270->slave_mode = 0;
294 break;
4eae080d 295 default:
ff09d49a 296 /* all other modes are unsupported by the hardware */
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297 ret = -EINVAL;
298 }
299
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300 return ret;
301}
302
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303/**
304 * cs4270_fill_cache - pre-fill the CS4270 register cache.
305 * @codec: the codec for this CS4270
306 *
307 * This function fills in the CS4270 register cache by reading the register
308 * values from the hardware.
309 *
310 * This CS4270 registers are cached to avoid excessive I2C I/O operations.
311 * After the initial read to pre-fill the cache, the CS4270 never updates
312 * the register values, so we won't have a cache coherency problem.
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313 *
314 * We use the auto-increment feature of the CS4270 to read all registers in
315 * one shot.
316 */
317static int cs4270_fill_cache(struct snd_soc_codec *codec)
318{
319 u8 *cache = codec->reg_cache;
320 struct i2c_client *i2c_client = codec->control_data;
321 s32 length;
322
323 length = i2c_smbus_read_i2c_block_data(i2c_client,
80ab8817 324 CS4270_FIRSTREG | CS4270_I2C_INCR, CS4270_NUMREGS, cache);
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325
326 if (length != CS4270_NUMREGS) {
a6c255e0 327 dev_err(codec->dev, "i2c read failure, addr=0x%x\n",
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328 i2c_client->addr);
329 return -EIO;
330 }
331
332 return 0;
333}
334
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335/**
336 * cs4270_read_reg_cache - read from the CS4270 register cache.
337 * @codec: the codec for this CS4270
338 * @reg: the register to read
339 *
340 * This function returns the value for a given register. It reads only from
341 * the register cache, not the hardware itself.
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342 *
343 * This CS4270 registers are cached to avoid excessive I2C I/O operations.
344 * After the initial read to pre-fill the cache, the CS4270 never updates
ff7bf02f 345 * the register values, so we won't have a cache coherency problem.
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346 */
347static unsigned int cs4270_read_reg_cache(struct snd_soc_codec *codec,
348 unsigned int reg)
349{
350 u8 *cache = codec->reg_cache;
351
352 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
353 return -EIO;
354
355 return cache[reg - CS4270_FIRSTREG];
356}
357
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358/**
359 * cs4270_i2c_write - write to a CS4270 register via the I2C bus.
360 * @codec: the codec for this CS4270
361 * @reg: the register to write
362 * @value: the value to write to the register
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363 *
364 * This function writes the given value to the given CS4270 register, and
365 * also updates the register cache.
366 *
367 * Note that we don't use the hw_write function pointer of snd_soc_codec.
368 * That's because it's too clunky: the hw_write_t prototype does not match
369 * i2c_smbus_write_byte_data(), and it's just another layer of overhead.
370 */
371static int cs4270_i2c_write(struct snd_soc_codec *codec, unsigned int reg,
372 unsigned int value)
373{
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374 u8 *cache = codec->reg_cache;
375
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376 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
377 return -EIO;
378
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379 /* Only perform an I2C operation if the new value is different */
380 if (cache[reg - CS4270_FIRSTREG] != value) {
381 struct i2c_client *client = codec->control_data;
382 if (i2c_smbus_write_byte_data(client, reg, value)) {
a6c255e0 383 dev_err(codec->dev, "i2c write failed\n");
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384 return -EIO;
385 }
386
b0c813ce 387 /* We've written to the hardware, so update the cache */
b0c813ce 388 cache[reg - CS4270_FIRSTREG] = value;
b0c813ce 389 }
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390
391 return 0;
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392}
393
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394/**
395 * cs4270_hw_params - program the CS4270 with the given hardware parameters.
396 * @substream: the audio stream
397 * @params: the hardware parameters to set
398 * @dai: the SOC DAI (ignored)
b0c813ce 399 *
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400 * This function programs the hardware with the values provided.
401 * Specifically, the sample rate and the data format.
402 *
403 * The .ops functions are used to provide board-specific data, like input
404 * frequencies, to this driver. This function takes that information,
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405 * combines it with the hardware parameters provided, and programs the
406 * hardware accordingly.
407 */
408static int cs4270_hw_params(struct snd_pcm_substream *substream,
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409 struct snd_pcm_hw_params *params,
410 struct snd_soc_dai *dai)
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411{
412 struct snd_soc_pcm_runtime *rtd = substream->private_data;
413 struct snd_soc_device *socdev = rtd->socdev;
6627a653 414 struct snd_soc_codec *codec = socdev->card->codec;
b0c813ce 415 struct cs4270_private *cs4270 = codec->private_data;
e34ba212 416 int ret;
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417 unsigned int i;
418 unsigned int rate;
419 unsigned int ratio;
420 int reg;
421
422 /* Figure out which MCLK/LRCK ratio to use */
423
424 rate = params_rate(params); /* Sampling rate, in Hz */
425 ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
426
9dbd627b 427 for (i = 0; i < NUM_MCLK_RATIOS; i++) {
8432395f 428 if (cs4270_mode_ratios[i].ratio == ratio)
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429 break;
430 }
431
9dbd627b 432 if (i == NUM_MCLK_RATIOS) {
b0c813ce 433 /* We did not find a matching ratio */
a6c255e0 434 dev_err(codec->dev, "could not find matching ratio\n");
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435 return -EINVAL;
436 }
437
d5e9ba1d 438 /* Set the sample rate */
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439
440 reg = snd_soc_read(codec, CS4270_MODE);
441 reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
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442 reg |= cs4270_mode_ratios[i].mclk;
443
444 if (cs4270->slave_mode)
445 reg |= CS4270_MODE_SLAVE;
446 else
447 reg |= cs4270_mode_ratios[i].speed_mode;
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448
449 ret = snd_soc_write(codec, CS4270_MODE, reg);
450 if (ret < 0) {
a6c255e0 451 dev_err(codec->dev, "i2c write failed\n");
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452 return ret;
453 }
454
d5e9ba1d 455 /* Set the DAI format */
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456
457 reg = snd_soc_read(codec, CS4270_FORMAT);
458 reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
459
460 switch (cs4270->mode) {
461 case SND_SOC_DAIFMT_I2S:
462 reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
463 break;
464 case SND_SOC_DAIFMT_LEFT_J:
465 reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
466 break;
467 default:
a6c255e0 468 dev_err(codec->dev, "unknown dai format\n");
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469 return -EINVAL;
470 }
471
472 ret = snd_soc_write(codec, CS4270_FORMAT, reg);
473 if (ret < 0) {
a6c255e0 474 dev_err(codec->dev, "i2c write failed\n");
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475 return ret;
476 }
477
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478 return ret;
479}
480
ff7bf02f 481/**
1a4ba05e 482 * cs4270_dai_mute - enable/disable the CS4270 external mute
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483 * @dai: the SOC DAI
484 * @mute: 0 = disable mute, 1 = enable mute
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485 *
486 * This function toggles the mute bits in the MUTE register. The CS4270's
487 * mute capability is intended for external muting circuitry, so if the
488 * board does not have the MUTEA or MUTEB pins connected to such circuitry,
489 * then this function will do nothing.
490 */
1a4ba05e 491static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute)
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492{
493 struct snd_soc_codec *codec = dai->codec;
1a4ba05e 494 struct cs4270_private *cs4270 = codec->private_data;
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495 int reg6;
496
497 reg6 = snd_soc_read(codec, CS4270_MUTE);
498
499 if (mute)
d5e9ba1d 500 reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
1a4ba05e 501 else {
d5e9ba1d 502 reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
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503 reg6 |= cs4270->manual_mute;
504 }
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505
506 return snd_soc_write(codec, CS4270_MUTE, reg6);
507}
b0c813ce 508
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DM
509/**
510 * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
511 * alsa control.
512 * @kcontrol: mixer control
513 * @ucontrol: control element information
514 *
515 * This function basically passes the arguments on to the generic
516 * snd_soc_put_volsw() function and saves the mute information in
517 * our private data structure. This is because we want to prevent
518 * cs4270_dai_mute() neglecting the user's decision to manually
519 * mute the codec's output.
520 *
521 * Returns 0 for success.
522 */
523static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
524 struct snd_ctl_elem_value *ucontrol)
525{
526 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
527 struct cs4270_private *cs4270 = codec->private_data;
528 int left = !ucontrol->value.integer.value[0];
529 int right = !ucontrol->value.integer.value[1];
530
531 cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) |
532 (right ? CS4270_MUTE_DAC_B : 0);
533
534 return snd_soc_put_volsw(kcontrol, ucontrol);
535}
536
b0c813ce
TT
537/* A list of non-DAPM controls that the CS4270 supports */
538static const struct snd_kcontrol_new cs4270_snd_controls[] = {
539 SOC_DOUBLE_R("Master Playback Volume",
d5e9ba1d
TT
540 CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
541 SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
542 SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
543 SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
7e1aa1dc 544 SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0),
d5e9ba1d
TT
545 SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
546 SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
1a4ba05e
DM
547 SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1),
548 SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1,
549 snd_soc_get_volsw, cs4270_soc_put_mute),
b0c813ce
TT
550};
551
b0c813ce 552/*
ff7bf02f 553 * cs4270_codec - global variable to store codec for the ASoC probe function
b0c813ce
TT
554 *
555 * If struct i2c_driver had a private_data field, we wouldn't need to use
04eb093c
TT
556 * cs4270_codec. This is the only way to pass the codec structure from
557 * cs4270_i2c_probe() to cs4270_probe(). Unfortunately, there is no good
558 * way to synchronize these two functions. cs4270_i2c_probe() can be called
559 * multiple times before cs4270_probe() is called even once. So for now, we
560 * also only allow cs4270_i2c_probe() to be run once. That means that we do
561 * not support more than one cs4270 device in the system, at least for now.
b0c813ce 562 */
04eb093c 563static struct snd_soc_codec *cs4270_codec;
b0c813ce 564
6335d055
EM
565static struct snd_soc_dai_ops cs4270_dai_ops = {
566 .hw_params = cs4270_hw_params,
567 .set_sysclk = cs4270_set_dai_sysclk,
568 .set_fmt = cs4270_set_dai_fmt,
1a4ba05e 569 .digital_mute = cs4270_dai_mute,
6335d055
EM
570};
571
0db4d070
TT
572struct snd_soc_dai cs4270_dai = {
573 .name = "cs4270",
574 .playback = {
575 .stream_name = "Playback",
576 .channels_min = 1,
577 .channels_max = 2,
578 .rates = 0,
579 .formats = CS4270_FORMATS,
580 },
581 .capture = {
582 .stream_name = "Capture",
583 .channels_min = 1,
584 .channels_max = 2,
585 .rates = 0,
586 .formats = CS4270_FORMATS,
587 },
6335d055 588 .ops = &cs4270_dai_ops,
0db4d070
TT
589};
590EXPORT_SYMBOL_GPL(cs4270_dai);
591
ff7bf02f
TT
592/**
593 * cs4270_probe - ASoC probe function
594 * @pdev: platform device
595 *
596 * This function is called when ASoC has all the pieces it needs to
597 * instantiate a sound driver.
04eb093c
TT
598 */
599static int cs4270_probe(struct platform_device *pdev)
600{
601 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
602 struct snd_soc_codec *codec = cs4270_codec;
ffbfd336
DM
603 struct cs4270_private *cs4270 = codec->private_data;
604 int i, ret;
04eb093c
TT
605
606 /* Connect the codec to the socdev. snd_soc_new_pcms() needs this. */
607 socdev->card->codec = codec;
608
609 /* Register PCMs */
610 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
611 if (ret < 0) {
a6c255e0 612 dev_err(codec->dev, "failed to create pcms\n");
04eb093c
TT
613 return ret;
614 }
615
616 /* Add the non-DAPM controls */
eb5f6d75
PZ
617 ret = snd_soc_add_controls(codec, cs4270_snd_controls,
618 ARRAY_SIZE(cs4270_snd_controls));
619 if (ret < 0) {
620 dev_err(codec->dev, "failed to add controls\n");
621 goto error_free_pcms;
04eb093c
TT
622 }
623
ffbfd336
DM
624 /* get the power supply regulators */
625 for (i = 0; i < ARRAY_SIZE(supply_names); i++)
626 cs4270->supplies[i].supply = supply_names[i];
627
628 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(cs4270->supplies),
629 cs4270->supplies);
630 if (ret < 0)
631 goto error_free_pcms;
632
c0ff4bcd
DM
633 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
634 cs4270->supplies);
635 if (ret < 0)
636 goto error_free_regulators;
637
04eb093c
TT
638 return 0;
639
c0ff4bcd
DM
640error_free_regulators:
641 regulator_bulk_free(ARRAY_SIZE(cs4270->supplies),
642 cs4270->supplies);
643
04eb093c
TT
644error_free_pcms:
645 snd_soc_free_pcms(socdev);
646
647 return ret;
648}
649
ff7bf02f
TT
650/**
651 * cs4270_remove - ASoC remove function
652 * @pdev: platform device
653 *
654 * This function is the counterpart to cs4270_probe().
655 */
04eb093c
TT
656static int cs4270_remove(struct platform_device *pdev)
657{
658 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
ffbfd336
DM
659 struct snd_soc_codec *codec = cs4270_codec;
660 struct cs4270_private *cs4270 = codec->private_data;
04eb093c
TT
661
662 snd_soc_free_pcms(socdev);
c0ff4bcd 663 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
ffbfd336 664 regulator_bulk_free(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
04eb093c
TT
665
666 return 0;
667};
668
ff7bf02f
TT
669/**
670 * cs4270_i2c_probe - initialize the I2C interface of the CS4270
671 * @i2c_client: the I2C client object
672 * @id: the I2C device ID (ignored)
b0c813ce 673 *
ff7bf02f
TT
674 * This function is called whenever the I2C subsystem finds a device that
675 * matches the device ID given via a prior call to i2c_add_driver().
b0c813ce 676 */
ec2cd95f
TT
677static int cs4270_i2c_probe(struct i2c_client *i2c_client,
678 const struct i2c_device_id *id)
b0c813ce 679{
0db4d070
TT
680 struct snd_soc_codec *codec;
681 struct cs4270_private *cs4270;
d5e9ba1d 682 unsigned int reg;
04eb093c
TT
683 int ret;
684
685 /* For now, we only support one cs4270 device in the system. See the
686 * comment for cs4270_codec.
687 */
688 if (cs4270_codec) {
a6c255e0 689 dev_err(&i2c_client->dev, "ignoring CS4270 at addr %X\n",
04eb093c 690 i2c_client->addr);
a6c255e0 691 dev_err(&i2c_client->dev, "only one per board allowed\n");
04eb093c
TT
692 /* Should we return something other than ENODEV here? */
693 return -ENODEV;
694 }
b0c813ce 695
b0c813ce
TT
696 /* Verify that we have a CS4270 */
697
698 ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID);
699 if (ret < 0) {
a6c255e0 700 dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
04eb093c 701 i2c_client->addr);
0db4d070 702 return ret;
b0c813ce
TT
703 }
704 /* The top four bits of the chip ID should be 1100. */
705 if ((ret & 0xF0) != 0xC0) {
a6c255e0 706 dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
0db4d070
TT
707 i2c_client->addr);
708 return -ENODEV;
b0c813ce
TT
709 }
710
a6c255e0 711 dev_info(&i2c_client->dev, "found device at i2c address %X\n",
ec2cd95f 712 i2c_client->addr);
a6c255e0 713 dev_info(&i2c_client->dev, "hardware revision %X\n", ret & 0xF);
b0c813ce 714
0db4d070
TT
715 /* Allocate enough space for the snd_soc_codec structure
716 and our private data together. */
717 cs4270 = kzalloc(sizeof(struct cs4270_private), GFP_KERNEL);
718 if (!cs4270) {
a6c255e0 719 dev_err(&i2c_client->dev, "could not allocate codec\n");
0db4d070
TT
720 return -ENOMEM;
721 }
722 codec = &cs4270->codec;
0db4d070
TT
723
724 mutex_init(&codec->mutex);
725 INIT_LIST_HEAD(&codec->dapm_widgets);
726 INIT_LIST_HEAD(&codec->dapm_paths);
727
a6c255e0 728 codec->dev = &i2c_client->dev;
0db4d070
TT
729 codec->name = "CS4270";
730 codec->owner = THIS_MODULE;
731 codec->dai = &cs4270_dai;
732 codec->num_dai = 1;
733 codec->private_data = cs4270;
b0c813ce
TT
734 codec->control_data = i2c_client;
735 codec->read = cs4270_read_reg_cache;
736 codec->write = cs4270_i2c_write;
0db4d070 737 codec->reg_cache = cs4270->reg_cache;
b0c813ce
TT
738 codec->reg_cache_size = CS4270_NUMREGS;
739
740 /* The I2C interface is set up, so pre-fill our register cache */
741
742 ret = cs4270_fill_cache(codec);
743 if (ret < 0) {
a6c255e0 744 dev_err(&i2c_client->dev, "failed to fill register cache\n");
0db4d070
TT
745 goto error_free_codec;
746 }
747
d5e9ba1d
TT
748 /* Disable auto-mute. This feature appears to be buggy. In some
749 * situations, auto-mute will not deactivate when it should, so we want
750 * this feature disabled by default. An application (e.g. alsactl) can
751 * re-enabled it by using the controls.
752 */
753
754 reg = cs4270_read_reg_cache(codec, CS4270_MUTE);
755 reg &= ~CS4270_MUTE_AUTO;
756 ret = cs4270_i2c_write(codec, CS4270_MUTE, reg);
757 if (ret < 0) {
758 dev_err(&i2c_client->dev, "i2c write failed\n");
759 return ret;
760 }
761
762 /* Disable automatic volume control. The hardware enables, and it
763 * causes volume change commands to be delayed, sometimes until after
764 * playback has started. An application (e.g. alsactl) can
765 * re-enabled it by using the controls.
766 */
767
768 reg = cs4270_read_reg_cache(codec, CS4270_TRANS);
769 reg &= ~(CS4270_TRANS_SOFT | CS4270_TRANS_ZERO);
770 ret = cs4270_i2c_write(codec, CS4270_TRANS, reg);
771 if (ret < 0) {
772 dev_err(&i2c_client->dev, "i2c write failed\n");
773 return ret;
774 }
775
a6c255e0
TT
776 /* Initialize the DAI. Normally, we'd prefer to have a kmalloc'd DAI
777 * structure for each CS4270 device, but the machine driver needs to
778 * have a pointer to the DAI structure, so for now it must be a global
779 * variable.
780 */
781 cs4270_dai.dev = &i2c_client->dev;
782
04eb093c
TT
783 /* Register the DAI. If all the other ASoC driver have already
784 * registered, then this will call our probe function, so
785 * cs4270_codec needs to be ready.
786 */
a6c255e0 787 cs4270_codec = codec;
04eb093c 788 ret = snd_soc_register_dai(&cs4270_dai);
0db4d070 789 if (ret < 0) {
a6c255e0 790 dev_err(&i2c_client->dev, "failed to register DAIe\n");
0db4d070 791 goto error_free_codec;
b0c813ce
TT
792 }
793
04eb093c 794 i2c_set_clientdata(i2c_client, cs4270);
ec2cd95f 795
b0c813ce
TT
796 return 0;
797
0db4d070
TT
798error_free_codec:
799 kfree(cs4270);
a6c255e0
TT
800 cs4270_codec = NULL;
801 cs4270_dai.dev = NULL;
b0c813ce 802
b0c813ce
TT
803 return ret;
804}
805
ff7bf02f
TT
806/**
807 * cs4270_i2c_remove - remove an I2C device
808 * @i2c_client: the I2C client object
809 *
810 * This function is the counterpart to cs4270_i2c_probe().
811 */
0db4d070
TT
812static int cs4270_i2c_remove(struct i2c_client *i2c_client)
813{
04eb093c 814 struct cs4270_private *cs4270 = i2c_get_clientdata(i2c_client);
0db4d070 815
0db4d070 816 kfree(cs4270);
a6c255e0
TT
817 cs4270_codec = NULL;
818 cs4270_dai.dev = NULL;
0db4d070
TT
819
820 return 0;
821}
822
ff7bf02f
TT
823/*
824 * cs4270_id - I2C device IDs supported by this driver
825 */
0db4d070 826static struct i2c_device_id cs4270_id[] = {
ff637d38
TT
827 {"cs4270", 0},
828 {}
829};
830MODULE_DEVICE_TABLE(i2c, cs4270_id);
831
5e7c0344
DM
832#ifdef CONFIG_PM
833
834/* This suspend/resume implementation can handle both - a simple standby
835 * where the codec remains powered, and a full suspend, where the voltage
836 * domain the codec is connected to is teared down and/or any other hardware
837 * reset condition is asserted.
838 *
839 * The codec's own power saving features are enabled in the suspend callback,
840 * and all registers are written back to the hardware when resuming.
841 */
842
15b5bdae
DM
843static int cs4270_soc_suspend(struct platform_device *pdev, pm_message_t mesg)
844{
845 struct snd_soc_codec *codec = cs4270_codec;
ffbfd336
DM
846 struct cs4270_private *cs4270 = codec->private_data;
847 int reg, ret;
15b5bdae 848
ffbfd336
DM
849 reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL;
850 if (reg < 0)
851 return reg;
852
853 ret = snd_soc_write(codec, CS4270_PWRCTL, reg);
854 if (ret < 0)
855 return ret;
856
857 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies),
858 cs4270->supplies);
859
860 return 0;
15b5bdae
DM
861}
862
863static int cs4270_soc_resume(struct platform_device *pdev)
864{
865 struct snd_soc_codec *codec = cs4270_codec;
ffbfd336 866 struct cs4270_private *cs4270 = codec->private_data;
15b5bdae 867 struct i2c_client *i2c_client = codec->control_data;
5e7c0344
DM
868 int reg;
869
ffbfd336
DM
870 regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
871 cs4270->supplies);
872
5e7c0344
DM
873 /* In case the device was put to hard reset during sleep, we need to
874 * wait 500ns here before any I2C communication. */
875 ndelay(500);
876
877 /* first restore the entire register cache ... */
878 for (reg = CS4270_FIRSTREG; reg <= CS4270_LASTREG; reg++) {
879 u8 val = snd_soc_read(codec, reg);
880
15b5bdae 881 if (i2c_smbus_write_byte_data(i2c_client, reg, val)) {
5e7c0344
DM
882 dev_err(codec->dev, "i2c write failed\n");
883 return -EIO;
884 }
885 }
886
887 /* ... then disable the power-down bits */
888 reg = snd_soc_read(codec, CS4270_PWRCTL);
889 reg &= ~CS4270_PWRCTL_PDN_ALL;
890
891 return snd_soc_write(codec, CS4270_PWRCTL, reg);
892}
893#else
15b5bdae
DM
894#define cs4270_soc_suspend NULL
895#define cs4270_soc_resume NULL
5e7c0344
DM
896#endif /* CONFIG_PM */
897
ff7bf02f
TT
898/*
899 * cs4270_i2c_driver - I2C device identification
900 *
901 * This structure tells the I2C subsystem how to identify and support a
902 * given I2C device type.
903 */
ff637d38
TT
904static struct i2c_driver cs4270_i2c_driver = {
905 .driver = {
906 .name = "cs4270",
907 .owner = THIS_MODULE,
908 },
909 .id_table = cs4270_id,
910 .probe = cs4270_i2c_probe,
0db4d070 911 .remove = cs4270_i2c_remove,
ff637d38 912};
b0c813ce 913
b0c813ce
TT
914/*
915 * ASoC codec device structure
916 *
917 * Assign this variable to the codec_dev field of the machine driver's
918 * snd_soc_device structure.
919 */
920struct snd_soc_codec_device soc_codec_device_cs4270 = {
921 .probe = cs4270_probe,
15b5bdae
DM
922 .remove = cs4270_remove,
923 .suspend = cs4270_soc_suspend,
924 .resume = cs4270_soc_resume,
b0c813ce
TT
925};
926EXPORT_SYMBOL_GPL(soc_codec_device_cs4270);
927
c9b3a40f 928static int __init cs4270_init(void)
64089b84 929{
a6c255e0 930 pr_info("Cirrus Logic CS4270 ALSA SoC Codec Driver\n");
0db4d070 931
04eb093c 932 return i2c_add_driver(&cs4270_i2c_driver);
64089b84
MB
933}
934module_init(cs4270_init);
935
936static void __exit cs4270_exit(void)
937{
04eb093c 938 i2c_del_driver(&cs4270_i2c_driver);
64089b84
MB
939}
940module_exit(cs4270_exit);
941
b0c813ce
TT
942MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
943MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
944MODULE_LICENSE("GPL");