[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / ad1836.c

 /*
 * Audio Codec driver supporting:
 *  AD1835A, AD1836, AD1837A, AD1838A, AD1839A
 *
 * Copyright 2009-2011 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/initval.h>
#include <sound/soc.h>
#include <sound/tlv.h>
#include <linux/spi/spi.h>
#include <linux/regmap.h>

#include "ad1836.h"

enum ad1836_type {
	AD1835,
	AD1836,
	AD1838,
};

/* codec private data */
struct ad1836_priv {
	enum ad1836_type type;
	struct regmap *regmap;
};

/*
 * AD1836 volume/mute/de-emphasis etc. controls
 */
static const char *ad1836_deemp[] = {"None", "44.1kHz", "32kHz", "48kHz"};

static const struct soc_enum ad1836_deemp_enum =
	SOC_ENUM_SINGLE(AD1836_DAC_CTRL1, 8, 4, ad1836_deemp);

#define AD1836_DAC_VOLUME(x) \
	SOC_DOUBLE_R("DAC" #x " Playback Volume", AD1836_DAC_L_VOL(x), \
			AD1836_DAC_R_VOL(x), 0, 0x3FF, 0)

#define AD1836_DAC_SWITCH(x) \
	SOC_DOUBLE("DAC" #x " Playback Switch", AD1836_DAC_CTRL2, \
			AD1836_MUTE_LEFT(x), AD1836_MUTE_RIGHT(x), 1, 1)

#define AD1836_ADC_SWITCH(x) \
	SOC_DOUBLE("ADC" #x " Capture Switch", AD1836_ADC_CTRL2, \
		AD1836_MUTE_LEFT(x), AD1836_MUTE_RIGHT(x), 1, 1)

static const struct snd_kcontrol_new ad183x_dac_controls[] = {
	AD1836_DAC_VOLUME(1),
	AD1836_DAC_SWITCH(1),
	AD1836_DAC_VOLUME(2),
	AD1836_DAC_SWITCH(2),
	AD1836_DAC_VOLUME(3),
	AD1836_DAC_SWITCH(3),
	AD1836_DAC_VOLUME(4),
	AD1836_DAC_SWITCH(4),
};

static const struct snd_soc_dapm_widget ad183x_dac_dapm_widgets[] = {
	SND_SOC_DAPM_OUTPUT("DAC1OUT"),
	SND_SOC_DAPM_OUTPUT("DAC2OUT"),
	SND_SOC_DAPM_OUTPUT("DAC3OUT"),
	SND_SOC_DAPM_OUTPUT("DAC4OUT"),
};

static const struct snd_soc_dapm_route ad183x_dac_routes[] = {
	{ "DAC1OUT", NULL, "DAC" },
	{ "DAC2OUT", NULL, "DAC" },
	{ "DAC3OUT", NULL, "DAC" },
	{ "DAC4OUT", NULL, "DAC" },
};

static const struct snd_kcontrol_new ad183x_adc_controls[] = {
	AD1836_ADC_SWITCH(1),
	AD1836_ADC_SWITCH(2),
	AD1836_ADC_SWITCH(3),
};

static const struct snd_soc_dapm_widget ad183x_adc_dapm_widgets[] = {
	SND_SOC_DAPM_INPUT("ADC1IN"),
	SND_SOC_DAPM_INPUT("ADC2IN"),
};

static const struct snd_soc_dapm_route ad183x_adc_routes[] = {
	{ "ADC", NULL, "ADC1IN" },
	{ "ADC", NULL, "ADC2IN" },
};

static const struct snd_kcontrol_new ad183x_controls[] = {
	/* ADC high-pass filter */
	SOC_SINGLE("ADC High Pass Filter Switch", AD1836_ADC_CTRL1,
			AD1836_ADC_HIGHPASS_FILTER, 1, 0),

	/* DAC de-emphasis */
	SOC_ENUM("Playback Deemphasis", ad1836_deemp_enum),
};

static const struct snd_soc_dapm_widget ad183x_dapm_widgets[] = {
	SND_SOC_DAPM_DAC("DAC", "Playback", AD1836_DAC_CTRL1,
				AD1836_DAC_POWERDOWN, 1),
	SND_SOC_DAPM_ADC("ADC", "Capture", SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_SUPPLY("ADC_PWR", AD1836_ADC_CTRL1,
				AD1836_ADC_POWERDOWN, 1, NULL, 0),
};

static const struct snd_soc_dapm_route ad183x_dapm_routes[] = {
	{ "DAC", NULL, "ADC_PWR" },
	{ "ADC", NULL, "ADC_PWR" },
};

static const DECLARE_TLV_DB_SCALE(ad1836_in_tlv, 0, 300, 0);

static const struct snd_kcontrol_new ad1836_controls[] = {
	SOC_DOUBLE_TLV("ADC2 Capture Volume", AD1836_ADC_CTRL1, 3, 0, 4, 0,
	    ad1836_in_tlv),
};

/*
 * DAI ops entries
 */

static int ad1836_set_dai_fmt(struct snd_soc_dai *codec_dai,
		unsigned int fmt)
{
	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	/* at present, we support adc aux mode to interface with
	 * blackfin sport tdm mode
	 */
	case SND_SOC_DAIFMT_DSP_A:
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	case SND_SOC_DAIFMT_IB_IF:
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	/* ALCLK,ABCLK are both output, AD1836 can only be master */
	case SND_SOC_DAIFMT_CBM_CFM:
		break;
	default:
		return -EINVAL;
	}

	return 0;
}

static int ad1836_hw_params(struct snd_pcm_substream *substream,
		struct snd_pcm_hw_params *params,
		struct snd_soc_dai *dai)
{
	struct ad1836_priv *ad1836 = snd_soc_codec_get_drvdata(dai->codec);
	int word_len = 0;

	/* bit size */
	switch (params_format(params)) {
	case SNDRV_PCM_FORMAT_S16_LE:
		word_len = AD1836_WORD_LEN_16;
		break;
	case SNDRV_PCM_FORMAT_S20_3LE:
		word_len = AD1836_WORD_LEN_20;
		break;
	case SNDRV_PCM_FORMAT_S24_LE:
	case SNDRV_PCM_FORMAT_S32_LE:
		word_len = AD1836_WORD_LEN_24;
		break;
	}

	regmap_update_bits(ad1836->regmap, AD1836_DAC_CTRL1,
		AD1836_DAC_WORD_LEN_MASK,
		word_len << AD1836_DAC_WORD_LEN_OFFSET);

	regmap_update_bits(ad1836->regmap, AD1836_ADC_CTRL2,
		AD1836_ADC_WORD_LEN_MASK,
		word_len << AD1836_ADC_WORD_OFFSET);

	return 0;
}

static const struct snd_soc_dai_ops ad1836_dai_ops = {
	.hw_params = ad1836_hw_params,
	.set_fmt = ad1836_set_dai_fmt,
};

#define AD183X_DAI(_name, num_dacs, num_adcs) \
{ \
	.name = _name "-hifi", \
	.playback = { \
		.stream_name = "Playback", \
		.channels_min = 2, \
		.channels_max = (num_dacs) * 2, \
		.rates = SNDRV_PCM_RATE_48000,  \
		.formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE | \
			SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE, \
	}, \
	.capture = { \
		.stream_name = "Capture", \
		.channels_min = 2, \
		.channels_max = (num_adcs) * 2, \
		.rates = SNDRV_PCM_RATE_48000, \
		.formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE | \
			SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE, \
	}, \
	.ops = &ad1836_dai_ops, \
}

static struct snd_soc_dai_driver ad183x_dais[] = {
	[AD1835] = AD183X_DAI("ad1835", 4, 1),
	[AD1836] = AD183X_DAI("ad1836", 3, 2),
	[AD1838] = AD183X_DAI("ad1838", 3, 1),
};

#ifdef CONFIG_PM
static int ad1836_suspend(struct snd_soc_codec *codec)
{
	struct ad1836_priv *ad1836 = snd_soc_codec_get_drvdata(codec);
	/* reset clock control mode */
	return regmap_update_bits(ad1836->regmap, AD1836_ADC_CTRL2,
		AD1836_ADC_SERFMT_MASK, 0);
}

static int ad1836_resume(struct snd_soc_codec *codec)
{
	struct ad1836_priv *ad1836 = snd_soc_codec_get_drvdata(codec);
	/* restore clock control mode */
	return regmap_update_bits(ad1836->regmap, AD1836_ADC_CTRL2,
		AD1836_ADC_SERFMT_MASK, AD1836_ADC_AUX);
}
#else
#define ad1836_suspend NULL
#define ad1836_resume  NULL
#endif

static int ad1836_probe(struct snd_soc_codec *codec)
{
	struct ad1836_priv *ad1836 = snd_soc_codec_get_drvdata(codec);
	struct snd_soc_dapm_context *dapm = &codec->dapm;
	int num_dacs, num_adcs;
	int ret = 0;
	int i;

	num_dacs = ad183x_dais[ad1836->type].playback.channels_max / 2;
	num_adcs = ad183x_dais[ad1836->type].capture.channels_max / 2;

	/* default setting for ad1836 */
	/* de-emphasis: 48kHz, power-on dac */
	regmap_write(ad1836->regmap, AD1836_DAC_CTRL1, 0x300);
	/* unmute dac channels */
	regmap_write(ad1836->regmap, AD1836_DAC_CTRL2, 0x0);
	/* high-pass filter enable, power-on adc */
	regmap_write(ad1836->regmap, AD1836_ADC_CTRL1, 0x100);
	/* unmute adc channles, adc aux mode */
	regmap_write(ad1836->regmap, AD1836_ADC_CTRL2, 0x180);
	/* volume */
	for (i = 1; i <= num_dacs; ++i) {
		regmap_write(ad1836->regmap, AD1836_DAC_L_VOL(i), 0x3FF);
		regmap_write(ad1836->regmap, AD1836_DAC_R_VOL(i), 0x3FF);
	}

	if (ad1836->type == AD1836) {
		/* left/right diff:PGA/MUX */
		regmap_write(ad1836->regmap, AD1836_ADC_CTRL3, 0x3A);
		ret = snd_soc_add_codec_controls(codec, ad1836_controls,
				ARRAY_SIZE(ad1836_controls));
		if (ret)
			return ret;
	} else {
		regmap_write(ad1836->regmap, AD1836_ADC_CTRL3, 0x00);
	}

	ret = snd_soc_add_codec_controls(codec, ad183x_dac_controls, num_dacs * 2);
	if (ret)
		return ret;

	ret = snd_soc_add_codec_controls(codec, ad183x_adc_controls, num_adcs);
	if (ret)
		return ret;

	ret = snd_soc_dapm_new_controls(dapm, ad183x_dac_dapm_widgets, num_dacs);
	if (ret)
		return ret;

	ret = snd_soc_dapm_new_controls(dapm, ad183x_adc_dapm_widgets, num_adcs);
	if (ret)
		return ret;

	ret = snd_soc_dapm_add_routes(dapm, ad183x_dac_routes, num_dacs);
	if (ret)
		return ret;

	ret = snd_soc_dapm_add_routes(dapm, ad183x_adc_routes, num_adcs);
	if (ret)
		return ret;

	return ret;
}

/* power down chip */
static int ad1836_remove(struct snd_soc_codec *codec)
{
	struct ad1836_priv *ad1836 = snd_soc_codec_get_drvdata(codec);
	/* reset clock control mode */
	return regmap_update_bits(ad1836->regmap, AD1836_ADC_CTRL2,
		AD1836_ADC_SERFMT_MASK, 0);
}

static struct snd_soc_codec_driver soc_codec_dev_ad1836 = {
	.probe = ad1836_probe,
	.remove = ad1836_remove,
	.suspend = ad1836_suspend,
	.resume = ad1836_resume,

	.controls = ad183x_controls,
	.num_controls = ARRAY_SIZE(ad183x_controls),
	.dapm_widgets = ad183x_dapm_widgets,
	.num_dapm_widgets = ARRAY_SIZE(ad183x_dapm_widgets),
	.dapm_routes = ad183x_dapm_routes,
	.num_dapm_routes = ARRAY_SIZE(ad183x_dapm_routes),
};

static const struct reg_default ad1836_reg_defaults[] = {
	{ AD1836_DAC_CTRL1, 0x0000 },
	{ AD1836_DAC_CTRL2, 0x0000 },
	{ AD1836_DAC_L_VOL(0), 0x0000 },
	{ AD1836_DAC_R_VOL(0), 0x0000 },
	{ AD1836_DAC_L_VOL(1), 0x0000 },
	{ AD1836_DAC_R_VOL(1), 0x0000 },
	{ AD1836_DAC_L_VOL(2), 0x0000 },
	{ AD1836_DAC_R_VOL(2), 0x0000 },
	{ AD1836_DAC_L_VOL(3), 0x0000 },
	{ AD1836_DAC_R_VOL(3), 0x0000 },
	{ AD1836_ADC_CTRL1, 0x0000 },
	{ AD1836_ADC_CTRL2, 0x0000 },
	{ AD1836_ADC_CTRL3, 0x0000 },
};

static const struct regmap_config ad1836_regmap_config = {
	.val_bits = 12,
	.reg_bits = 4,
	.read_flag_mask = 0x08,

	.max_register = AD1836_ADC_CTRL3,
	.reg_defaults = ad1836_reg_defaults,
	.num_reg_defaults = ARRAY_SIZE(ad1836_reg_defaults),
	.cache_type = REGCACHE_RBTREE,
};

static int ad1836_spi_probe(struct spi_device *spi)
{
	struct ad1836_priv *ad1836;
	int ret;

	ad1836 = devm_kzalloc(&spi->dev, sizeof(struct ad1836_priv),
			      GFP_KERNEL);
	if (ad1836 == NULL)
		return -ENOMEM;

	ad1836->regmap = devm_regmap_init_spi(spi, &ad1836_regmap_config);
	if (IS_ERR(ad1836->regmap))
		return PTR_ERR(ad1836->regmap);

	ad1836->type = spi_get_device_id(spi)->driver_data;

	spi_set_drvdata(spi, ad1836);

	ret = snd_soc_register_codec(&spi->dev,
			&soc_codec_dev_ad1836, &ad183x_dais[ad1836->type], 1);
	return ret;
}

static int ad1836_spi_remove(struct spi_device *spi)
{
	snd_soc_unregister_codec(&spi->dev);
	return 0;
}

static const struct spi_device_id ad1836_ids[] = {
	{ "ad1835", AD1835 },
	{ "ad1836", AD1836 },
	{ "ad1837", AD1835 },
	{ "ad1838", AD1838 },
	{ "ad1839", AD1838 },
	{ },
};
MODULE_DEVICE_TABLE(spi, ad1836_ids);

static struct spi_driver ad1836_spi_driver = {
	.driver = {
		.name	= "ad1836",
		.owner	= THIS_MODULE,
	},
	.probe		= ad1836_spi_probe,
	.remove		= ad1836_spi_remove,
	.id_table	= ad1836_ids,
};

module_spi_driver(ad1836_spi_driver);

MODULE_DESCRIPTION("ASoC ad1836 driver");
MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
42f32c55 MF	1	/*
	2	* Audio Codec driver supporting:
	3	* AD1835A, AD1836, AD1837A, AD1838A, AD1839A
7eaae41e	4	*
42f32c55	5	* Copyright 2009-2011 Analog Devices Inc.
7eaae41e	6	*
42f32c55	7	* Licensed under the GPL-2 or later.
7eaae41e BS	8	*/
	9
	10	#include <linux/init.h>
5a0e3ad6	11	#include <linux/slab.h>
7eaae41e	12	#include <linux/module.h>
7eaae41e BS	13	#include <linux/kernel.h>
	14	#include <linux/device.h>
	15	#include <sound/core.h>
	16	#include <sound/pcm.h>
	17	#include <sound/pcm_params.h>
	18	#include <sound/initval.h>
	19	#include <sound/soc.h>
	20	#include <sound/tlv.h>
7eaae41e	21	#include <linux/spi/spi.h>
7f22fd9c LPC	22	#include <linux/regmap.h>
7f22fd9c LPC	23
7eaae41e BS	24	#include "ad1836.h"
7eaae41e BS	25
874ce77b LPC	26	enum ad1836_type {
	27	AD1835,
	28	AD1836,
	29	AD1838,
	30	};
	31
7eaae41e BS	32	/* codec private data */
7eaae41e BS	33	struct ad1836_priv {
874ce77b	34	enum ad1836_type type;
7f22fd9c	35	struct regmap *regmap;
7eaae41e BS	36	};
7eaae41e BS	37
7eaae41e BS	38	/*
	39	* AD1836 volume/mute/de-emphasis etc. controls
	40	*/
	41	static const char *ad1836_deemp[] = {"None", "44.1kHz", "32kHz", "48kHz"};
	42
	43	static const struct soc_enum ad1836_deemp_enum =
	44	SOC_ENUM_SINGLE(AD1836_DAC_CTRL1, 8, 4, ad1836_deemp);
	45
90bc11d1 LPC	46	#define AD1836_DAC_VOLUME(x) \
	47	SOC_DOUBLE_R("DAC" #x " Playback Volume", AD1836_DAC_L_VOL(x), \
	48	AD1836_DAC_R_VOL(x), 0, 0x3FF, 0)
	49
	50	#define AD1836_DAC_SWITCH(x) \
	51	SOC_DOUBLE("DAC" #x " Playback Switch", AD1836_DAC_CTRL2, \
	52	AD1836_MUTE_LEFT(x), AD1836_MUTE_RIGHT(x), 1, 1)
	53
	54	#define AD1836_ADC_SWITCH(x) \
	55	SOC_DOUBLE("ADC" #x " Capture Switch", AD1836_ADC_CTRL2, \
	56	AD1836_MUTE_LEFT(x), AD1836_MUTE_RIGHT(x), 1, 1)
	57
874ce77b	58	static const struct snd_kcontrol_new ad183x_dac_controls[] = {
90bc11d1	59	AD1836_DAC_VOLUME(1),
874ce77b	60	AD1836_DAC_SWITCH(1),
90bc11d1	61	AD1836_DAC_VOLUME(2),
874ce77b	62	AD1836_DAC_SWITCH(2),
90bc11d1	63	AD1836_DAC_VOLUME(3),
874ce77b LPC	64	AD1836_DAC_SWITCH(3),
	65	AD1836_DAC_VOLUME(4),
	66	AD1836_DAC_SWITCH(4),
	67	};
	68
	69	static const struct snd_soc_dapm_widget ad183x_dac_dapm_widgets[] = {
	70	SND_SOC_DAPM_OUTPUT("DAC1OUT"),
	71	SND_SOC_DAPM_OUTPUT("DAC2OUT"),
	72	SND_SOC_DAPM_OUTPUT("DAC3OUT"),
	73	SND_SOC_DAPM_OUTPUT("DAC4OUT"),
	74	};
	75
	76	static const struct snd_soc_dapm_route ad183x_dac_routes[] = {
	77	{ "DAC1OUT", NULL, "DAC" },
	78	{ "DAC2OUT", NULL, "DAC" },
	79	{ "DAC3OUT", NULL, "DAC" },
	80	{ "DAC4OUT", NULL, "DAC" },
	81	};
7eaae41e	82
874ce77b	83	static const struct snd_kcontrol_new ad183x_adc_controls[] = {
90bc11d1 LPC	84	AD1836_ADC_SWITCH(1),
90bc11d1 LPC	85	AD1836_ADC_SWITCH(2),
874ce77b LPC	86	AD1836_ADC_SWITCH(3),
874ce77b LPC	87	};
7eaae41e	88
874ce77b LPC	89	static const struct snd_soc_dapm_widget ad183x_adc_dapm_widgets[] = {
	90	SND_SOC_DAPM_INPUT("ADC1IN"),
	91	SND_SOC_DAPM_INPUT("ADC2IN"),
	92	};
	93
	94	static const struct snd_soc_dapm_route ad183x_adc_routes[] = {
	95	{ "ADC", NULL, "ADC1IN" },
	96	{ "ADC", NULL, "ADC2IN" },
	97	};
7eaae41e	98
874ce77b	99	static const struct snd_kcontrol_new ad183x_controls[] = {
7eaae41e BS	100	/* ADC high-pass filter */
	101	SOC_SINGLE("ADC High Pass Filter Switch", AD1836_ADC_CTRL1,
	102	AD1836_ADC_HIGHPASS_FILTER, 1, 0),
	103
	104	/* DAC de-emphasis */
	105	SOC_ENUM("Playback Deemphasis", ad1836_deemp_enum),
	106	};
	107
874ce77b	108	static const struct snd_soc_dapm_widget ad183x_dapm_widgets[] = {
7eaae41e BS	109	SND_SOC_DAPM_DAC("DAC", "Playback", AD1836_DAC_CTRL1,
	110	AD1836_DAC_POWERDOWN, 1),
	111	SND_SOC_DAPM_ADC("ADC", "Capture", SND_SOC_NOPM, 0, 0),
	112	SND_SOC_DAPM_SUPPLY("ADC_PWR", AD1836_ADC_CTRL1,
	113	AD1836_ADC_POWERDOWN, 1, NULL, 0),
7eaae41e BS	114	};
7eaae41e BS	115
874ce77b	116	static const struct snd_soc_dapm_route ad183x_dapm_routes[] = {
7eaae41e BS	117	{ "DAC", NULL, "ADC_PWR" },
7eaae41e BS	118	{ "ADC", NULL, "ADC_PWR" },
7eaae41e BS	119	};
7eaae41e BS	120
f97d0c6d LPC	121	static const DECLARE_TLV_DB_SCALE(ad1836_in_tlv, 0, 300, 0);
	122
	123	static const struct snd_kcontrol_new ad1836_controls[] = {
0c8e2917	124	SOC_DOUBLE_TLV("ADC2 Capture Volume", AD1836_ADC_CTRL1, 3, 0, 4, 0,
f97d0c6d LPC	125	ad1836_in_tlv),
	126	};
	127
7eaae41e BS	128	/*
	129	* DAI ops entries
	130	*/
	131
	132	static int ad1836_set_dai_fmt(struct snd_soc_dai *codec_dai,
	133	unsigned int fmt)
	134	{
	135	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	136	/* at present, we support adc aux mode to interface with
	137	* blackfin sport tdm mode
	138	*/
	139	case SND_SOC_DAIFMT_DSP_A:
	140	break;
	141	default:
	142	return -EINVAL;
	143	}
	144
	145	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	146	case SND_SOC_DAIFMT_IB_IF:
	147	break;
	148	default:
	149	return -EINVAL;
	150	}
	151
	152	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	153	/* ALCLK,ABCLK are both output, AD1836 can only be master */
	154	case SND_SOC_DAIFMT_CBM_CFM:
	155	break;
	156	default:
	157	return -EINVAL;
	158	}
	159
	160	return 0;
	161	}
	162
	163	static int ad1836_hw_params(struct snd_pcm_substream *substream,
	164	struct snd_pcm_hw_params *params,
	165	struct snd_soc_dai *dai)
	166	{
7f22fd9c	167	struct ad1836_priv *ad1836 = snd_soc_codec_get_drvdata(dai->codec);
7eaae41e	168	int word_len = 0;
7eaae41e BS	169
	170	/* bit size */
	171	switch (params_format(params)) {
	172	case SNDRV_PCM_FORMAT_S16_LE:
8ca695f2	173	word_len = AD1836_WORD_LEN_16;
7eaae41e BS	174	break;
7eaae41e BS	175	case SNDRV_PCM_FORMAT_S20_3LE:
8ca695f2	176	word_len = AD1836_WORD_LEN_20;
7eaae41e BS	177	break;
	178	case SNDRV_PCM_FORMAT_S24_LE:
	179	case SNDRV_PCM_FORMAT_S32_LE:
8ca695f2	180	word_len = AD1836_WORD_LEN_24;
7eaae41e BS	181	break;
	182	}
	183
7f22fd9c LPC	184	regmap_update_bits(ad1836->regmap, AD1836_DAC_CTRL1,
7f22fd9c LPC	185	AD1836_DAC_WORD_LEN_MASK,
8ca695f2	186	word_len << AD1836_DAC_WORD_LEN_OFFSET);
7eaae41e	187
7f22fd9c LPC	188	regmap_update_bits(ad1836->regmap, AD1836_ADC_CTRL2,
7f22fd9c LPC	189	AD1836_ADC_WORD_LEN_MASK,
8ca695f2	190	word_len << AD1836_ADC_WORD_OFFSET);
7eaae41e BS	191
	192	return 0;
	193	}
	194
85e7652d	195	static const struct snd_soc_dai_ops ad1836_dai_ops = {
7eaae41e BS	196	.hw_params = ad1836_hw_params,
	197	.set_fmt = ad1836_set_dai_fmt,
	198	};
	199
874ce77b LPC	200	#define AD183X_DAI(_name, num_dacs, num_adcs) \
	201	{ \
	202	.name = _name "-hifi", \
	203	.playback = { \
	204	.stream_name = "Playback", \
	205	.channels_min = 2, \
	206	.channels_max = (num_dacs) * 2, \
	207	.rates = SNDRV_PCM_RATE_48000, \
	208	.formats = SNDRV_PCM_FMTBIT_S32_LE \| SNDRV_PCM_FMTBIT_S16_LE \| \
	209	SNDRV_PCM_FMTBIT_S20_3LE \| SNDRV_PCM_FMTBIT_S24_LE, \
	210	}, \
	211	.capture = { \
	212	.stream_name = "Capture", \
	213	.channels_min = 2, \
	214	.channels_max = (num_adcs) * 2, \
	215	.rates = SNDRV_PCM_RATE_48000, \
	216	.formats = SNDRV_PCM_FMTBIT_S32_LE \| SNDRV_PCM_FMTBIT_S16_LE \| \
	217	SNDRV_PCM_FMTBIT_S20_3LE \| SNDRV_PCM_FMTBIT_S24_LE, \
	218	}, \
	219	.ops = &ad1836_dai_ops, \
	220	}
	221
	222	static struct snd_soc_dai_driver ad183x_dais[] = {
	223	[AD1835] = AD183X_DAI("ad1835", 4, 1),
	224	[AD1836] = AD183X_DAI("ad1836", 3, 2),
	225	[AD1838] = AD183X_DAI("ad1838", 3, 1),
7eaae41e	226	};
7eaae41e	227
5d0e7f61	228	#ifdef CONFIG_PM
84b315ee	229	static int ad1836_suspend(struct snd_soc_codec *codec)
5d0e7f61	230	{
7f22fd9c	231	struct ad1836_priv *ad1836 = snd_soc_codec_get_drvdata(codec);
5d0e7f61	232	/* reset clock control mode */
7f22fd9c	233	return regmap_update_bits(ad1836->regmap, AD1836_ADC_CTRL2,
5d0e7f61 BS	234	AD1836_ADC_SERFMT_MASK, 0);
	235	}
	236
	237	static int ad1836_resume(struct snd_soc_codec *codec)
	238	{
7f22fd9c	239	struct ad1836_priv *ad1836 = snd_soc_codec_get_drvdata(codec);
5d0e7f61	240	/* restore clock control mode */
7f22fd9c	241	return regmap_update_bits(ad1836->regmap, AD1836_ADC_CTRL2,
5d0e7f61 BS	242	AD1836_ADC_SERFMT_MASK, AD1836_ADC_AUX);
	243	}
	244	#else
	245	#define ad1836_suspend NULL
	246	#define ad1836_resume NULL
	247	#endif
	248
f0fba2ad	249	static int ad1836_probe(struct snd_soc_codec *codec)
7eaae41e	250	{
f0fba2ad	251	struct ad1836_priv *ad1836 = snd_soc_codec_get_drvdata(codec);
ce6120cc	252	struct snd_soc_dapm_context *dapm = &codec->dapm;
874ce77b	253	int num_dacs, num_adcs;
f0fba2ad	254	int ret = 0;
874ce77b LPC	255	int i;
	256
	257	num_dacs = ad183x_dais[ad1836->type].playback.channels_max / 2;
	258	num_adcs = ad183x_dais[ad1836->type].capture.channels_max / 2;
7eaae41e BS	259
	260	/* default setting for ad1836 */
	261	/* de-emphasis: 48kHz, power-on dac */
7f22fd9c	262	regmap_write(ad1836->regmap, AD1836_DAC_CTRL1, 0x300);
7eaae41e	263	/* unmute dac channels */
7f22fd9c	264	regmap_write(ad1836->regmap, AD1836_DAC_CTRL2, 0x0);
7eaae41e	265	/* high-pass filter enable, power-on adc */
7f22fd9c	266	regmap_write(ad1836->regmap, AD1836_ADC_CTRL1, 0x100);
7eaae41e	267	/* unmute adc channles, adc aux mode */
7f22fd9c	268	regmap_write(ad1836->regmap, AD1836_ADC_CTRL2, 0x180);
7eaae41e	269	/* volume */
874ce77b	270	for (i = 1; i <= num_dacs; ++i) {
7f22fd9c LPC	271	regmap_write(ad1836->regmap, AD1836_DAC_L_VOL(i), 0x3FF);
7f22fd9c LPC	272	regmap_write(ad1836->regmap, AD1836_DAC_R_VOL(i), 0x3FF);
874ce77b LPC	273	}
	274
	275	if (ad1836->type == AD1836) {
	276	/* left/right diff:PGA/MUX */
7f22fd9c	277	regmap_write(ad1836->regmap, AD1836_ADC_CTRL3, 0x3A);
022658be	278	ret = snd_soc_add_codec_controls(codec, ad1836_controls,
f97d0c6d LPC	279	ARRAY_SIZE(ad1836_controls));
	280	if (ret)
	281	return ret;
874ce77b	282	} else {
7f22fd9c	283	regmap_write(ad1836->regmap, AD1836_ADC_CTRL3, 0x00);
874ce77b LPC	284	}
874ce77b LPC	285
022658be	286	ret = snd_soc_add_codec_controls(codec, ad183x_dac_controls, num_dacs * 2);
874ce77b LPC	287	if (ret)
	288	return ret;
	289
022658be	290	ret = snd_soc_add_codec_controls(codec, ad183x_adc_controls, num_adcs);
874ce77b LPC	291	if (ret)
	292	return ret;
	293
	294	ret = snd_soc_dapm_new_controls(dapm, ad183x_dac_dapm_widgets, num_dacs);
	295	if (ret)
	296	return ret;
	297
	298	ret = snd_soc_dapm_new_controls(dapm, ad183x_adc_dapm_widgets, num_adcs);
	299	if (ret)
	300	return ret;
	301
	302	ret = snd_soc_dapm_add_routes(dapm, ad183x_dac_routes, num_dacs);
	303	if (ret)
	304	return ret;
	305
	306	ret = snd_soc_dapm_add_routes(dapm, ad183x_adc_routes, num_adcs);
	307	if (ret)
	308	return ret;
7eaae41e	309
7eaae41e BS	310	return ret;
	311	}
	312
	313	/* power down chip */
f0fba2ad	314	static int ad1836_remove(struct snd_soc_codec *codec)
7eaae41e	315	{
7f22fd9c	316	struct ad1836_priv *ad1836 = snd_soc_codec_get_drvdata(codec);
f0fba2ad	317	/* reset clock control mode */
7f22fd9c	318	return regmap_update_bits(ad1836->regmap, AD1836_ADC_CTRL2,
2cf03428	319	AD1836_ADC_SERFMT_MASK, 0);
7eaae41e BS	320	}
7eaae41e BS	321
f0fba2ad	322	static struct snd_soc_codec_driver soc_codec_dev_ad1836 = {
d4d80f5e MF	323	.probe = ad1836_probe,
d4d80f5e MF	324	.remove = ad1836_remove,
5d0e7f61 BS	325	.suspend = ad1836_suspend,
5d0e7f61 BS	326	.resume = ad1836_resume,
874ce77b LPC	327
	328	.controls = ad183x_controls,
	329	.num_controls = ARRAY_SIZE(ad183x_controls),
	330	.dapm_widgets = ad183x_dapm_widgets,
	331	.num_dapm_widgets = ARRAY_SIZE(ad183x_dapm_widgets),
	332	.dapm_routes = ad183x_dapm_routes,
	333	.num_dapm_routes = ARRAY_SIZE(ad183x_dapm_routes),
f0fba2ad LG	334	};
f0fba2ad LG	335
7f22fd9c LPC	336	static const struct reg_default ad1836_reg_defaults[] = {
	337	{ AD1836_DAC_CTRL1, 0x0000 },
	338	{ AD1836_DAC_CTRL2, 0x0000 },
	339	{ AD1836_DAC_L_VOL(0), 0x0000 },
	340	{ AD1836_DAC_R_VOL(0), 0x0000 },
	341	{ AD1836_DAC_L_VOL(1), 0x0000 },
	342	{ AD1836_DAC_R_VOL(1), 0x0000 },
	343	{ AD1836_DAC_L_VOL(2), 0x0000 },
	344	{ AD1836_DAC_R_VOL(2), 0x0000 },
	345	{ AD1836_DAC_L_VOL(3), 0x0000 },
	346	{ AD1836_DAC_R_VOL(3), 0x0000 },
	347	{ AD1836_ADC_CTRL1, 0x0000 },
	348	{ AD1836_ADC_CTRL2, 0x0000 },
	349	{ AD1836_ADC_CTRL3, 0x0000 },
	350	};
	351
	352	static const struct regmap_config ad1836_regmap_config = {
	353	.val_bits = 12,
	354	.reg_bits = 4,
	355	.read_flag_mask = 0x08,
	356
	357	.max_register = AD1836_ADC_CTRL3,
	358	.reg_defaults = ad1836_reg_defaults,
	359	.num_reg_defaults = ARRAY_SIZE(ad1836_reg_defaults),
	360	.cache_type = REGCACHE_RBTREE,
	361	};
	362
7a79e94e	363	static int ad1836_spi_probe(struct spi_device *spi)
f0fba2ad LG	364	{
	365	struct ad1836_priv *ad1836;
	366	int ret;
	367
6e4f17cb AL	368	ad1836 = devm_kzalloc(&spi->dev, sizeof(struct ad1836_priv),
6e4f17cb AL	369	GFP_KERNEL);
f0fba2ad LG	370	if (ad1836 == NULL)
	371	return -ENOMEM;
	372
7f22fd9c LPC	373	ad1836->regmap = devm_regmap_init_spi(spi, &ad1836_regmap_config);
	374	if (IS_ERR(ad1836->regmap))
	375	return PTR_ERR(ad1836->regmap);
	376
874ce77b LPC	377	ad1836->type = spi_get_device_id(spi)->driver_data;
874ce77b LPC	378
f0fba2ad	379	spi_set_drvdata(spi, ad1836);
f0fba2ad LG	380
f0fba2ad LG	381	ret = snd_soc_register_codec(&spi->dev,
874ce77b	382	&soc_codec_dev_ad1836, &ad183x_dais[ad1836->type], 1);
f0fba2ad LG	383	return ret;
	384	}
	385
7a79e94e	386	static int ad1836_spi_remove(struct spi_device *spi)
f0fba2ad LG	387	{
f0fba2ad LG	388	snd_soc_unregister_codec(&spi->dev);
f0fba2ad LG	389	return 0;
f0fba2ad LG	390	}
6e4f17cb	391
874ce77b LPC	392	static const struct spi_device_id ad1836_ids[] = {
	393	{ "ad1835", AD1835 },
	394	{ "ad1836", AD1836 },
	395	{ "ad1837", AD1835 },
	396	{ "ad1838", AD1838 },
	397	{ "ad1839", AD1838 },
	398	{ },
	399	};
	400	MODULE_DEVICE_TABLE(spi, ad1836_ids);
f0fba2ad LG	401
	402	static struct spi_driver ad1836_spi_driver = {
	403	.driver = {
0679059a	404	.name = "ad1836",
f0fba2ad LG	405	.owner = THIS_MODULE,
	406	},
	407	.probe = ad1836_spi_probe,
7a79e94e	408	.remove = ad1836_spi_remove,
874ce77b	409	.id_table = ad1836_ids,
7eaae41e	410	};
7eaae41e	411
2a9a9c87	412	module_spi_driver(ad1836_spi_driver);
7eaae41e BS	413
	414	MODULE_DESCRIPTION("ASoC ad1836 driver");
	415	MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
	416	MODULE_LICENSE("GPL");