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drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / pci / es1938.c
CommitLineData
1da177e4
LT		 1/*
2 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
3 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
c1017a4c 4 * Jaroslav Kysela <perex@perex.cz>,
1da177e4
LT		 5 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
6 * Abramo Bagnara <abramo@alsa-project.org>,
7 * Markus Gruber <gruber@eikon.tum.de>
8 *
9 * Rewritten from sonicvibes.c source.
10 *
11 * TODO:
12 * Rewrite better spinlocks
13 *
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 *
29 */
30
31/*
32 NOTES:
33 - Capture data is written unaligned starting from dma_base + 1 so I need to
34 disable mmap and to add a copy callback.
35 - After several cycle of the following:
36 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
37 a "playback write error (DMA or IRQ trouble?)" may happen.
38 This is due to playback interrupts not generated.
39 I suspect a timing issue.
40 - Sometimes the interrupt handler is invoked wrongly during playback.
41 This generates some harmless "Unexpected hw_pointer: wrong interrupt
42 acknowledge".
43 I've seen that using small period sizes.
44 Reproducible with:
45 mpg123 test.mp3 &
46 hdparm -t -T /dev/hda
47*/
48
49
1da177e4
LT		 50#include <linux/init.h>
51#include <linux/interrupt.h>
52#include <linux/pci.h>
53#include <linux/slab.h>
54#include <linux/gameport.h>
65a77217 55#include <linux/module.h>
1da177e4 56#include <linux/delay.h>
910638ae 57#include <linux/dma-mapping.h>
1da177e4
LT		 58#include <sound/core.h>
59#include <sound/control.h>
60#include <sound/pcm.h>
61#include <sound/opl3.h>
62#include <sound/mpu401.h>
63#include <sound/initval.h>
0b593972 64#include <sound/tlv.h>
1da177e4
LT		 65
66#include <asm/io.h>
67
68MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
69MODULE_DESCRIPTION("ESS Solo-1");
70MODULE_LICENSE("GPL");
71MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
72 "{ESS,ES1946},"
73 "{ESS,ES1969},"
74 "{TerraTec,128i PCI}}");
75
76#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
77#define SUPPORT_JOYSTICK 1
78#endif
79
1da177e4
LT		 80static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
81static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 82static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
1da177e4
LT		 83
84module_param_array(index, int, NULL, 0444);
85MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
86module_param_array(id, charp, NULL, 0444);
87MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
88module_param_array(enable, bool, NULL, 0444);
89MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
90
91#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
92
93#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
94
95#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
96
97#define SL_PCI_LEGACYCONTROL 0x40
98#define SL_PCI_CONFIG 0x50
99#define SL_PCI_DDMACONTROL 0x60
100
101#define ESSIO_REG_AUDIO2DMAADDR 0
102#define ESSIO_REG_AUDIO2DMACOUNT 4
103#define ESSIO_REG_AUDIO2MODE 6
104#define ESSIO_REG_IRQCONTROL 7
105
106#define ESSDM_REG_DMAADDR 0x00
107#define ESSDM_REG_DMACOUNT 0x04
108#define ESSDM_REG_DMACOMMAND 0x08
109#define ESSDM_REG_DMASTATUS 0x08
110#define ESSDM_REG_DMAMODE 0x0b
111#define ESSDM_REG_DMACLEAR 0x0d
112#define ESSDM_REG_DMAMASK 0x0f
113
114#define ESSSB_REG_FMLOWADDR 0x00
115#define ESSSB_REG_FMHIGHADDR 0x02
116#define ESSSB_REG_MIXERADDR 0x04
117#define ESSSB_REG_MIXERDATA 0x05
118
119#define ESSSB_IREG_AUDIO1 0x14
120#define ESSSB_IREG_MICMIX 0x1a
121#define ESSSB_IREG_RECSRC 0x1c
122#define ESSSB_IREG_MASTER 0x32
123#define ESSSB_IREG_FM 0x36
124#define ESSSB_IREG_AUXACD 0x38
125#define ESSSB_IREG_AUXB 0x3a
126#define ESSSB_IREG_PCSPEAKER 0x3c
127#define ESSSB_IREG_LINE 0x3e
128#define ESSSB_IREG_SPATCONTROL 0x50
129#define ESSSB_IREG_SPATLEVEL 0x52
130#define ESSSB_IREG_MASTER_LEFT 0x60
131#define ESSSB_IREG_MASTER_RIGHT 0x62
132#define ESSSB_IREG_MPU401CONTROL 0x64
133#define ESSSB_IREG_MICMIXRECORD 0x68
134#define ESSSB_IREG_AUDIO2RECORD 0x69
135#define ESSSB_IREG_AUXACDRECORD 0x6a
136#define ESSSB_IREG_FMRECORD 0x6b
137#define ESSSB_IREG_AUXBRECORD 0x6c
138#define ESSSB_IREG_MONO 0x6d
139#define ESSSB_IREG_LINERECORD 0x6e
140#define ESSSB_IREG_MONORECORD 0x6f
141#define ESSSB_IREG_AUDIO2SAMPLE 0x70
142#define ESSSB_IREG_AUDIO2MODE 0x71
143#define ESSSB_IREG_AUDIO2FILTER 0x72
144#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
145#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
146#define ESSSB_IREG_AUDIO2CONTROL1 0x78
147#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
148#define ESSSB_IREG_AUDIO2 0x7c
149
150#define ESSSB_REG_RESET 0x06
151
152#define ESSSB_REG_READDATA 0x0a
153#define ESSSB_REG_WRITEDATA 0x0c
154#define ESSSB_REG_READSTATUS 0x0c
155
156#define ESSSB_REG_STATUS 0x0e
157
158#define ESS_CMD_EXTSAMPLERATE 0xa1
159#define ESS_CMD_FILTERDIV 0xa2
160#define ESS_CMD_DMACNTRELOADL 0xa4
161#define ESS_CMD_DMACNTRELOADH 0xa5
162#define ESS_CMD_ANALOGCONTROL 0xa8
163#define ESS_CMD_IRQCONTROL 0xb1
164#define ESS_CMD_DRQCONTROL 0xb2
165#define ESS_CMD_RECLEVEL 0xb4
166#define ESS_CMD_SETFORMAT 0xb6
167#define ESS_CMD_SETFORMAT2 0xb7
168#define ESS_CMD_DMACONTROL 0xb8
169#define ESS_CMD_DMATYPE 0xb9
170#define ESS_CMD_OFFSETLEFT 0xba
171#define ESS_CMD_OFFSETRIGHT 0xbb
172#define ESS_CMD_READREG 0xc0
173#define ESS_CMD_ENABLEEXT 0xc6
174#define ESS_CMD_PAUSEDMA 0xd0
175#define ESS_CMD_ENABLEAUDIO1 0xd1
176#define ESS_CMD_STOPAUDIO1 0xd3
177#define ESS_CMD_AUDIO1STATUS 0xd8
178#define ESS_CMD_CONTDMA 0xd4
179#define ESS_CMD_TESTIRQ 0xf2
180
181#define ESS_RECSRC_MIC 0
182#define ESS_RECSRC_AUXACD 2
183#define ESS_RECSRC_AUXB 5
184#define ESS_RECSRC_LINE 6
185#define ESS_RECSRC_NONE 7
186
187#define DAC1 0x01
188#define ADC1 0x02
189#define DAC2 0x04
190
191/*
192
193 */
194
1da177e4
LT		 195#define SAVED_REG_SIZE 32 /* max. number of registers to save */
196
e571f594 197struct es1938 {
1da177e4
LT		 198 int irq;
199
200 unsigned long io_port;
201 unsigned long sb_port;
202 unsigned long vc_port;
203 unsigned long mpu_port;
204 unsigned long game_port;
205 unsigned long ddma_port;
206
207 unsigned char irqmask;
208 unsigned char revision;
209
e571f594
TI		 210 struct snd_kcontrol *hw_volume;
211 struct snd_kcontrol *hw_switch;
212 struct snd_kcontrol *master_volume;
213 struct snd_kcontrol *master_switch;
1da177e4
LT		 214
215 struct pci_dev *pci;
e571f594
TI		 216 struct snd_card *card;
217 struct snd_pcm *pcm;
218 struct snd_pcm_substream *capture_substream;
219 struct snd_pcm_substream *playback1_substream;
220 struct snd_pcm_substream *playback2_substream;
221 struct snd_rawmidi *rmidi;
1da177e4
LT		 222
223 unsigned int dma1_size;
224 unsigned int dma2_size;
225 unsigned int dma1_start;
226 unsigned int dma2_start;
227 unsigned int dma1_shift;
228 unsigned int dma2_shift;
19e2e3c3 229 unsigned int last_capture_dmaaddr;
1da177e4
LT		 230 unsigned int active;
231
232 spinlock_t reg_lock;
233 spinlock_t mixer_lock;
e571f594 234 struct snd_info_entry *proc_entry;
1da177e4
LT		 235
236#ifdef SUPPORT_JOYSTICK
237 struct gameport *gameport;
238#endif
c7561cd8 239#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 240 unsigned char saved_regs[SAVED_REG_SIZE];
241#endif
242};
243
7d12e780 244static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
1da177e4 245
cebe41d4 246static DEFINE_PCI_DEVICE_TABLE(snd_es1938_ids) = {
28d27aae 247 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
1da177e4
LT		 248 { 0, }
249};
250
251MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
252
253#define RESET_LOOP_TIMEOUT 0x10000
254#define WRITE_LOOP_TIMEOUT 0x10000
255#define GET_LOOP_TIMEOUT 0x01000
256
257#undef REG_DEBUG
258/* -----------------------------------------------------------------
259 * Write to a mixer register
260 * -----------------------------------------------------------------*/
e571f594 261static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 262{
263 unsigned long flags;
264 spin_lock_irqsave(&chip->mixer_lock, flags);
265 outb(reg, SLSB_REG(chip, MIXERADDR));
266 outb(val, SLSB_REG(chip, MIXERDATA));
267 spin_unlock_irqrestore(&chip->mixer_lock, flags);
268#ifdef REG_DEBUG
99b359ba 269 snd_printk(KERN_DEBUG "Mixer reg %02x set to %02x\n", reg, val);
1da177e4
LT		 270#endif
271}
272
273/* -----------------------------------------------------------------
274 * Read from a mixer register
275 * -----------------------------------------------------------------*/
e571f594 276static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 277{
278 int data;
279 unsigned long flags;
280 spin_lock_irqsave(&chip->mixer_lock, flags);
281 outb(reg, SLSB_REG(chip, MIXERADDR));
282 data = inb(SLSB_REG(chip, MIXERDATA));
283 spin_unlock_irqrestore(&chip->mixer_lock, flags);
284#ifdef REG_DEBUG
99b359ba 285 snd_printk(KERN_DEBUG "Mixer reg %02x now is %02x\n", reg, data);
1da177e4
LT		 286#endif
287 return data;
288}
289
290/* -----------------------------------------------------------------
291 * Write to some bits of a mixer register (return old value)
292 * -----------------------------------------------------------------*/
e571f594
TI		 293static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
294 unsigned char mask, unsigned char val)
1da177e4
LT		 295{
296 unsigned long flags;
297 unsigned char old, new, oval;
298 spin_lock_irqsave(&chip->mixer_lock, flags);
299 outb(reg, SLSB_REG(chip, MIXERADDR));
300 old = inb(SLSB_REG(chip, MIXERDATA));
301 oval = old & mask;
302 if (val != oval) {
303 new = (old & ~mask) | (val & mask);
304 outb(new, SLSB_REG(chip, MIXERDATA));
305#ifdef REG_DEBUG
99b359ba
TI		 306 snd_printk(KERN_DEBUG "Mixer reg %02x was %02x, set to %02x\n",
307 reg, old, new);
1da177e4
LT		 308#endif
309 }
310 spin_unlock_irqrestore(&chip->mixer_lock, flags);
311 return oval;
312}
313
314/* -----------------------------------------------------------------
315 * Write command to Controller Registers
316 * -----------------------------------------------------------------*/
e571f594 317static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
1da177e4
LT		 318{
319 int i;
320 unsigned char v;
321 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
322 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
323 outb(cmd, SLSB_REG(chip, WRITEDATA));
324 return;
325 }
326 }
99b359ba 327 printk(KERN_ERR "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
1da177e4
LT		 328}
329
330/* -----------------------------------------------------------------
331 * Read the Read Data Buffer
332 * -----------------------------------------------------------------*/
e571f594 333static int snd_es1938_get_byte(struct es1938 *chip)
1da177e4
LT		 334{
335 int i;
336 unsigned char v;
337 for (i = GET_LOOP_TIMEOUT; i; i--)
338 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
339 return inb(SLSB_REG(chip, READDATA));
99b359ba 340 snd_printk(KERN_ERR "get_byte timeout: status 0x02%x\n", v);
1da177e4
LT		 341 return -ENODEV;
342}
343
344/* -----------------------------------------------------------------
345 * Write value cmd register
346 * -----------------------------------------------------------------*/
e571f594 347static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 348{
349 unsigned long flags;
350 spin_lock_irqsave(&chip->reg_lock, flags);
351 snd_es1938_write_cmd(chip, reg);
352 snd_es1938_write_cmd(chip, val);
353 spin_unlock_irqrestore(&chip->reg_lock, flags);
354#ifdef REG_DEBUG
99b359ba 355 snd_printk(KERN_DEBUG "Reg %02x set to %02x\n", reg, val);
1da177e4
LT		 356#endif
357}
358
359/* -----------------------------------------------------------------
360 * Read data from cmd register and return it
361 * -----------------------------------------------------------------*/
e571f594 362static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 363{
364 unsigned char val;
365 unsigned long flags;
366 spin_lock_irqsave(&chip->reg_lock, flags);
367 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
368 snd_es1938_write_cmd(chip, reg);
369 val = snd_es1938_get_byte(chip);
370 spin_unlock_irqrestore(&chip->reg_lock, flags);
371#ifdef REG_DEBUG
99b359ba 372 snd_printk(KERN_DEBUG "Reg %02x now is %02x\n", reg, val);
1da177e4
LT		 373#endif
374 return val;
375}
376
377/* -----------------------------------------------------------------
378 * Write data to cmd register and return old value
379 * -----------------------------------------------------------------*/
e571f594
TI		 380static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
381 unsigned char val)
1da177e4
LT		 382{
383 unsigned long flags;
384 unsigned char old, new, oval;
385 spin_lock_irqsave(&chip->reg_lock, flags);
386 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
387 snd_es1938_write_cmd(chip, reg);
388 old = snd_es1938_get_byte(chip);
389 oval = old & mask;
390 if (val != oval) {
391 snd_es1938_write_cmd(chip, reg);
392 new = (old & ~mask) | (val & mask);
393 snd_es1938_write_cmd(chip, new);
394#ifdef REG_DEBUG
99b359ba
TI		 395 snd_printk(KERN_DEBUG "Reg %02x was %02x, set to %02x\n",
396 reg, old, new);
1da177e4
LT		 397#endif
398 }
399 spin_unlock_irqrestore(&chip->reg_lock, flags);
400 return oval;
401}
402
403/* --------------------------------------------------------------------
404 * Reset the chip
405 * --------------------------------------------------------------------*/
e571f594 406static void snd_es1938_reset(struct es1938 *chip)
1da177e4
LT		 407{
408 int i;
409
410 outb(3, SLSB_REG(chip, RESET));
411 inb(SLSB_REG(chip, RESET));
412 outb(0, SLSB_REG(chip, RESET));
413 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
414 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
415 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
416 goto __next;
417 }
418 }
99b359ba 419 snd_printk(KERN_ERR "ESS Solo-1 reset failed\n");
1da177e4
LT		 420
421 __next:
422 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
423
424 /* Demand transfer DMA: 4 bytes per DMA request */
425 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
426
427 /* Change behaviour of register A1
428 4x oversampling
429 2nd channel DAC asynchronous */
430 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
431 /* enable/select DMA channel and IRQ channel */
432 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
433 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
434 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
435 /* Set spatializer parameters to recommended values */
436 snd_es1938_mixer_write(chip, 0x54, 0x8f);
437 snd_es1938_mixer_write(chip, 0x56, 0x95);
438 snd_es1938_mixer_write(chip, 0x58, 0x94);
439 snd_es1938_mixer_write(chip, 0x5a, 0x80);
440}
441
442/* --------------------------------------------------------------------
443 * Reset the FIFOs
444 * --------------------------------------------------------------------*/
e571f594 445static void snd_es1938_reset_fifo(struct es1938 *chip)
1da177e4
LT		 446{
447 outb(2, SLSB_REG(chip, RESET));
448 outb(0, SLSB_REG(chip, RESET));
449}
450
e571f594 451static struct snd_ratnum clocks[2] = {
1da177e4
LT		 452 {
453 .num = 793800,
454 .den_min = 1,
455 .den_max = 128,
456 .den_step = 1,
457 },
458 {
459 .num = 768000,
460 .den_min = 1,
461 .den_max = 128,
462 .den_step = 1,
463 }
464};
465
e571f594 466static struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
1da177e4
LT		 467 .nrats = 2,
468 .rats = clocks,
469};
470
471
e571f594
TI		 472static void snd_es1938_rate_set(struct es1938 *chip,
473 struct snd_pcm_substream *substream,
1da177e4
LT		 474 int mode)
475{
476 unsigned int bits, div0;
e571f594 477 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 478 if (runtime->rate_num == clocks[0].num)
479 bits = 128 - runtime->rate_den;
480 else
481 bits = 256 - runtime->rate_den;
482
483 /* set filter register */
484 div0 = 256 - 7160000*20/(8*82*runtime->rate);
485
486 if (mode == DAC2) {
487 snd_es1938_mixer_write(chip, 0x70, bits);
488 snd_es1938_mixer_write(chip, 0x72, div0);
489 } else {
490 snd_es1938_write(chip, 0xA1, bits);
491 snd_es1938_write(chip, 0xA2, div0);
492 }
493}
494
495/* --------------------------------------------------------------------
496 * Configure Solo1 builtin DMA Controller
497 * --------------------------------------------------------------------*/
498
e571f594 499static void snd_es1938_playback1_setdma(struct es1938 *chip)
1da177e4
LT		 500{
501 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
502 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
503 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
504 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
505}
506
e571f594 507static void snd_es1938_playback2_setdma(struct es1938 *chip)
1da177e4
LT		 508{
509 /* Enable DMA controller */
510 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
511 /* 1. Master reset */
512 outb(0, SLDM_REG(chip, DMACLEAR));
513 /* 2. Mask DMA */
514 outb(1, SLDM_REG(chip, DMAMASK));
515 outb(0x18, SLDM_REG(chip, DMAMODE));
516 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
517 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
518 /* 3. Unmask DMA */
519 outb(0, SLDM_REG(chip, DMAMASK));
520}
521
e571f594 522static void snd_es1938_capture_setdma(struct es1938 *chip)
1da177e4
LT		 523{
524 /* Enable DMA controller */
525 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
526 /* 1. Master reset */
527 outb(0, SLDM_REG(chip, DMACLEAR));
528 /* 2. Mask DMA */
529 outb(1, SLDM_REG(chip, DMAMASK));
530 outb(0x14, SLDM_REG(chip, DMAMODE));
531 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
19e2e3c3 532 chip->last_capture_dmaaddr = chip->dma1_start;
1da177e4
LT		 533 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
534 /* 3. Unmask DMA */
535 outb(0, SLDM_REG(chip, DMAMASK));
536}
537
538/* ----------------------------------------------------------------------
539 *
540 * *** PCM part ***
541 */
542
e571f594 543static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 544 int cmd)
545{
e571f594 546 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 547 int val;
548 switch (cmd) {
549 case SNDRV_PCM_TRIGGER_START:
93b9f426 550 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 551 val = 0x0f;
552 chip->active |= ADC1;
553 break;
554 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 555 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 556 val = 0x00;
557 chip->active &= ~ADC1;
558 break;
559 default:
560 return -EINVAL;
561 }
562 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
563 return 0;
564}
565
e571f594 566static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 567 int cmd)
568{
e571f594 569 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 570 switch (cmd) {
571 case SNDRV_PCM_TRIGGER_START:
93b9f426 572 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 573 /* According to the documentation this should be:
574 0x13 but that value may randomly swap stereo channels */
575 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
576 udelay(10);
577 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
578 /* This two stage init gives the FIFO -> DAC connection time to
579 * settle before first data from DMA flows in. This should ensure
580 * no swapping of stereo channels. Report a bug if otherwise :-) */
581 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
582 chip->active |= DAC2;
583 break;
584 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 585 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 586 outb(0, SLIO_REG(chip, AUDIO2MODE));
587 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
588 chip->active &= ~DAC2;
589 break;
590 default:
591 return -EINVAL;
592 }
593 return 0;
594}
595
e571f594 596static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 597 int cmd)
598{
e571f594 599 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 600 int val;
601 switch (cmd) {
602 case SNDRV_PCM_TRIGGER_START:
93b9f426 603 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 604 val = 5;
605 chip->active |= DAC1;
606 break;
607 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 608 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 609 val = 0;
610 chip->active &= ~DAC1;
611 break;
612 default:
613 return -EINVAL;
614 }
615 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
616 return 0;
617}
618
e571f594 619static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 620 int cmd)
621{
622 switch (substream->number) {
623 case 0:
624 return snd_es1938_playback1_trigger(substream, cmd);
625 case 1:
626 return snd_es1938_playback2_trigger(substream, cmd);
627 }
628 snd_BUG();
629 return -EINVAL;
630}
631
632/* --------------------------------------------------------------------
633 * First channel for Extended Mode Audio 1 ADC Operation
634 * --------------------------------------------------------------------*/
e571f594 635static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 636{
e571f594
TI		 637 struct es1938 *chip = snd_pcm_substream_chip(substream);
638 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 639 int u, is8, mono;
640 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
641 unsigned int count = snd_pcm_lib_period_bytes(substream);
642
643 chip->dma1_size = size;
644 chip->dma1_start = runtime->dma_addr;
645
646 mono = (runtime->channels > 1) ? 0 : 1;
647 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
648 u = snd_pcm_format_unsigned(runtime->format);
649
650 chip->dma1_shift = 2 - mono - is8;
651
652 snd_es1938_reset_fifo(chip);
653
654 /* program type */
655 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
656
657 /* set clock and counters */
658 snd_es1938_rate_set(chip, substream, ADC1);
659
660 count = 0x10000 - count;
661 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
662 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
663
664 /* initialize and configure ADC */
665 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
666 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
667 (u ? 0x00 : 0x20) |
668 (is8 ? 0x00 : 0x04) |
669 (mono ? 0x40 : 0x08));
670
671 // snd_es1938_reset_fifo(chip);
672
673 /* 11. configure system interrupt controller and DMA controller */
674 snd_es1938_capture_setdma(chip);
675
676 return 0;
677}
678
679
680/* ------------------------------------------------------------------------------
681 * Second Audio channel DAC Operation
682 * ------------------------------------------------------------------------------*/
e571f594 683static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
1da177e4 684{
e571f594
TI		 685 struct es1938 *chip = snd_pcm_substream_chip(substream);
686 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 687 int u, is8, mono;
688 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
689 unsigned int count = snd_pcm_lib_period_bytes(substream);
690
691 chip->dma2_size = size;
692 chip->dma2_start = runtime->dma_addr;
693
694 mono = (runtime->channels > 1) ? 0 : 1;
695 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
696 u = snd_pcm_format_unsigned(runtime->format);
697
698 chip->dma2_shift = 2 - mono - is8;
699
700 snd_es1938_reset_fifo(chip);
701
702 /* set clock and counters */
703 snd_es1938_rate_set(chip, substream, DAC2);
704
705 count >>= 1;
706 count = 0x10000 - count;
707 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
708 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
709
710 /* initialize and configure Audio 2 DAC */
e571f594
TI		 711 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
712 (mono ? 0 : 2) | (is8 ? 0 : 1));
1da177e4
LT		 713
714 /* program DMA */
715 snd_es1938_playback1_setdma(chip);
716
717 return 0;
718}
719
e571f594 720static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
1da177e4 721{
e571f594
TI		 722 struct es1938 *chip = snd_pcm_substream_chip(substream);
723 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 724 int u, is8, mono;
725 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
726 unsigned int count = snd_pcm_lib_period_bytes(substream);
727
728 chip->dma1_size = size;
729 chip->dma1_start = runtime->dma_addr;
730
731 mono = (runtime->channels > 1) ? 0 : 1;
732 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
733 u = snd_pcm_format_unsigned(runtime->format);
734
735 chip->dma1_shift = 2 - mono - is8;
736
737 count = 0x10000 - count;
738
739 /* reset */
740 snd_es1938_reset_fifo(chip);
741
742 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
743
744 /* set clock and counters */
745 snd_es1938_rate_set(chip, substream, DAC1);
746 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
747 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
748
749 /* initialized and configure DAC */
750 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
751 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
752 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
753 0x90 | (mono ? 0x40 : 0x08) |
754 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
755
756 /* program DMA */
757 snd_es1938_playback2_setdma(chip);
758
759 return 0;
760}
761
e571f594 762static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
1da177e4
LT		 763{
764 switch (substream->number) {
765 case 0:
766 return snd_es1938_playback1_prepare(substream);
767 case 1:
768 return snd_es1938_playback2_prepare(substream);
769 }
770 snd_BUG();
771 return -EINVAL;
772}
773
19e2e3c3
HL		 774/* during the incrementing of dma counters the DMA register reads sometimes
775 returns garbage. To ensure a valid hw pointer, the following checks which
776 should be very unlikely to fail are used:
777 - is the current DMA address in the valid DMA range ?
778 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
779 One can argue this could differ by one byte depending on which register is
780 updated first, so the implementation below allows for that.
781*/
e571f594 782static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 783{
e571f594 784 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4 785 size_t ptr;
19e2e3c3 786#if 0
1da177e4 787 size_t old, new;
1da177e4
LT		 788 /* This stuff is *needed*, don't ask why - AB */
789 old = inw(SLDM_REG(chip, DMACOUNT));
790 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
791 old = new;
792 ptr = chip->dma1_size - 1 - new;
793#else
19e2e3c3
HL		 794 size_t count;
795 unsigned int diff;
796
797 ptr = inl(SLDM_REG(chip, DMAADDR));
798 count = inw(SLDM_REG(chip, DMACOUNT));
799 diff = chip->dma1_start + chip->dma1_size - ptr - count;
800
801 if (diff > 3 || ptr < chip->dma1_start
802 || ptr >= chip->dma1_start+chip->dma1_size)
803 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
804 else
805 chip->last_capture_dmaaddr = ptr; /* good, remember it */
806
807 ptr -= chip->dma1_start;
1da177e4
LT		 808#endif
809 return ptr >> chip->dma1_shift;
810}
811
e571f594 812static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
1da177e4 813{
e571f594 814 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 815 size_t ptr;
816#if 1
817 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
818#else
819 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
820#endif
821 return ptr >> chip->dma2_shift;
822}
823
e571f594 824static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
1da177e4 825{
e571f594 826 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 827 size_t ptr;
828 size_t old, new;
829#if 1
830 /* This stuff is *needed*, don't ask why - AB */
831 old = inw(SLDM_REG(chip, DMACOUNT));
832 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
833 old = new;
834 ptr = chip->dma1_size - 1 - new;
835#else
836 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
837#endif
838 return ptr >> chip->dma1_shift;
839}
840
e571f594 841static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
1da177e4
LT		 842{
843 switch (substream->number) {
844 case 0:
845 return snd_es1938_playback1_pointer(substream);
846 case 1:
847 return snd_es1938_playback2_pointer(substream);
848 }
849 snd_BUG();
850 return -EINVAL;
851}
852
e571f594 853static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
1da177e4
LT		 854 int channel,
855 snd_pcm_uframes_t pos,
856 void __user *dst,
857 snd_pcm_uframes_t count)
858{
e571f594
TI		 859 struct snd_pcm_runtime *runtime = substream->runtime;
860 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 861 pos <<= chip->dma1_shift;
862 count <<= chip->dma1_shift;
da3cec35
TI		 863 if (snd_BUG_ON(pos + count > chip->dma1_size))
864 return -EINVAL;
1da177e4
LT		 865 if (pos + count < chip->dma1_size) {
866 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
867 return -EFAULT;
868 } else {
869 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
870 return -EFAULT;
871 if (put_user(runtime->dma_area[0], ((unsigned char __user *)dst) + count - 1))
872 return -EFAULT;
873 }
874 return 0;
875}
876
877/*
878 * buffer management
879 */
e571f594
TI		 880static int snd_es1938_pcm_hw_params(struct snd_pcm_substream *substream,
881 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 882
883{
884 int err;
885
886 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
887 return err;
888 return 0;
889}
890
e571f594 891static int snd_es1938_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 892{
893 return snd_pcm_lib_free_pages(substream);
894}
895
896/* ----------------------------------------------------------------------
897 * Audio1 Capture (ADC)
898 * ----------------------------------------------------------------------*/
e571f594 899static struct snd_pcm_hardware snd_es1938_capture =
1da177e4
LT		 900{
901 .info = (SNDRV_PCM_INFO_INTERLEAVED |
902 SNDRV_PCM_INFO_BLOCK_TRANSFER),
e571f594
TI		 903 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
904 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 905 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
906 .rate_min = 6000,
907 .rate_max = 48000,
908 .channels_min = 1,
909 .channels_max = 2,
910 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
911 .period_bytes_min = 64,
912 .period_bytes_max = 0x8000,
913 .periods_min = 1,
914 .periods_max = 1024,
915 .fifo_size = 256,
916};
917
918/* -----------------------------------------------------------------------
919 * Audio2 Playback (DAC)
920 * -----------------------------------------------------------------------*/
e571f594 921static struct snd_pcm_hardware snd_es1938_playback =
1da177e4
LT		 922{
923 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
924 SNDRV_PCM_INFO_BLOCK_TRANSFER |
925 SNDRV_PCM_INFO_MMAP_VALID),
e571f594
TI		 926 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
927 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 928 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
929 .rate_min = 6000,
930 .rate_max = 48000,
931 .channels_min = 1,
932 .channels_max = 2,
933 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
934 .period_bytes_min = 64,
935 .period_bytes_max = 0x8000,
936 .periods_min = 1,
937 .periods_max = 1024,
938 .fifo_size = 256,
939};
940
e571f594 941static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
1da177e4 942{
e571f594
TI		 943 struct es1938 *chip = snd_pcm_substream_chip(substream);
944 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 945
946 if (chip->playback2_substream)
947 return -EAGAIN;
948 chip->capture_substream = substream;
949 runtime->hw = snd_es1938_capture;
950 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
951 &hw_constraints_clocks);
952 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
953 return 0;
954}
955
e571f594 956static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
1da177e4 957{
e571f594
TI		 958 struct es1938 *chip = snd_pcm_substream_chip(substream);
959 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 960
961 switch (substream->number) {
962 case 0:
963 chip->playback1_substream = substream;
964 break;
965 case 1:
966 if (chip->capture_substream)
967 return -EAGAIN;
968 chip->playback2_substream = substream;
969 break;
970 default:
971 snd_BUG();
972 return -EINVAL;
973 }
974 runtime->hw = snd_es1938_playback;
975 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
976 &hw_constraints_clocks);
977 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
978 return 0;
979}
980
e571f594 981static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
1da177e4 982{
e571f594 983 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 984
985 chip->capture_substream = NULL;
986 return 0;
987}
988
e571f594 989static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
1da177e4 990{
e571f594 991 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 992
993 switch (substream->number) {
994 case 0:
995 chip->playback1_substream = NULL;
996 break;
997 case 1:
998 chip->playback2_substream = NULL;
999 break;
1000 default:
1001 snd_BUG();
1002 return -EINVAL;
1003 }
1004 return 0;
1005}
1006
e571f594 1007static struct snd_pcm_ops snd_es1938_playback_ops = {
1da177e4
LT		 1008 .open = snd_es1938_playback_open,
1009 .close = snd_es1938_playback_close,
1010 .ioctl = snd_pcm_lib_ioctl,
1011 .hw_params = snd_es1938_pcm_hw_params,
1012 .hw_free = snd_es1938_pcm_hw_free,
1013 .prepare = snd_es1938_playback_prepare,
1014 .trigger = snd_es1938_playback_trigger,
1015 .pointer = snd_es1938_playback_pointer,
1016};
1017
e571f594 1018static struct snd_pcm_ops snd_es1938_capture_ops = {
1da177e4
LT		 1019 .open = snd_es1938_capture_open,
1020 .close = snd_es1938_capture_close,
1021 .ioctl = snd_pcm_lib_ioctl,
1022 .hw_params = snd_es1938_pcm_hw_params,
1023 .hw_free = snd_es1938_pcm_hw_free,
1024 .prepare = snd_es1938_capture_prepare,
1025 .trigger = snd_es1938_capture_trigger,
1026 .pointer = snd_es1938_capture_pointer,
1027 .copy = snd_es1938_capture_copy,
1028};
1029
e23e7a14 1030static int snd_es1938_new_pcm(struct es1938 *chip, int device)
1da177e4 1031{
e571f594 1032 struct snd_pcm *pcm;
1da177e4
LT		 1033 int err;
1034
1035 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
1036 return err;
1037 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1038 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1039
1040 pcm->private_data = chip;
1da177e4
LT		 1041 pcm->info_flags = 0;
1042 strcpy(pcm->name, "ESS Solo-1");
1043
1044 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1045 snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1046
1047 chip->pcm = pcm;
1048 return 0;
1049}
1050
1051/* -------------------------------------------------------------------
1052 *
1053 * *** Mixer part ***
1054 */
1055
e571f594
TI		 1056static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1057 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1058{
1059 static char *texts[8] = {
1060 "Mic", "Mic Master", "CD", "AOUT",
1061 "Mic1", "Mix", "Line", "Master"
1062 };
1063
1064 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1065 uinfo->count = 1;
1066 uinfo->value.enumerated.items = 8;
1067 if (uinfo->value.enumerated.item > 7)
1068 uinfo->value.enumerated.item = 7;
1069 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1070 return 0;
1071}
1072
e571f594
TI		 1073static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1074 struct snd_ctl_elem_value *ucontrol)
1da177e4 1075{
e571f594 1076 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1077 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1078 return 0;
1079}
1080
e571f594
TI		 1081static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1082 struct snd_ctl_elem_value *ucontrol)
1da177e4 1083{
e571f594 1084 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1085 unsigned char val = ucontrol->value.enumerated.item[0];
1086
1087 if (val > 7)
1088 return -EINVAL;
1089 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1090}
1091
a5ce8890 1092#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1da177e4 1093
e571f594
TI		 1094static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1095 struct snd_ctl_elem_value *ucontrol)
1da177e4 1096{
e571f594 1097 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1098 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1099 ucontrol->value.integer.value[0] = !!(val & 8);
1100 return 0;
1101}
1102
e571f594
TI		 1103static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1104 struct snd_ctl_elem_value *ucontrol)
1da177e4 1105{
e571f594 1106 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1107 unsigned char oval, nval;
1108 int change;
1109 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1110 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1111 change = nval != oval;
1112 if (change) {
1113 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1114 snd_es1938_mixer_write(chip, 0x50, nval);
1115 }
1116 return change;
1117}
1118
e571f594
TI		 1119static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1120 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1121{
1122 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1123 uinfo->count = 2;
1124 uinfo->value.integer.min = 0;
1125 uinfo->value.integer.max = 63;
1126 return 0;
1127}
1128
e571f594
TI		 1129static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1130 struct snd_ctl_elem_value *ucontrol)
1da177e4 1131{
e571f594 1132 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1133 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1134 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1135 return 0;
1136}
1137
a5ce8890 1138#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1da177e4 1139
e571f594
TI		 1140static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1141 struct snd_ctl_elem_value *ucontrol)
1da177e4 1142{
e571f594 1143 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1144 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1145 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1146 return 0;
1147}
1148
e571f594 1149static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1da177e4 1150{
e571f594 1151 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1152 chip->master_volume = NULL;
1153 chip->master_switch = NULL;
1154 chip->hw_volume = NULL;
1155 chip->hw_switch = NULL;
1156}
1157
e571f594 1158static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1da177e4
LT		 1159 unsigned char mask, unsigned char val)
1160{
1161 if (reg < 0xa0)
1162 return snd_es1938_mixer_bits(chip, reg, mask, val);
1163 else
1164 return snd_es1938_bits(chip, reg, mask, val);
1165}
1166
e571f594 1167static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 1168{
1169 if (reg < 0xa0)
1170 return snd_es1938_mixer_read(chip, reg);
1171 else
1172 return snd_es1938_read(chip, reg);
1173}
1174
0b593972
TI		 1175#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1176{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1177 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1178 .name = xname, .index = xindex, \
1179 .info = snd_es1938_info_single, \
1180 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1181 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1182 .tlv = { .p = xtlv } }
1da177e4
LT		 1183#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1184{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1185 .info = snd_es1938_info_single, \
1186 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1187 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1188
e571f594
TI		 1189static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1190 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1191{
1192 int mask = (kcontrol->private_value >> 16) & 0xff;
1193
1194 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1195 uinfo->count = 1;
1196 uinfo->value.integer.min = 0;
1197 uinfo->value.integer.max = mask;
1198 return 0;
1199}
1200
e571f594
TI		 1201static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1202 struct snd_ctl_elem_value *ucontrol)
1da177e4 1203{
e571f594 1204 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1205 int reg = kcontrol->private_value & 0xff;
1206 int shift = (kcontrol->private_value >> 8) & 0xff;
1207 int mask = (kcontrol->private_value >> 16) & 0xff;
1208 int invert = (kcontrol->private_value >> 24) & 0xff;
1209 int val;
1210
1211 val = snd_es1938_reg_read(chip, reg);
1212 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1213 if (invert)
1214 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1215 return 0;
1216}
1217
e571f594
TI		 1218static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1219 struct snd_ctl_elem_value *ucontrol)
1da177e4 1220{
e571f594 1221 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1222 int reg = kcontrol->private_value & 0xff;
1223 int shift = (kcontrol->private_value >> 8) & 0xff;
1224 int mask = (kcontrol->private_value >> 16) & 0xff;
1225 int invert = (kcontrol->private_value >> 24) & 0xff;
1226 unsigned char val;
1227
1228 val = (ucontrol->value.integer.value[0] & mask);
1229 if (invert)
1230 val = mask - val;
1231 mask <<= shift;
1232 val <<= shift;
1233 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1234}
1235
0b593972
TI		 1236#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1237{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1238 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1239 .name = xname, .index = xindex, \
1240 .info = snd_es1938_info_double, \
1241 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1242 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1243 .tlv = { .p = xtlv } }
1da177e4
LT		 1244#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1245{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1246 .info = snd_es1938_info_double, \
1247 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1248 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1249
e571f594
TI		 1250static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1251 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1252{
1253 int mask = (kcontrol->private_value >> 24) & 0xff;
1254
1255 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1256 uinfo->count = 2;
1257 uinfo->value.integer.min = 0;
1258 uinfo->value.integer.max = mask;
1259 return 0;
1260}
1261
e571f594
TI		 1262static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1263 struct snd_ctl_elem_value *ucontrol)
1da177e4 1264{
e571f594 1265 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1266 int left_reg = kcontrol->private_value & 0xff;
1267 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1268 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1269 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1270 int mask = (kcontrol->private_value >> 24) & 0xff;
1271 int invert = (kcontrol->private_value >> 22) & 1;
1272 unsigned char left, right;
1273
1274 left = snd_es1938_reg_read(chip, left_reg);
1275 if (left_reg != right_reg)
1276 right = snd_es1938_reg_read(chip, right_reg);
1277 else
1278 right = left;
1279 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1280 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1281 if (invert) {
1282 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1283 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1284 }
1285 return 0;
1286}
1287
e571f594
TI		 1288static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1289 struct snd_ctl_elem_value *ucontrol)
1da177e4 1290{
e571f594 1291 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1292 int left_reg = kcontrol->private_value & 0xff;
1293 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1294 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1295 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1296 int mask = (kcontrol->private_value >> 24) & 0xff;
1297 int invert = (kcontrol->private_value >> 22) & 1;
1298 int change;
1299 unsigned char val1, val2, mask1, mask2;
1300
1301 val1 = ucontrol->value.integer.value[0] & mask;
1302 val2 = ucontrol->value.integer.value[1] & mask;
1303 if (invert) {
1304 val1 = mask - val1;
1305 val2 = mask - val2;
1306 }
1307 val1 <<= shift_left;
1308 val2 <<= shift_right;
1309 mask1 = mask << shift_left;
1310 mask2 = mask << shift_right;
1311 if (left_reg != right_reg) {
1312 change = 0;
1313 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1314 change = 1;
1315 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1316 change = 1;
1317 } else {
1318 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1319 val1 | val2) != (val1 | val2));
1320 }
1321 return change;
1322}
1323
093eef41 1324static const DECLARE_TLV_DB_RANGE(db_scale_master,
0b593972
TI		 1325 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1326 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
093eef41 1327);
0b593972 1328
093eef41 1329static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
0b593972
TI		 1330 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1331 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
093eef41 1332);
0b593972 1333
093eef41 1334static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
0b593972
TI		 1335 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1336 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
093eef41 1337);
0b593972 1338
093eef41 1339static const DECLARE_TLV_DB_RANGE(db_scale_mic,
0b593972
TI		 1340 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1341 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
093eef41 1342);
0b593972 1343
093eef41 1344static const DECLARE_TLV_DB_RANGE(db_scale_line,
0b593972
TI		 1345 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1346 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
093eef41 1347);
0b593972 1348
0cb29ea0 1349static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
0b593972 1350
e571f594 1351static struct snd_kcontrol_new snd_es1938_controls[] = {
0b593972
TI		 1352ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1353 db_scale_master),
1da177e4
LT		 1354ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1355{
1356 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1357 .name = "Hardware Master Playback Volume",
1358 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1359 .info = snd_es1938_info_hw_volume,
1360 .get = snd_es1938_get_hw_volume,
1361},
1362{
1363 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
dbf91dd4 1364 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
0b593972 1365 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1366 .name = "Hardware Master Playback Switch",
1da177e4
LT		 1367 .info = snd_es1938_info_hw_switch,
1368 .get = snd_es1938_get_hw_switch,
0b593972 1369 .tlv = { .p = db_scale_master },
1da177e4
LT		 1370},
1371ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
0b593972
TI		 1372ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1373 db_scale_line),
1da177e4 1374ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
0b593972
TI		 1375ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1376 db_scale_mic),
1377ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1378 db_scale_line),
1379ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1380 db_scale_mic),
1381ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1382 db_scale_line),
1383ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1384 db_scale_capture),
d355c82a 1385ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1da177e4
LT		 1386ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1387ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1388{
1389 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1390 .name = "Capture Source",
1391 .info = snd_es1938_info_mux,
1392 .get = snd_es1938_get_mux,
1393 .put = snd_es1938_put_mux,
1394},
0b593972
TI		 1395ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1396 db_scale_line),
1397ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1398 db_scale_audio2),
1399ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1400 db_scale_mic),
1401ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1402 db_scale_line),
1403ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1404 db_scale_mic),
1405ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1406 db_scale_line),
1407ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1408 db_scale_line),
1409ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1410 db_scale_line),
1411ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1412 db_scale_audio2),
1413ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1414 db_scale_audio1),
1da177e4
LT		 1415ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1416{
1417 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1418 .name = "3D Control - Switch",
1419 .info = snd_es1938_info_spatializer_enable,
1420 .get = snd_es1938_get_spatializer_enable,
1421 .put = snd_es1938_put_spatializer_enable,
1422},
1423ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1424};
1425
1426
1427/* ---------------------------------------------------------------------------- */
1428/* ---------------------------------------------------------------------------- */
1429
1430/*
1431 * initialize the chip - used by resume callback, too
1432 */
e571f594 1433static void snd_es1938_chip_init(struct es1938 *chip)
1da177e4
LT		 1434{
1435 /* reset chip */
1436 snd_es1938_reset(chip);
1437
1438 /* configure native mode */
1439
1440 /* enable bus master */
1441 pci_set_master(chip->pci);
1442
1443 /* disable legacy audio */
1444 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1445
1446 /* set DDMA base */
1447 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1448
1449 /* set DMA/IRQ policy */
1450 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1451
1452 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1453 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1454
1455 /* reset DMA */
1456 outb(0, SLDM_REG(chip, DMACLEAR));
1457}
1458
c7561cd8 1459#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 1460/*
1461 * PM support
1462 */
1463
1464static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1465 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1466 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1467 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1468 0xa8, 0xb4,
1469};
1470
1471
68cb2b55 1472static int es1938_suspend(struct device *dev)
1da177e4 1473{
68cb2b55
TI		 1474 struct pci_dev *pci = to_pci_dev(dev);
1475 struct snd_card *card = dev_get_drvdata(dev);
b34a580e 1476 struct es1938 *chip = card->private_data;
1da177e4
LT		 1477 unsigned char *s, *d;
1478
b34a580e 1479 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 1480 snd_pcm_suspend_all(chip->pcm);
1481
1482 /* save mixer-related registers */
1483 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1484 *d = snd_es1938_reg_read(chip, *s);
1485
1486 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
30b35399 1487 if (chip->irq >= 0) {
b34a580e 1488 free_irq(chip->irq, chip);
30b35399
TI		 1489 chip->irq = -1;
1490 }
b34a580e
TI		 1491 pci_disable_device(pci);
1492 pci_save_state(pci);
68cb2b55 1493 pci_set_power_state(pci, PCI_D3hot);
1da177e4
LT		 1494 return 0;
1495}
1496
68cb2b55 1497static int es1938_resume(struct device *dev)
1da177e4 1498{
68cb2b55
TI		 1499 struct pci_dev *pci = to_pci_dev(dev);
1500 struct snd_card *card = dev_get_drvdata(dev);
b34a580e 1501 struct es1938 *chip = card->private_data;
1da177e4
LT		 1502 unsigned char *s, *d;
1503
30b35399 1504 pci_set_power_state(pci, PCI_D0);
b34a580e 1505 pci_restore_state(pci);
30b35399
TI		 1506 if (pci_enable_device(pci) < 0) {
1507 printk(KERN_ERR "es1938: pci_enable_device failed, "
1508 "disabling device\n");
1509 snd_card_disconnect(card);
1510 return -EIO;
1511 }
1512
1513 if (request_irq(pci->irq, snd_es1938_interrupt,
934c2b6d 1514 IRQF_SHARED, KBUILD_MODNAME, chip)) {
30b35399
TI		 1515 printk(KERN_ERR "es1938: unable to grab IRQ %d, "
1516 "disabling device\n", pci->irq);
1517 snd_card_disconnect(card);
1518 return -EIO;
1519 }
b34a580e 1520 chip->irq = pci->irq;
1da177e4
LT		 1521 snd_es1938_chip_init(chip);
1522
1523 /* restore mixer-related registers */
1524 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1525 if (*s < 0xa0)
1526 snd_es1938_mixer_write(chip, *s, *d);
1527 else
1528 snd_es1938_write(chip, *s, *d);
1529 }
1530
b34a580e 1531 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 1532 return 0;
1533}
68cb2b55
TI		 1534
1535static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1536#define ES1938_PM_OPS &es1938_pm
1537#else
1538#define ES1938_PM_OPS NULL
c7561cd8 1539#endif /* CONFIG_PM_SLEEP */
1da177e4
LT		 1540
1541#ifdef SUPPORT_JOYSTICK
e23e7a14 1542static int snd_es1938_create_gameport(struct es1938 *chip)
1da177e4
LT		 1543{
1544 struct gameport *gp;
1545
1546 chip->gameport = gp = gameport_allocate_port();
1547 if (!gp) {
1548 printk(KERN_ERR "es1938: cannot allocate memory for gameport\n");
1549 return -ENOMEM;
1550 }
1551
1552 gameport_set_name(gp, "ES1938");
1553 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1554 gameport_set_dev_parent(gp, &chip->pci->dev);
1555 gp->io = chip->game_port;
1556
1557 gameport_register_port(gp);
1558
1559 return 0;
1560}
1561
e571f594 1562static void snd_es1938_free_gameport(struct es1938 *chip)
1da177e4
LT		 1563{
1564 if (chip->gameport) {
1565 gameport_unregister_port(chip->gameport);
1566 chip->gameport = NULL;
1567 }
1568}
1569#else
e571f594
TI		 1570static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1571static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1da177e4
LT		 1572#endif /* SUPPORT_JOYSTICK */
1573
e571f594 1574static int snd_es1938_free(struct es1938 *chip)
1da177e4
LT		 1575{
1576 /* disable irqs */
1577 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1578 if (chip->rmidi)
1579 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1580
1581 snd_es1938_free_gameport(chip);
1582
f000fd80 1583 if (chip->irq >= 0)
e571f594 1584 free_irq(chip->irq, chip);
1da177e4
LT		 1585 pci_release_regions(chip->pci);
1586 pci_disable_device(chip->pci);
1587 kfree(chip);
1588 return 0;
1589}
1590
e571f594 1591static int snd_es1938_dev_free(struct snd_device *device)
1da177e4 1592{
e571f594 1593 struct es1938 *chip = device->device_data;
1da177e4
LT		 1594 return snd_es1938_free(chip);
1595}
1596
e23e7a14
BP		 1597static int snd_es1938_create(struct snd_card *card,
1598 struct pci_dev *pci,
1599 struct es1938 **rchip)
1da177e4 1600{
e571f594 1601 struct es1938 *chip;
1da177e4 1602 int err;
e571f594 1603 static struct snd_device_ops ops = {
1da177e4
LT		 1604 .dev_free = snd_es1938_dev_free,
1605 };
1606
1607 *rchip = NULL;
1608
1609 /* enable PCI device */
1610 if ((err = pci_enable_device(pci)) < 0)
1611 return err;
1612 /* check, if we can restrict PCI DMA transfers to 24 bits */
2f4f27d4
YH		 1613 if (pci_set_dma_mask(pci, DMA_BIT_MASK(24)) < 0 ||
1614 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(24)) < 0) {
99b359ba 1615 snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
1da177e4
LT		 1616 pci_disable_device(pci);
1617 return -ENXIO;
1618 }
1619
e560d8d8 1620 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1621 if (chip == NULL) {
1622 pci_disable_device(pci);
1623 return -ENOMEM;
1624 }
1625 spin_lock_init(&chip->reg_lock);
1626 spin_lock_init(&chip->mixer_lock);
1627 chip->card = card;
1628 chip->pci = pci;
30b35399 1629 chip->irq = -1;
1da177e4
LT		 1630 if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
1631 kfree(chip);
1632 pci_disable_device(pci);
1633 return err;
1634 }
1635 chip->io_port = pci_resource_start(pci, 0);
1636 chip->sb_port = pci_resource_start(pci, 1);
1637 chip->vc_port = pci_resource_start(pci, 2);
1638 chip->mpu_port = pci_resource_start(pci, 3);
1639 chip->game_port = pci_resource_start(pci, 4);
437a5a46 1640 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
934c2b6d 1641 KBUILD_MODNAME, chip)) {
99b359ba 1642 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 1643 snd_es1938_free(chip);
1644 return -EBUSY;
1645 }
1646 chip->irq = pci->irq;
1647#ifdef ES1938_DDEBUG
99b359ba 1648 snd_printk(KERN_DEBUG "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1da177e4
LT		 1649 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1650#endif
1651
1652 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1653
1654 snd_es1938_chip_init(chip);
1655
1da177e4
LT		 1656 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1657 snd_es1938_free(chip);
1658 return err;
1659 }
1660
1661 snd_card_set_dev(card, &pci->dev);
1662
1663 *rchip = chip;
1664 return 0;
1665}
1666
1667/* --------------------------------------------------------------------
1668 * Interrupt handler
1669 * -------------------------------------------------------------------- */
7d12e780 1670static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1da177e4 1671{
e571f594 1672 struct es1938 *chip = dev_id;
1da177e4
LT		 1673 unsigned char status, audiostatus;
1674 int handled = 0;
1675
1676 status = inb(SLIO_REG(chip, IRQCONTROL));
1677#if 0
ee419653 1678 printk(KERN_DEBUG "Es1938debug - interrupt status: =0x%x\n", status);
1da177e4
LT		 1679#endif
1680
1681 /* AUDIO 1 */
1682 if (status & 0x10) {
1683#if 0
ee419653
TI		 1684 printk(KERN_DEBUG
1685 "Es1938debug - AUDIO channel 1 interrupt\n");
1686 printk(KERN_DEBUG
1687 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
e571f594 1688 inw(SLDM_REG(chip, DMACOUNT)));
ee419653
TI		 1689 printk(KERN_DEBUG
1690 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
e571f594 1691 inl(SLDM_REG(chip, DMAADDR)));
ee419653
TI		 1692 printk(KERN_DEBUG
1693 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
e571f594 1694 inl(SLDM_REG(chip, DMASTATUS)));
1da177e4
LT		 1695#endif
1696 /* clear irq */
1697 handled = 1;
1698 audiostatus = inb(SLSB_REG(chip, STATUS));
1699 if (chip->active & ADC1)
1700 snd_pcm_period_elapsed(chip->capture_substream);
1701 else if (chip->active & DAC1)
1702 snd_pcm_period_elapsed(chip->playback2_substream);
1703 }
1704
1705 /* AUDIO 2 */
1706 if (status & 0x20) {
1707#if 0
ee419653
TI		 1708 printk(KERN_DEBUG
1709 "Es1938debug - AUDIO channel 2 interrupt\n");
1710 printk(KERN_DEBUG
1711 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
e571f594 1712 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
ee419653
TI		 1713 printk(KERN_DEBUG
1714 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
e571f594 1715 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1da177e4
LT		 1716
1717#endif
1718 /* clear irq */
1719 handled = 1;
1720 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1721 if (chip->active & DAC2)
1722 snd_pcm_period_elapsed(chip->playback1_substream);
1723 }
1724
1725 /* Hardware volume */
1726 if (status & 0x40) {
1727 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1728 handled = 1;
1729 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1730 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1731 if (!split) {
e571f594
TI		 1732 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1733 &chip->master_switch->id);
1734 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1735 &chip->master_volume->id);
1da177e4
LT		 1736 }
1737 /* ack interrupt */
1738 snd_es1938_mixer_write(chip, 0x66, 0x00);
1739 }
1740
1741 /* MPU401 */
1742 if (status & 0x80) {
1743 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1744 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1745 // andreas@flying-snail.de
1746 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1747 if (chip->rmidi) {
1748 handled = 1;
7d12e780 1749 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 1750 }
1751 }
1752 return IRQ_RETVAL(handled);
1753}
1754
1755#define ES1938_DMA_SIZE 64
1756
e23e7a14 1757static int snd_es1938_mixer(struct es1938 *chip)
1da177e4 1758{
e571f594 1759 struct snd_card *card;
1da177e4
LT		 1760 unsigned int idx;
1761 int err;
1762
1763 card = chip->card;
1764
1765 strcpy(card->mixername, "ESS Solo-1");
1766
1767 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
e571f594 1768 struct snd_kcontrol *kctl;
1da177e4
LT		 1769 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1770 switch (idx) {
1771 case 0:
1772 chip->master_volume = kctl;
1773 kctl->private_free = snd_es1938_hwv_free;
1774 break;
1775 case 1:
1776 chip->master_switch = kctl;
1777 kctl->private_free = snd_es1938_hwv_free;
1778 break;
1779 case 2:
1780 chip->hw_volume = kctl;
1781 kctl->private_free = snd_es1938_hwv_free;
1782 break;
1783 case 3:
1784 chip->hw_switch = kctl;
1785 kctl->private_free = snd_es1938_hwv_free;
1786 break;
1787 }
1788 if ((err = snd_ctl_add(card, kctl)) < 0)
1789 return err;
1790 }
1791 return 0;
1792}
1793
1794
e23e7a14
BP		 1795static int snd_es1938_probe(struct pci_dev *pci,
1796 const struct pci_device_id *pci_id)
1da177e4
LT		 1797{
1798 static int dev;
e571f594
TI		 1799 struct snd_card *card;
1800 struct es1938 *chip;
1801 struct snd_opl3 *opl3;
1da177e4
LT		 1802 int idx, err;
1803
1804 if (dev >= SNDRV_CARDS)
1805 return -ENODEV;
1806 if (!enable[dev]) {
1807 dev++;
1808 return -ENOENT;
1809 }
1810
e58de7ba
TI		 1811 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
1812 if (err < 0)
1813 return err;
1da177e4
LT		 1814 for (idx = 0; idx < 5; idx++) {
1815 if (pci_resource_start(pci, idx) == 0 ||
1816 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
1817 snd_card_free(card);
1818 return -ENODEV;
1819 }
1820 }
1821 if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
1822 snd_card_free(card);
1823 return err;
1824 }
b34a580e 1825 card->private_data = chip;
1da177e4
LT		 1826
1827 strcpy(card->driver, "ES1938");
1828 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1829 sprintf(card->longname, "%s rev %i, irq %i",
1830 card->shortname,
1831 chip->revision,
1832 chip->irq);
1833
1834 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
1835 snd_card_free(card);
1836 return err;
1837 }
1838 if ((err = snd_es1938_mixer(chip)) < 0) {
1839 snd_card_free(card);
1840 return err;
1841 }
1842 if (snd_opl3_create(card,
1843 SLSB_REG(chip, FMLOWADDR),
1844 SLSB_REG(chip, FMHIGHADDR),
1845 OPL3_HW_OPL3, 1, &opl3) < 0) {
1846 printk(KERN_ERR "es1938: OPL3 not detected at 0x%lx\n",
1847 SLSB_REG(chip, FMLOWADDR));
1848 } else {
1849 if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
1850 snd_card_free(card);
1851 return err;
1852 }
1853 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1854 snd_card_free(card);
1855 return err;
1856 }
1857 }
1858 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
dba8b469
CL		 1859 chip->mpu_port,
1860 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1861 -1, &chip->rmidi) < 0) {
1da177e4
LT		 1862 printk(KERN_ERR "es1938: unable to initialize MPU-401\n");
1863 } else {
1864 // this line is vital for MIDI interrupt handling on ess-solo1
1865 // andreas@flying-snail.de
1866 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1867 }
1868
1869 snd_es1938_create_gameport(chip);
1870
1871 if ((err = snd_card_register(card)) < 0) {
1872 snd_card_free(card);
1873 return err;
1874 }
1875
1876 pci_set_drvdata(pci, card);
1877 dev++;
1878 return 0;
1879}
1880
e23e7a14 1881static void snd_es1938_remove(struct pci_dev *pci)
1da177e4
LT		 1882{
1883 snd_card_free(pci_get_drvdata(pci));
1884 pci_set_drvdata(pci, NULL);
1885}
1886
e9f66d9b 1887static struct pci_driver es1938_driver = {
3733e424 1888 .name = KBUILD_MODNAME,
1da177e4
LT		 1889 .id_table = snd_es1938_ids,
1890 .probe = snd_es1938_probe,
e23e7a14 1891 .remove = snd_es1938_remove,
68cb2b55
TI		 1892 .driver = {
1893 .pm = ES1938_PM_OPS,
1894 },
1da177e4
LT		 1895};
1896
e9f66d9b 1897module_pci_driver(es1938_driver);
kernel source for telekom puls (alcatel/mediatek)