[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / atmel / abdac.c

/*
 * Driver for the Atmel on-chip Audio Bitstream DAC (ABDAC)
 *
 * Copyright (C) 2006-2009 Atmel Corporation
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 */
#include <linux/clk.h>
#include <linux/bitmap.h>
#include <linux/dw_dmac.h>
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/io.h>

#include <sound/core.h>
#include <sound/initval.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/atmel-abdac.h>

/* DAC register offsets */
#define DAC_DATA                                0x0000
#define DAC_CTRL                                0x0008
#define DAC_INT_MASK                            0x000c
#define DAC_INT_EN                              0x0010
#define DAC_INT_DIS                             0x0014
#define DAC_INT_CLR                             0x0018
#define DAC_INT_STATUS                          0x001c

/* Bitfields in CTRL */
#define DAC_SWAP_OFFSET                         30
#define DAC_SWAP_SIZE                           1
#define DAC_EN_OFFSET                           31
#define DAC_EN_SIZE                             1

/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
#define DAC_UNDERRUN_OFFSET                     28
#define DAC_UNDERRUN_SIZE                       1
#define DAC_TX_READY_OFFSET                     29
#define DAC_TX_READY_SIZE                       1

/* Bit manipulation macros */
#define DAC_BIT(name)					\
	(1 << DAC_##name##_OFFSET)
#define DAC_BF(name, value)				\
	(((value) & ((1 << DAC_##name##_SIZE) - 1))	\
	 << DAC_##name##_OFFSET)
#define DAC_BFEXT(name, value)				\
	(((value) >> DAC_##name##_OFFSET)		\
	 & ((1 << DAC_##name##_SIZE) - 1))
#define DAC_BFINS(name, value, old)			\
	(((old) & ~(((1 << DAC_##name##_SIZE) - 1)	\
		    << DAC_##name##_OFFSET))		\
	 | DAC_BF(name, value))

/* Register access macros */
#define dac_readl(port, reg)				\
	__raw_readl((port)->regs + DAC_##reg)
#define dac_writel(port, reg, value)			\
	__raw_writel((value), (port)->regs + DAC_##reg)

/*
 * ABDAC supports a maximum of 6 different rates from a generic clock. The
 * generic clock has a power of two divider, which gives 6 steps from 192 kHz
 * to 5112 Hz.
 */
#define MAX_NUM_RATES	6
/* ALSA seems to use rates between 192000 Hz and 5112 Hz. */
#define RATE_MAX	192000
#define RATE_MIN	5112

enum {
	DMA_READY = 0,
};

struct atmel_abdac_dma {
	struct dma_chan		*chan;
	struct dw_cyclic_desc	*cdesc;
};

struct atmel_abdac {
	struct clk				*pclk;
	struct clk				*sample_clk;
	struct platform_device			*pdev;
	struct atmel_abdac_dma			dma;

	struct snd_pcm_hw_constraint_list	constraints_rates;
	struct snd_pcm_substream		*substream;
	struct snd_card				*card;
	struct snd_pcm				*pcm;

	void __iomem				*regs;
	unsigned long				flags;
	unsigned int				rates[MAX_NUM_RATES];
	unsigned int				rates_num;
	int					irq;
};

#define get_dac(card) ((struct atmel_abdac *)(card)->private_data)

/* This function is called by the DMA driver. */
static void atmel_abdac_dma_period_done(void *arg)
{
	struct atmel_abdac *dac = arg;
	snd_pcm_period_elapsed(dac->substream);
}

static int atmel_abdac_prepare_dma(struct atmel_abdac *dac,
		struct snd_pcm_substream *substream,
		enum dma_data_direction direction)
{
	struct dma_chan			*chan = dac->dma.chan;
	struct dw_cyclic_desc		*cdesc;
	struct snd_pcm_runtime		*runtime = substream->runtime;
	unsigned long			buffer_len, period_len;

	/*
	 * We don't do DMA on "complex" transfers, i.e. with
	 * non-halfword-aligned buffers or lengths.
	 */
	if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
		dev_dbg(&dac->pdev->dev, "too complex transfer\n");
		return -EINVAL;
	}

	buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
	period_len = frames_to_bytes(runtime, runtime->period_size);

	cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
			period_len, DMA_MEM_TO_DEV);
	if (IS_ERR(cdesc)) {
		dev_dbg(&dac->pdev->dev, "could not prepare cyclic DMA\n");
		return PTR_ERR(cdesc);
	}

	cdesc->period_callback = atmel_abdac_dma_period_done;
	cdesc->period_callback_param = dac;

	dac->dma.cdesc = cdesc;

	set_bit(DMA_READY, &dac->flags);

	return 0;
}

static struct snd_pcm_hardware atmel_abdac_hw = {
	.info			= (SNDRV_PCM_INFO_MMAP
				  | SNDRV_PCM_INFO_MMAP_VALID
				  | SNDRV_PCM_INFO_INTERLEAVED
				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
				  | SNDRV_PCM_INFO_RESUME
				  | SNDRV_PCM_INFO_PAUSE),
	.formats		= (SNDRV_PCM_FMTBIT_S16_BE),
	.rates			= (SNDRV_PCM_RATE_KNOT),
	.rate_min		= RATE_MIN,
	.rate_max		= RATE_MAX,
	.channels_min		= 2,
	.channels_max		= 2,
	.buffer_bytes_max	= 64 * 4096,
	.period_bytes_min	= 4096,
	.period_bytes_max	= 4096,
	.periods_min		= 6,
	.periods_max		= 64,
};

static int atmel_abdac_open(struct snd_pcm_substream *substream)
{
	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);

	dac->substream = substream;
	atmel_abdac_hw.rate_max = dac->rates[dac->rates_num - 1];
	atmel_abdac_hw.rate_min = dac->rates[0];
	substream->runtime->hw = atmel_abdac_hw;

	return snd_pcm_hw_constraint_list(substream->runtime, 0,
			SNDRV_PCM_HW_PARAM_RATE, &dac->constraints_rates);
}

static int atmel_abdac_close(struct snd_pcm_substream *substream)
{
	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
	dac->substream = NULL;
	return 0;
}

static int atmel_abdac_hw_params(struct snd_pcm_substream *substream,
		struct snd_pcm_hw_params *hw_params)
{
	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
	int retval;

	retval = snd_pcm_lib_malloc_pages(substream,
			params_buffer_bytes(hw_params));
	if (retval < 0)
		return retval;
	/* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
	if (retval == 1)
		if (test_and_clear_bit(DMA_READY, &dac->flags))
			dw_dma_cyclic_free(dac->dma.chan);

	return retval;
}

static int atmel_abdac_hw_free(struct snd_pcm_substream *substream)
{
	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
	if (test_and_clear_bit(DMA_READY, &dac->flags))
		dw_dma_cyclic_free(dac->dma.chan);
	return snd_pcm_lib_free_pages(substream);
}

static int atmel_abdac_prepare(struct snd_pcm_substream *substream)
{
	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
	int retval;

	retval = clk_set_rate(dac->sample_clk, 256 * substream->runtime->rate);
	if (retval)
		return retval;

	if (!test_bit(DMA_READY, &dac->flags))
		retval = atmel_abdac_prepare_dma(dac, substream, DMA_TO_DEVICE);

	return retval;
}

static int atmel_abdac_trigger(struct snd_pcm_substream *substream, int cmd)
{
	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
	int retval = 0;

	switch (cmd) {
	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
	case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
	case SNDRV_PCM_TRIGGER_START:
		clk_enable(dac->sample_clk);
		retval = dw_dma_cyclic_start(dac->dma.chan);
		if (retval)
			goto out;
		dac_writel(dac, CTRL, DAC_BIT(EN));
		break;
	case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
	case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
	case SNDRV_PCM_TRIGGER_STOP:
		dw_dma_cyclic_stop(dac->dma.chan);
		dac_writel(dac, DATA, 0);
		dac_writel(dac, CTRL, 0);
		clk_disable(dac->sample_clk);
		break;
	default:
		retval = -EINVAL;
		break;
	}
out:
	return retval;
}

static snd_pcm_uframes_t
atmel_abdac_pointer(struct snd_pcm_substream *substream)
{
	struct atmel_abdac	*dac = snd_pcm_substream_chip(substream);
	struct snd_pcm_runtime	*runtime = substream->runtime;
	snd_pcm_uframes_t	frames;
	unsigned long		bytes;

	bytes = dw_dma_get_src_addr(dac->dma.chan);
	bytes -= runtime->dma_addr;

	frames = bytes_to_frames(runtime, bytes);
	if (frames >= runtime->buffer_size)
		frames -= runtime->buffer_size;

	return frames;
}

static irqreturn_t abdac_interrupt(int irq, void *dev_id)
{
	struct atmel_abdac *dac = dev_id;
	u32 status;

	status = dac_readl(dac, INT_STATUS);
	if (status & DAC_BIT(UNDERRUN)) {
		dev_err(&dac->pdev->dev, "underrun detected\n");
		dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
	} else {
		dev_err(&dac->pdev->dev, "spurious interrupt (status=0x%x)\n",
			status);
		dac_writel(dac, INT_CLR, status);
	}

	return IRQ_HANDLED;
}

static struct snd_pcm_ops atmel_abdac_ops = {
	.open		= atmel_abdac_open,
	.close		= atmel_abdac_close,
	.ioctl		= snd_pcm_lib_ioctl,
	.hw_params	= atmel_abdac_hw_params,
	.hw_free	= atmel_abdac_hw_free,
	.prepare	= atmel_abdac_prepare,
	.trigger	= atmel_abdac_trigger,
	.pointer	= atmel_abdac_pointer,
};

static int atmel_abdac_pcm_new(struct atmel_abdac *dac)
{
	struct snd_pcm_hardware hw = atmel_abdac_hw;
	struct snd_pcm *pcm;
	int retval;

	retval = snd_pcm_new(dac->card, dac->card->shortname,
			dac->pdev->id, 1, 0, &pcm);
	if (retval)
		return retval;

	strcpy(pcm->name, dac->card->shortname);
	pcm->private_data = dac;
	pcm->info_flags = 0;
	dac->pcm = pcm;

	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &atmel_abdac_ops);

	retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
			&dac->pdev->dev, hw.periods_min * hw.period_bytes_min,
			hw.buffer_bytes_max);

	return retval;
}

static bool filter(struct dma_chan *chan, void *slave)
{
	struct dw_dma_slave *dws = slave;

	if (dws->dma_dev == chan->device->dev) {
		chan->private = dws;
		return true;
	} else
		return false;
}

static int set_sample_rates(struct atmel_abdac *dac)
{
	long new_rate = RATE_MAX;
	int retval = -EINVAL;
	int index = 0;

	/* we start at 192 kHz and work our way down to 5112 Hz */
	while (new_rate >= RATE_MIN && index < (MAX_NUM_RATES + 1)) {
		new_rate = clk_round_rate(dac->sample_clk, 256 * new_rate);
		if (new_rate < 0)
			break;
		/* make sure we are below the ABDAC clock */
		if (new_rate <= clk_get_rate(dac->pclk)) {
			dac->rates[index] = new_rate / 256;
			index++;
		}
		/* divide by 256 and then by two to get next rate */
		new_rate /= 256 * 2;
	}

	if (index) {
		int i;

		/* reverse array, smallest go first */
		for (i = 0; i < (index / 2); i++) {
			unsigned int tmp = dac->rates[index - 1 - i];
			dac->rates[index - 1 - i] = dac->rates[i];
			dac->rates[i] = tmp;
		}

		dac->constraints_rates.count = index;
		dac->constraints_rates.list = dac->rates;
		dac->constraints_rates.mask = 0;
		dac->rates_num = index;

		retval = 0;
	}

	return retval;
}

static int atmel_abdac_probe(struct platform_device *pdev)
{
	struct snd_card		*card;
	struct atmel_abdac	*dac;
	struct resource		*regs;
	struct atmel_abdac_pdata	*pdata;
	struct clk		*pclk;
	struct clk		*sample_clk;
	int			retval;
	int			irq;

	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!regs) {
		dev_dbg(&pdev->dev, "no memory resource\n");
		return -ENXIO;
	}

	irq = platform_get_irq(pdev, 0);
	if (irq < 0) {
		dev_dbg(&pdev->dev, "could not get IRQ number\n");
		return irq;
	}

	pdata = pdev->dev.platform_data;
	if (!pdata) {
		dev_dbg(&pdev->dev, "no platform data\n");
		return -ENXIO;
	}

	pclk = clk_get(&pdev->dev, "pclk");
	if (IS_ERR(pclk)) {
		dev_dbg(&pdev->dev, "no peripheral clock\n");
		return PTR_ERR(pclk);
	}
	sample_clk = clk_get(&pdev->dev, "sample_clk");
	if (IS_ERR(sample_clk)) {
		dev_dbg(&pdev->dev, "no sample clock\n");
		retval = PTR_ERR(sample_clk);
		goto out_put_pclk;
	}
	clk_enable(pclk);

	retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
			THIS_MODULE, sizeof(struct atmel_abdac), &card);
	if (retval) {
		dev_dbg(&pdev->dev, "could not create sound card device\n");
		goto out_put_sample_clk;
	}

	dac = get_dac(card);

	dac->irq = irq;
	dac->card = card;
	dac->pclk = pclk;
	dac->sample_clk = sample_clk;
	dac->pdev = pdev;

	retval = set_sample_rates(dac);
	if (retval < 0) {
		dev_dbg(&pdev->dev, "could not set supported rates\n");
		goto out_free_card;
	}

	dac->regs = ioremap(regs->start, resource_size(regs));
	if (!dac->regs) {
		dev_dbg(&pdev->dev, "could not remap register memory\n");
		retval = -ENOMEM;
		goto out_free_card;
	}

	/* make sure the DAC is silent and disabled */
	dac_writel(dac, DATA, 0);
	dac_writel(dac, CTRL, 0);

	retval = request_irq(irq, abdac_interrupt, 0, "abdac", dac);
	if (retval) {
		dev_dbg(&pdev->dev, "could not request irq\n");
		goto out_unmap_regs;
	}

	snd_card_set_dev(card, &pdev->dev);

	if (pdata->dws.dma_dev) {
		dma_cap_mask_t mask;

		dma_cap_zero(mask);
		dma_cap_set(DMA_SLAVE, mask);

		dac->dma.chan = dma_request_channel(mask, filter, &pdata->dws);
		if (dac->dma.chan) {
			struct dma_slave_config dma_conf = {
				.dst_addr = regs->start + DAC_DATA,
				.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
				.src_maxburst = 1,
				.dst_maxburst = 1,
				.direction = DMA_MEM_TO_DEV,
				.device_fc = false,
			};

			dmaengine_slave_config(dac->dma.chan, &dma_conf);
		}
	}
	if (!pdata->dws.dma_dev || !dac->dma.chan) {
		dev_dbg(&pdev->dev, "DMA not available\n");
		retval = -ENODEV;
		goto out_unset_card_dev;
	}

	strcpy(card->driver, "Atmel ABDAC");
	strcpy(card->shortname, "Atmel ABDAC");
	sprintf(card->longname, "Atmel Audio Bitstream DAC");

	retval = atmel_abdac_pcm_new(dac);
	if (retval) {
		dev_dbg(&pdev->dev, "could not register ABDAC pcm device\n");
		goto out_release_dma;
	}

	retval = snd_card_register(card);
	if (retval) {
		dev_dbg(&pdev->dev, "could not register sound card\n");
		goto out_release_dma;
	}

	platform_set_drvdata(pdev, card);

	dev_info(&pdev->dev, "Atmel ABDAC at 0x%p using %s\n",
			dac->regs, dev_name(&dac->dma.chan->dev->device));

	return retval;

out_release_dma:
	dma_release_channel(dac->dma.chan);
	dac->dma.chan = NULL;
out_unset_card_dev:
	snd_card_set_dev(card, NULL);
	free_irq(irq, dac);
out_unmap_regs:
	iounmap(dac->regs);
out_free_card:
	snd_card_free(card);
out_put_sample_clk:
	clk_put(sample_clk);
	clk_disable(pclk);
out_put_pclk:
	clk_put(pclk);
	return retval;
}

#ifdef CONFIG_PM_SLEEP
static int atmel_abdac_suspend(struct device *pdev)
{
	struct snd_card *card = dev_get_drvdata(pdev);
	struct atmel_abdac *dac = card->private_data;

	dw_dma_cyclic_stop(dac->dma.chan);
	clk_disable(dac->sample_clk);
	clk_disable(dac->pclk);

	return 0;
}

static int atmel_abdac_resume(struct device *pdev)
{
	struct snd_card *card = dev_get_drvdata(pdev);
	struct atmel_abdac *dac = card->private_data;

	clk_enable(dac->pclk);
	clk_enable(dac->sample_clk);
	if (test_bit(DMA_READY, &dac->flags))
		dw_dma_cyclic_start(dac->dma.chan);

	return 0;
}

static SIMPLE_DEV_PM_OPS(atmel_abdac_pm, atmel_abdac_suspend, atmel_abdac_resume);
#define ATMEL_ABDAC_PM_OPS	&atmel_abdac_pm
#else
#define ATMEL_ABDAC_PM_OPS	NULL
#endif

static int atmel_abdac_remove(struct platform_device *pdev)
{
	struct snd_card *card = platform_get_drvdata(pdev);
	struct atmel_abdac *dac = get_dac(card);

	clk_put(dac->sample_clk);
	clk_disable(dac->pclk);
	clk_put(dac->pclk);

	dma_release_channel(dac->dma.chan);
	dac->dma.chan = NULL;
	snd_card_set_dev(card, NULL);
	iounmap(dac->regs);
	free_irq(dac->irq, dac);
	snd_card_free(card);

	return 0;
}

static struct platform_driver atmel_abdac_driver = {
	.remove		= atmel_abdac_remove,
	.driver		= {
		.name	= "atmel_abdac",
		.owner	= THIS_MODULE,
		.pm	= ATMEL_ABDAC_PM_OPS,
	},
};

static int __init atmel_abdac_init(void)
{
	return platform_driver_probe(&atmel_abdac_driver,
			atmel_abdac_probe);
}
module_init(atmel_abdac_init);

static void __exit atmel_abdac_exit(void)
{
	platform_driver_unregister(&atmel_abdac_driver);
}
module_exit(atmel_abdac_exit);

MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Driver for Atmel Audio Bitstream DAC (ABDAC)");
MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");
Commit	Line	Data
e4967d60 HCE	1	/*
	2	* Driver for the Atmel on-chip Audio Bitstream DAC (ABDAC)
	3	*
	4	* Copyright (C) 2006-2009 Atmel Corporation
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License version 2 as published by
	8	* the Free Software Foundation.
	9	*/
	10	#include <linux/clk.h>
	11	#include <linux/bitmap.h>
	12	#include <linux/dw_dmac.h>
	13	#include <linux/dmaengine.h>
	14	#include <linux/dma-mapping.h>
	15	#include <linux/init.h>
	16	#include <linux/interrupt.h>
	17	#include <linux/module.h>
	18	#include <linux/platform_device.h>
e2b35f3d	19	#include <linux/types.h>
e4967d60 HCE	20	#include <linux/io.h>
	21
	22	#include <sound/core.h>
	23	#include <sound/initval.h>
	24	#include <sound/pcm.h>
	25	#include <sound/pcm_params.h>
	26	#include <sound/atmel-abdac.h>
	27
	28	/* DAC register offsets */
	29	#define DAC_DATA 0x0000
	30	#define DAC_CTRL 0x0008
	31	#define DAC_INT_MASK 0x000c
	32	#define DAC_INT_EN 0x0010
	33	#define DAC_INT_DIS 0x0014
	34	#define DAC_INT_CLR 0x0018
	35	#define DAC_INT_STATUS 0x001c
	36
	37	/* Bitfields in CTRL */
	38	#define DAC_SWAP_OFFSET 30
	39	#define DAC_SWAP_SIZE 1
	40	#define DAC_EN_OFFSET 31
	41	#define DAC_EN_SIZE 1
	42
	43	/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
	44	#define DAC_UNDERRUN_OFFSET 28
	45	#define DAC_UNDERRUN_SIZE 1
	46	#define DAC_TX_READY_OFFSET 29
	47	#define DAC_TX_READY_SIZE 1
	48
	49	/* Bit manipulation macros */
	50	#define DAC_BIT(name) \
	51	(1 << DAC_##name##_OFFSET)
	52	#define DAC_BF(name, value) \
	53	(((value) & ((1 << DAC_##name##_SIZE) - 1)) \
	54	<< DAC_##name##_OFFSET)
	55	#define DAC_BFEXT(name, value) \
	56	(((value) >> DAC_##name##_OFFSET) \
	57	& ((1 << DAC_##name##_SIZE) - 1))
	58	#define DAC_BFINS(name, value, old) \
	59	(((old) & ~(((1 << DAC_##name##_SIZE) - 1) \
	60	<< DAC_##name##_OFFSET)) \
	61	\| DAC_BF(name, value))
	62
	63	/* Register access macros */
	64	#define dac_readl(port, reg) \
	65	__raw_readl((port)->regs + DAC_##reg)
	66	#define dac_writel(port, reg, value) \
	67	__raw_writel((value), (port)->regs + DAC_##reg)
	68
	69	/*
	70	* ABDAC supports a maximum of 6 different rates from a generic clock. The
	71	* generic clock has a power of two divider, which gives 6 steps from 192 kHz
	72	* to 5112 Hz.
	73	*/
	74	#define MAX_NUM_RATES 6
	75	/* ALSA seems to use rates between 192000 Hz and 5112 Hz. */
	76	#define RATE_MAX 192000
	77	#define RATE_MIN 5112
	78
	79	enum {
	80	DMA_READY = 0,
	81	};
	82
	83	struct atmel_abdac_dma {
84	struct dma_chan *chan;
85	struct dw_cyclic_desc *cdesc;
86	};
87
88	struct atmel_abdac {
89	struct clk *pclk;
90	struct clk *sample_clk;
91	struct platform_device *pdev;
92	struct atmel_abdac_dma dma;
93
94	struct snd_pcm_hw_constraint_list constraints_rates;
95	struct snd_pcm_substream *substream;
96	struct snd_card *card;
97	struct snd_pcm *pcm;
98
99	void __iomem *regs;
100	unsigned long flags;
101	unsigned int rates[MAX_NUM_RATES];
102	unsigned int rates_num;
103	int irq;
104	};
105
106	#define get_dac(card) ((struct atmel_abdac *)(card)->private_data)
107
108	/* This function is called by the DMA driver. */
109	static void atmel_abdac_dma_period_done(void *arg)
110	{
111	struct atmel_abdac *dac = arg;
112	snd_pcm_period_elapsed(dac->substream);
113	}
114
115	static int atmel_abdac_prepare_dma(struct atmel_abdac *dac,
116	struct snd_pcm_substream *substream,
117	enum dma_data_direction direction)
118	{
119	struct dma_chan *chan = dac->dma.chan;
120	struct dw_cyclic_desc *cdesc;
121	struct snd_pcm_runtime *runtime = substream->runtime;
122	unsigned long buffer_len, period_len;
123
124	/*
125	* We don't do DMA on "complex" transfers, i.e. with
126	* non-halfword-aligned buffers or lengths.
127	*/
128	if (runtime->dma_addr & 1 \|\| runtime->buffer_size & 1) {
129	dev_dbg(&dac->pdev->dev, "too complex transfer\n");
130	return -EINVAL;
131	}
132
133	buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
134	period_len = frames_to_bytes(runtime, runtime->period_size);
135
136	cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
35e16581	137	period_len, DMA_MEM_TO_DEV);
e4967d60 HCE	138	if (IS_ERR(cdesc)) {
	139	dev_dbg(&dac->pdev->dev, "could not prepare cyclic DMA\n");
	140	return PTR_ERR(cdesc);
	141	}
	142
	143	cdesc->period_callback = atmel_abdac_dma_period_done;
	144	cdesc->period_callback_param = dac;
	145
	146	dac->dma.cdesc = cdesc;
	147
	148	set_bit(DMA_READY, &dac->flags);
	149
	150	return 0;
	151	}
	152
	153	static struct snd_pcm_hardware atmel_abdac_hw = {
	154	.info = (SNDRV_PCM_INFO_MMAP
	155	\| SNDRV_PCM_INFO_MMAP_VALID
	156	\| SNDRV_PCM_INFO_INTERLEAVED
	157	\| SNDRV_PCM_INFO_BLOCK_TRANSFER
	158	\| SNDRV_PCM_INFO_RESUME
	159	\| SNDRV_PCM_INFO_PAUSE),
	160	.formats = (SNDRV_PCM_FMTBIT_S16_BE),
	161	.rates = (SNDRV_PCM_RATE_KNOT),
	162	.rate_min = RATE_MIN,
	163	.rate_max = RATE_MAX,
	164	.channels_min = 2,
	165	.channels_max = 2,
	166	.buffer_bytes_max = 64 * 4096,
	167	.period_bytes_min = 4096,
	168	.period_bytes_max = 4096,
fa075ed2	169	.periods_min = 6,
e4967d60 HCE	170	.periods_max = 64,
	171	};
	172
	173	static int atmel_abdac_open(struct snd_pcm_substream *substream)
	174	{
	175	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
	176
	177	dac->substream = substream;
	178	atmel_abdac_hw.rate_max = dac->rates[dac->rates_num - 1];
	179	atmel_abdac_hw.rate_min = dac->rates[0];
	180	substream->runtime->hw = atmel_abdac_hw;
	181
	182	return snd_pcm_hw_constraint_list(substream->runtime, 0,
	183	SNDRV_PCM_HW_PARAM_RATE, &dac->constraints_rates);
	184	}
	185
	186	static int atmel_abdac_close(struct snd_pcm_substream *substream)
	187	{
	188	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
	189	dac->substream = NULL;
	190	return 0;
	191	}
	192
	193	static int atmel_abdac_hw_params(struct snd_pcm_substream *substream,
	194	struct snd_pcm_hw_params *hw_params)
	195	{
	196	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
	197	int retval;
	198
	199	retval = snd_pcm_lib_malloc_pages(substream,
	200	params_buffer_bytes(hw_params));
	201	if (retval < 0)
	202	return retval;
	203	/* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
	204	if (retval == 1)
	205	if (test_and_clear_bit(DMA_READY, &dac->flags))
	206	dw_dma_cyclic_free(dac->dma.chan);
	207
	208	return retval;
	209	}
	210
	211	static int atmel_abdac_hw_free(struct snd_pcm_substream *substream)
	212	{
	213	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
	214	if (test_and_clear_bit(DMA_READY, &dac->flags))
	215	dw_dma_cyclic_free(dac->dma.chan);
	216	return snd_pcm_lib_free_pages(substream);
	217	}
	218
	219	static int atmel_abdac_prepare(struct snd_pcm_substream *substream)
	220	{
	221	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
	222	int retval;
	223
	224	retval = clk_set_rate(dac->sample_clk, 256 * substream->runtime->rate);
	225	if (retval)
	226	return retval;
	227
	228	if (!test_bit(DMA_READY, &dac->flags))
	229	retval = atmel_abdac_prepare_dma(dac, substream, DMA_TO_DEVICE);
	230
	231	return retval;
	232	}
	233
234	static int atmel_abdac_trigger(struct snd_pcm_substream *substream, int cmd)
235	{
236	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
237	int retval = 0;
238
239	switch (cmd) {
240	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
241	case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
242	case SNDRV_PCM_TRIGGER_START:
243	clk_enable(dac->sample_clk);
244	retval = dw_dma_cyclic_start(dac->dma.chan);
245	if (retval)
246	goto out;
247	dac_writel(dac, CTRL, DAC_BIT(EN));
248	break;
249	case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
250	case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
251	case SNDRV_PCM_TRIGGER_STOP:
252	dw_dma_cyclic_stop(dac->dma.chan);
253	dac_writel(dac, DATA, 0);
254	dac_writel(dac, CTRL, 0);
255	clk_disable(dac->sample_clk);
256	break;
257	default:
258	retval = -EINVAL;
259	break;
260	}
261	out:
262	return retval;
263	}
264
265	static snd_pcm_uframes_t
266	atmel_abdac_pointer(struct snd_pcm_substream *substream)
267	{
268	struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
269	struct snd_pcm_runtime *runtime = substream->runtime;
270	snd_pcm_uframes_t frames;
271	unsigned long bytes;
272
273	bytes = dw_dma_get_src_addr(dac->dma.chan);
274	bytes -= runtime->dma_addr;
275
276	frames = bytes_to_frames(runtime, bytes);
277	if (frames >= runtime->buffer_size)
278	frames -= runtime->buffer_size;
279
280	return frames;
281	}
282
283	static irqreturn_t abdac_interrupt(int irq, void *dev_id)
284	{
285	struct atmel_abdac *dac = dev_id;
286	u32 status;
287
288	status = dac_readl(dac, INT_STATUS);
289	if (status & DAC_BIT(UNDERRUN)) {
290	dev_err(&dac->pdev->dev, "underrun detected\n");
291	dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
292	} else {
293	dev_err(&dac->pdev->dev, "spurious interrupt (status=0x%x)\n",
294	status);
295	dac_writel(dac, INT_CLR, status);
296	}
297
298	return IRQ_HANDLED;
299	}
300
301	static struct snd_pcm_ops atmel_abdac_ops = {
302	.open = atmel_abdac_open,
303	.close = atmel_abdac_close,
304	.ioctl = snd_pcm_lib_ioctl,
305	.hw_params = atmel_abdac_hw_params,
306	.hw_free = atmel_abdac_hw_free,
307	.prepare = atmel_abdac_prepare,
308	.trigger = atmel_abdac_trigger,
309	.pointer = atmel_abdac_pointer,
310	};
311
61dc674c	312	static int atmel_abdac_pcm_new(struct atmel_abdac *dac)
e4967d60 HCE	313	{
	314	struct snd_pcm_hardware hw = atmel_abdac_hw;
	315	struct snd_pcm *pcm;
	316	int retval;
	317
	318	retval = snd_pcm_new(dac->card, dac->card->shortname,
	319	dac->pdev->id, 1, 0, &pcm);
	320	if (retval)
	321	return retval;
	322
	323	strcpy(pcm->name, dac->card->shortname);
	324	pcm->private_data = dac;
	325	pcm->info_flags = 0;
	326	dac->pcm = pcm;
	327
	328	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &atmel_abdac_ops);
	329
	330	retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
	331	&dac->pdev->dev, hw.periods_min * hw.period_bytes_min,
	332	hw.buffer_bytes_max);
	333
	334	return retval;
	335	}
	336
	337	static bool filter(struct dma_chan chan, void slave)
	338	{
	339	struct dw_dma_slave *dws = slave;
	340
	341	if (dws->dma_dev == chan->device->dev) {
	342	chan->private = dws;
	343	return true;
	344	} else
	345	return false;
	346	}
	347
	348	static int set_sample_rates(struct atmel_abdac *dac)
	349	{
	350	long new_rate = RATE_MAX;
	351	int retval = -EINVAL;
	352	int index = 0;
	353
	354	/* we start at 192 kHz and work our way down to 5112 Hz */
	355	while (new_rate >= RATE_MIN && index < (MAX_NUM_RATES + 1)) {
	356	new_rate = clk_round_rate(dac->sample_clk, 256 * new_rate);
	357	if (new_rate < 0)
	358	break;
	359	/* make sure we are below the ABDAC clock */
	360	if (new_rate <= clk_get_rate(dac->pclk)) {
	361	dac->rates[index] = new_rate / 256;
	362	index++;
	363	}
	364	/* divide by 256 and then by two to get next rate */
	365	new_rate /= 256 * 2;
	366	}
	367
	368	if (index) {
	369	int i;
	370
	371	/* reverse array, smallest go first */
	372	for (i = 0; i < (index / 2); i++) {
	373	unsigned int tmp = dac->rates[index - 1 - i];
	374	dac->rates[index - 1 - i] = dac->rates[i];
	375	dac->rates[i] = tmp;
	376	}
377
378	dac->constraints_rates.count = index;
379	dac->constraints_rates.list = dac->rates;
380	dac->constraints_rates.mask = 0;
381	dac->rates_num = index;
382
383	retval = 0;
384	}
385
386	return retval;
387	}
388
61dc674c	389	static int atmel_abdac_probe(struct platform_device *pdev)
e4967d60 HCE	390	{
	391	struct snd_card *card;
	392	struct atmel_abdac *dac;
	393	struct resource *regs;
	394	struct atmel_abdac_pdata *pdata;
	395	struct clk *pclk;
	396	struct clk *sample_clk;
	397	int retval;
	398	int irq;
	399
	400	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	401	if (!regs) {
	402	dev_dbg(&pdev->dev, "no memory resource\n");
	403	return -ENXIO;
	404	}
	405
	406	irq = platform_get_irq(pdev, 0);
	407	if (irq < 0) {
	408	dev_dbg(&pdev->dev, "could not get IRQ number\n");
	409	return irq;
	410	}
	411
	412	pdata = pdev->dev.platform_data;
	413	if (!pdata) {
	414	dev_dbg(&pdev->dev, "no platform data\n");
	415	return -ENXIO;
	416	}
	417
	418	pclk = clk_get(&pdev->dev, "pclk");
	419	if (IS_ERR(pclk)) {
	420	dev_dbg(&pdev->dev, "no peripheral clock\n");
	421	return PTR_ERR(pclk);
	422	}
	423	sample_clk = clk_get(&pdev->dev, "sample_clk");
c0763e68	424	if (IS_ERR(sample_clk)) {
e4967d60	425	dev_dbg(&pdev->dev, "no sample clock\n");
1beded5d	426	retval = PTR_ERR(sample_clk);
e4967d60 HCE	427	goto out_put_pclk;
	428	}
	429	clk_enable(pclk);
	430
	431	retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
	432	THIS_MODULE, sizeof(struct atmel_abdac), &card);
	433	if (retval) {
	434	dev_dbg(&pdev->dev, "could not create sound card device\n");
	435	goto out_put_sample_clk;
	436	}
	437
	438	dac = get_dac(card);
	439
	440	dac->irq = irq;
	441	dac->card = card;
	442	dac->pclk = pclk;
	443	dac->sample_clk = sample_clk;
	444	dac->pdev = pdev;
	445
	446	retval = set_sample_rates(dac);
	447	if (retval < 0) {
	448	dev_dbg(&pdev->dev, "could not set supported rates\n");
	449	goto out_free_card;
	450	}
	451
28f65c11	452	dac->regs = ioremap(regs->start, resource_size(regs));
e4967d60 HCE	453	if (!dac->regs) {
e4967d60 HCE	454	dev_dbg(&pdev->dev, "could not remap register memory\n");
aaf265c2	455	retval = -ENOMEM;
e4967d60 HCE	456	goto out_free_card;
	457	}
	458
	459	/* make sure the DAC is silent and disabled */
	460	dac_writel(dac, DATA, 0);
	461	dac_writel(dac, CTRL, 0);
	462
	463	retval = request_irq(irq, abdac_interrupt, 0, "abdac", dac);
	464	if (retval) {
	465	dev_dbg(&pdev->dev, "could not request irq\n");
	466	goto out_unmap_regs;
	467	}
	468
	469	snd_card_set_dev(card, &pdev->dev);
	470
	471	if (pdata->dws.dma_dev) {
e4967d60 HCE	472	dma_cap_mask_t mask;
e4967d60 HCE	473
e4967d60 HCE	474	dma_cap_zero(mask);
	475	dma_cap_set(DMA_SLAVE, mask);
	476
e2b35f3d VK	477	dac->dma.chan = dma_request_channel(mask, filter, &pdata->dws);
	478	if (dac->dma.chan) {
	479	struct dma_slave_config dma_conf = {
	480	.dst_addr = regs->start + DAC_DATA,
	481	.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
	482	.src_maxburst = 1,
	483	.dst_maxburst = 1,
	484	.direction = DMA_MEM_TO_DEV,
	485	.device_fc = false,
	486	};
	487
	488	dmaengine_slave_config(dac->dma.chan, &dma_conf);
	489	}
e4967d60 HCE	490	}
	491	if (!pdata->dws.dma_dev \|\| !dac->dma.chan) {
	492	dev_dbg(&pdev->dev, "DMA not available\n");
	493	retval = -ENODEV;
	494	goto out_unset_card_dev;
	495	}
	496
	497	strcpy(card->driver, "Atmel ABDAC");
	498	strcpy(card->shortname, "Atmel ABDAC");
	499	sprintf(card->longname, "Atmel Audio Bitstream DAC");
	500
	501	retval = atmel_abdac_pcm_new(dac);
	502	if (retval) {
	503	dev_dbg(&pdev->dev, "could not register ABDAC pcm device\n");
	504	goto out_release_dma;
	505	}
	506
	507	retval = snd_card_register(card);
	508	if (retval) {
	509	dev_dbg(&pdev->dev, "could not register sound card\n");
	510	goto out_release_dma;
	511	}
	512
	513	platform_set_drvdata(pdev, card);
	514
	515	dev_info(&pdev->dev, "Atmel ABDAC at 0x%p using %s\n",
60a56cce	516	dac->regs, dev_name(&dac->dma.chan->dev->device));
e4967d60 HCE	517
	518	return retval;
	519
	520	out_release_dma:
	521	dma_release_channel(dac->dma.chan);
	522	dac->dma.chan = NULL;
	523	out_unset_card_dev:
	524	snd_card_set_dev(card, NULL);
	525	free_irq(irq, dac);
	526	out_unmap_regs:
	527	iounmap(dac->regs);
	528	out_free_card:
	529	snd_card_free(card);
	530	out_put_sample_clk:
	531	clk_put(sample_clk);
	532	clk_disable(pclk);
	533	out_put_pclk:
	534	clk_put(pclk);
	535	return retval;
	536	}
	537
d34e4e00	538	#ifdef CONFIG_PM_SLEEP
284e7ca7	539	static int atmel_abdac_suspend(struct device *pdev)
e4967d60	540	{
284e7ca7	541	struct snd_card *card = dev_get_drvdata(pdev);
e4967d60 HCE	542	struct atmel_abdac *dac = card->private_data;
	543
	544	dw_dma_cyclic_stop(dac->dma.chan);
	545	clk_disable(dac->sample_clk);
	546	clk_disable(dac->pclk);
	547
	548	return 0;
	549	}
	550
284e7ca7	551	static int atmel_abdac_resume(struct device *pdev)
e4967d60	552	{
284e7ca7	553	struct snd_card *card = dev_get_drvdata(pdev);
e4967d60 HCE	554	struct atmel_abdac *dac = card->private_data;
	555
	556	clk_enable(dac->pclk);
	557	clk_enable(dac->sample_clk);
	558	if (test_bit(DMA_READY, &dac->flags))
	559	dw_dma_cyclic_start(dac->dma.chan);
	560
	561	return 0;
	562	}
284e7ca7 TI	563
	564	static SIMPLE_DEV_PM_OPS(atmel_abdac_pm, atmel_abdac_suspend, atmel_abdac_resume);
	565	#define ATMEL_ABDAC_PM_OPS &atmel_abdac_pm
e4967d60	566	#else
284e7ca7	567	#define ATMEL_ABDAC_PM_OPS NULL
e4967d60 HCE	568	#endif
e4967d60 HCE	569
61dc674c	570	static int atmel_abdac_remove(struct platform_device *pdev)
e4967d60 HCE	571	{
	572	struct snd_card *card = platform_get_drvdata(pdev);
	573	struct atmel_abdac *dac = get_dac(card);
	574
	575	clk_put(dac->sample_clk);
	576	clk_disable(dac->pclk);
	577	clk_put(dac->pclk);
	578
	579	dma_release_channel(dac->dma.chan);
	580	dac->dma.chan = NULL;
	581	snd_card_set_dev(card, NULL);
	582	iounmap(dac->regs);
	583	free_irq(dac->irq, dac);
	584	snd_card_free(card);
	585
e4967d60 HCE	586	return 0;
	587	}
	588
	589	static struct platform_driver atmel_abdac_driver = {
61dc674c	590	.remove = atmel_abdac_remove,
e4967d60 HCE	591	.driver = {
e4967d60 HCE	592	.name = "atmel_abdac",
8bf01d8a	593	.owner = THIS_MODULE,
284e7ca7	594	.pm = ATMEL_ABDAC_PM_OPS,
e4967d60	595	},
e4967d60 HCE	596	};
	597
	598	static int __init atmel_abdac_init(void)
	599	{
	600	return platform_driver_probe(&atmel_abdac_driver,
	601	atmel_abdac_probe);
	602	}
	603	module_init(atmel_abdac_init);
	604
	605	static void __exit atmel_abdac_exit(void)
	606	{
	607	platform_driver_unregister(&atmel_abdac_driver);
	608	}
	609	module_exit(atmel_abdac_exit);
	610
	611	MODULE_LICENSE("GPL");
	612	MODULE_DESCRIPTION("Driver for Atmel Audio Bitstream DAC (ABDAC)");
0cfae7c9	613	MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");