Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Dynamic DMA mapping support. | |
3 | * | |
563aaf06 | 4 | * This implementation is a fallback for platforms that do not support |
1da177e4 LT |
5 | * I/O TLBs (aka DMA address translation hardware). |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
569c8bf5 JL |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
fb05a379 | 17 | * 08/12/11 beckyb Add highmem support |
1da177e4 LT |
18 | */ |
19 | ||
20 | #include <linux/cache.h> | |
17e5ad6c | 21 | #include <linux/dma-mapping.h> |
1da177e4 | 22 | #include <linux/mm.h> |
8bc3bcc9 | 23 | #include <linux/export.h> |
1da177e4 LT |
24 | #include <linux/spinlock.h> |
25 | #include <linux/string.h> | |
0016fdee | 26 | #include <linux/swiotlb.h> |
fb05a379 | 27 | #include <linux/pfn.h> |
1da177e4 LT |
28 | #include <linux/types.h> |
29 | #include <linux/ctype.h> | |
ef9b1893 | 30 | #include <linux/highmem.h> |
5a0e3ad6 | 31 | #include <linux/gfp.h> |
1da177e4 LT |
32 | |
33 | #include <asm/io.h> | |
1da177e4 | 34 | #include <asm/dma.h> |
17e5ad6c | 35 | #include <asm/scatterlist.h> |
1da177e4 LT |
36 | |
37 | #include <linux/init.h> | |
38 | #include <linux/bootmem.h> | |
a8522509 | 39 | #include <linux/iommu-helper.h> |
1da177e4 LT |
40 | |
41 | #define OFFSET(val,align) ((unsigned long) \ | |
42 | ( (val) & ( (align) - 1))) | |
43 | ||
0b9afede AW |
44 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
45 | ||
46 | /* | |
47 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
48 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
49 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
50 | */ | |
51 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
52 | ||
1da177e4 LT |
53 | int swiotlb_force; |
54 | ||
55 | /* | |
bfc5501f KRW |
56 | * Used to do a quick range check in swiotlb_tbl_unmap_single and |
57 | * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this | |
1da177e4 LT |
58 | * API. |
59 | */ | |
ff7204a7 | 60 | static phys_addr_t io_tlb_start, io_tlb_end; |
1da177e4 LT |
61 | |
62 | /* | |
b595076a | 63 | * The number of IO TLB blocks (in groups of 64) between io_tlb_start and |
1da177e4 LT |
64 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. |
65 | */ | |
66 | static unsigned long io_tlb_nslabs; | |
67 | ||
68 | /* | |
69 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
70 | */ | |
71 | static unsigned long io_tlb_overflow = 32*1024; | |
72 | ||
ee3f6ba8 | 73 | static phys_addr_t io_tlb_overflow_buffer; |
1da177e4 LT |
74 | |
75 | /* | |
76 | * This is a free list describing the number of free entries available from | |
77 | * each index | |
78 | */ | |
79 | static unsigned int *io_tlb_list; | |
80 | static unsigned int io_tlb_index; | |
81 | ||
82 | /* | |
83 | * We need to save away the original address corresponding to a mapped entry | |
84 | * for the sync operations. | |
85 | */ | |
bc40ac66 | 86 | static phys_addr_t *io_tlb_orig_addr; |
1da177e4 LT |
87 | |
88 | /* | |
89 | * Protect the above data structures in the map and unmap calls | |
90 | */ | |
91 | static DEFINE_SPINLOCK(io_tlb_lock); | |
92 | ||
5740afdb FT |
93 | static int late_alloc; |
94 | ||
1da177e4 LT |
95 | static int __init |
96 | setup_io_tlb_npages(char *str) | |
97 | { | |
98 | if (isdigit(*str)) { | |
e8579e72 | 99 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
1da177e4 LT |
100 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
101 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
102 | } | |
103 | if (*str == ',') | |
104 | ++str; | |
b18485e7 | 105 | if (!strcmp(str, "force")) |
1da177e4 | 106 | swiotlb_force = 1; |
b18485e7 | 107 | |
1da177e4 LT |
108 | return 1; |
109 | } | |
110 | __setup("swiotlb=", setup_io_tlb_npages); | |
111 | /* make io_tlb_overflow tunable too? */ | |
112 | ||
f21ffe9f | 113 | unsigned long swiotlb_nr_tbl(void) |
5f98ecdb FT |
114 | { |
115 | return io_tlb_nslabs; | |
116 | } | |
f21ffe9f | 117 | EXPORT_SYMBOL_GPL(swiotlb_nr_tbl); |
02ca646e | 118 | /* Note that this doesn't work with highmem page */ |
70a7d3cc JF |
119 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, |
120 | volatile void *address) | |
e08e1f7a | 121 | { |
862d196b | 122 | return phys_to_dma(hwdev, virt_to_phys(address)); |
e08e1f7a IC |
123 | } |
124 | ||
ad32e8cb | 125 | void swiotlb_print_info(void) |
2e5b2b86 | 126 | { |
ad32e8cb | 127 | unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
ff7204a7 | 128 | unsigned char *vstart, *vend; |
2e5b2b86 | 129 | |
ff7204a7 | 130 | vstart = phys_to_virt(io_tlb_start); |
c40dba06 | 131 | vend = phys_to_virt(io_tlb_end); |
2e5b2b86 | 132 | |
3af684c7 | 133 | printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n", |
ff7204a7 | 134 | (unsigned long long)io_tlb_start, |
c40dba06 | 135 | (unsigned long long)io_tlb_end, |
ff7204a7 | 136 | bytes >> 20, vstart, vend - 1); |
2e5b2b86 IC |
137 | } |
138 | ||
abbceff7 | 139 | void __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose) |
1da177e4 | 140 | { |
ee3f6ba8 | 141 | void *v_overflow_buffer; |
563aaf06 | 142 | unsigned long i, bytes; |
1da177e4 | 143 | |
abbceff7 | 144 | bytes = nslabs << IO_TLB_SHIFT; |
1da177e4 | 145 | |
abbceff7 | 146 | io_tlb_nslabs = nslabs; |
ff7204a7 AD |
147 | io_tlb_start = __pa(tlb); |
148 | io_tlb_end = io_tlb_start + bytes; | |
1da177e4 | 149 | |
ee3f6ba8 AD |
150 | /* |
151 | * Get the overflow emergency buffer | |
152 | */ | |
153 | v_overflow_buffer = alloc_bootmem_low_pages(PAGE_ALIGN(io_tlb_overflow)); | |
154 | if (!v_overflow_buffer) | |
155 | panic("Cannot allocate SWIOTLB overflow buffer!\n"); | |
156 | ||
157 | io_tlb_overflow_buffer = __pa(v_overflow_buffer); | |
158 | ||
1da177e4 LT |
159 | /* |
160 | * Allocate and initialize the free list array. This array is used | |
161 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
162 | * between io_tlb_start and io_tlb_end. | |
163 | */ | |
e79f86b2 | 164 | io_tlb_list = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(int))); |
25667d67 | 165 | for (i = 0; i < io_tlb_nslabs; i++) |
1da177e4 LT |
166 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
167 | io_tlb_index = 0; | |
e79f86b2 | 168 | io_tlb_orig_addr = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t))); |
1da177e4 | 169 | |
ad32e8cb FT |
170 | if (verbose) |
171 | swiotlb_print_info(); | |
1da177e4 LT |
172 | } |
173 | ||
abbceff7 FT |
174 | /* |
175 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
176 | * structures for the software IO TLB used to implement the DMA API. | |
177 | */ | |
74838b75 | 178 | static void __init |
abbceff7 FT |
179 | swiotlb_init_with_default_size(size_t default_size, int verbose) |
180 | { | |
ff7204a7 | 181 | unsigned char *vstart; |
abbceff7 FT |
182 | unsigned long bytes; |
183 | ||
184 | if (!io_tlb_nslabs) { | |
185 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
186 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
187 | } | |
188 | ||
189 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
190 | ||
191 | /* | |
192 | * Get IO TLB memory from the low pages | |
193 | */ | |
ff7204a7 AD |
194 | vstart = alloc_bootmem_low_pages(PAGE_ALIGN(bytes)); |
195 | if (!vstart) | |
abbceff7 FT |
196 | panic("Cannot allocate SWIOTLB buffer"); |
197 | ||
ff7204a7 | 198 | swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose); |
abbceff7 FT |
199 | } |
200 | ||
563aaf06 | 201 | void __init |
ad32e8cb | 202 | swiotlb_init(int verbose) |
1da177e4 | 203 | { |
ad32e8cb | 204 | swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */ |
1da177e4 LT |
205 | } |
206 | ||
0b9afede AW |
207 | /* |
208 | * Systems with larger DMA zones (those that don't support ISA) can | |
209 | * initialize the swiotlb later using the slab allocator if needed. | |
210 | * This should be just like above, but with some error catching. | |
211 | */ | |
212 | int | |
563aaf06 | 213 | swiotlb_late_init_with_default_size(size_t default_size) |
0b9afede | 214 | { |
74838b75 | 215 | unsigned long bytes, req_nslabs = io_tlb_nslabs; |
ff7204a7 | 216 | unsigned char *vstart = NULL; |
0b9afede | 217 | unsigned int order; |
74838b75 | 218 | int rc = 0; |
0b9afede AW |
219 | |
220 | if (!io_tlb_nslabs) { | |
221 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
222 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
223 | } | |
224 | ||
225 | /* | |
226 | * Get IO TLB memory from the low pages | |
227 | */ | |
563aaf06 | 228 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
0b9afede | 229 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
563aaf06 | 230 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede AW |
231 | |
232 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
ff7204a7 AD |
233 | vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, |
234 | order); | |
235 | if (vstart) | |
0b9afede AW |
236 | break; |
237 | order--; | |
238 | } | |
239 | ||
ff7204a7 | 240 | if (!vstart) { |
74838b75 KRW |
241 | io_tlb_nslabs = req_nslabs; |
242 | return -ENOMEM; | |
243 | } | |
563aaf06 | 244 | if (order != get_order(bytes)) { |
0b9afede AW |
245 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " |
246 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
247 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
248 | } | |
ff7204a7 | 249 | rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs); |
74838b75 | 250 | if (rc) |
ff7204a7 | 251 | free_pages((unsigned long)vstart, order); |
74838b75 KRW |
252 | return rc; |
253 | } | |
254 | ||
255 | int | |
256 | swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs) | |
257 | { | |
258 | unsigned long i, bytes; | |
ee3f6ba8 | 259 | unsigned char *v_overflow_buffer; |
74838b75 KRW |
260 | |
261 | bytes = nslabs << IO_TLB_SHIFT; | |
262 | ||
263 | io_tlb_nslabs = nslabs; | |
ff7204a7 AD |
264 | io_tlb_start = virt_to_phys(tlb); |
265 | io_tlb_end = io_tlb_start + bytes; | |
74838b75 | 266 | |
ff7204a7 | 267 | memset(tlb, 0, bytes); |
0b9afede | 268 | |
ee3f6ba8 AD |
269 | /* |
270 | * Get the overflow emergency buffer | |
271 | */ | |
272 | v_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
273 | get_order(io_tlb_overflow)); | |
274 | if (!v_overflow_buffer) | |
275 | goto cleanup2; | |
276 | ||
277 | io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer); | |
278 | ||
0b9afede AW |
279 | /* |
280 | * Allocate and initialize the free list array. This array is used | |
281 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
282 | * between io_tlb_start and io_tlb_end. | |
283 | */ | |
284 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
285 | get_order(io_tlb_nslabs * sizeof(int))); | |
286 | if (!io_tlb_list) | |
ee3f6ba8 | 287 | goto cleanup3; |
0b9afede AW |
288 | |
289 | for (i = 0; i < io_tlb_nslabs; i++) | |
290 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
291 | io_tlb_index = 0; | |
292 | ||
bc40ac66 BB |
293 | io_tlb_orig_addr = (phys_addr_t *) |
294 | __get_free_pages(GFP_KERNEL, | |
295 | get_order(io_tlb_nslabs * | |
296 | sizeof(phys_addr_t))); | |
0b9afede | 297 | if (!io_tlb_orig_addr) |
ee3f6ba8 | 298 | goto cleanup4; |
0b9afede | 299 | |
bc40ac66 | 300 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t)); |
0b9afede | 301 | |
ad32e8cb | 302 | swiotlb_print_info(); |
0b9afede | 303 | |
5740afdb FT |
304 | late_alloc = 1; |
305 | ||
0b9afede AW |
306 | return 0; |
307 | ||
308 | cleanup4: | |
25667d67 TL |
309 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
310 | sizeof(int))); | |
0b9afede | 311 | io_tlb_list = NULL; |
ee3f6ba8 AD |
312 | cleanup3: |
313 | free_pages((unsigned long)v_overflow_buffer, | |
314 | get_order(io_tlb_overflow)); | |
315 | io_tlb_overflow_buffer = 0; | |
0b9afede | 316 | cleanup2: |
c40dba06 | 317 | io_tlb_end = 0; |
ff7204a7 | 318 | io_tlb_start = 0; |
74838b75 | 319 | io_tlb_nslabs = 0; |
0b9afede AW |
320 | return -ENOMEM; |
321 | } | |
322 | ||
5740afdb FT |
323 | void __init swiotlb_free(void) |
324 | { | |
ee3f6ba8 | 325 | if (!io_tlb_orig_addr) |
5740afdb FT |
326 | return; |
327 | ||
328 | if (late_alloc) { | |
ee3f6ba8 | 329 | free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer), |
5740afdb FT |
330 | get_order(io_tlb_overflow)); |
331 | free_pages((unsigned long)io_tlb_orig_addr, | |
332 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
333 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
334 | sizeof(int))); | |
ff7204a7 | 335 | free_pages((unsigned long)phys_to_virt(io_tlb_start), |
5740afdb FT |
336 | get_order(io_tlb_nslabs << IO_TLB_SHIFT)); |
337 | } else { | |
ee3f6ba8 | 338 | free_bootmem_late(io_tlb_overflow_buffer, |
e79f86b2 | 339 | PAGE_ALIGN(io_tlb_overflow)); |
5740afdb | 340 | free_bootmem_late(__pa(io_tlb_orig_addr), |
e79f86b2 | 341 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t))); |
5740afdb | 342 | free_bootmem_late(__pa(io_tlb_list), |
e79f86b2 | 343 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int))); |
ff7204a7 | 344 | free_bootmem_late(io_tlb_start, |
e79f86b2 | 345 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); |
5740afdb | 346 | } |
f21ffe9f | 347 | io_tlb_nslabs = 0; |
5740afdb FT |
348 | } |
349 | ||
02ca646e | 350 | static int is_swiotlb_buffer(phys_addr_t paddr) |
640aebfe | 351 | { |
ff7204a7 | 352 | return paddr >= io_tlb_start && paddr < io_tlb_end; |
640aebfe FT |
353 | } |
354 | ||
fb05a379 BB |
355 | /* |
356 | * Bounce: copy the swiotlb buffer back to the original dma location | |
357 | */ | |
d7ef1533 KRW |
358 | void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size, |
359 | enum dma_data_direction dir) | |
fb05a379 BB |
360 | { |
361 | unsigned long pfn = PFN_DOWN(phys); | |
362 | ||
363 | if (PageHighMem(pfn_to_page(pfn))) { | |
364 | /* The buffer does not have a mapping. Map it in and copy */ | |
365 | unsigned int offset = phys & ~PAGE_MASK; | |
366 | char *buffer; | |
367 | unsigned int sz = 0; | |
368 | unsigned long flags; | |
369 | ||
370 | while (size) { | |
67131ad0 | 371 | sz = min_t(size_t, PAGE_SIZE - offset, size); |
fb05a379 BB |
372 | |
373 | local_irq_save(flags); | |
c3eede8e | 374 | buffer = kmap_atomic(pfn_to_page(pfn)); |
fb05a379 BB |
375 | if (dir == DMA_TO_DEVICE) |
376 | memcpy(dma_addr, buffer + offset, sz); | |
ef9b1893 | 377 | else |
fb05a379 | 378 | memcpy(buffer + offset, dma_addr, sz); |
c3eede8e | 379 | kunmap_atomic(buffer); |
ef9b1893 | 380 | local_irq_restore(flags); |
fb05a379 BB |
381 | |
382 | size -= sz; | |
383 | pfn++; | |
384 | dma_addr += sz; | |
385 | offset = 0; | |
ef9b1893 JF |
386 | } |
387 | } else { | |
ef9b1893 | 388 | if (dir == DMA_TO_DEVICE) |
fb05a379 | 389 | memcpy(dma_addr, phys_to_virt(phys), size); |
ef9b1893 | 390 | else |
fb05a379 | 391 | memcpy(phys_to_virt(phys), dma_addr, size); |
ef9b1893 | 392 | } |
1b548f66 | 393 | } |
d7ef1533 | 394 | EXPORT_SYMBOL_GPL(swiotlb_bounce); |
1b548f66 | 395 | |
e05ed4d1 AD |
396 | phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, |
397 | dma_addr_t tbl_dma_addr, | |
398 | phys_addr_t orig_addr, size_t size, | |
399 | enum dma_data_direction dir) | |
1da177e4 LT |
400 | { |
401 | unsigned long flags; | |
e05ed4d1 | 402 | phys_addr_t tlb_addr; |
1da177e4 LT |
403 | unsigned int nslots, stride, index, wrap; |
404 | int i; | |
681cc5cd FT |
405 | unsigned long mask; |
406 | unsigned long offset_slots; | |
407 | unsigned long max_slots; | |
408 | ||
409 | mask = dma_get_seg_boundary(hwdev); | |
681cc5cd | 410 | |
eb605a57 FT |
411 | tbl_dma_addr &= mask; |
412 | ||
413 | offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
a5ddde4a IC |
414 | |
415 | /* | |
416 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
417 | */ | |
b15a3891 JB |
418 | max_slots = mask + 1 |
419 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
420 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
1da177e4 LT |
421 | |
422 | /* | |
423 | * For mappings greater than a page, we limit the stride (and | |
424 | * hence alignment) to a page size. | |
425 | */ | |
426 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
427 | if (size > PAGE_SIZE) | |
428 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
429 | else | |
430 | stride = 1; | |
431 | ||
34814545 | 432 | BUG_ON(!nslots); |
1da177e4 LT |
433 | |
434 | /* | |
435 | * Find suitable number of IO TLB entries size that will fit this | |
436 | * request and allocate a buffer from that IO TLB pool. | |
437 | */ | |
438 | spin_lock_irqsave(&io_tlb_lock, flags); | |
a7133a15 AM |
439 | index = ALIGN(io_tlb_index, stride); |
440 | if (index >= io_tlb_nslabs) | |
441 | index = 0; | |
442 | wrap = index; | |
443 | ||
444 | do { | |
a8522509 FT |
445 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
446 | max_slots)) { | |
b15a3891 JB |
447 | index += stride; |
448 | if (index >= io_tlb_nslabs) | |
449 | index = 0; | |
a7133a15 AM |
450 | if (index == wrap) |
451 | goto not_found; | |
452 | } | |
453 | ||
454 | /* | |
455 | * If we find a slot that indicates we have 'nslots' number of | |
456 | * contiguous buffers, we allocate the buffers from that slot | |
457 | * and mark the entries as '0' indicating unavailable. | |
458 | */ | |
459 | if (io_tlb_list[index] >= nslots) { | |
460 | int count = 0; | |
461 | ||
462 | for (i = index; i < (int) (index + nslots); i++) | |
463 | io_tlb_list[i] = 0; | |
464 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
465 | io_tlb_list[i] = ++count; | |
e05ed4d1 | 466 | tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT); |
1da177e4 | 467 | |
a7133a15 AM |
468 | /* |
469 | * Update the indices to avoid searching in the next | |
470 | * round. | |
471 | */ | |
472 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
473 | ? (index + nslots) : 0); | |
474 | ||
475 | goto found; | |
476 | } | |
477 | index += stride; | |
478 | if (index >= io_tlb_nslabs) | |
479 | index = 0; | |
480 | } while (index != wrap); | |
481 | ||
482 | not_found: | |
483 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
e05ed4d1 | 484 | return SWIOTLB_MAP_ERROR; |
a7133a15 | 485 | found: |
1da177e4 LT |
486 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
487 | ||
488 | /* | |
489 | * Save away the mapping from the original address to the DMA address. | |
490 | * This is needed when we sync the memory. Then we sync the buffer if | |
491 | * needed. | |
492 | */ | |
bc40ac66 | 493 | for (i = 0; i < nslots; i++) |
e05ed4d1 | 494 | io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT); |
1da177e4 | 495 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
e05ed4d1 AD |
496 | swiotlb_bounce(orig_addr, phys_to_virt(tlb_addr), size, |
497 | DMA_TO_DEVICE); | |
1da177e4 | 498 | |
e05ed4d1 | 499 | return tlb_addr; |
1da177e4 | 500 | } |
d7ef1533 | 501 | EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single); |
1da177e4 | 502 | |
eb605a57 FT |
503 | /* |
504 | * Allocates bounce buffer and returns its kernel virtual address. | |
505 | */ | |
506 | ||
e05ed4d1 AD |
507 | phys_addr_t map_single(struct device *hwdev, phys_addr_t phys, size_t size, |
508 | enum dma_data_direction dir) | |
eb605a57 | 509 | { |
ff7204a7 | 510 | dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start); |
eb605a57 FT |
511 | |
512 | return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir); | |
513 | } | |
514 | ||
1da177e4 LT |
515 | /* |
516 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
517 | */ | |
d7ef1533 | 518 | void |
bfc5501f | 519 | swiotlb_tbl_unmap_single(struct device *hwdev, char *dma_addr, size_t size, |
22d48269 | 520 | enum dma_data_direction dir) |
1da177e4 LT |
521 | { |
522 | unsigned long flags; | |
523 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
ff7204a7 | 524 | int index = (dma_addr - (char *)phys_to_virt(io_tlb_start)) >> IO_TLB_SHIFT; |
bc40ac66 | 525 | phys_addr_t phys = io_tlb_orig_addr[index]; |
1da177e4 LT |
526 | |
527 | /* | |
528 | * First, sync the memory before unmapping the entry | |
529 | */ | |
bc40ac66 | 530 | if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
fb05a379 | 531 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
1da177e4 LT |
532 | |
533 | /* | |
534 | * Return the buffer to the free list by setting the corresponding | |
af901ca1 | 535 | * entries to indicate the number of contiguous entries available. |
1da177e4 LT |
536 | * While returning the entries to the free list, we merge the entries |
537 | * with slots below and above the pool being returned. | |
538 | */ | |
539 | spin_lock_irqsave(&io_tlb_lock, flags); | |
540 | { | |
541 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
542 | io_tlb_list[index + nslots] : 0); | |
543 | /* | |
544 | * Step 1: return the slots to the free list, merging the | |
545 | * slots with superceeding slots | |
546 | */ | |
547 | for (i = index + nslots - 1; i >= index; i--) | |
548 | io_tlb_list[i] = ++count; | |
549 | /* | |
550 | * Step 2: merge the returned slots with the preceding slots, | |
551 | * if available (non zero) | |
552 | */ | |
553 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
554 | io_tlb_list[i] = ++count; | |
555 | } | |
556 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
557 | } | |
d7ef1533 | 558 | EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single); |
1da177e4 | 559 | |
d7ef1533 | 560 | void |
bfc5501f | 561 | swiotlb_tbl_sync_single(struct device *hwdev, char *dma_addr, size_t size, |
d7ef1533 KRW |
562 | enum dma_data_direction dir, |
563 | enum dma_sync_target target) | |
1da177e4 | 564 | { |
ff7204a7 | 565 | int index = (dma_addr - (char *)phys_to_virt(io_tlb_start)) >> IO_TLB_SHIFT; |
bc40ac66 BB |
566 | phys_addr_t phys = io_tlb_orig_addr[index]; |
567 | ||
568 | phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); | |
df336d1c | 569 | |
de69e0f0 JL |
570 | switch (target) { |
571 | case SYNC_FOR_CPU: | |
572 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 573 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
34814545 ES |
574 | else |
575 | BUG_ON(dir != DMA_TO_DEVICE); | |
de69e0f0 JL |
576 | break; |
577 | case SYNC_FOR_DEVICE: | |
578 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 579 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
34814545 ES |
580 | else |
581 | BUG_ON(dir != DMA_FROM_DEVICE); | |
de69e0f0 JL |
582 | break; |
583 | default: | |
1da177e4 | 584 | BUG(); |
de69e0f0 | 585 | } |
1da177e4 | 586 | } |
d7ef1533 | 587 | EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single); |
1da177e4 LT |
588 | |
589 | void * | |
590 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
06a54497 | 591 | dma_addr_t *dma_handle, gfp_t flags) |
1da177e4 | 592 | { |
563aaf06 | 593 | dma_addr_t dev_addr; |
1da177e4 LT |
594 | void *ret; |
595 | int order = get_order(size); | |
284901a9 | 596 | u64 dma_mask = DMA_BIT_MASK(32); |
1e74f300 FT |
597 | |
598 | if (hwdev && hwdev->coherent_dma_mask) | |
599 | dma_mask = hwdev->coherent_dma_mask; | |
1da177e4 | 600 | |
25667d67 | 601 | ret = (void *)__get_free_pages(flags, order); |
e05ed4d1 AD |
602 | if (ret) { |
603 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); | |
604 | if (dev_addr + size - 1 > dma_mask) { | |
605 | /* | |
606 | * The allocated memory isn't reachable by the device. | |
607 | */ | |
608 | free_pages((unsigned long) ret, order); | |
609 | ret = NULL; | |
610 | } | |
1da177e4 LT |
611 | } |
612 | if (!ret) { | |
613 | /* | |
bfc5501f KRW |
614 | * We are either out of memory or the device can't DMA to |
615 | * GFP_DMA memory; fall back on map_single(), which | |
ceb5ac32 | 616 | * will grab memory from the lowest available address range. |
1da177e4 | 617 | */ |
e05ed4d1 AD |
618 | phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE); |
619 | if (paddr == SWIOTLB_MAP_ERROR) | |
1da177e4 | 620 | return NULL; |
1da177e4 | 621 | |
e05ed4d1 AD |
622 | ret = phys_to_virt(paddr); |
623 | dev_addr = phys_to_dma(hwdev, paddr); | |
624 | } | |
1da177e4 LT |
625 | |
626 | /* Confirm address can be DMA'd by device */ | |
ac2b3e67 | 627 | if (dev_addr + size - 1 > dma_mask) { |
563aaf06 | 628 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", |
1e74f300 | 629 | (unsigned long long)dma_mask, |
563aaf06 | 630 | (unsigned long long)dev_addr); |
a2b89b59 FT |
631 | |
632 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
bfc5501f | 633 | swiotlb_tbl_unmap_single(hwdev, ret, size, DMA_TO_DEVICE); |
a2b89b59 | 634 | return NULL; |
1da177e4 | 635 | } |
e05ed4d1 | 636 | |
1da177e4 | 637 | *dma_handle = dev_addr; |
e05ed4d1 AD |
638 | memset(ret, 0, size); |
639 | ||
1da177e4 LT |
640 | return ret; |
641 | } | |
874d6a95 | 642 | EXPORT_SYMBOL(swiotlb_alloc_coherent); |
1da177e4 LT |
643 | |
644 | void | |
645 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
02ca646e | 646 | dma_addr_t dev_addr) |
1da177e4 | 647 | { |
862d196b | 648 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
02ca646e | 649 | |
aa24886e | 650 | WARN_ON(irqs_disabled()); |
02ca646e FT |
651 | if (!is_swiotlb_buffer(paddr)) |
652 | free_pages((unsigned long)vaddr, get_order(size)); | |
1da177e4 | 653 | else |
bfc5501f KRW |
654 | /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */ |
655 | swiotlb_tbl_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); | |
1da177e4 | 656 | } |
874d6a95 | 657 | EXPORT_SYMBOL(swiotlb_free_coherent); |
1da177e4 LT |
658 | |
659 | static void | |
22d48269 KRW |
660 | swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir, |
661 | int do_panic) | |
1da177e4 LT |
662 | { |
663 | /* | |
664 | * Ran out of IOMMU space for this operation. This is very bad. | |
665 | * Unfortunately the drivers cannot handle this operation properly. | |
17e5ad6c | 666 | * unless they check for dma_mapping_error (most don't) |
1da177e4 LT |
667 | * When the mapping is small enough return a static buffer to limit |
668 | * the damage, or panic when the transfer is too big. | |
669 | */ | |
563aaf06 | 670 | printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " |
94b32486 | 671 | "device %s\n", size, dev ? dev_name(dev) : "?"); |
1da177e4 | 672 | |
c7084b35 CD |
673 | if (size <= io_tlb_overflow || !do_panic) |
674 | return; | |
675 | ||
676 | if (dir == DMA_BIDIRECTIONAL) | |
677 | panic("DMA: Random memory could be DMA accessed\n"); | |
678 | if (dir == DMA_FROM_DEVICE) | |
679 | panic("DMA: Random memory could be DMA written\n"); | |
680 | if (dir == DMA_TO_DEVICE) | |
681 | panic("DMA: Random memory could be DMA read\n"); | |
1da177e4 LT |
682 | } |
683 | ||
684 | /* | |
685 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
17e5ad6c | 686 | * physical address to use is returned. |
1da177e4 LT |
687 | * |
688 | * Once the device is given the dma address, the device owns this memory until | |
ceb5ac32 | 689 | * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. |
1da177e4 | 690 | */ |
f98eee8e FT |
691 | dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, |
692 | unsigned long offset, size_t size, | |
693 | enum dma_data_direction dir, | |
694 | struct dma_attrs *attrs) | |
1da177e4 | 695 | { |
e05ed4d1 | 696 | phys_addr_t map, phys = page_to_phys(page) + offset; |
862d196b | 697 | dma_addr_t dev_addr = phys_to_dma(dev, phys); |
1da177e4 | 698 | |
34814545 | 699 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 700 | /* |
ceb5ac32 | 701 | * If the address happens to be in the device's DMA window, |
1da177e4 LT |
702 | * we can safely return the device addr and not worry about bounce |
703 | * buffering it. | |
704 | */ | |
b9394647 | 705 | if (dma_capable(dev, dev_addr, size) && !swiotlb_force) |
1da177e4 LT |
706 | return dev_addr; |
707 | ||
e05ed4d1 | 708 | /* Oh well, have to allocate and map a bounce buffer. */ |
f98eee8e | 709 | map = map_single(dev, phys, size, dir); |
e05ed4d1 | 710 | if (map == SWIOTLB_MAP_ERROR) { |
f98eee8e | 711 | swiotlb_full(dev, size, dir, 1); |
ee3f6ba8 | 712 | return phys_to_dma(dev, io_tlb_overflow_buffer); |
1da177e4 LT |
713 | } |
714 | ||
e05ed4d1 | 715 | dev_addr = phys_to_dma(dev, map); |
1da177e4 | 716 | |
e05ed4d1 | 717 | /* Ensure that the address returned is DMA'ble */ |
fba99fa3 | 718 | if (!dma_capable(dev, dev_addr, size)) { |
e05ed4d1 | 719 | swiotlb_tbl_unmap_single(dev, phys_to_virt(map), size, dir); |
ee3f6ba8 | 720 | return phys_to_dma(dev, io_tlb_overflow_buffer); |
fba99fa3 | 721 | } |
1da177e4 LT |
722 | |
723 | return dev_addr; | |
724 | } | |
f98eee8e | 725 | EXPORT_SYMBOL_GPL(swiotlb_map_page); |
1da177e4 | 726 | |
1da177e4 LT |
727 | /* |
728 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
ceb5ac32 | 729 | * match what was provided for in a previous swiotlb_map_page call. All |
1da177e4 LT |
730 | * other usages are undefined. |
731 | * | |
732 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
733 | * whatever the device wrote there. | |
734 | */ | |
7fcebbd2 | 735 | static void unmap_single(struct device *hwdev, dma_addr_t dev_addr, |
22d48269 | 736 | size_t size, enum dma_data_direction dir) |
1da177e4 | 737 | { |
862d196b | 738 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
1da177e4 | 739 | |
34814545 | 740 | BUG_ON(dir == DMA_NONE); |
7fcebbd2 | 741 | |
02ca646e | 742 | if (is_swiotlb_buffer(paddr)) { |
bfc5501f | 743 | swiotlb_tbl_unmap_single(hwdev, phys_to_virt(paddr), size, dir); |
7fcebbd2 BB |
744 | return; |
745 | } | |
746 | ||
747 | if (dir != DMA_FROM_DEVICE) | |
748 | return; | |
749 | ||
02ca646e FT |
750 | /* |
751 | * phys_to_virt doesn't work with hihgmem page but we could | |
752 | * call dma_mark_clean() with hihgmem page here. However, we | |
753 | * are fine since dma_mark_clean() is null on POWERPC. We can | |
754 | * make dma_mark_clean() take a physical address if necessary. | |
755 | */ | |
756 | dma_mark_clean(phys_to_virt(paddr), size); | |
7fcebbd2 BB |
757 | } |
758 | ||
759 | void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, | |
760 | size_t size, enum dma_data_direction dir, | |
761 | struct dma_attrs *attrs) | |
762 | { | |
763 | unmap_single(hwdev, dev_addr, size, dir); | |
1da177e4 | 764 | } |
f98eee8e | 765 | EXPORT_SYMBOL_GPL(swiotlb_unmap_page); |
874d6a95 | 766 | |
1da177e4 LT |
767 | /* |
768 | * Make physical memory consistent for a single streaming mode DMA translation | |
769 | * after a transfer. | |
770 | * | |
ceb5ac32 | 771 | * If you perform a swiotlb_map_page() but wish to interrogate the buffer |
17e5ad6c TL |
772 | * using the cpu, yet do not wish to teardown the dma mapping, you must |
773 | * call this function before doing so. At the next point you give the dma | |
1da177e4 LT |
774 | * address back to the card, you must first perform a |
775 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
776 | */ | |
be6b0267 | 777 | static void |
8270f3f1 | 778 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, |
d7ef1533 KRW |
779 | size_t size, enum dma_data_direction dir, |
780 | enum dma_sync_target target) | |
1da177e4 | 781 | { |
862d196b | 782 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
1da177e4 | 783 | |
34814545 | 784 | BUG_ON(dir == DMA_NONE); |
380d6878 | 785 | |
02ca646e | 786 | if (is_swiotlb_buffer(paddr)) { |
bfc5501f KRW |
787 | swiotlb_tbl_sync_single(hwdev, phys_to_virt(paddr), size, dir, |
788 | target); | |
380d6878 BB |
789 | return; |
790 | } | |
791 | ||
792 | if (dir != DMA_FROM_DEVICE) | |
793 | return; | |
794 | ||
02ca646e | 795 | dma_mark_clean(phys_to_virt(paddr), size); |
1da177e4 LT |
796 | } |
797 | ||
8270f3f1 JL |
798 | void |
799 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 800 | size_t size, enum dma_data_direction dir) |
8270f3f1 | 801 | { |
de69e0f0 | 802 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); |
8270f3f1 | 803 | } |
874d6a95 | 804 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); |
8270f3f1 | 805 | |
1da177e4 LT |
806 | void |
807 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 808 | size_t size, enum dma_data_direction dir) |
1da177e4 | 809 | { |
de69e0f0 | 810 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); |
1da177e4 | 811 | } |
874d6a95 | 812 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); |
1da177e4 LT |
813 | |
814 | /* | |
815 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
ceb5ac32 | 816 | * This is the scatter-gather version of the above swiotlb_map_page |
1da177e4 LT |
817 | * interface. Here the scatter gather list elements are each tagged with the |
818 | * appropriate dma address and length. They are obtained via | |
819 | * sg_dma_{address,length}(SG). | |
820 | * | |
821 | * NOTE: An implementation may be able to use a smaller number of | |
822 | * DMA address/length pairs than there are SG table elements. | |
823 | * (for example via virtual mapping capabilities) | |
824 | * The routine returns the number of addr/length pairs actually | |
825 | * used, at most nents. | |
826 | * | |
ceb5ac32 | 827 | * Device ownership issues as mentioned above for swiotlb_map_page are the |
1da177e4 LT |
828 | * same here. |
829 | */ | |
830 | int | |
309df0c5 | 831 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, |
160c1d8e | 832 | enum dma_data_direction dir, struct dma_attrs *attrs) |
1da177e4 | 833 | { |
dbfd49fe | 834 | struct scatterlist *sg; |
1da177e4 LT |
835 | int i; |
836 | ||
34814545 | 837 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 838 | |
dbfd49fe | 839 | for_each_sg(sgl, sg, nelems, i) { |
961d7d0e | 840 | phys_addr_t paddr = sg_phys(sg); |
862d196b | 841 | dma_addr_t dev_addr = phys_to_dma(hwdev, paddr); |
bc40ac66 | 842 | |
cf56e3f2 | 843 | if (swiotlb_force || |
b9394647 | 844 | !dma_capable(hwdev, dev_addr, sg->length)) { |
e05ed4d1 AD |
845 | phys_addr_t map = map_single(hwdev, sg_phys(sg), |
846 | sg->length, dir); | |
847 | if (map == SWIOTLB_MAP_ERROR) { | |
1da177e4 LT |
848 | /* Don't panic here, we expect map_sg users |
849 | to do proper error handling. */ | |
850 | swiotlb_full(hwdev, sg->length, dir, 0); | |
309df0c5 AK |
851 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
852 | attrs); | |
dbfd49fe | 853 | sgl[0].dma_length = 0; |
1da177e4 LT |
854 | return 0; |
855 | } | |
e05ed4d1 | 856 | sg->dma_address = phys_to_dma(hwdev, map); |
1da177e4 LT |
857 | } else |
858 | sg->dma_address = dev_addr; | |
859 | sg->dma_length = sg->length; | |
860 | } | |
861 | return nelems; | |
862 | } | |
309df0c5 AK |
863 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); |
864 | ||
865 | int | |
866 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
22d48269 | 867 | enum dma_data_direction dir) |
309df0c5 AK |
868 | { |
869 | return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
870 | } | |
874d6a95 | 871 | EXPORT_SYMBOL(swiotlb_map_sg); |
1da177e4 LT |
872 | |
873 | /* | |
874 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
ceb5ac32 | 875 | * concerning calls here are the same as for swiotlb_unmap_page() above. |
1da177e4 LT |
876 | */ |
877 | void | |
309df0c5 | 878 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
160c1d8e | 879 | int nelems, enum dma_data_direction dir, struct dma_attrs *attrs) |
1da177e4 | 880 | { |
dbfd49fe | 881 | struct scatterlist *sg; |
1da177e4 LT |
882 | int i; |
883 | ||
34814545 | 884 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 885 | |
7fcebbd2 BB |
886 | for_each_sg(sgl, sg, nelems, i) |
887 | unmap_single(hwdev, sg->dma_address, sg->dma_length, dir); | |
888 | ||
1da177e4 | 889 | } |
309df0c5 AK |
890 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); |
891 | ||
892 | void | |
893 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
22d48269 | 894 | enum dma_data_direction dir) |
309df0c5 AK |
895 | { |
896 | return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
897 | } | |
874d6a95 | 898 | EXPORT_SYMBOL(swiotlb_unmap_sg); |
1da177e4 LT |
899 | |
900 | /* | |
901 | * Make physical memory consistent for a set of streaming mode DMA translations | |
902 | * after a transfer. | |
903 | * | |
904 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
905 | * and usage. | |
906 | */ | |
be6b0267 | 907 | static void |
dbfd49fe | 908 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, |
d7ef1533 KRW |
909 | int nelems, enum dma_data_direction dir, |
910 | enum dma_sync_target target) | |
1da177e4 | 911 | { |
dbfd49fe | 912 | struct scatterlist *sg; |
1da177e4 LT |
913 | int i; |
914 | ||
380d6878 BB |
915 | for_each_sg(sgl, sg, nelems, i) |
916 | swiotlb_sync_single(hwdev, sg->dma_address, | |
de69e0f0 | 917 | sg->dma_length, dir, target); |
1da177e4 LT |
918 | } |
919 | ||
8270f3f1 JL |
920 | void |
921 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 922 | int nelems, enum dma_data_direction dir) |
8270f3f1 | 923 | { |
de69e0f0 | 924 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); |
8270f3f1 | 925 | } |
874d6a95 | 926 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); |
8270f3f1 | 927 | |
1da177e4 LT |
928 | void |
929 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 930 | int nelems, enum dma_data_direction dir) |
1da177e4 | 931 | { |
de69e0f0 | 932 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); |
1da177e4 | 933 | } |
874d6a95 | 934 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); |
1da177e4 LT |
935 | |
936 | int | |
8d8bb39b | 937 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) |
1da177e4 | 938 | { |
ee3f6ba8 | 939 | return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer)); |
1da177e4 | 940 | } |
874d6a95 | 941 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); |
1da177e4 LT |
942 | |
943 | /* | |
17e5ad6c | 944 | * Return whether the given device DMA address mask can be supported |
1da177e4 | 945 | * properly. For example, if your device can only drive the low 24-bits |
17e5ad6c | 946 | * during bus mastering, then you would pass 0x00ffffff as the mask to |
1da177e4 LT |
947 | * this function. |
948 | */ | |
949 | int | |
563aaf06 | 950 | swiotlb_dma_supported(struct device *hwdev, u64 mask) |
1da177e4 | 951 | { |
c40dba06 | 952 | return phys_to_dma(hwdev, io_tlb_end - 1) <= mask; |
1da177e4 | 953 | } |
1da177e4 | 954 | EXPORT_SYMBOL(swiotlb_dma_supported); |